JP4722550B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device in which a fine circuit pattern is formed by plasma etching using a photoresist formed in a predetermined shape as a mask.

  2. Description of the Related Art Conventionally, in the formation of circuit patterns in the manufacturing process of a semiconductor device, a photolithography technique that uses a photoresist and transfers a desired pattern by exposure, development processing, or the like has been used. That is, by using this photolithography technique, a resist film made of a photoresist is formed into a predetermined shape, a mask is formed, and plasma etching or the like is performed through this mask, so that a recess having a predetermined shape is formed on the lower layer of the resist film. Protrusions are formed.

  The photolithography technology as described above has a certain limit in resolution because of the wavelength of light used for exposure, etc., and it is difficult to form openings or the like having dimensions below the resolution limit in the resist film. It is.

  For this reason, after forming a resist film in a predetermined shape by photolithography technology, a polymer layer is formed on the entire surface of the substrate by CVD or the like, and this polymer layer is anisotropically etched so that only the polymer layer on the side wall of the resist film is formed. Is known, and etching is performed using a mask in which the polymer layer remains and the opening diameter is reduced, thereby forming a groove or hole having a width less than the resolution limit in the photolithography technique. (For example, refer to Patent Document 1).

In the photolithography technique, an antireflection film (BARC) is also used to prevent the generation of standing waves due to multiple interference in the resist film. Further, the antireflection film and the resist film are laterally trimmed by plasma etching using a gas containing CF ₄ gas and O ₂ gas, so that the width of the pattern of the first resist film is narrower. A technique for forming a wiring having a line width or the like is also known (see, for example, Patent Document 2).
Japanese Patent Laid-Open No. 2002-110654 (page 2-5, figure 1-6) International Publication No. 03/007357 pamphlet (Specifications, pages 9-18, Fig. 1-7)

  Among the background arts described above, in the technique of trimming the antireflection film and the resist film in the lateral direction, a wiring having a line width narrower than the width of the resist pattern can be formed. For example, a hole is formed in the lower layer by etching. In this case, the opening diameter of the hole cannot be made smaller than the opening diameter of the resist pattern.

  Also, in the method of forming a polymer layer on the entire surface of the substrate by CVD or the like and anisotropically etching this polymer layer to leave only the polymer layer on the side wall of the resist film, the polymer layer forming step by CVD, There is a problem that a process such as an anisotropic etching process is required, and the productivity decreases due to an increase in the number of processes.

  The present invention has been made in response to the above-described conventional circumstances, and can form a pattern such as a hole having a small diameter without causing a decrease in productivity due to an increase in the number of processes. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can manufacture a semiconductor device with high productivity with high productivity.

The method of manufacturing a semiconductor device according to claim 1, wherein a first high frequency having a first frequency is applied to a processing gas to generate plasma of the processing gas, and a second frequency lower than the first frequency is generated. A second high frequency signal having a predetermined opening pattern formed on the surface of the substrate to be processed is used as a mask, and an organic material formed under the resist film is applied to the substrate to be processed. In the method of manufacturing a semiconductor device for etching the antireflection film, by changing the applied power of the first high frequency, the opening size of the opening formed in the antireflection film made of the organic material is controlled, and After etching the antireflection film made of the organic material, the antireflection film made of the organic material and the resist film are used as masks to expose the antireflection film made of the organic material. And, the TEOS oxide film and the SiCO film structure TEOS oxide film is formed on the SiCO film, have rows underlayer etching to etch in one step by using the same etching gas, the lower Chimaku etching, Plasma etching is performed using an etching gas containing a fluorocarbon gas and a hydrogen gas .

According to a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the first aspect, wherein the opening size of the opening of the antireflection film made of the organic material formed by the antireflection film etching is the same as that before the antireflection film etching. It is smaller than the opening size of the opening pattern of the resist film.

According to a third aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the second aspect, wherein the opening size of the opening pattern of the resist film after etching the antireflection film is equal to the opening pattern of the resist film before etching the antireflection film . It is characterized by being smaller than the opening size.

According to a fourth aspect of the present invention, there is provided a semiconductor device manufacturing method according to any one of the first to third aspects, wherein the upper electrode and the lower electrode are arranged in parallel when the antireflection film is etched. A plasma etching apparatus is used, wherein the first high frequency is applied to the upper electrode, and the second high frequency is applied to the lower electrode on which the substrate to be processed is placed.

According to a fifth aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the fourth aspect , wherein the first frequency is 13.56 to 100 MHz and the power density of the first high frequency is 1.63 × 10 ⁻² to 4. .89 × 10 ⁻² W / cm ² .

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the fourth or fifth aspect , wherein the second frequency is 0.8 to 27.12 MHz and the power density of the second high frequency is 2.0 × 10. ^-2 W / cm ² or less.

According to a seventh aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to any one of the first to sixth aspects, wherein the fluorocarbon gas is CF ₄ gas.

The method of manufacturing a semiconductor device according to claim 8 is the method according to any one of claims 1 to 7 , wherein an opening size of the opening of the base formed by the base film etching is the resist before the antireflection film etching. It is smaller than the opening size of the opening pattern of the film.

According to a ninth aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a resist film having a predetermined opening pattern formed on a surface of a substrate to be processed as a mask; and an antireflection made of an organic material formed under the resist film. A method of manufacturing a semiconductor device in which an exposed underlayer is etched using the antireflection film made of the organic material and the resist film as a mask after etching the film, wherein the underlayer is a TEOS oxide film on a SiCO film. The formed structure is characterized in that the TEOS oxide film and the SiCO film are plasma-etched in one step using the same etching gas containing a fluorocarbon gas and a hydrogen gas.

The method for manufacturing a semiconductor device according to claim 10 is characterized in that, in claim 9 , the fluorocarbon gas is CF ₄ gas.

The method of manufacturing a semiconductor device according to claim 11 is the method according to claim 9 or 10 , wherein the opening size of the opening of the base formed by etching is the resist film before etching of the antireflection film made of the organic material. It is characterized by being smaller than the opening size of the opening pattern.

  According to the present invention, it is possible to form a pattern such as a hole having a small diameter without causing a decrease in productivity due to an increase in the number of processes, and a semiconductor capable of manufacturing a highly integrated semiconductor device with high productivity. An apparatus manufacturing method can be provided.

  The details of the method for manufacturing a semiconductor device of the present invention will be described below with reference to the drawings.

  FIG. 1 shows the configuration of a plasma etching apparatus used in one embodiment of the present invention. As shown in the figure, the plasma etching apparatus 1 is configured as a capacitively coupled parallel plate plasma etching apparatus in which electrode plates are opposed in parallel in the vertical direction, and a plasma forming power source is connected to one of them.

  The plasma etching apparatus 1 has a chamber 2 formed into a cylindrical shape made of aluminum having an anodized surface (anodized), for example, and the chamber 2 is grounded. A substantially cylindrical susceptor support 4 for mounting the semiconductor wafer W is provided on the bottom of the chamber 2 via an insulating plate 3 such as ceramics. On the susceptor support 4, a susceptor 5 constituting a lower electrode is provided. A high pass filter (HPF) 6 is connected to the susceptor 5.

  Inside the susceptor support 4, a temperature control medium chamber 7 is provided. Then, the temperature control medium is introduced into the temperature control medium chamber 7 through the introduction pipe 8, circulated, and discharged from the discharge pipe 9. The circulation of the temperature adjusting medium allows the susceptor 5 to be controlled to a desired temperature.

  The upper center portion of the susceptor 5 is formed in a convex disk shape, and an electrostatic chuck 11 having substantially the same shape as the semiconductor wafer W is provided thereon. The electrostatic chuck 11 has a configuration in which an electrode 12 is interposed between insulating materials. The electrostatic chuck 11 electrostatically attracts the semiconductor wafer W by Coulomb force when a DC voltage of, for example, 1.5 kV is applied from a DC power source 13 connected to the electrode 12.

  The insulating plate 3, the susceptor support 4, the susceptor 5, and further the electrostatic chuck 11 are supplied with a gas for supplying a heat transfer medium (for example, He gas) to the back surface of the semiconductor wafer W as the object to be processed. A passage 14 is formed, and heat is transferred between the susceptor 5 and the semiconductor wafer W through the heat transfer medium, so that the semiconductor wafer W is maintained at a predetermined temperature.

  An annular focus ring 15 is disposed at the upper peripheral edge of the susceptor 5 so as to surround the semiconductor wafer W placed on the electrostatic chuck 11. The focus ring 15 is made of an insulating material or a conductive material such as ceramics or quartz, and improves etching uniformity.

  An upper electrode 21 is provided above the susceptor 5 so as to face the susceptor 5 in parallel. The upper electrode 21 is supported inside the chamber 2 via an insulating material 22. The upper electrode 21 has an opposing surface to the susceptor 5 and has an electrode plate 24 (for example, made of quartz) having a large number of discharge holes 23, and an electrode support 25 (conductive material, for example, a surface having a surface that supports the electrode plate 24. Made of anodized aluminum). The interval between the susceptor 5 and the upper electrode 21 can be adjusted.

A gas inlet 26 is provided at the center of the electrode support 25 in the upper electrode 21. A gas supply pipe 27 is connected to the gas inlet 26. Further, a processing gas supply source 30 is connected to the gas supply pipe 27 via a valve 28 and a mass flow controller 29. An etching gas for plasma etching is supplied from the processing gas supply source 30. FIG. 1 shows only one processing gas supply system including the processing gas supply source 30 and the like. However, a plurality of these processing gas supply systems are provided. For example, CF ₄ , CHF ₃ , C ₄ F ₈ , H ₂ , Ar, N _2, etc. are configured so that the flow rate can be independently controlled and supplied into the chamber 2.

  On the other hand, an exhaust pipe 31 is connected to the bottom of the chamber 2, and an exhaust device 35 is connected to the exhaust pipe 31. The exhaust device 35 includes a vacuum pump such as a turbo molecular pump, and is configured to be able to evacuate the chamber 2 to a predetermined reduced pressure atmosphere (for example, 0.67 Pa or less). A gate valve 32 is provided on the side wall of the chamber 2. With the gate valve 32 opened, the semiconductor wafer W is transferred between adjacent load lock chambers (not shown).

  A first high frequency power supply 40 is connected to the upper electrode 21, and a matching device 41 is inserted in the feeder line. Further, a low pass filter (LPF) 42 is connected to the upper electrode 21. The first high frequency power supply 40 has a frequency in the range of 13.56 to 100 MHz. By applying high-frequency power in this way, a high-density plasma can be formed in a preferable dissociated state in the chamber 2, and plasma processing under a lower pressure condition than before can be performed. The frequency of the first high frequency power supply 40 is preferably 50 to 80 MHz, and typically, the illustrated frequency of 60 MHz or the vicinity thereof is adopted.

  A second high-frequency power source 50 is connected to the susceptor 5 serving as a lower electrode, and a matching unit 51 is interposed in the power supply line. The second high frequency power supply 50 has a lower frequency than the first high frequency power supply 40 described above, for example, a frequency in the range of 800 kHz to 27.12 MHz. By applying a frequency in such a range, it is possible to give an appropriate ion action without damaging the semiconductor wafer W that is the object to be processed. The frequency of the second high-frequency power supply 50 is typically a frequency such as the illustrated 2 MHz or 800 KHz.

  FIG. 2 shows an enlarged view of the structure of the substrate on which plasma etching is performed in the present embodiment. In FIG. 2A, reference numeral 100 denotes a semiconductor substrate (semiconductor wafer) on which a wiring made of copper or aluminum (not shown) is formed. On this semiconductor wafer 100, an SiC film (stopper film) 101, a Low-K film (SiOC film or the like (for example, Coral (Novelas), Aurora (ASM)), Orion (Trikon), black diamond (Applied) Materials Co., Ltd. (black diamond is used in this embodiment))), TEOS oxide film 103, and organic antireflection film (BARC) 104 made of an organic material are formed in this order from the bottom. A mask layer 105 made of an ArF resist is formed on the organic antireflection film 104, and a predetermined opening pattern (in this embodiment, a plurality of opening patterns) is formed on the mask layer 105 by exposure, development processes, and the like. A circular hole-shaped opening pattern) is formed.

  Then, from the state of FIG. 2A, the organic antireflection film 104 is etched through the mask layer 105 using the apparatus shown in FIG. 1 to obtain the state of FIG. The ArF resist is a resist that is exposed with laser light using ArF gas as a light source, and can form a finer pattern than a KrF resist. The main substances constituting this ArF resist are, for example, cycloolefin resin, alicyclic methacrylate resin, alicyclic acrylate resin, cycloolefin-maleic anhydride resin, and the like.

  Next, the above-described etching process by the plasma etching apparatus 1 shown in FIG. 1 will be described.

  First, as described above, the semiconductor wafer W on which the organic antireflection film 104 and the mask layer 105 patterned in a predetermined pattern are formed is opened from the load lock chamber (not shown) to the chamber. 2 is carried in and placed on the electrostatic chuck 11. The semiconductor wafer W is electrostatically adsorbed on the electrostatic chuck 11 by applying a DC voltage from the DC power source 13.

Next, the gate valve 32 is closed, and the inside of the chamber 2 is evacuated to a predetermined vacuum level by the exhaust device 35. Thereafter, the valve 28 is opened, and the flow rate of CF ₄ gas (etching gas) from the processing gas supply source 30 is adjusted by the mass flow controller 29 while the processing gas supply pipe 27, the gas inlet 26, and the upper electrode 21 are connected. Through the hollow portion and the discharge hole 23 of the electrode plate 24, the semiconductor wafer W is uniformly discharged as shown by the arrow in FIG.

  At the same time, the pressure in the chamber 2 is maintained at a predetermined pressure (for example, 6.7 Pa). Then, a high frequency voltage is applied from the first high frequency power source 40 to the upper electrode 21 to turn the etching gas into plasma. At the same time, a high-frequency voltage is applied from the second high-frequency power supply 50 to the susceptor 5 as the lower electrode, and ions in the plasma are drawn to etch the organic antireflection film 104 of the semiconductor wafer W. Etching is terminated when the state (b) is reached.

According to the above-described process, a 200 mm wafer is used as the first example under the following conditions:
Etching gas: CF ₄ (flow rate 100SCCM)
Pressure: 6.7 Pa (50 mTorr)
High frequency power applied to upper electrode: 1000W
Lower electrode applied high frequency power: 100W
Distance between electrodes: 60mm
Susceptor temperature: 20 ° C
Time: Etching was performed in 40 seconds.

  When the pattern of the organic antireflection film 104 obtained by the etching process of the first embodiment was observed with an SEM (scanning electron microscope), as shown in FIG. Deposits (depots) presumed to be polymer P can be seen in the inner part, and the shape of the side wall part of the organic antireflection film 104 has become an oblique shape with a lower opening diameter (opening dimension). .

  Regarding specific numerical values of the opening diameter, in the central portion of the wafer, the opening diameter (top CD) (corresponding to d1 in FIG. 2B) of the uppermost portion of the mask layer 105 before etching was 140 nm. On the other hand, the opening diameter (bottom CD) (corresponding to d2 in FIG. 2B) of the bottom portion of the organic antireflection film 104 after etching was 134 nm (CD shift = −6 nm). Further, the above-mentioned value in the peripheral portion of the wafer is that the opening diameter (top CD) of the uppermost portion of the mask layer 105 is 141 nm, whereas the opening diameter (bottom CD) of the bottom portion of the organic antireflection film 104. Was 130 nm (CD shift = −11 nm).

  Next, as a second example, etching was performed under the same conditions except that the high frequency power applied to the upper electrode in the above example was 1500 W. As a result, the opening diameter (top CD) of the uppermost portion of the mask layer 105 at the center of the wafer is 140 nm, whereas the opening diameter (bottom CD) of the bottom of the organic antireflection film 104 is 119 nm (CD shift = −21 nm), the uppermost opening diameter (top CD) of the mask layer 105 at the periphery of the wafer is 141 nm, whereas the lower opening diameter (bottom CD) of the organic antireflection film 104 is 118 nm (CD shift = -23 nm).

  Next, as a third example, etching was performed under the same conditions except that the upper electrode applied high frequency power in the above example was 2200 W. As a result, the opening diameter (top CD) of the uppermost portion of the mask layer 105 at the center of the wafer is 140 nm, whereas the opening diameter (bottom CD) of the bottom of the organic antireflection film 104 is 88 nm (CD shift = −52 nm), the uppermost opening diameter (top CD) of the mask layer 105 at the periphery of the wafer is 141 nm, whereas the lower opening diameter (bottom CD) of the organic antireflection film 104 is 88 nm (CD shift = −53 nm).

The graph of FIG. 3 shows the measurement results in the above-described example, where the vertical axis represents the amount of change in the aperture diameter (CD shift (nm)), and the horizontal axis represents the high frequency power (power density) applied to the upper electrode at a frequency of 60 MHz. (W / cm ² )). As shown in the figure, the size of the opening at the bottom of the etched organic antireflection film 104 can be controlled by changing the power applied to the upper electrode.

Therefore, after the above etching, as shown in FIG. 4 to be described later, by etching the lower TEOS oxide film 103 and the Low-K film 102, the openings formed in the mask layer 105 first in these layers are formed. Smaller size openings can be formed. As described above, if the CD shift is set to be negative and a hole having an opening diameter smaller than the opening diameter of the mask layer 105 is formed, a pattern such as a fine hole having a resolution higher than the resolution of the lithography technique can be formed. Thus, when the CD shift is negative, it is preferable that the upper electrode applied high frequency power has a power density of 1.63 × 10 ⁻² W / cm ² (applied power 1000 W) or more as shown in FIG. Since the CD shift progresses substantially linearly, it is preferable to set the power density to about 4.89 × 10 ⁻² W / cm ² (applied power 3000 W) or less as an upper limit.

In FIG. 5, the vertical axis represents the CD shift amount and the photoresist (PR) residual film amount, and the vertical axis represents the plasma density (electron density (Ne)). The result of investigating the relationship is shown. The graph of FIG. 6 shows the results of examining the relationship between the plasma density and the concentration of C ₂ radicals and CF ₂ radicals with respect to Ar, where the vertical axis is the radical concentration and the horizontal axis is the plasma density (electron density (Ne)). It is shown. The plasma density at the three points shown in the graph of FIG. 5 corresponds to the case where the upper electrode applied high frequency power is 1000 W, 1500 W, and 2200 W, respectively.

When the power density (applied power) of the high-frequency power applied to the upper electrode is increased, the plasma density is increased. Then, as shown in FIG. 5, when the plasma density increases, the CD shift amount to the minus side increases and the photoresist remaining film amount increases. Further, as shown in FIG. 6, as the plasma density increases, the concentration of C ₂ radicals also increases. It can be seen that the increase in C ₂ radicals increases the amount of deposition (deposition) in the photoresist surface and openings, and the CD shift is controlled to the minus side.

Note that a preferable power density range of the above-described upper electrode applied high-frequency power is 1.63 × 10 ⁻² W / cm ^{2 to} 4.89 × 10 ⁻² W / cm ² in terms of plasma density (electron density (Ne)). 0.334 × 10 ¹¹ cm ^{−3 to} 0.700 × 10 ¹¹ cm ⁻³ .

On the other hand, the high-frequency power applied to the lower electrode needs to be applied because the etching does not proceed at zero. However, when the applied power is increased, striation that causes vertical unevenness in the mask layer 105 made of photoresist occurs. For this reason, the power density is preferably set to 2.0 × 10 ⁻² W / cm ² (applied power 1000 W) or less, and the power density is further set to 2.0 × 10 ⁻³ W / cm ² (applied power 100 W). It is preferable to set the degree.

  Note that the organic antireflection film 104 is removed after the TEOS oxide film 103 and the low-K film 102 which are the base films are etched and removed using the mask layer 105 and the organic antireflection film 104 as a mask. There is no problem even if the shape of the side wall portion of the antireflection film 104 is inclined.

Incidentally, the etching of the TEOS oxide film 103 has been conventionally performed using, for example, CH ₂ F ₂ / O ₂ or C ₄ F ₈ / Ar / O ₂ as an etching gas.

As for the etching of the Low-K film 102, conventionally, main etching using, for example, CHF ₃ / CF ₄ / Ar / N ₂ as an etching gas, and C ₄ F ₈ / Ar / N ₂ as an etching gas, for example. A two-step etching was performed by over-etching using.

  However, the above-described method has a problem in that striations in which vertical unevenness occurs in the mask layer 105 made of photoresist occur. In order to solve such a problem, it is preferable to perform etching as follows.

That is, in this method, etching of the TEOS oxide film 103 and main etching of the Low-K film 102 are performed using, for example, CHF ₃ / CF ₄ / Ar / N ₂ (flow rate ratio: 15/15/500/80 sccm). ) Or CF ₄ / H ₂ (flow rate ratio: 70/130 sccm) in one step to obtain the state shown in FIG. In this state, the Low-K film 102 is slightly left at the bottom of the etched hole. Then, overetching using, for example, C ₄ F ₈ / Ar / N ₂ as an etching gas is performed to change the state shown in FIG. 4A to the state shown in FIG. 4B.

  The etching time of the TEOS oxide film 103 and the main etching of the Low-K film 102 is, for example, about 30 seconds, and the over-etching time is, for example, about 15 seconds.

  As described above, by performing the etching of the TEOS oxide film 103 and the main etching of the Low-K film 102 in one step using the same etching gas, striations are formed on the sidewall portions of the mask layer 105 made of photoresist. I was able to effectively suppress what happened.

  The reason is that when the etching of the TEOS oxide film 103 and the main etching of the low-K film 102 are performed using different etching gases, the TEOS oxide film 103 is deposited on the side wall portion of the mask layer 105 (see FIG. The TEOS oxide film 103 is easily deformed because the quality of the deposited polymer and the polymer deposited (deposited) on the side wall portion of the mask layer 105 during the main etching of the low-K film 102 are different. And the main etching of the Low-K film 102 in one step using the same etching gas, the quality of the polymer deposited (deposited) on the side wall portion of the mask layer 105 is uniform, so that deformation occurs. Presumed to be difficult.

Further, when CHF ₃ / CF ₄ / Ar / N ₂ is used as an etching gas for etching the TEOS oxide film 103 and the main etching of the Low-K film 102, and when CF ₄ / H ₂ is used. When using CHF ₃ / CF ₄ / Ar / N ₂ , the CD shift tends to increase to the positive side as compared with the case of using CF ₄ / H ₂ . That is, when CHF ₃ / CF ₄ / Ar / N ₂ is used, the tendency that the opening diameter decreased when the organic antireflection film 104 is etched increases again. For example, as described above, when the etching of the organic antireflection film 104 is finished, the CD shift becomes −52 nm. When the etching of the TEOS oxide film 103 and the Low-K film 102 is finished, the CD shift is performed. Shift = −25 nm, and CD shift increased to the plus side (in this case, increased by 27 nm).

On the other hand, when CF ₄ / H ₂ is used as an etching gas for etching the TEOS oxide film 103 and the main etching of the Low-K film 102, the CD shift increases to the positive side as described above. Can be suppressed. That is, when a mixed gas containing fluorocarbon gas and hydrogen gas is used as an etching gas in this way, hydrogen acts to reduce fluorine radicals, and a state in which a large amount of carbon radicals are likely to be deposited (depot) is caused. Increase to the positive side can be suppressed. Therefore, the etching gas for performing the etching of the TEOS oxide film 103 and the main etching of the low-K film 102 includes a mixed gas containing a fluorocarbon gas and a hydrogen gas, for example, a CF-based gas such as CF ₄ and a hydrogen gas. It is preferable to use a mixed gas or a mixed gas containing CHF-based gas such as CHF ₃ and hydrogen.

The graph of FIG. 7 shows the case where CHF ₃ / CF ₄ / Ar / N ₂ is used as an etching gas for performing the etching of the TEOS oxide film 103 and the main etching of the Low-K film 102, and CF ₄ / H _2. FIG. 3 shows a comparison of the CD shift state when using the CD, the vertical axis indicates the CD shift amount, and the horizontal axis indicates each step. Note that “Ini.”, “BARC”, “Ox + ME”, “OE”, and “Ash” shown on the horizontal axis are the initial state, the TEOS oxide film 103 and the Low after etching the organic antireflection film 104, respectively. It shows after the main etching of the −K film 102, after over-etching, and after ashing.

In the case of CHF ₃ / CF ₄ / Ar / N ₂ shown on the upper side in the figure, the following conditions are satisfied:
(Ox + ME process)
Etching gas: CHF ₃ / CF ₄ / Ar / N ₂ = 15/15/500/80 SCCM
Pressure: 6.7 Pa (50 mTorr)
High frequency power applied to upper electrode: 800W
Lower electrode applied high frequency power: 1700W
Distance between electrodes: 25mm
(OE process)
Etching gas: C ₄ F ₈ / Ar / N ₂ = 7/1000/120 SCCM
Pressure: 6.7 Pa (50 mTorr)
Upper electrode applied high frequency power: 1200W
Lower electrode applied high frequency power: 1700W
Distance between electrodes: 30mm
Etching was performed.

On the other hand, in the case of CF ₄ / H ₂ shown on the lower side in the figure, the following conditions are satisfied:
(Ox + ME process)
Etching gas: CF ₄ / H ₂ = 80/120 SCCM
Pressure: 4.0Pa (30mTorr)
High frequency power applied to upper electrode: 2100W
Lower electrode applied high frequency power: 1800W
Distance between electrodes: 25mm
(OE process)
Etching gas: C ₄ F ₈ / Ar / N ₂ = 7/1000/120 SCCM
Pressure: 6.7 Pa (50 mTorr)
Upper electrode applied high frequency power: 1200W
Lower electrode applied high frequency power: 1700W
Distance between electrodes: 30mm
Etching was performed.

As shown in the figure, from the state where CD shift = −52 nm when the etching of the organic antireflection film 104 is completed, the mask layer 105 and the organic antireflection film 104 are used as a mask to form a TEOS oxide film as a base film. 103 and when etching the Low-K film 102, as an etching gas, the use of _{CHF 3 / CF 4 / Ar /} N 2, over-etching end _{Ryoji the CD shift = -25 nm becomes, at the ashing endpoint, CD shift = The CD shift increases by 32 nm to the plus side by -20 nm, and the CD shift from the initial state becomes -20 nm.}

On the other hand, when CF ₄ / H ₂ is used as the etching gas, _{CD shift = −45 nm at the end of overetching, CD shift = −42 nm at the end of ashing, and the CD shift amount increasing to the plus side is 10 nm. Can be suppressed. As described above} , when the TEOS oxide film 103 and the Low-K film 102 as the base film are etched by plasma etching using the mask layer 105 and the organic antireflection film 104 as a mask,
By using a mixed gas containing carbon and fluorine as an etching gas and a mixed gas containing hydrogen gas, for example, CF ₄ / H ₂ , the CD shift amount increases to the plus side and the aperture diameter increases. Can be suppressed.

In the above plasma etching, the high frequency power applied to the upper electrode has a power density of 3.10 × 10 ⁻² W / cm ² (applied power 1900 W) to 4.89 × 10 ⁻² W / cm ² (applied power 3000 W). It is preferable to set the degree. The lower electrode applied high frequency power preferably has a power density of about 3.20 × 10 ⁻² W / cm ² (applied power 1600 W) to 5.00 × 10 ⁻² W / cm ² (applied power 2500 W). .

  As described above, in the TEOS oxide film 103 and the Low-K film 102, a hole having an opening size smaller than the opening size of the opening of the mask layer 105 can be formed.

  In the above embodiment, the case where a parallel plate type plasma etching apparatus is used has been described in the above embodiment, but the present invention is similarly applied to other plasma etching apparatuses such as an ICP plasma etching apparatus. be able to.

The figure which shows the structure of the apparatus used for the plasma etching method of one Embodiment of this invention. The figure which shows the etching process in one Embodiment of this invention. The graph which shows the relationship between the value of the high frequency electric power and the amount of CD shift in one Embodiment of this invention. The figure which shows the etching process in one Embodiment of this invention. The graph which shows the relationship between the plasma density in one Embodiment of this invention, CD shift amount, and the amount of photoresist remaining films. Graph showing the relationship between the concentration and the plasma density C ₂ radical in an embodiment of the present invention. The graph which shows the change of CD shift amount in one Embodiment and comparative example of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Plasma etching apparatus, 2 ... Chamber, 5 ... Susceptor (lower electrode), 21 ... Upper electrode, 30 ... Processing gas supply source, 40 ... 1st high frequency power supply, 50 ... 2nd High frequency power supply.

Claims (11)

A first high frequency having a first frequency is applied to the processing gas to generate plasma of the processing gas, and a second high frequency having a second frequency lower than the first frequency is applied to the substrate to be processed. A method of manufacturing a semiconductor device in which an antireflection film made of an organic material formed under the resist film is etched using a resist film having a predetermined opening pattern formed on the surface of the substrate to be applied as a mask In
Controlling the opening size of the opening formed in the antireflection film made of the organic material by changing the applied power of the first high frequency, and
After the antireflection film etching for etching the antireflection film made of the organic material, a TEOS oxide film is formed on the exposed SiCO film using the antireflection film made of the organic material and the resist film as a mask. and the TEOS oxide film and the SiCO film structure, have rows underlayer etching to etch in one step by using the same etching gas,
The method for manufacturing a semiconductor device , wherein the base film etching is performed by plasma etching using an etching gas containing a fluorocarbon gas and a hydrogen gas .   The opening size of the opening portion of the antireflection film made of the organic material formed by the antireflection film etching is smaller than the opening size of the opening pattern of the resist film before the antireflection film etching. 2. A method of manufacturing a semiconductor device according to 1.   3. The semiconductor device according to claim 2, wherein an opening dimension of the opening pattern of the resist film after etching of the antireflection film is smaller than an opening dimension of the opening pattern of the resist film before etching of the antireflection film. Method. When performing the antireflection film etching, a parallel plate type plasma etching apparatus in which an upper electrode and a lower electrode are arranged substantially in parallel is used, the first high frequency is applied to the upper electrode, and the second electrode is applied. claim 1-3 the method of manufacturing a semiconductor device according to any one of the preceding, wherein the applying a high frequency the said lower electrode substrate to be processed is placed. The first frequency is 13.56 to 100 MHz, and the power density of the first high frequency is 1.63 × 10 ^{−2 to} 4.89 × 10 ⁻² W / cm ^2. Item 5. A method for manufacturing a semiconductor device according to Item 4 . The second frequency is 0.8～27.12MHz, claim 4 or 5, wherein the power density of the second high-frequency is 2.0 × 10 ^-2 W / cm ² or less Semiconductor device manufacturing method. The fluorocarbon gas, a method of manufacturing a semiconductor device according to claim 6 any one of claims, characterized in that the CF ₄ gas. The underlayer opening dimension of the opening of the base which is formed by etching, claims 1 to 7, any one which is characterized in that less than the opening size of the opening pattern of the resist film of the antireflection film before etching The manufacturing method of the semiconductor device of description. Using a resist film having a predetermined opening pattern formed on the surface of the substrate to be processed as a mask, the antireflection film made of an organic material formed under the resist film is etched, and then the antireflection made of the organic material is used. A method of manufacturing a semiconductor device in which an exposed base is etched using a film and the resist film as a mask,
The base is a structure in which a TEOS oxide film is formed on a SiCO film, and the TEOS oxide film and the SiCO film are plasma etched in one step using the same etching gas containing a fluorocarbon gas and a hydrogen gas. A method of manufacturing a semiconductor device. The method for manufacturing a semiconductor device according to claim 9 , wherein the fluorocarbon gas is CF ₄ gas. Opening size of the opening of the base which is formed by etching, as claimed in claim 9 or 10, wherein the smaller than the opening size of the opening pattern of the resist film before the etching of the antireflection film formed of the organic material A method for manufacturing a semiconductor device.

Images