CN100365772C - Method for manufacturing a semiconductor device - Google Patents
Method for manufacturing a semiconductor device Download PDFInfo
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- CN100365772C CN100365772C CNB2005100774094A CN200510077409A CN100365772C CN 100365772 C CN100365772 C CN 100365772C CN B2005100774094 A CNB2005100774094 A CN B2005100774094A CN 200510077409 A CN200510077409 A CN 200510077409A CN 100365772 C CN100365772 C CN 100365772C
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Abstract
The invention provides a manufacturing method of a semiconductor device of a higher integration degree which is better in productivity and by which a pattern such as a hole of a micro-diameter is formed without causing deterioration of productivity due to an increase of the number of processes. An SiC film 101, a Low-K film 102, and a TEOS oxide film 103, are formed on a semiconductor wafer 100 in this order from a lower side. Moreover, a mask layer 105 with a predetermined opening pattern formed and consisting of an ArF resist is formed on the antireflective coating 104. When the organic antireflective coating 104 is etched through the mask layer 105 from a state of a Figure (a) to obtain a state in a Figure (b), an opening dimension of an opening formed at the antireflective coating 104 is controlled by changing high-frequency power to be applied to generate plasma.
Description
Technical field
The present invention relates to use the photoresist that has formed the regulation shape as mask, form the manufacture method of the semiconductor device of fine circuits figure by plasma etch process.
Background technology
The technology in past is: in the formation of the circuitous pattern in the manufacturing process of semiconductor device etc., utilized the use photoresist, and by exposure, development treatment etc., the photoetching technique that desired figure is duplicated.That is: by this photoetching technique, the resist film by photoresist constitutes forms mask with the regulation shape, by carrying out plasma etch process etc. by means of this mask, can form the recess and the protuberance of regulation shape at the layer of the downside of resist film.
Above-mentioned photoetching technique is because the wavelength of exposing light etc., and its image resolution ratio has the limit of regulation, therefore, forms comparatively difficulty such as the following sized opening of image resolution ratio limit portion on resist film.
Given this, known have a following technology: according to photoetching technique, after resist film being made the shape of regulation, utilize CVD etc., on whole of substrate, form polymeric layer, handle by this polymeric layer being carried out anisotropic etching, only remain in the polymeric layer of the side wall portion of resist film, the mask that uses opening diameter to diminish by residual this polymeric layer carries out etch processes, form groove or hole (for example, with reference to the patent documentation 1) of the following width of image resolution ratio limit in the photoetching technique.
And, also have following technology, in photoetching technique,, use antireflection film (BARC) to handle for the generation of the standing wave that prevents from resist film, to cause owing to multiple interference.And then, by with containing CF
4Gas and O
2The gas of gas carries out plasma etch process to this antireflection film, and antireflection film and resist film are laterally repaired, and compares with the width of the figure of initial resist film, can form wiring of narrow line width more etc.(for example, with reference to patent documentation 2)
[patent documentation 1] spy opens 2002-110654 (2-5 page or leaf, Fig. 1-6)
[patent documentation 2] international the 03/007357th trumpeter's volume (specification 9-18 page or leaf, Fig. 1-7) that discloses
In above-mentioned technical background, at the technical elements that antireflection film and resist film are laterally repaired, compare with the width of the figure of resist film, can form the wiring of narrow line width more, but, for example, when forming the hole by etch processes, can not make the opening diameter in this hole littler than the opening diameter of resist figure in lower floor.
In addition, by utilizing CVD on whole of substrate, to form polymeric layer, this polymeric layer is carried out anisotropic etching and only make the residual method of polymeric layer at the side wall portion of resist film, has following problem: must be based on the operation of the formation operation of the polymeric layer of CVD, anisotropic etching operation thereafter etc., along with the increase of operation, productivity ratio descends.
Summary of the invention
The present invention is based on above-mentioned existing important function for of research, provide a kind of productivity ratio that causes because of the process number increase of can not causing to descend, the figure in the hole etc. of minute diameter can be formed, the manufacturing method for semiconductor device of the high semiconductor device of integrated level can be productivity made well.
The manufacture method of inventive aspect 1 described semiconductor device, it is characterized in that, first high frequency that will have first frequency puts on handles the plasma that gas produces above-mentioned processing gas, second high frequency that will have frequency ratio above-mentioned first second frequency that ripple is low frequently puts on processed substrate, make the resist film that on the surface of above-mentioned processed substrate, forms as mask with regulation opening figure, be etched in the etched layer that forms under the above-mentioned resist film, by making the variable power that applies of above-mentioned first high frequency, be controlled at the opening size that above-mentioned etched layer is gone up the peristome that forms.
In addition, manufacture method as inventive aspect 2 described semiconductor devices, it is characterized in that: on the basis of inventive aspect 1, the opening size of the peristome by the formed above-mentioned etched layer of etch processes is littler than the opening size of the opening figure of the above-mentioned resist film before the etch processes.
In addition, the manufacture method as inventive aspect 3 described semiconductor devices is characterized in that, on the basis of inventive aspect 2, the opening size of the opening figure of the above-mentioned resist film after the etching is littler than the opening size of the opening figure of this resist film before the etching.
In addition, the manufacture method as inventive aspect 4 described semiconductor devices is characterized in that: on any 1 basis of inventive aspect 1～3, above-mentioned processing gas contains CF at least
4Gas.
In addition, the manufacture method as inventive aspect 5 described semiconductor devices is characterized in that: on any 1 basis of inventive aspect 1～4, above-mentioned etched layer is the antireflection film that is made of organic material.
In addition, manufacture method as inventive aspect 6 described semiconductor devices, it is characterized in that: on the basis of inventive aspect 5, after the above-mentioned antireflection film that is made of organic material carried out etch processes, as mask, etching is carried out in the substrate of exposing with the antireflection film that constitutes by this organic material and above-mentioned resist film.
In addition, manufacture method as inventive aspect 7 described semiconductor devices, it is characterized in that: on any 1 basis of inventive aspect 1～6, when above-mentioned etched layer is carried out etch processes, the parallel plate-type plasma etch process device that uses upper electrode and lower electrode almost parallel ground to dispose is applied to above-mentioned first high frequency on the above-mentioned upper electrode, above-mentioned second high frequency is applied to mounting has on the above-mentioned lower electrode of above-mentioned processed substrate.
In addition, the manufacture method as inventive aspect 8 described semiconductor devices is characterized in that: on the basis of inventive aspect 7, above-mentioned first frequency is 13.56～100MHz, and the power density of above-mentioned first high frequency is 1.63 * 10
-2～4.89 * 10
-2W/cm
2
In addition, the manufacture method as inventive aspect 9 described semiconductor devices is characterized in that: on the basis of inventive aspect 7 or 8, above-mentioned second frequency is 0.8～27.12MHz, the power density 2.0 * 10 of above-mentioned second high frequency
-2W/cm
2
In addition, the manufacture method as inventive aspect 10 described semiconductor devices is characterized in that: on the basis of inventive aspect 6, use the etching gas that contains fluorocarbon gas and hydrogen that plasma etching is carried out in above-mentioned substrate.
In addition, the manufacture method as inventive aspect 11 described semiconductor devices is characterized in that: on the basis of inventive aspect 10, above-mentioned fluorocarbon gas is CF
4Gas.
In addition, the manufacture method as inventive aspect 12 described semiconductor devices is characterized in that: on the basis of inventive aspect 10 or 11, above-mentioned substrate comprises the SiCO film.
In addition, the manufacture method as inventive aspect 13 described semiconductor devices is characterized in that: on the basis of inventive aspect 12, be formed with the TEOS oxide-film on the SiCO of above-mentioned substrate film.
In addition, manufacture method as inventive aspect 14 described semiconductor devices, it is characterized in that: on any 1 basis of inventive aspect 10～13, the opening size of the opening figure of the above-mentioned resist film of the opening size of the peristome of the above-mentioned substrate that forms by etch processes before than the etch processes of the antireflection film that is made of above-mentioned organic material is little.
In addition, the manufacture method of inventive aspect 15 described semiconductor devices, it is characterized in that: the resist film with regulation opening figure that will form on the surface of processed substrate is as mask, after preventing that at the reflectance coating that constitutes by organic material that forms under the above-mentioned resist film film from carrying out etch processes, with this antireflection film that constitutes by organic material and above-mentioned resist film as mask, etch processes is carried out in the substrate of exposing, above-mentioned substrate contains the SiCO film, with the etching gas that contains fluorocarbon gas and hydrogen, plasma etch process is carried out in this substrate.
In addition, the manufacture method as inventive aspect 16 described semiconductor devices is characterized in that: on the basis of inventive aspect 15, above-mentioned fluorocarbon gas is CF
4Gas.
In addition, the manufacture method as inventive aspect 17 described semiconductor devices is characterized in that: on the basis of inventive aspect 15 or 16, on the SiCO of above-mentioned substrate film, be formed with the TEOS oxide-film.
In addition, manufacture method as inventive aspect 18 described semiconductor devices, it is characterized in that: on any 1 basis of inventive aspect 15～17, the opening size of the peristome by the formed above-mentioned substrate of etch processes is littler than the opening size of the opening figure of the above-mentioned resist film before the etch processes of the antireflection film that is made of above-mentioned organic material.
According to the present invention, a kind of manufacture method of semiconductor device can be provided, can not cause the productivity ratio that causes because of the process number increase and descend, can form the figure in the hole etc. of minute diameter, productibility is made the semiconductor device of high integration well.
Description of drawings
Fig. 1 is the figure that is illustrated in the formation of the device that uses in the plasma-etching method of one embodiment of the present invention.
Fig. 2 is the figure of the etching work procedure in the expression one embodiment of the present invention.
Fig. 3 is the High frequency power value of expression in an embodiment of the present invention and the figure of the relation of CD side-play amount.
Fig. 4 is the figure of the etching work procedure in expression an embodiment of the present invention.
Fig. 5 is the plasma density of expression in an embodiment of the present invention and the figure of the relation of CD side-play amount and photoresist residual-film amount.
Fig. 6 is the C in expression an embodiment of the present invention
2The concentration of free radical and the graph of a relation of plasma density.
Fig. 7 is the figure that is illustrated in the variation of the CD side-play amount in an embodiment of the present invention and the comparative example.
Symbol description: 1 plasma etch process device; 2 chambers; 5 pedestals (lower electrode); 21 upper electrodes; 30 handle the gas supply source; 40 first high frequency electric sources; 50 second high frequency electric sources.
Embodiment
Below,, with reference to accompanying drawing the manufacture method of semiconductor device of the present invention is elaborated at embodiment.
Fig. 1 is illustrated in the formation of the plasma etch process device that uses in an embodiment of the present invention.As shown in the figure, plasma etch process device 1 is parallel up and down relatively as battery lead plate, one of them constitutes with capacitive junctions mould assembly parallel flat plasma etch process device that plasma formation is connected with power supply.
This plasma etch processes device 1 has: for example carried out the chamber 2 cylindraceous that forms that the aluminium of anodized (alumite processing) constitutes by the surface, made this chamber 2 ground connection.In the bottom of chamber 2 is by means of insulation boards such as pottery 3, is provided with to be used for the columned base supports platform 4 of being bordering on of mounting semiconductor wafer W.On this base supports platform 4, be provided with the pedestal 5 that constitutes lower electrode.This pedestal 5 is connected with high pass filter (HPF) 6.
In base supports platform 4 inside, be provided with adjustment dielectric chamber 7.Therefore, the adjustment medium is imported adjustment dielectric chamber 7, circulate, discharge from discharge pipe 9 then by ingress pipe 8.By the circulation of such adjustment medium, pedestal 5 can be controlled at desired temperature.
Therefore, also has electrostatic chuck 11 at insulation board 3, base supports platform 4, pedestal 5, at the back side as the semiconductor wafer W of handled object, be formed with the gas passage 14 of supplying with heat transfer medium (for example He gas etc.), conduct heat by making between pedestal 5 and the semiconductor wafer W, semiconductor wafer W is maintained the temperature of regulation by this heat transfer medium.
End periphery place on pedestal 5 according to the mode that the semiconductor wafer W that will be positioned on the electrostatic chuck 11 surrounds, has disposed the focusing ring 15 of ring-type.This focusing ring 15 is that insulating material or the conductive material by pottery or quartz etc. constitutes, and can improve the uniformity of etch processes.
In addition, above pedestal 5, be provided with and this pedestal 5 parallel relative upper electrodes 21.Upper electrode 21 is the inside that is supported in chamber 2 by insulating material 22.Upper electrode 21, be by constitute with the battery lead plate 24 subtend face, that have a plurality of holes 23 that spue of pedestal 5 (for example, constitute by quartz), support that the electrode support 25 (conductive material has for example carried out the aluminium that alumilite process handles by the surface and constituted) of this battery lead plate 24 constitutes.And pedestal 5 can be regulated with the interval of upper electrode 21.
The central authorities of the electrode support 25 on upper electrode 21 are provided with gas introduction port 26.This gas introduction port 26 links to each other with gas supply pipe 27.And this gas supply pipe 27 is connected with processing gas supply source 30 by valve 28 and mass flow controller 29.The body supply source 30 of regulating the flow of vital energy is from here supplied with the etch processes gas that is used to carry out plasma etch process.And, in Fig. 1,, constitute and be provided with a plurality of such treating-gas supply systems though only express a treating-gas supply system that constitutes by above-mentioned processing gas supply source 30 grades, for example, with CF
4, CHF
3, C
4F
8, H
2, Ar, N
2Carry out flow control independently of one another Deng gas, can in chamber 2, supply with.
On the one hand, the bottom of chamber 2 is connected with blast pipe 31, and this blast pipe 31 joins with exhaust apparatus 35.Exhaust apparatus 35 is equipped with the vacuum pump of turbomolecular pump etc., constitutes the reduced pressure atmosphere (for example, 0.67Pa is following) that can be evacuated down to regulation in the chamber 2.And, dispose gate valve 32 at the sidewall of chamber 2.This gate valve 32 under the state of opening, and the load locking room (not shown) of adjacency between, semiconductor wafer W can be transported.
The upper electrode 21 and first high frequency electric source 40 join, and have assigned adaptation 41 at its supply lines.And upper electrode 21 is connected with low pass filter (LPF) 42.This first high frequency electric source 40 has the frequency of 13.56～100MHz scope.By applying high-frequency electric power, in chamber 2, can form preferred dissociated state and have highdensity plasma.With compare in the past, can under the low pressure condition, carry out plasma treatment.The frequency of this first high frequency electric source 40, preferred 50～80MHz comparatively is typically as shown in the figure employing 60MHz or near the frequency it.
Fig. 2 is the figure that amplifies the formation of the substrate that carries out etch processes in the expression specific embodiment of the invention.100 expressions in Fig. 2 (a) are formed with the semiconductor substrate (semiconductor wafer) of the not shown wiring that is made of copper or aluminium etc.At this above semiconductor wafer 100, be SiC film (barrier film) 101, low K (Low-K) film, (SiOC film etc. (for example, your (coral) (ノ ベ ラ ス company) of cola, Ao Luola (aurora) (ASM company), Orion (orion) (Trikon company), black diamond (black diamond) (ァ プ ラ ィ De マ テ リ ァ Le company) (using black diamond in the present embodiment)) 102, TEOS oxide-film 103, organic class antireflection film (BARC) of being made of organic material 104 form in this order from following beginning.And, on organic class antireflection film 104, be formed with the mask layer 105 that constitutes by the ArF resist, at this mask layer 105, form the opening figure (being the opening figure of a plurality of circular hole in the present embodiment) of regulation by operations such as exposure, developments.
Therefore,, use device shown in Figure 1,, become the state of Fig. 2 (b) by carrying out etching by 105 pairs of organic class antireflection films 104 of mask layer from the state of Fig. 2 (a).And the ArF resist is to use ArF gas as the resist that the laser of light emitting source exposes, and compares with the KrF resist, and it can form trickleer figure.The main matter that constitutes this ArF resist is: for example cyclic olefin resins, cycloaliphatic methacrylates resin (methacrylateresin), alicyclic acrylate, cycloolefin-anhydrous maleic acid resin etc.
Below, the plasma etch process device 1 according to above-mentioned Fig. 1 describes above-mentioned etching work procedure.
At first, as mentioned above, open gate valve 32, the semiconductor wafer W that the mask layer 105 after will being formed with organic class antireflection film 104 and being patterned to compulsory figure etc. is constituted is moved in the chamber 2 by not shown load locking room, is contained on the electrostatic chuck 11.Therefore, by applying direct voltage from DC power supply 13, with the semiconductor wafer W Electrostatic Absorption on electrostatic chuck 11.
Then, gate valve 32 is closed,, chamber 2 inside are inhaled into the vacuum degree of regulation by exhaust apparatus 35.Then, open valve 28, from handling gas supply source 30 with CF
4Gas (etching gas), by mass flow controller 29 its flow is adjusted, by handling gas supply pipe 27, gas introduction port 26, the hollow bulb of upper electrode 21, the tap 23 of battery lead plate 24, the direction of arrow of pressing Fig. 1 spues equably facing to semiconductor wafer W.
Meanwhile, the pressure of chamber 2, the pressure that maintains regulation is (for example, 6.7Pa).Therefore,, apply high frequency voltage, make the etch processes gas plasmaization to upper electrode 21 by first high frequency electric source 40.Meanwhile, by second high frequency electric source 50, apply high frequency voltage to pedestal 5 as lower electrode, by introducing the ion in the plasma, organic class antireflection film 104 to semiconductor wafer W carries out etching, and in the moment of the state that reaches above-mentioned Fig. 2 (b), etching finishes.
According to above-mentioned operation, the wafer of using 200mm carries out etching as first embodiment by following condition:
Etch processes gas: CF
4(flow: 100SCCM)
Pressure: 6.7Pa (50mTorr)
Be applied to the High frequency power of upper electrode: 1000W
Be applied to the High frequency power of lower electrode: 100W
Interelectrode distance: 60mm
Base-plate temp: 20 ℃
Time: 40 seconds.
The figure of the organic class antireflection film 104 that forms about the etching work procedure by above-mentioned first embodiment, shown in Fig. 2 (b), be when using SEM (scanning electron microscopy) to observe, when the deposit (precipitation) that is speculated as polymer P is observed in the office, inside portion of mask layer 105, the shape of the sidewall sections of organic class antireflection film 104 becomes the shape of the inclination that the opening diameter (opening size) of downside diminishes.
Concrete numerical value about opening diameter, central portion at wafer, opening diameter (top CD) (suitable with the d1 of Fig. 2 (b)) with respect to the topmost of the mask layer before the etching 105 is 140nm, the opening diameter of the bottom of the organic class antireflection film 104 after the etch processes (bottom CD) (suitable) with the d2 of Fig. 2 (b) be 134nm (the CD side-play amount for-6nm).And, at the above-mentioned numerical value of the periphery of wafer, are 141nm with respect to the opening diameter (top CD) of the topmost of mask layer 105, the opening diameter (bottom CD) of organic class antireflection film 104 bottoms is 131nm (the CD side-play amount is-11).
Secondly, as second embodiment, in above-mentioned specific embodiment, except upper electrode being applied High frequency power 1500W, be to carry out etched with identical condition.Consequently: the opening diameter (top CD) with respect to the topmost of the above-mentioned mask layer 105 of the central portion of wafer is 140nm, the opening diameter of the bottom of organic class antireflection film 104 (bottom CD) be 119nm (the CD side-play amount for-21nm).Opening diameter (top CD) with respect to the topmost of the mask layer 105 of the periphery of wafer is 141nm, the opening diameter (bottom CD) of organic class antireflection film 104 bottoms be 118nm (the CD side-play amount for-23nm).
Secondly, as the 3rd embodiment, in the above-described embodiments, except upper electrode being applied High frequency power 2200W, be to carry out etch processes with identical condition.Consequently: with respect to the opening diameter (top CD) at the topmost of the above-mentioned mask layer 105 of the central portion of wafer is 140nm, the opening diameter (bottom CD) of organic class antireflection film 104 bottoms be 88nm (the CD side-play amount for-52nm).With respect to the opening diameter (top CD) at the topmost of the mask layer 105 of the periphery of wafer is 141nm, the opening diameter (bottom CD) of organic class antireflection film 104 bottoms be 88nm (the CD side-play amount for-53nm).
Fig. 3 curve representation measurement result in the above-described embodiments, the longitudinal axis are represented the variable quantity (CD side-play amount (nm)) of opening diameter, and the transverse axis representative puts on the High frequency power (power density (W/cm that the upper electrode frequency is 60MHz
2)).As shown in the figure, change the opening size of organic class antireflection film 104 bottoms after the may command etching by making the electric power that puts on upper electrode.
So, after finishing above-mentioned etching,,, compare and the little opening of size at the opening that can form on these layers with on mask layer 105, forming at first by more the TEOS oxide-film 103 and the low K film 102 of lower floor are carried out etching as following shown in Figure 4.Like this, make the CD side-play amount,, just can form the figure in the above fine hole of the resolution of photoetching technique etc. if can form the hole of the opening diameter littler than the opening diameter of mask layer 105 as negative.Like this, the CD side-play amount during as negative, as shown in Figure 3, being put on the High frequency power of upper electrode, is 1.63 * 10 with power density
-2W/cm
2(applying electric power 1000W) is above to be similar to straight-line extension as the upper limit for preferred with the CD side-play amount, and power density is 4.89 * 10
-2W/cm
2Be preferred about (applying electric power 3000W) is following.
Fig. 5 is to be the longitudinal axis with CD side-play amount and photoresist film (PR) residual-film amount, and (electron density (Ne)) is transverse axis with plasma density, the investigation result that expression plasma density and CD side-play amount and resist film residual-film amount concern.And, in Fig. 6, be the longitudinal axis, be transverse axis with the concentration of free radical, expression C with plasma density (electron density (Ne))
2Free radical and CF
2Free radical for the concentration of Ar and the investigation result of plasma density relation.And the density of 3 represented plasma is corresponding numerical value when applying High frequency power and be 1000W, 1500W, 2200W with upper electrode separately in Fig. 5.
When increase puts on the power density (applying electric power) of the High frequency power of upper electrode, the density of plasma will increase.Therefore, as shown in Figure 5, when the density of plasma increases, when the CD side-play amount increases to a negative side, the photoresist film residual-film amount will increase.In addition, as shown in Figure 6, when the density of plasma increases, C
2The concentration of free radical also will increase.Because this C
2The increase of free radical, the amount of the deposit that produces in photoresist surface and opening (precipitation) increases, and therefore, can control to a negative side the CD side-play amount.
And, if with the scope 1.63 * 10 of the preferred power density of the above-mentioned High frequency power that puts on upper electrode
-2W/cm
2～4.89 * 10
-2W/cm
2With plasma density (electron density (Ne)) expression, then be 0.334 * 10
11Cm
-3～0.700 * 10
11Cm
-3Scope.
On the one hand, put on the High frequency power of lower electrode, owing to do not carry out etching zero the time,, when applying electric power and increase, on the mask layer 105 that constitutes by photoresist, cause the striped that generation is concavo-convex longitudinally so must apply.Given this, with power density 2.0 * 10
-2W/cm
-2(applying electric power is 1000W) is following for preferred, and power density is more with 2.0 * 10
-3W/cm
2Be preferred about (applying electric power is 100W).
And, about organic class antireflection film 104, owing to be as mask with mask layer 105 and organic class antireflection film 104, to carry out removing after the etching as the TEOS oxide-film 103 and low K (Low-K) film 102 of basilar memebrane, so, even the shape of the sidewall sections of organic class antireflection film 104 tilts, do not have problems yet.
But,, at present, for example use CH about the etching of above-mentioned TEOS oxide-film 103
2F
2/ O
2Or C
4F
8/ Ar/O
2Deng carrying out etching as etching gas.
In addition, about the etching of low K (Low-K) film 102, at present, carry out based on for example having used CHF
3/ CF
4/ Ar/N
2As the main etching of etching gas with used for example C
4F
8/ Ar/N
2Etching as overetched two-stage of etching gas.
But, in above-mentioned method, on the mask layer 105 that constitutes by photoresist, have the so-called problem of the striped that causes the convex-concave that produces longitudinal direction.In order to address the above problem, be etched to preferred by the following method.
That is, the method is the main etching with the etching of TEOS oxide-film 103 and low K (Low-K) film 102, for example uses CHF as handling gas
3/ CF
4/ Ar/N
2(flow-rate ratio: 15/15/500/80sccm) or CF
4/ H
2(flow-rate ratio: 70/130sccm), carry out, become the state shown in Fig. 4 (a) in step 1.And at this state, the bottom in the hole after etching is in the only remaining state that a spot of low K (Low-K) film 102 is arranged.Therefore, thereafter, carry out having used for example C as etching gas
4F
8/ Ar/N
2Cross etching, become state shown in Fig. 4 (b) from state shown in Fig. 4 (a).
And the etched time of master of the etching of TEOS oxide-film 103 and low K (Low-K) film 102 for example is about 30 seconds, spends the time of etch processes, for example is about 15 seconds.
As mentioned above, carry out the etching of TEOS oxide-film 103 and the main etching of low K (Low-K) film 102 by using identical etch processes gas in step 1, the sidewall sections that can be suppressed at the mask layer 105 that is made of photoresist effectively causes striped.
As this reason, when using different etch processes gas to carry out the main etching of the etching of TEOS oxide-film 103 and low K (Low-K) film 102, because, the polymer of piling up (precipitation) when TEOS oxide-film 103 is carried out etching in the side wall portion office of mask layer 105 and essential different at the polymer of the side wall portion office accumulation (precipitation) of mask layer 105 when hanging down K (Low-K) film 102 and carry out main etching, be easy to produce distortion, for this, infer owing to use identical etching gas to carry out the etching of TEOS oxide-film 103 and the main etching of low K (Low-K) film 102 in step 1, pile up polymer essential identical of (precipitation) in the sidewall sections place of mask layer 105, be out of shape so be difficult to generation.
In addition, using CHF as the etched etching gas of the master of the etching of carrying out above-mentioned TEOS oxide-film 103 and low K (Low-K) film 102
3/ CF
4/ Ar/N
2The time, with use CF
4/ H
2Situation compare, use CHF
3/ CF
4/ Ar/N
2The time than using CF
4/ H
2Situation, the CD side-play amount has the stronger tendency that increases to positive direction.That is: use CHF
3/ CF
4/ Ar/N
2The time, the opening diameter that is reduced when organic class antireflection film 104 is carried out etching has the tendency that enlarges markedly once more.For example when having finished the etching of organic class antireflection film 104 as described above, the CD side-play amount is-52nm, when having finished the etching of TEOS oxide-film 103 and low K (Low-K) film 102, the CD side-play amount is-25nm that the CD side-play amount increases (this example has increased 27nm) to forward.
Relative therewith, using CF
4/ H
2During as the etched etching gas of master of the etching of carrying out TEOS oxide-film 103 and low K (Low-K) film 102, can suppress the increase of above-mentioned CD side-play amount to forward.If that is: use contains the mist of fluorocarbon gas and hydrogen as mentioned above as etching gas, because hydrogen has the minimizing effect to fluoro free radical, formation is easy to produce the state that carbon radicals accounts for many accumulations (precipitation), therefore, can suppress the CD side-play amount increases to a positive side.Given this,, preferably use the mist that contains fluorocarbon gas and hydrogen, for example contain CF as TEOS oxide-film 103 being carried out etching and low K (Low-K) film 102 being led etched etching gas
4Deng CF class gas and the mist of hydrogen, or contain CHF
3Deng the CHF class gas and the mist of hydrogen etc.
Fig. 7 is expression when above-mentioned TEOS oxide-film 103 is carried out etching and low K (Low-K) film 102 is carried out main etching, will use CHF as handling gas
3/ CF
4/ Ar/N
2With use CF
4/ H
2Situation compare, the longitudinal axis represents that CD side-play amount, transverse axis represent each operation.And, after [Ini.] that is put down in writing in transverse axis, [BARC], [Ox+ME], [OE], [Ash] represent A-stage separately, organic class antireflection film 104 etchings respectively, after TEOS oxide-film 103 and the 102 main etchings of low K (Low-K) film, cross etching after, after the ashing treatment.
In addition, the use CHF shown in the upside in the drawings
3/ CF
4/ Ar/N
2The time, carry out etching by following condition:
(Ox+ME) operation
Etching gas: CHF
3/ CF
4/ Ar/N
2=15/15/500/80 SCCM
Pressure: 6.7Pa (50mTorr)
Put on the High frequency power of upper electrode: 800W
Put on the High frequency power of lower electrode: 1700W
Interelectrode distance: 25mm
(OE operation)
Etching gas: C
4F
8/ Ar/N
2=7/1000/120 SCCM
Pressure: 6.7Pa (50mTorr)
Put on the High frequency power of upper electrode: 1200W
Put on the High frequency power of lower electrode: 1700W
Interelectrode distance: 30mm
In addition, be to use CF shown in the downside in the drawings
4/ H
2The time, carry out etching by following condition:
(Ox+ME) operation
Etching gas: CF
4/ H
2=80/120 SCCM
Pressure: 4.0Pa (30mTorr)
Put on the High frequency power of upper electrode: 2100W
Put on the High frequency power of lower electrode: 1800W
Interelectrode distance: 25mm
(OE operation)
Etching gas: C
4F
8/ Ar/N
2=7/1000/120 SCCM
Pressure: 6.7Pa (50mTorr)
Put on the High frequency power of upper electrode: 1200W
Put on the High frequency power of lower electrode: 1700W
Interelectrode distance: 30mm
As shown in the figure, when finishing the etching that organic class antireflection film 104 is carried out, by become the CD side-play amount=-state of 52nm begins, with mask layer 105 and organic class antireflection film 104 as mask, when the TEOS oxide-film 103 as basilar memebrane is carried out etch processes with low K (Low-K) film 102, as etch processes gas, as using CHF
3/ CF
4/ Ar/N
2, when finishing etch processes, the CD side-play amount is-25nm, and when finishing ashing treatment, the CD side-play amount is-20nm, and the CD side-play amount has increased 32nm to positive direction, becomes-20nm from the CD side-play amount of A-stage.
On the one hand, use CF as etch processes gas
4/ H
2The time, when finishing etch processes, the CD side-play amount is-45nm that when finishing ashing treatment, the CD side-play amount is-42nm to suppress 10nm to the CD side-play amount that positive direction increases.Like this, with mask layer 105 and organic class antireflection film 104 as mask, utilize plasma etching when carrying out etch processes as the TEOS oxide-film 103 of basilar memebrane and low K (Low-K) film 102, as etching gas, comprise the gas of the compound that contains carbon and fluorine and the mist of hydrogen by use, for example, by using CF
4/ H
2, can suppress the CD side-play amount and become big to positive direction increase, opening diameter.
In addition, in above-mentioned plasma etching, upper electrode applies High frequency power preferably: the power taking force density is 3.10 * 10
-2W/cm
2(applying electric power 1900W)～4.89 * 10
-2W/cm
2About (applying electric power 3000W).In addition, lower electrode applies High frequency power preferably: the power taking force density is 3.20 * 10
-2W/cm
2(applying electric power 1600W)～5.00 * 10
-2W/cm
2About (applying electric power 2500W).
As mentioned above, can on TEOS oxide-film 103 and low K (Low-K) film 102, form the hole etc. of the opening size littler than the opening size of the peristome of mask layer 105.
In addition, in the above-described embodiment, though be illustrated at the situation of the plasma-etching apparatus that uses parallel plate-type,, even for example ICP plasma-etching apparatus etc. also can be suitable equally for other plasma-etching apparatus.
Claims (15)
1. the manufacture method of a semiconductor device is characterized in that:
Apply first high frequency to handling gas with first frequency, produce the plasma of described processing gas, second high frequency that will have the second frequency of the frequency lower than described first frequency, put on processed substrate, with the resist film that on the surface of described processed substrate, forms with regulation peristome figure as mask, the etched layer that forms under described resist film is carried out etching
Described etched layer is the antireflection film that is made of organic material,
Between described etched layer and described processed substrate, be formed with basilar memebrane,
After the antireflection film that is made of described organic material carried out etching, antireflection film that will be made of this organic material and described resist film carried out etching as mask to the described basilar memebrane that exposes,
The etching gas that use contains fluorocarbon gas and hydrogen carries out plasma etching to described basilar memebrane,
By making the electric power variation that applies of described first high frequency, be controlled at the opening size of the peristome of described etched layer formation.
2. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that:
The opening size of the opening figure of the described resist film of the opening size of the peristome of the described etched layer that forms by etching before than etching is little.
3. the manufacture method of semiconductor device as claimed in claim 2 is characterized in that:
The opening size of the opening figure of this resist film of the opening size of the opening figure of the described resist film after the etching before than etching is little.
4. as the manufacture method of each the described semiconductor device in the claim 1～3, it is characterized in that:
Described processing gas contains CF at least
4Gas.
5. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that:
When described etched layer is carried out etching, use is bordering on upper electrode and lower electrode the plasma-etching apparatus of the parallel plate-type that be arranged in parallel, described first high frequency is put on described upper electrode, described second high frequency is put on the described lower electrode that mounting has described processed substrate.
6. the manufacture method of semiconductor device as claimed in claim 5 is characterized in that:
Described first frequency is 13.56～100MHz, and the power density of described first high frequency is 1.63 * 10
-2～4.89 * 10
-2W/cm
2
7. as the manufacture method of claim 5 or 6 described semiconductor devices, it is characterized in that:
Described second frequency is 0.8～27.12MHz, and the power density of described second high frequency is 2.0 * 10
-2W/cm
2Below.
8. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that:
Described fluorocarbon gas is CF
4Gas.
9. as the manufacture method of claim 1 or 8 described semiconductor devices, it is characterized in that:
Described basilar memebrane contains the SiCO film.
10. the manufacture method of semiconductor device as claimed in claim 9 is characterized in that:
On the SiCO of described basilar memebrane film, be formed with the TEOS oxide-film.
11. the manufacture method of semiconductor device as claimed in claim 1 is characterized in that:
The opening size of the peristome of the described basilar memebrane that forms by etching is littler than the opening size of the opening figure of the described resist film before the etch processes of the antireflection film that is made of described organic material.
12. the manufacture method of a semiconductor device is characterized in that:
With the resist film that forms on the surface of processed substrate with regulation opening figure as mask, after being etched in the antireflection film that constitutes by organic material that forms under the described resist film, with the antireflection film that constitutes by this organic material and described resist film as mask, the basilar memebrane that will expose carries out etching
Described basilar memebrane is formed between described etched layer and the described processed substrate,
Described basilar memebrane contains the SiCO film, uses the etching gas that contains fluorocarbon gas and hydrogen that this basilar memebrane is carried out plasma etching.
13. the manufacture method of semiconductor device as claimed in claim 12 is characterized in that:
Described fluorocarbon gas is CF
4Gas.
14. the manufacture method as claim 12 or 13 described semiconductor devices is characterized in that:
On the SiCO of described basilar memebrane film, be formed with the TEOS oxide-film.
15. the manufacture method of semiconductor device as claimed in claim 12 is characterized in that:
The opening size of the peristome by the formed described basilar memebrane of etching is littler than the opening size of the opening figure of the described resist film before the etching of the antireflection film that is made of described organic material.
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|---|---|---|---|
| JP2004177882 | 2004-06-16 | ||
| JP2004177882 | 2004-06-16 | ||
| JP2005137408 | 2005-05-10 |
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| CN100365772C true CN100365772C (en) | 2008-01-30 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104701159A (en) * | 2013-12-10 | 2015-06-10 | 东京毅力科创株式会社 | Etching method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5260356B2 (en) * | 2009-03-05 | 2013-08-14 | 東京エレクトロン株式会社 | Substrate processing method |
| CN104658964B (en) * | 2013-11-19 | 2017-12-01 | 中芯国际集成电路制造(上海)有限公司 | The forming method of through hole |
| CN103700622B (en) * | 2013-12-27 | 2016-11-02 | 中微半导体设备(上海)有限公司 | The forming method of silicon through hole |
| CN109860041B (en) * | 2018-12-28 | 2020-12-29 | 芯创智（北京）微电子有限公司 | Method for preparing precise graph of integrated circuit |
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|---|---|---|---|---|
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| JP2002083798A (en) * | 2000-09-07 | 2002-03-22 | Hitachi Ltd | Surface-processing method |
| JP2002110654A (en) * | 2000-10-04 | 2002-04-12 | Sony Corp | Method of manufacturing semiconductor device |
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| WO2003007357A1 (en) * | 2001-07-10 | 2003-01-23 | Tokyo Electron Limited | Dry etching method |
| JP2004153126A (en) * | 2002-10-31 | 2004-05-27 | Fujitsu Ltd | Method for manufacturing semiconductor device |
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|---|---|---|---|---|
| US5310454A (en) * | 1992-03-04 | 1994-05-10 | Kabushiki Kaisha Toshiba | Dry etching method |
| JP2002083798A (en) * | 2000-09-07 | 2002-03-22 | Hitachi Ltd | Surface-processing method |
| JP2002110654A (en) * | 2000-10-04 | 2002-04-12 | Sony Corp | Method of manufacturing semiconductor device |
| WO2003007357A1 (en) * | 2001-07-10 | 2003-01-23 | Tokyo Electron Limited | Dry etching method |
| US20030013316A1 (en) * | 2001-07-12 | 2003-01-16 | Il-Goo Kim | Method of forming wiring using a dual damascene process |
| JP2004153126A (en) * | 2002-10-31 | 2004-05-27 | Fujitsu Ltd | Method for manufacturing semiconductor device |
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| CN104701159A (en) * | 2013-12-10 | 2015-06-10 | 东京毅力科创株式会社 | Etching method |
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| CN1710703A (en) | 2005-12-21 |
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