TWI395530B - A method of manufacturing a wiring board and an embossing sheet for use in the manufacturing method - Google Patents

A method of manufacturing a wiring board and an embossing sheet for use in the manufacturing method Download PDF

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TWI395530B
TWI395530B TW98104079A TW98104079A TWI395530B TW I395530 B TWI395530 B TW I395530B TW 98104079 A TW98104079 A TW 98104079A TW 98104079 A TW98104079 A TW 98104079A TW I395530 B TWI395530 B TW I395530B
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wiring board
layer
substrate
concave portion
connection layer
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TW98104079A
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Chinese (zh)
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TW200942116A (en
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Tadashi Nakamura
Kazuhiko Honjo
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Panasonic Corp
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Description

配線板之製造方法及使用於該製造方法之壓印片Manufacturing method of wiring board and embossing sheet used in the manufacturing method 發明領域Field of invention

本發明係有關於一種廣泛用於電腦、行動體通訊用電話、錄像機等各種電子機器之配線板之製造方法及使用於該製造方法之壓印片。The present invention relates to a method of manufacturing a wiring board widely used for various electronic devices such as a computer, a mobile communication telephone, and a video recorder, and a stamper used in the manufacturing method.

發明背景Background of the invention

最近,個人電腦、數位相機、行動電話等移動機器普及,特別是其小型、薄型、輕量、高精細、多功能化等要求強烈。為因應此,用於機器之半導體元件亦發展封裝之小型、低背化、三維封裝化。容易實現此種半導體元件封裝之低背化、半導體元件之三維封裝化之方法之一已知有使用具有空腔、亦即凹部之基板的方法。Recently, mobile computers such as personal computers, digital cameras, and mobile phones have become popular, especially in terms of small size, thinness, light weight, high definition, and multi-function. In response to this, semiconductor components used in machines have also developed small, low-profile, three-dimensional packages for packaging. One of the methods for easily achieving such a low-profile semiconductor package and three-dimensional encapsulation of a semiconductor device is known as a method of using a substrate having a cavity, that is, a recess.

第15A圖及第15B圖係記載於日本專利公開公報昭63-90158號,具有空腔之習知配線板127的製程之截面圖。Fig. 15A and Fig. 15B are cross-sectional views showing the process of the conventional wiring board 127 having a cavity, as described in Japanese Laid-Open Patent Publication No. SHO63-90158.

如第15A圖所示,以連接層121位於下側基板122與上側基板123間之狀態,一面將電極之位置或窗之位置等對位,一面重疊上側基板123、連接層121、下側基板122,而製作配線板127。之後,將片126載置於上側基板123。片126由具有脫模性之解放層124及設置於解放層124上之熱可塑性樹脂層125構成。熱可塑性樹脂層125由可以熱流動之熱可塑性樹脂構成。As shown in FIG. 15A, the connection layer 121 is positioned between the lower substrate 122 and the upper substrate 123, and the upper substrate 123, the connection layer 121, and the lower substrate are overlapped while the position of the electrode or the position of the window is aligned. 122, and the wiring board 127 is produced. Thereafter, the sheet 126 is placed on the upper substrate 123. The sheet 126 is composed of a release layer 124 having a release property and a thermoplastic resin layer 125 provided on the release layer 124. The thermoplastic resin layer 125 is composed of a thermoplastic resin which can be thermally flowed.

如第15B圖所示,一面將片126於上側基板123上加熱,一面壓著。當將片126加熱壓著時,連接層121流入至凹部128內之前,片126之熱可塑性樹脂層125流動至凹部128內,填充凹部128。因而,在連接層121不流動下,層積上側基板123、連接層121、下側基板122。之後,藉將片126剝離,完成配線板127。As shown in Fig. 15B, the sheet 126 is heated on the upper substrate 123 while being pressed. When the sheet 126 is heated and pressed, before the connection layer 121 flows into the concave portion 128, the thermoplastic resin layer 125 of the sheet 126 flows into the concave portion 128 to fill the concave portion 128. Therefore, the upper substrate 123, the connection layer 121, and the lower substrate 122 are laminated without flowing the connection layer 121. Thereafter, the sheet 126 is peeled off to complete the wiring board 127.

將片126壓著至配線板127時,如第15B圖所示,變形成與凹部128相同之形狀。片126在一直維持此形狀下,從配線板127剝離。因而,片126於凹部128特別深時,不易剝離,而無法反覆使用,且凹部228之深度深時,不易剝離。When the sheet 126 is pressed against the wiring board 127, as shown in Fig. 15B, the same shape as the concave portion 128 is formed. The sheet 126 is peeled off from the wiring board 127 while maintaining this shape. Therefore, when the concave portion 128 is particularly deep, the sheet 126 is not easily peeled off and cannot be used repeatedly, and when the depth of the concave portion 228 is deep, peeling is less likely.

在具有熱可塑性樹脂層125之片126方面,需依凹部128之體積,調整熱可塑性樹脂之量。當熱可塑性樹脂之量不適合凹部128之體積時,熱可塑性樹脂無法完全填充於凹部128內,連接層121易流動至凹部128內。In the case of the sheet 126 having the thermoplastic resin layer 125, the amount of the thermoplastic resin is adjusted in accordance with the volume of the concave portion 128. When the amount of the thermoplastic resin is not suitable for the volume of the concave portion 128, the thermoplastic resin cannot be completely filled in the concave portion 128, and the connection layer 121 easily flows into the concave portion 128.

發明揭示Invention

壓印片係用以製造具有形成有凹部之面之配線板。壓印片包含有彈性變形層,該彈性變形層係於對具有前述凹部之前述面時加壓時,可沿前述凹部及前述面可逆變形,且具耐熱性者。The embossed sheet is used to manufacture a wiring board having a face on which a recess is formed. The embossed sheet includes an elastically deformable layer which is reversibly deformable along the concave portion and the surface when pressed against the surface having the concave portion, and has heat resistance.

藉此壓印片,可以良好效率製造配線密度高之立體配線板。With this embossing sheet, a three-dimensional wiring board having a high wiring density can be manufactured with good efficiency.

圖式簡單說明Simple illustration

第1A圖係本發明實施形態之立體配線板之立體圖。Fig. 1A is a perspective view of a three-dimensional wiring board according to an embodiment of the present invention.

第1B圖係第1A圖所示之立體配線板之線1B-1B之截面圖。Fig. 1B is a cross-sectional view of the line 1B-1B of the three-dimensional wiring board shown in Fig. 1A.

第1C圖係第1實施形態之立體配線板之連接層之截面圖。Fig. 1C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the first embodiment.

第2圖係第1實施形態之立體配線板之截面圖。Fig. 2 is a cross-sectional view showing a three-dimensional wiring board of the first embodiment.

第3A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3D圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3D is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3E圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3E is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3F圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3F is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第6圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 6 is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第7圖係顯示第1實施形態之立體配線板之連接層之熔融黏度。Fig. 7 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the first embodiment.

第8A圖係本發明第2實施形態之立體配線板之立體圖。Fig. 8A is a perspective view of a three-dimensional wiring board according to a second embodiment of the present invention.

第8B圖係第8A圖所示之立體配線板之線8B-8B之截面圖。Fig. 8B is a cross-sectional view of the line 8B-8B of the three-dimensional wiring board shown in Fig. 8A.

第8C圖係第2實施形態之立體配線板之連接層之截面圖。Fig. 8C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the second embodiment.

第9圖係第2實施形態之立體配線板之截面圖。Fig. 9 is a cross-sectional view showing a three-dimensional wiring board of the second embodiment.

第10圖係第2實施形態之立體配線板之截面圖。Fig. 10 is a cross-sectional view showing a three-dimensional wiring board of a second embodiment.

第11A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11D圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11D is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11E圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11E is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11F圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11F is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第14圖係顯示第2實施形態之立體配線板之連接層之熔融黏度。Fig. 14 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the second embodiment.

第15A圖係顯示習知配線板之製程之截面圖。Fig. 15A is a cross-sectional view showing the process of a conventional wiring board.

第15B圖係顯示習知配線板之製程之截面圖。Fig. 15B is a cross-sectional view showing the process of a conventional wiring board.

用以實施發明之最佳形態The best form for implementing the invention (第1實施形態)(First embodiment)

第1A圖係本發明實施形態之立體配線板116之立體圖。第1B圖係第1A圖所示之立體配線板116之線1B-1B之截面圖。立體配線板116具有下側基板102、設置於下側基板102之上面102A之連接層103、設置於連接層103之上面103A之上側基板101。上側基板101及下側基板102呈相互不同之形狀。連接層103具有30μm~300μm之厚度。連接層103以使下側基板102之上面102A之一部份102C露出之狀態,設置於上面102A。因而,於下側基板102之上面102A之一部份102C之正上方形成有以上面102A之一部份102C、連接層103及上側基板101包圍之凹部104。於上側基板101之上面101A、下面101B、下側基板102之上面102A、下面102B分別形成配線。於凹部104收容零件105,而封裝於立體配線板116。藉此,可縮小封裝有零件105之立體配線板116之總厚度。Fig. 1A is a perspective view of a three-dimensional wiring board 116 according to an embodiment of the present invention. Fig. 1B is a cross-sectional view taken along line 1B-1B of the three-dimensional wiring board 116 shown in Fig. 1A. The three-dimensional wiring board 116 has a lower substrate 102, a connection layer 103 provided on the upper surface 102A of the lower substrate 102, and an upper substrate 101 provided on the upper surface 103A of the connection layer 103. The upper substrate 101 and the lower substrate 102 have mutually different shapes. The connection layer 103 has a thickness of 30 μm to 300 μm. The connection layer 103 is provided on the upper surface 102A in a state where one portion 102C of the upper surface 102A of the lower substrate 102 is exposed. Therefore, a recess 104 surrounded by a portion 102C of the upper surface 102A, the connection layer 103, and the upper substrate 101 is formed directly above one portion 102C of the upper surface 102A of the lower substrate 102. Wiring is formed on the upper surface 101A of the upper substrate 101, the lower surface 101B, the upper surface 102A of the lower substrate 102, and the lower surface 102B, respectively. The component 105 is housed in the recess 104 and encapsulated in the three-dimensional wiring board 116. Thereby, the total thickness of the three-dimensional wiring board 116 in which the component 105 is packaged can be reduced.

第1C圖係連接層103之截面圖。連接層103具有具上面103A及下面103B之絕緣層103C、設置於絕緣層103C內之導孔107。絕緣層103C形成連接於上面103A及下面103B之貫穿孔109。於貫穿孔109填充為導電性材料之導電性膏106,而形成導孔107。絕緣層103C由環氧樹脂等熱硬化性樹脂103D、於熱硬化性樹脂103D擴散之無機填料103E構成。連接層103不包含織布、不織布、薄膜等芯材,從上面103A至下面103B實質上以均一之材料構成。當連接層103之厚度不到30μm時,配線不易埋入連接層103。當連接層0103之厚度超過300μm時,由於為導孔107之徑對高度之比之寬高比過大,故導孔107之小徑化不易,不易形成導孔107,而有損害連接可靠度之情形。此外,導孔107之寬高比宜為1.0以下。Fig. 1C is a cross-sectional view of the connection layer 103. The connection layer 103 has an insulating layer 103C having an upper surface 103A and a lower surface 103B, and a via hole 107 provided in the insulating layer 103C. The insulating layer 103C forms a through hole 109 connected to the upper surface 103A and the lower surface 103B. The conductive paste 106 of a conductive material is filled in the through hole 109 to form a via hole 107. The insulating layer 103C is composed of a thermosetting resin 103D such as an epoxy resin and an inorganic filler 103E diffused from the thermosetting resin 103D. The connecting layer 103 does not include a core material such as a woven fabric, a nonwoven fabric, or a film, and is substantially made of a uniform material from the upper surface 103A to the lower surface 103B. When the thickness of the connection layer 103 is less than 30 μm, the wiring is less likely to be buried in the connection layer 103. When the thickness of the connection layer 0103 exceeds 300 μm, since the ratio of the diameter to the height of the via hole 107 is too large, the diameter of the via hole 107 is not easy to be formed, and the via hole 107 is not easily formed, and the connection reliability is impaired. situation. Further, the aspect ratio of the via hole 107 is preferably 1.0 or less.

無機填料103E宜以氧化矽、二氧化鋁、鈦酸鋇中之至少一種以上者構成。無機填料103E之粒徑為1~15μm,於絕緣層103C宜含有70重量%~90重量%。當無機填料103E之含有量不到70重量%時,熱硬化性樹脂103D於加壓當中流動之際,無機填料103E亦流動。當無機填料103E之含有量超過90%時,配線不易埋入絕緣層103C,而有不易與基板101、102密合之情形。The inorganic filler 103E is preferably composed of at least one of cerium oxide, aluminum oxide, and barium titanate. The inorganic filler 103E has a particle diameter of 1 to 15 μm, and the insulating layer 103C preferably contains 70% by weight to 90% by weight. When the content of the inorganic filler 103E is less than 70% by weight, the inorganic filler 103E also flows when the thermosetting resin 103D flows during pressurization. When the content of the inorganic filler 103E exceeds 90%, the wiring is less likely to be buried in the insulating layer 103C, and it is difficult to adhere to the substrates 101 and 102.

導電性膏106由銅、銀、金、鈀、鉍、錫及該等合金中構成,粒徑以1~20μm為佳。The conductive paste 106 is composed of copper, silver, gold, palladium, rhodium, tin, and the like, and preferably has a particle diameter of 1 to 20 μm.

第2圖係立體配線板116之截面圖。凹部1044以下側基板102之上面102A之一部份102C、連接層103之側面103F及上側基板101之側面101F包圍。即,下側基板102之上面102A之一部份102C、連接層103之側面103F、上側基板101之側面101F與凹部104面對。連接層103之上面103A之與側面103F連接之部份103G朝凹部104傾斜至下方,亦即朝凹部104,於朝向下側基板102之上面102A之一部份的102C之方向104A傾斜。藉此,形成凹部104之緣之上側基板101之上面101A與側面101F連接之邊緣部101H呈鈍角。上側基板101包括傾斜之部份101G,橫亙上面101A,而具一定厚度。即,上側基板101之上面101A之部份101G與連接層103之上面103A之部份103G平行。上面101A、103A之部份101G、103G呈平面形狀。2 is a cross-sectional view of the three-dimensional wiring board 116. The concave portion 1044 is surrounded by a portion 102C of the upper surface 102A of the lower substrate 102, a side surface 103F of the connection layer 103, and a side surface 101F of the upper substrate 101. That is, one portion 102C of the upper surface 102A of the lower substrate 102, the side surface 103F of the connection layer 103, and the side surface 101F of the upper substrate 101 face the concave portion 104. The portion 103G of the upper surface 103A of the connection layer 103 which is connected to the side surface 103F is inclined downward toward the concave portion 104, that is, toward the concave portion 104, and is inclined toward the direction 104A of the portion 102C of the upper portion 102A of the lower substrate 102. Thereby, the edge portion 101H to which the upper surface 101A of the upper substrate 101 is formed at the edge of the concave portion 104 and the side surface 101F is at an obtuse angle. The upper substrate 101 includes an inclined portion 101G which is spaced apart from the upper surface 101A to have a certain thickness. That is, the portion 101G of the upper surface 101A of the upper substrate 101 is parallel to the portion 103G of the upper surface 103A of the connection layer 103. The portions 101G and 103G of the upper portions 101A and 103A have a planar shape.

說明第1實施形態之立體配線板116之製造方法。第3A圖至第3F圖、第4A圖至第4C圖、第5A圖至第5C圖係顯示立體配線板116之製程之截面圖。A method of manufacturing the three-dimensional wiring board 116 of the first embodiment will be described. 3A to 3F, 4A to 4C, and 5A to 5C are cross-sectional views showing a process of the three-dimensional wiring board 116.

首先,如第3A圖所示,準備具有第1面103H、第1面103H之相反側之第2面103J,並含有未硬化之熱硬化性樹脂103D之絕緣層103C。於絕緣層103C之第1面103H及第2面103J分別貼附樹脂薄膜108A、樹脂薄膜108B。樹脂薄膜108A、108B由聚對苯二甲酸乙二酯(PET)等強固之樹脂構成。接著,如第3B圖所示,於絕緣層103C及樹脂薄膜108A、108B形成用以形成凹部104之孔104B或切斷絕緣層103C、樹脂薄膜108A、108B。接著,如第3C圖所示,剝離樹脂薄膜108A,將樹脂薄膜108C貼合於第1面103H。樹脂薄膜108C由聚對苯二甲酸乙二酯(PET)等強固樹脂構成。然後,如第3D圖所示,通過樹脂薄膜108B、108C,於絕緣層103C形成貫穿孔109。然後,如第3E圖所示,於貫穿孔109內填充導電性膏106,形成導孔107,製作連接層103。接著,如第3F圖所示,剝離樹脂薄膜108C。另一方面,樹脂薄膜108B不剝離,而設於第2面103J。First, as shown in FIG. 3A, the second surface 103J having the first surface 103H and the opposite side of the first surface 103H is prepared, and the insulating layer 103C of the uncured thermosetting resin 103D is prepared. The resin film 108A and the resin film 108B are attached to the first surface 103H and the second surface 103J of the insulating layer 103C, respectively. The resin films 108A and 108B are made of a strong resin such as polyethylene terephthalate (PET). Next, as shown in FIG. 3B, a hole 104B for forming the concave portion 104, a cut insulating layer 103C, and resin films 108A and 108B are formed in the insulating layer 103C and the resin films 108A and 108B. Next, as shown in FIG. 3C, the resin film 108A is peeled off, and the resin film 108C is bonded to the first surface 103H. The resin film 108C is made of a strong resin such as polyethylene terephthalate (PET). Then, as shown in FIG. 3D, the through holes 109 are formed in the insulating layer 103C by the resin films 108B and 108C. Then, as shown in FIG. 3E, the conductive paste 106 is filled in the through hole 109 to form the via hole 107, and the connection layer 103 is formed. Next, as shown in Fig. 3F, the resin film 108C is peeled off. On the other hand, the resin film 108B is provided on the second surface 103J without being peeled off.

接著,如第4A圖及第4B圖所示,以絕緣層103C之第1面103H定位於下側基板102之上面102A之狀態,將連接層103配置於下側基板102之上面102A。如此,絕緣層103C之第1面103H成為連接層103之下面103B,第2面103J成為上面103A。於下側基板102之上面102A設有配線110。連接層103配置於下側基板102上時,配線110埋入連接層103。藉此,由於壓縮導電性膏106,故與配線110密合連接。之後,如第4C圖所示,從連接層103之上面103A、亦即絕緣層103C之第2面103J剝離樹脂薄膜108B。Next, as shown in FIGS. 4A and 4B, the first layer 103H of the insulating layer 103C is positioned on the upper surface 102A of the lower substrate 102, and the connection layer 103 is disposed on the upper surface 102A of the lower substrate 102. As described above, the first surface 103H of the insulating layer 103C serves as the lower surface 103B of the connection layer 103, and the second surface 103J serves as the upper surface 103A. Wiring 110 is provided on the upper surface 102A of the lower substrate 102. When the connection layer 103 is disposed on the lower substrate 102, the wiring 110 is buried in the connection layer 103. Thereby, since the conductive paste 106 is compressed, it is closely connected to the wiring 110. Thereafter, as shown in FIG. 4C, the resin film 108B is peeled off from the upper surface 103A of the connection layer 103, that is, the second surface 103J of the insulating layer 103C.

接著,如第5A圖所示,以上側基板101之下面101B位於連接層103之上面103A、亦即絕緣層103C之第2面103J之狀態,將上側基板101配置於連接層103上。進一步,於上側基板101之上面101A上配置壓印片112,以熱加壓將上側基板101、連接層103、下側基板102加熱加壓而層積。壓印片112具有抵接上側基板101之上面101A之下面112B及其相反側之上面112A。壓印片112具有設置於下面112B之脫膜層115、設置於脫膜層115之上面115A,具有耐熱性之彈性變形層114、設置於彈性變形層114之上面114A上之脫膜層118。脫膜層118設置於壓印片112之上面112A。彈性變形層114為可逆變形,以矽酮樹脂等彈性變形之樹脂形成。Next, as shown in FIG. 5A, the lower surface 101B of the upper substrate 101 is placed on the upper surface 103A of the connection layer 103, that is, the second surface 103J of the insulating layer 103C, and the upper substrate 101 is placed on the connection layer 103. Further, the embossing sheet 112 is placed on the upper surface 101A of the upper substrate 101, and the upper substrate 101, the connection layer 103, and the lower substrate 102 are heated and pressurized by thermal pressing to be laminated. The embossed sheet 112 has an upper surface 112A that abuts against the lower surface 112B of the upper surface 101A of the upper substrate 101 and its opposite side. The embossed sheet 112 has a release layer 115 disposed on the lower surface 112B, an upper surface 115A disposed on the release layer 115, an elastic deformation layer 114 having heat resistance, and a release layer 118 disposed on the upper surface 114A of the elastic deformation layer 114. The release layer 118 is disposed on the upper surface 112A of the stamp 112. The elastic deformation layer 114 is a reversibly deformable shape and is formed of an elastically deformed resin such as an anthrone resin.

當將壓印片112、上側基板101、連接層103、下側基板102加熱壓縮,以使上側基板101與下側基板102接近時,如第5B圖所示,將彈性變形層114及脫膜層115壓入至凹部104內。壓印片112之彈性變形層114抑制連接層103之熱硬化性樹脂103D之流量,而防止熱硬化性樹脂流入至凹部104內。藉此,彈性變形層114以沿著上側基板101及凹部104之狀態覆蓋,而堵住壓縮時之樹脂103D之流動。如此,藉彈性變形層114,即使凹部104深,亦可將壓印片112以無間隙之狀態壓入至凹部104內。When the embossing sheet 112, the upper substrate 101, the connection layer 103, and the lower substrate 102 are heated and compressed so that the upper substrate 101 and the lower substrate 102 are brought close to each other, as shown in FIG. 5B, the elastic deformation layer 114 and the release film are removed. Layer 115 is pressed into recess 104. The elastic deformation layer 114 of the embossing sheet 112 suppresses the flow rate of the thermosetting resin 103D of the connection layer 103, and prevents the thermosetting resin from flowing into the concave portion 104. Thereby, the elastic deformation layer 114 is covered along the state of the upper substrate 101 and the concave portion 104, and blocks the flow of the resin 103D at the time of compression. As described above, with the elastic deformation layer 114, even if the concave portion 104 is deep, the embossed sheet 112 can be pressed into the concave portion 104 without a gap.

如第5B圖所示,彈性變形層114壓入至凹部104內時,由於可使與連接層103之凹部104面對之側面103F附近之部 份更壓縮,故可使連接於連接層103之側面103F之上面103A之部份103G於方向104A傾斜。此壓縮時,形成於上側基板101之下面101B之配線120埋入連接層103之上面103A。藉此,由於將導電性膏106更壓縮,故可與配線110、120密合接觸。上側基板101自身層積成在不壓縮下,仿照連接層103,故上側基板101之上面101A之部份101G可與連接層103之上面103A之部份103G平行地於方向104A傾斜。如此,上側基板101之厚度包括部份101G在內,在上面101A均一。As shown in FIG. 5B, when the elastic deformation layer 114 is pressed into the concave portion 104, it can be made near the side 103F facing the concave portion 104 of the connection layer 103. The portion is more compressed, so that the portion 103G of the upper surface 103A connected to the side surface 103F of the connection layer 103 can be inclined in the direction 104A. At the time of this compression, the wiring 120 formed on the lower surface 101B of the upper substrate 101 is buried in the upper surface 103A of the connection layer 103. Thereby, since the conductive paste 106 is further compressed, it can be in close contact with the wirings 110 and 120. The upper substrate 101 itself is laminated so as not to be compressed, and the portion 101G of the upper surface 101A of the upper substrate 101 can be inclined in the direction 104A in parallel with the portion 103G of the upper surface 103A of the connection layer 103. Thus, the thickness of the upper substrate 101 includes the portion 101G and is uniform on the upper surface 101A.

之後,將壓印片112、上側基板101、連接層103及下側基板102冷卻,將壓印片112剝離,如第5C圖所示,完成立體配線板116。在立體配線板116方面,由於形成凹部104之緣之上側基板101之上面101A與側面101F連接之邊緣部101H呈鈍角,故可在不使壓印片112破損下,不於立體配線板116殘留而剝離。壓印片112之彈性變形層114於冷卻時要回復加熱前之形狀。因而,剝離壓印片112時,即使凹部104深,亦可易從凹部104將壓印片112剝離。Thereafter, the embossing sheet 112, the upper substrate 101, the connection layer 103, and the lower substrate 102 are cooled, and the embossed sheet 112 is peeled off. As shown in FIG. 5C, the three-dimensional wiring board 116 is completed. In the aspect of the three-dimensional wiring board 116, since the edge portion 101H to which the upper surface 101A of the upper substrate 101 is formed at the edge of the concave portion 104 and the side surface 101F is at an obtuse angle, the three-dimensional wiring board 116 can be left without being damaged by the embossing sheet 112. And stripped. The elastically deformable layer 114 of the embossed sheet 112 is returned to the shape before heating upon cooling. Therefore, when the embossed sheet 112 is peeled off, even if the concave portion 104 is deep, the embossed sheet 112 can be easily peeled off from the concave portion 104.

此外,在上述製程中,首先,以使絕緣層103C之第1面103H位於下側基板102之上面102A之狀態下,將連接層103配置於下側基板102之上面102A,之後,將上側基板101配置於連接層103之上面103A。在第1實施形態中,亦可以使絕緣層103C之第1面103H位於上側基板101之下面101B之狀態,將連接層103配置於上側基板101之下面101B,之後,將連接層103配置於下側基板102之上面102A。In the above-described process, first, the connection layer 103 is placed on the upper surface 102A of the lower substrate 102 in a state where the first surface 103H of the insulating layer 103C is located on the upper surface 102A of the lower substrate 102, and then the upper substrate is placed. 101 is disposed on the upper surface 103A of the connection layer 103. In the first embodiment, the first surface 103H of the insulating layer 103C may be placed on the lower surface 101B of the upper substrate 101, and the connection layer 103 may be disposed on the lower surface 101B of the upper substrate 101. Thereafter, the connection layer 103 may be disposed under The upper surface 102A of the side substrate 102.

為使壓印片112以無間隙之狀態填充於凹部104內,壓印片112之彈性變形層114包括壓印片112抵接之面、亦即凹部104之表面積在內,伸長成上側基板101之上面101A之表面積以上。藉此,不論凹部104之形狀或深度為何,皆可將彈性變形層114以無間隙之狀態填充於凹部104內。藉彈性變形層114伸長,可將上側基板101之上面101A與凹部104之表面全體以均等之載重加壓。藉此,可防止連接層103之樹脂103D溢出至凹部104內。In order to fill the stamping 112 in the recess 104 with no gap, the elastic deformation layer 114 of the stamp 112 includes the surface on which the stamp 112 abuts, that is, the surface area of the recess 104, and is elongated into the upper substrate 101. Above the surface area of 101A above. Thereby, regardless of the shape or depth of the recessed portion 104, the elastically deformable layer 114 can be filled in the recessed portion 104 without a gap. By the elongation of the elastic deformation layer 114, the entire surface 101A of the upper substrate 101 and the surface of the concave portion 104 can be pressurized with an equal load. Thereby, the resin 103D of the connection layer 103 can be prevented from overflowing into the concave portion 104.

又,為於凹部104內確實填充,以符合JIS K 6253之測量之彈性變形層114之硬度以5~30度為佳。彈性變形層114之厚度宜大於上側基板101之上面101A之凹部104之深度。Further, in order to be surely filled in the concave portion 104, the hardness of the elastic deformation layer 114 measured in accordance with JIS K 6253 is preferably 5 to 30 degrees. The thickness of the elastic deformation layer 114 is preferably greater than the depth of the recess 104 of the upper surface 101A of the upper substrate 101.

如第5B圖所示,由於彈性變形層114伸長至抵接之面之表面積以上的面積,故壓印片112壓入至凹部104內,同時,可進一步壓縮連接層103之凹部104附近之部份。因而,可於連接層103之凹部104附近之部份形成傾斜。As shown in Fig. 5B, since the elastic deformation layer 114 is elongated to an area larger than the surface area of the abutting surface, the stamp 112 is pressed into the concave portion 104, and at the same time, the portion near the concave portion 104 of the connection layer 103 can be further compressed. Share. Therefore, the inclination can be formed in a portion near the concave portion 104 of the connection layer 103.

連接層103之熱膨脹係數在上側基板101及下側基板102之熱膨脹係數以下、即65ppm/℃以下,以低於上側基板101或下側基板102之熱膨脹係數為佳。The thermal expansion coefficient of the connection layer 103 is not more than the thermal expansion coefficient of the upper substrate 101 and the lower substrate 102, that is, 65 ppm/° C. or less, and is preferably lower than the thermal expansion coefficient of the upper substrate 101 or the lower substrate 102.

當連接層103之熱膨脹係數超過65ppm/℃時,或高於上側基板101及下側基板102之熱膨脹係數時,因連接層103之變形,易產生立體配線板116之翹曲或變形。When the thermal expansion coefficient of the connection layer 103 exceeds 65 ppm/° C. or is higher than the thermal expansion coefficients of the upper substrate 101 and the lower substrate 102, warping or deformation of the three-dimensional wiring board 116 is liable to occur due to deformation of the connection layer 103.

以動態機械分析(DMA)法測量之連接層103之玻璃轉移點宜為185℃或宜比上側基板101及下側基板102之玻璃轉移點高10℃以上之差。當連接層130之玻璃轉移點不到185℃或差不到10℃時,在需要如迴焊般高溫之步驟,於基板產生翹曲或彎曲等複雜形狀之變形,有該變形不可逆之情形。The glass transition point of the connection layer 103 measured by the dynamic mechanical analysis (DMA) method is preferably 185 ° C or preferably higher than the glass transition point of the upper substrate 101 and the lower substrate 102 by 10 ° C or more. When the glass transition point of the connection layer 130 is less than 185 ° C or the difference is less than 10 ° C, a deformation of a complicated shape such as warpage or bending is generated in the substrate in a step requiring high temperature such as reflow, and the deformation is irreversible.

連接層103不包含織布、不織布、薄膜等芯材。當連接層103包含芯材時,設置於上側基板101及下側基板102之配線110、118不易埋入連接層103。The connecting layer 103 does not include a core material such as a woven fabric, a non-woven fabric, or a film. When the connection layer 103 includes a core material, the wirings 110 and 118 provided on the upper substrate 101 and the lower substrate 102 are less likely to be buried in the connection layer 103.

由於壓印片112之彈性變形層114之形狀冷卻後回復至加熱前之形狀,故可於第5B圖所示之壓印步驟反覆使用。即,準備另一配線板116,該另一配線板具有另一下側基板102、以露出另一下側基板102上面102A之一部份102C之狀態,設置於另一下側基板102之上面102A的另一連接層103、設置於另一連接層103之上面103A之另一上側基板101,在另一下側基板102之上面102之一部份102A正上方具有形成於另一上側基板101之上面101A的凹部104。於配線板116之上側基板101之上面101A配置壓印片112,將配線板116加熱加壓後,將壓印板112從上側基板101之上面101A剝離。在剝離壓印片112後,於另一配線板116之另一上側基板101之上面101A配置壓印片112,將另一配線板116加熱加壓。Since the shape of the elastic deformation layer 114 of the embossed sheet 112 is cooled and returned to the shape before heating, it can be used repeatedly in the embossing step shown in Fig. 5B. That is, another wiring board 116 having another lower substrate 102 to expose one portion 102C of the upper substrate 102A on the other lower substrate 102 is provided, and the other wiring substrate 116 is disposed on the upper surface 102A of the other lower substrate 102. A connection layer 103, another upper substrate 101 disposed on the upper surface 103A of the other connection layer 103, and a top portion 101A of the upper surface 102 of the other lower substrate 102 have a top surface 101A formed on the other upper substrate 101. The recess 104. The embossing sheet 112 is placed on the upper surface 101A of the upper substrate 101 of the wiring board 116, and after the wiring board 116 is heated and pressurized, the embossing plate 112 is peeled off from the upper surface 101A of the upper substrate 101. After the embossing sheet 112 is peeled off, the embossing sheet 112 is placed on the upper surface 101A of the other upper substrate 101 of the other wiring board 116, and the other wiring board 116 is heated and pressurized.

第7圖顯示連接層103之熔融黏度。連接層之最低熔融黏度以1000Pa‧s~100000Pa‧s為適當。當最低熔融黏度不到1000Pa‧s時,熱硬化性樹脂103D之流量增大,有產生在凹部104內熱硬化性樹脂103D之流入之虞。當最低熔融黏度超過100000Pa‧s時,有產生與基板101、102之接觸不良或配線110、118之埋入不良之虞。Fig. 7 shows the melt viscosity of the connection layer 103. The lowest melt viscosity of the tie layer is suitably from 1000 Pa s to 100,000 Pa s. When the minimum melt viscosity is less than 1000 Pa s, the flow rate of the thermosetting resin 103D increases, and the inflow of the thermosetting resin 103D in the concave portion 104 occurs. When the minimum melt viscosity exceeds 100,000 Pa ‧ , there is a problem of poor contact with the substrates 101 and 102 or poor embedding of the wirings 110 and 118.

連接層103亦可含有著色劑。藉此,提高封裝性、光反射性。The connection layer 103 may also contain a colorant. Thereby, the encapsulation and light reflectivity are improved.

為抑制熱硬化性樹脂103D之流量,連接層103宜更含有彈性體。In order to suppress the flow rate of the thermosetting resin 103D, the connection layer 103 preferably further contains an elastomer.

此外,上側基板101及下側基板102只要為通孔配線板或全層IVH構造之ALIVH配線板等樹脂基板,非特別限定者,可為兩面基板,亦可為多層基板。亦可將複數個基板101、102與複數個連接層103交互層積。In addition, the upper substrate 101 and the lower substrate 102 are not limited to a resin substrate such as a via wiring board or a full-layer IVH structure ALIVH wiring board, and may be a double-sided substrate or a multilayer substrate. A plurality of substrates 101, 102 may be alternately laminated with a plurality of connection layers 103.

又,用於上側基板101及下側基板102之絕緣材料由玻璃織布與環氧系樹脂之複合材料構成。此絕緣材料亦可為以從醯胺、全芳香族聚酯選出之有機質纖維構成之織布與熱硬化性樹脂之複合材料形成。又,此絕緣材料亦可以以從p-醯胺、聚醯亞胺、聚亞苯基苯並二噁唑(poly(p-phenylenebenzobisoxazole)、全芳香族聚酯、PTFE、聚醚碸、聚醚醯亞胺選擇之有機質纖維構成之不織布與熱硬化性樹脂之複合材料形成。又,此絕緣材料可以以玻璃纖維構成之不織布及熱硬化性樹脂之複合材料形成。又,此絕緣材料亦可以由p-醯胺、聚亞苯基苯並二噁唑、全芳香族聚酯、聚醚醯亞胺、聚醚酮、聚醚醚酮、聚對苯二甲酸乙二醇酯、聚四氟乙烯、聚醚碸、聚乙烯對苯二甲酸酯、聚醯亞胺及聚苯硫醚之至少任一合成樹脂薄膜及設置於此合成樹脂薄膜兩面之熱硬化性樹脂層構成之複合材料形成。Further, the insulating material used for the upper substrate 101 and the lower substrate 102 is made of a composite material of a glass woven fabric and an epoxy resin. The insulating material may be formed of a composite material of a woven fabric composed of an organic fiber selected from guanamine or a wholly aromatic polyester and a thermosetting resin. Moreover, the insulating material may also be derived from p-melamine, polyimine, poly(p-phenylenebenzobisoxazole), wholly aromatic polyester, PTFE, polyether oxime, polyether. The composite material of the non-woven fabric composed of the organic fiber selected from the quinone imine and the thermosetting resin is formed. Further, the insulating material may be formed of a composite material of a non-woven fabric made of glass fiber and a thermosetting resin. Further, the insulating material may also be composed of P-decylamine, polyphenylene benzobisoxazole, wholly aromatic polyester, polyetherimide, polyetherketone, polyetheretherketone, polyethylene terephthalate, polytetrafluoroethylene A composite material comprising at least one of a polyether oxime, a polyethylene terephthalate, a polyimide, and a polyphenylene sulfide, and a thermosetting resin layer provided on both sides of the synthetic resin film.

連接層103之熱硬化性樹脂103D可使用從環氧樹脂、聚丁二烯樹脂、苯酚樹脂、聚醯亞胺樹脂、聚醯胺樹脂及氰酸鹽選擇之至少一個熱硬化性樹脂。As the thermosetting resin 103D of the connection layer 103, at least one thermosetting resin selected from the group consisting of an epoxy resin, a polybutadiene resin, a phenol resin, a polyimide resin, a polyamide resin, and a cyanate can be used.

(第2實施形態)(Second embodiment)

第8A圖係本發明第2實施形態之立體配線板216之立體圖。第8B圖係第8A圖所示之立體配線板216之線8B-8B之截面圖。立體配線板216具有下側基板202、設置於下側基板202之上面202A之連接層203、設置於連接層203之上面203A之上側基板201。上側基板201及下側基板202呈不同之形狀。連接層203具有30μm~300μm之厚度。連接層203以使下側基板202之上面202A之一部份202C之狀態設置於上面202A。因而,於下側基板202之上面202A之一部份202C之正上方形成以上面202A之一部份202C、連接層203及上側基板201包圍之凹部204。上側基板201之上面201A、下面201B、下側基板202之上面202A及下面202B形成配線。於凹部204收容零件205,而封裝於立體配線板216。藉此,可縮小封裝有零件205之立體配線板216之總厚度。Fig. 8A is a perspective view of a three-dimensional wiring board 216 according to a second embodiment of the present invention. Fig. 8B is a cross-sectional view taken along line 8B-8B of the three-dimensional wiring board 216 shown in Fig. 8A. The three-dimensional wiring board 216 has a lower substrate 202, a connection layer 203 provided on the upper surface 202A of the lower substrate 202, and an upper substrate 201 provided on the upper surface 203A of the connection layer 203. The upper substrate 201 and the lower substrate 202 have different shapes. The connection layer 203 has a thickness of 30 μm to 300 μm. The connection layer 203 is disposed on the upper surface 202A in a state in which a portion 202C of the upper surface 202A of the lower substrate 202 is in a state. Therefore, a recess 204 surrounded by a portion 202C of the upper portion 202A, the connection layer 203, and the upper substrate 201 is formed directly over a portion 202C of the upper surface 202A of the lower substrate 202. Wiring is formed on the upper surface 201A of the upper substrate 201, the lower surface 201B, and the upper surface 202A and the lower surface 202B of the lower substrate 202. The component 205 is housed in the recess 204 and encapsulated in the three-dimensional wiring board 216. Thereby, the total thickness of the three-dimensional wiring board 216 in which the parts 205 are packaged can be reduced.

第8C圖係連接層203之截面圖。連接層203具有具上面203A及下面203B之絕緣層203C、設置於絕緣層203C內之導孔207。絕緣層203C形成連接於上面203A及下面203B之貫穿孔209。於貫穿孔209填充導電性膏206,而形成導孔207。絕緣層203C由環氧樹脂等熱硬化性樹脂203D、於熱硬化性樹脂203D擴散之無機填料203E構成。連接層203不包含織布、不織布、薄膜等芯材,從上面203A至下面203B實質上以均一之材料構成。當連接層203之厚度不到30μm時,配線不易埋入連接層203。當連接層203之厚度超過300μm時,由於導孔207之寬高比過大,故導孔207之小徑化不易,不易形成導孔207,而有損害連接可靠度之情形。Fig. 8C is a cross-sectional view of the connection layer 203. The connection layer 203 has an insulating layer 203C having an upper surface 203A and a lower surface 203B, and a via hole 207 provided in the insulating layer 203C. The insulating layer 203C forms a through hole 209 that is connected to the upper surface 203A and the lower surface 203B. The conductive paste 206 is filled in the through hole 209 to form the via hole 207. The insulating layer 203C is composed of a thermosetting resin 203D such as an epoxy resin and an inorganic filler 203E diffused from the thermosetting resin 203D. The connection layer 203 does not include a core material such as a woven fabric, a nonwoven fabric, or a film, and is substantially made of a uniform material from the upper surface 203A to the lower surface 203B. When the thickness of the connection layer 203 is less than 30 μm, the wiring is less likely to be buried in the connection layer 203. When the thickness of the connection layer 203 exceeds 300 μm, since the aspect ratio of the via hole 207 is too large, the diameter of the via hole 207 is not easy to be formed, and the via hole 207 is less likely to be formed, which may impair the connection reliability.

無機填料203E宜以氧化矽、二氧化鋁、鈦酸中之至少一種以上者構成。無機填料203E之粒徑為1~15μm,於絕緣層203C宜含有70重量%~90重量%。當無機填料203E之含有量不到70重量%時,熱硬化性樹脂203D於加壓當中流動之際,無機填料203E亦流動。當無機填料203E之含有量超過90%時,配線不易埋入絕緣層203C,而有不易與基板201、202密合之情形。The inorganic filler 203E is preferably composed of at least one of cerium oxide, aluminum oxide, and titanic acid. The inorganic filler 203E has a particle diameter of 1 to 15 μm, and the insulating layer 203C preferably contains 70% by weight to 90% by weight. When the content of the inorganic filler 203E is less than 70% by weight, the inorganic filler 203E also flows when the thermosetting resin 203D flows during pressurization. When the content of the inorganic filler 203E exceeds 90%, the wiring is less likely to be buried in the insulating layer 203C, and it is difficult to adhere to the substrates 201 and 202.

導電性膏206由銅、銀、金、鈀、鉍、錫及該等合金中構成,粒徑以1~20μm為佳。The conductive paste 206 is made of copper, silver, gold, palladium, rhodium, tin, and the like, and preferably has a particle diameter of 1 to 20 μm.

第9圖係立體配線板216之截面圖。凹部4以下側基板202之上面202A之一部份202C、連接層203之側面203F、上側基板201之側面201F包圍。即,下側基板202之上面202A之一部份202C、連接層203之側面203F、上側基板201之側面201F與凹部204面對。連接層203之上面203A之與側面203F連接之部份203G朝向凹部204傾斜至下方,亦即朝向凹部204,於朝向下側基板202之上面202A之一部份的202C之方向204A傾斜。因而,設置於連接層203之上面203A之上側基板201之上面201A之與側面20F連接的部份201G朝凹部204向下傾斜。即,朝向凹部204,於朝向下側基板202之上面202A之一部份202C之方向204A傾斜。連接層203之上面203A之部份203G形成具圓渾之形狀之曲面狀。同樣地,上側基板201之上面201A之部份形成具圓渾之形狀之曲面狀。藉此,形成凹部204之緣之上側基板201之上面201A及側面201F連接之邊緣部201H具曲面形狀。上側基板201包括傾斜而具有曲面形狀之部份201G在內,橫亙上面201A而具一定厚度。即,上側基板201之上面201A之部份201G與連接層203之上面203A之部份203G平行。與連接層203之凹部204面對之側面204F呈曲面形狀。Fig. 9 is a cross-sectional view of the three-dimensional wiring board 216. The concave portion 4 is surrounded by a portion 202C of the upper surface 202A of the lower substrate 202, a side surface 203F of the connection layer 203, and a side surface 201F of the upper substrate 201. That is, one portion 202C of the upper surface 202A of the lower substrate 202, the side surface 203F of the connection layer 203, and the side surface 201F of the upper substrate 201 face the concave portion 204. The portion 203G of the upper surface 203A of the connection layer 203 which is connected to the side surface 203F is inclined downward toward the concave portion 204, that is, toward the concave portion 204, and is inclined toward the direction 204A of the portion 202C of the upper portion 202A of the lower substrate 202. Therefore, the portion 201G of the upper surface 201A of the upper substrate 201 above the upper surface 203A of the connection layer 203 is connected downward to the concave portion 204. That is, toward the concave portion 204, it is inclined toward the direction 204A of a portion 202C of the upper surface 202A of the lower substrate 202. A portion 203G of the upper surface 203A of the connection layer 203 is formed into a curved shape having a rounded shape. Similarly, a portion of the upper surface 201A of the upper substrate 201 is formed into a curved shape having a rounded shape. Thereby, the edge portion 201H to which the upper surface 201A and the side surface 201F of the upper substrate 201 on the edge of the concave portion 204 are formed has a curved shape. The upper substrate 201 includes a portion 201G which is inclined and has a curved shape, and has a certain thickness across the upper surface 201A. That is, the portion 201G of the upper surface 201A of the upper substrate 201 is parallel to the portion 203G of the upper surface 203A of the connection layer 203. The side surface 204F facing the concave portion 204 of the connection layer 203 has a curved shape.

於上面201A、203A之部份201G、203G形成導孔時,有該導孔傾倒之情形。因而,部份201G、203G設置在至距離凹部204之緣最近之導孔為止之範圍。於連接層203內設置複數個導孔207。亦於上側基板201內形成由填充於上側基板內之孔之導電膏構成之複數個導孔219形成。複數個導孔207、219中導孔207A最接近凹部204、亦即側面203F、201F。上面201A、203A傾斜之部份201G、203G設置在側面201F、203F至通孔207A間。即,上側基板201之上面201A之部份201G與連接層203之上面203A之部份203G未形成導孔。When the via holes are formed in the portions 201G and 203G of the upper portions 201A and 203A, the via holes may be dumped. Therefore, the portions 201G and 203G are disposed in a range up to the guide hole closest to the edge of the concave portion 204. A plurality of via holes 207 are provided in the connection layer 203. A plurality of via holes 219 formed of a conductive paste filled in a hole in the upper substrate are also formed in the upper substrate 201. The guide holes 207A of the plurality of guide holes 207, 219 are closest to the recess 204, that is, the side faces 203F, 201F. The inclined portions 201G, 203G of the upper faces 201A, 203A are disposed between the side faces 201F, 203F and the through holes 207A. That is, the portion 201G of the upper surface 201A of the upper substrate 201 and the portion 203G of the upper surface 203A of the connection layer 203 do not form via holes.

第10圖係印刷遮罩211插入至凹部204之立體配線板116之截面圖。於形成於凹部204之底、亦即下側基板202之上面202A之一部份202C之焊盤220經由印刷遮罩211而印刷。由於凹部204具有曲面,故可易將印刷遮罩211插入至凹部204內。又,在印刷遮罩211插入時及脫離時,可防止因對準之偏離接觸凹部204之緣而引起之立體配線板116之破損。FIG. 10 is a cross-sectional view of the three-dimensional wiring board 116 in which the printing mask 211 is inserted into the recess 204. The pad 220 formed on the bottom of the recess 204, that is, the portion 202C of the upper portion 202A of the lower substrate 202 is printed via the printing mask 211. Since the concave portion 204 has a curved surface, the printed mask 211 can be easily inserted into the concave portion 204. Further, when the printing mask 211 is inserted and detached, it is possible to prevent the three-dimensional wiring board 116 from being damaged due to the deviation of the alignment from the edge of the concave portion 204.

由於上側基板201及連接層203之側面201F、203F之厚度之和小於封裝於凹部204內之零件205的高度,故封裝零件205時,易插入零件205及用於封裝之工具,而可以良好效率封裝零件205。與上側基板201之上面201A之部份201G、連接層203之上面203A之部份203G之側面201F、側面203F呈直角之方向之長度設定成大於用於封裝之工具之抓取部份的長度,具體言之,設定為1.0mm以下,更佳為設定在0.3mm以下。Since the sum of the thicknesses of the side surfaces 201F and 203F of the upper substrate 201 and the connection layer 203 is smaller than the height of the component 205 enclosed in the recess 204, the component 205 and the tool for packaging can be easily inserted when the component 205 is packaged, and the efficiency can be improved. Package part 205. The length of the portion 201G of the upper portion 201A of the upper substrate 201, the side surface 201F of the portion 203G of the upper surface 203 of the connection layer 203, and the side surface 203F are set at a right angle to be larger than the length of the grasping portion of the tool for packaging. Specifically, it is set to 1.0 mm or less, and more preferably set to 0.3 mm or less.

說明第2實施形態之立體配線板216之製造方法。第11A圖至第11F圖、第12A圖至第12C圖、第13A圖至第13C圖係顯示立體配線板216之製程之截面圖。A method of manufacturing the three-dimensional wiring board 216 of the second embodiment will be described. 11A to 11F, 12A to 12C, and 13A to 13C are cross-sectional views showing a process of the three-dimensional wiring board 216.

首先,如第11A圖所示,準備具有第1面203H、第1面203J之相反側之第2面,並含有未硬化之熱硬化性樹脂203D之絕緣層203C。於絕緣層203C之第1面203H及第2面203J分別貼有樹脂薄膜208A、樹脂薄膜208B。樹脂薄膜208A、208B由聚對苯二甲酸乙二酯(PET)等強固之樹脂構成。接著,如第11B圖所示,於絕緣層203C及樹脂薄膜208A、208B形成用以形成凹部204之孔204B或切斷絕緣層203C、樹脂薄膜208A、208B。First, as shown in FIG. 11A, the second surface having the first surface 203H and the first surface 203J on the opposite side is prepared, and the insulating layer 203C of the uncured thermosetting resin 203D is prepared. A resin film 208A and a resin film 208B are attached to the first surface 203H and the second surface 203J of the insulating layer 203C, respectively. The resin films 208A and 208B are made of a strong resin such as polyethylene terephthalate (PET). Next, as shown in FIG. 11B, a hole 204B for forming the concave portion 204, a cut insulating layer 203C, and resin films 208A and 208B are formed in the insulating layer 203C and the resin films 208A and 208B.

接著,如第11C圖所示,剝離樹脂薄膜208A,將樹脂薄膜208C貼合於第1面203H。樹脂薄膜208C由(PET)等強固樹脂構成。如第11D圖所示,通過樹脂薄膜208B、208C,於絕緣層203C形成貫穿孔209。然後,如第11E圖所示,於 貫穿孔209內填充導電性膏206,形成導孔207,製作連接層203。接著,如第11F圖所示,剝離樹脂薄膜208C。另一方面,樹脂薄膜208B不剝離,而設於第2面203J。Next, as shown in FIG. 11C, the resin film 208A is peeled off, and the resin film 208C is bonded to the first surface 203H. The resin film 208C is made of a strong resin such as (PET). As shown in FIG. 11D, through holes 209 are formed in the insulating layer 203C by the resin films 208B and 208C. Then, as shown in Figure 11E, The conductive paste 206 is filled in the through hole 209 to form the via hole 207, and the connection layer 203 is formed. Next, as shown in Fig. 11F, the resin film 208C is peeled off. On the other hand, the resin film 208B is provided on the second surface 203J without being peeled off.

接著,如第12A圖及第12B圖所示,以絕緣層203C之第1面203H定位於下側基板202之上面202A之狀態,將連接層203配置於下側基板202之上面202A。如此,絕緣層203C之第1面203H成為連接層203之下面203B,第2面203J成為上面203A。於下側基板202之上面202A設有配線210。連接層203配置於下側基板202上時,配線210埋入連接層203。藉此,由於壓縮導電性膏206,故與配線210密合連接。之後,如第12C圖所示,從連接層203之上面203A、亦即絕緣層203C之第2面203J剝離樹脂薄膜208B。Next, as shown in FIGS. 12A and 12B, the first layer 203H of the insulating layer 203C is positioned on the upper surface 202A of the lower substrate 202, and the connection layer 203 is disposed on the upper surface 202A of the lower substrate 202. As described above, the first surface 203H of the insulating layer 203C serves as the lower surface 203B of the connection layer 203, and the second surface 203J serves as the upper surface 203A. Wiring 210 is provided on the upper surface 202A of the lower substrate 202. When the connection layer 203 is disposed on the lower substrate 202, the wiring 210 is buried in the connection layer 203. Thereby, since the conductive paste 206 is compressed, it is closely connected to the wiring 210. Thereafter, as shown in Fig. 12C, the resin film 208B is peeled off from the upper surface 203A of the connection layer 203, that is, the second surface 203J of the insulating layer 203C.

接著,如第13A圖所示,以上側基板201之下面201B位於連接層203之上面203A、亦即絕緣層203C之第2面203J之狀態,將上側基板201配置於連接層203上。進一步,於上側基板201之上面201A上配置壓印片212,以熱加壓將上側基板201、連接層203、下側基板202加熱加壓而層積。壓印片212具有抵接上側基板201之上面201A之下面212B及其相反側之上面212A。壓印片212具有設置於下面212B之脫模層215、設置於脫模層215之上面215A,具有耐熱性之彈性變形層214、設置於彈性變形層214之上面214A上之脫模層218。脫模層218設置於壓印片212之上面212A。彈性變形層214為可逆變形,以矽酮樹脂等彈性變形之樹脂形成。Next, as shown in FIG. 13A, the lower surface 201B of the upper substrate 201 is placed on the upper surface 203A of the connection layer 203, that is, the second surface 203J of the insulating layer 203C, and the upper substrate 201 is placed on the connection layer 203. Further, the stamp 212 is placed on the upper surface 201A of the upper substrate 201, and the upper substrate 201, the connection layer 203, and the lower substrate 202 are heated and pressurized by thermal pressurization to be laminated. The embossing sheet 212 has an upper surface 212A that abuts against the lower surface 201B of the upper surface 201A of the upper substrate 201 and its opposite side. The embossing sheet 212 has a release layer 215 disposed on the lower surface 212B, an upper surface 215A disposed on the release layer 215, an elastic deformation layer 214 having heat resistance, and a release layer 218 disposed on the upper surface 214A of the elastic deformation layer 214. The release layer 218 is disposed on the upper surface 212A of the stamp 212. The elastically deformable layer 214 is a reversibly deformable shape and is formed of an elastically deformed resin such as an anthrone resin.

當將加壓板212、上側基板201、連接層203、下側基板202加熱壓縮時,如第13B圖所示,將彈性變形層214及脫模層215壓入至凹部204內。壓印片212之彈性變形層214抑制連接層203之熱硬化性樹脂203D之流量,而防止熱硬化性樹脂流入至凹部204內。藉此,彈性變形層214以沿著上側基板201及凹部204之狀態覆蓋,而堵住壓縮時之熱硬化性樹脂203D之流動。如此,藉彈性變形層214,即使凹部204深,亦可將壓印片212以無間隙之狀態壓入至凹部204內。When the pressurizing plate 212, the upper substrate 201, the connection layer 203, and the lower substrate 202 are heated and compressed, as shown in FIG. 13B, the elastic deformation layer 214 and the release layer 215 are pressed into the concave portion 204. The elastic deformation layer 214 of the embossed sheet 212 suppresses the flow rate of the thermosetting resin 203D of the connection layer 203, and prevents the thermosetting resin from flowing into the concave portion 204. Thereby, the elastic deformation layer 214 is covered along the state of the upper substrate 201 and the recess 204, and blocks the flow of the thermosetting resin 203D at the time of compression. Thus, by the elastic deformation layer 214, even if the concave portion 204 is deep, the stamping sheet 212 can be pressed into the concave portion 204 without a gap.

如第13B圖所示,彈性變形層214壓入至凹部204內時,由於可使與連接層203之凹部204面對之側面203F附近之部份更壓縮,故可使連接於連接層203之側面203F之上面203A之部203G於方向204A傾斜。此壓縮時,形成於上側基板201之下面201B之配線220埋入連接層203之上面203A。藉此,由於將導電性膏206更壓縮,故可與配線210、218密合接觸。上側基板201自身層積成在不壓縮下,仿照連接層203,故上側基板201之上面201A之部份201G可與連接層203之上面203A之部份203G平行地於方向204A傾斜。如此,上側基板201之厚度包括部份201G在內,在上面201A均一。As shown in FIG. 13B, when the elastic deformation layer 214 is pressed into the concave portion 204, since the portion near the side surface 203F facing the concave portion 204 of the connection layer 203 can be more compressed, it can be connected to the connection layer 203. The portion 203G of the upper surface 203A of the side surface 203F is inclined in the direction 204A. At the time of this compression, the wiring 220 formed on the lower surface 201B of the upper substrate 201 is buried in the upper surface 203A of the connection layer 203. Thereby, since the conductive paste 206 is further compressed, it can be brought into close contact with the wirings 210 and 218. The upper substrate 201 itself is laminated so as not to be compressed, and the portion 201G of the upper surface 201A of the upper substrate 201 can be inclined in the direction 204A in parallel with the portion 203G of the upper surface 203A of the connection layer 203. Thus, the thickness of the upper substrate 201 includes the portion 201G and is uniform on the upper surface 201A.

之後,將壓印片212、上側基板201、連接層203及下側基板202冷卻,將壓印片212剝離,如第13C圖所示,完成立體配線板216。在立體配線板216方面,由於形成凹部204之緣之上側基板201之上面201A與側面201F連接之邊緣部201H呈鈍角,故可在不使壓印片212破損下,不於立體配線板216殘留而剝離。壓印片212之彈性變形層214於冷卻時要回復加熱前之形狀。因而,即使凹部204深,亦可易從凹部204將壓印片212剝離。Thereafter, the embossing sheet 212, the upper substrate 201, the connection layer 203, and the lower substrate 202 are cooled, and the embossed sheet 212 is peeled off. As shown in Fig. 13C, the three-dimensional wiring board 216 is completed. In the aspect of the three-dimensional wiring board 216, since the edge portion 201H to which the upper surface 201A of the upper substrate 201 is formed at the edge of the concave portion 204 and the side surface 201F is at an obtuse angle, the three-dimensional wiring board 216 can be left without being damaged by the stamping sheet 212. And stripped. The elastically deformable layer 214 of the embossed sheet 212 is returned to the shape before heating upon cooling. Therefore, even if the concave portion 204 is deep, the embossed sheet 212 can be easily peeled off from the concave portion 204.

為使壓印片212以無間隙之狀態填充於凹部204內,壓印片212之彈性變形層214包括壓印片212抵接之面、亦即凹部204之表面積在內,伸長成上側基板201之上面201A之表面積以上。藉此,不論凹部204之形狀或深度為何,皆可將彈性變形層214以無間隙之狀態填充於凹部204內。藉伸長彈性變形層214,可以均等之載重加壓上側基板201之上面201A與凹部204之表面全體。藉此,可防止連接層203之樹脂203D溢出至凹部204內。又,彈性變形層214之伸長率為700%以上,為對反覆之彈性變形確保物理性強度,而具有15N/mm以上之撕裂強度,為仿照上基板201之形狀,更宜具有10N/mm以下之抗拉強度。In order to fill the stamping 212 in the recess 204 with no gap, the elastic deformation layer 214 of the stamp 212 includes the surface abutting the stamp 212, that is, the surface area of the recess 204, and is elongated into the upper substrate 201. Above the surface area of 201A above. Thereby, regardless of the shape or depth of the recess 204, the elastic deformation layer 214 can be filled in the recess 204 without a gap. By elongating the elastic deformation layer 214, the entire surface 201A of the upper substrate 201 and the entire surface of the concave portion 204 can be pressurized by the load. Thereby, the resin 203D of the connection layer 203 can be prevented from overflowing into the concave portion 204. Further, the elastic deformation layer 214 has an elongation of 700% or more, and has physical strength for reversing elastic deformation, and has a tear strength of 15 N/mm or more, which is similar to the shape of the upper substrate 201, and preferably has 10 N/mm. The following tensile strength.

又,為於凹部204內確實填充,以符合JIS K 6253之測量之彈性變形層214之硬度以5~30度為佳。彈性變形層214之厚度宜大於上側基板201之上面201A之凹部204之深度。Further, in order to be surely filled in the concave portion 204, the hardness of the elastic deformation layer 214 measured in accordance with JIS K 6253 is preferably 5 to 30 degrees. The thickness of the elastically deformable layer 214 is preferably greater than the depth of the recess 204 of the upper surface 201A of the upper substrate 201.

如第13B圖所示,由於彈性變形層214伸長至抵接之面之表面積以上的面積,故壓印片212壓入至凹部204內,且可進一步壓縮連接層203之凹部204附近之部份。因而,可於連接層203之凹部204附近之部份形成傾斜。As shown in FIG. 13B, since the elastic deformation layer 214 is elongated to an area larger than the surface area of the abutting surface, the stamp 212 is pressed into the concave portion 204, and the portion near the concave portion 204 of the connection layer 203 can be further compressed. . Therefore, the inclination can be formed in a portion near the concave portion 204 of the connection layer 203.

壓印片212之彈性變形層214在熱加壓步驟中及其前後,可可逆變形,且具耐熱性。脫模層215設置成在熱加壓步驟後,以良好效率使壓印片212剝離,非必須形成者。The elastically deformable layer 214 of the embossed sheet 212 is reversibly deformable and heat-resistant in the heat pressurization step and before and after it. The release layer 215 is disposed to peel the stamp 212 with good efficiency after the heat pressurization step, and is not necessarily formed.

此外,在上述製程中,首先,以使絕緣層203C之第1面203H位於下側基板202之上面202A之狀態下,將連接層203配置於下側基板202之上面202A,之後,將上側基板201配置於連接層203之上面203A。在第2實施形態中,亦可以使絕緣層203C之第1面203H位於上側基板201之下面201B之狀態,將連接層203配置於上側基板201之下面201B,之後,將連接層203配置於下側基板202之上面202A上。In the above-described process, first, the connection layer 203 is disposed on the upper surface 202A of the lower substrate 202 in a state where the first surface 203H of the insulating layer 203C is positioned on the upper surface 202A of the lower substrate 202, and then the upper substrate is placed. 201 is disposed on the upper surface 203A of the connection layer 203. In the second embodiment, the first surface 203H of the insulating layer 203C may be placed on the lower surface 201B of the upper substrate 201, and the connection layer 203 may be disposed on the lower surface 201B of the upper substrate 201, and then the connection layer 203 may be disposed under the second layer 203. On the upper surface 202A of the side substrate 202.

連接層203之熱膨脹係數在上側基板201及下側基板202之熱膨脹係數以下、即65ppm/℃以下,以低於上側基板201或下側基板202之熱膨脹係數為佳。The thermal expansion coefficient of the connection layer 203 is preferably lower than the thermal expansion coefficient of the upper substrate 201 and the lower substrate 202, that is, 65 ppm/° C. or lower, and is preferably lower than the thermal expansion coefficient of the upper substrate 201 or the lower substrate 202.

當連接層203之熱膨脹係數超過65ppm/℃時,或高於上側基板201及下側基板202之熱膨脹係數時,連接層203之變形,易產生立體配線板216之翹曲或變形。When the thermal expansion coefficient of the connection layer 203 exceeds 65 ppm/° C. or is higher than the thermal expansion coefficient of the upper substrate 201 and the lower substrate 202, the deformation of the connection layer 203 easily causes warpage or deformation of the three-dimensional wiring board 216.

以動態機械分析(DMA)法測量之連接層203之玻璃轉移點宜為185℃或宜比上側基板201及下側基板202之玻璃轉移點高10℃以上之差。當連接層203之玻璃轉移點不到185℃或差小於10℃時,在需要如迴焊般高溫之步驟,於基板產生翹曲或彎曲等複雜形狀之變形,有該變形不可逆之情形。The glass transition point of the connection layer 203 measured by the dynamic mechanical analysis (DMA) method is preferably 185 ° C or preferably higher than the glass transition point of the upper substrate 201 and the lower substrate 202 by more than 10 ° C. When the glass transition point of the connection layer 203 is less than 185 ° C or the difference is less than 10 ° C, a deformation of a complicated shape such as warpage or bending is generated in the substrate in a step requiring high temperature such as reflow, and the deformation is irreversible.

連接層203不包含織布、不織布、薄膜等芯材。當連接層203包含芯材時,設置於上側基板201及下側基板202之配線210、218不易埋入連接層203。The connecting layer 203 does not include a core material such as a woven fabric, a non-woven fabric, or a film. When the connection layer 203 includes a core material, the wirings 210 and 218 provided on the upper substrate 201 and the lower substrate 202 are less likely to be buried in the connection layer 203.

由於壓印片212之彈性變形層214之形狀冷卻後回復至加熱前之形狀,故可於第13B圖所示之壓印步驟反覆使用。即,準備另一配線板216,該另一配線板具有另一下側基板202、以露出另一下側基板202上面202A之一部份202C之狀態,設置於另一下側基板202之上面202A的另一連接層203、設置於另一連接層203之上面203A之另一上側基板201,在另一下側基板202之上面202之一部份202A正上方具有形成於另一上側基板201之上面201A的凹部204。於配線板216之上側基板201之上面201A配置壓印片212,將配線板216加熱加壓後,將壓印板212從上側基板201之上面201A剝離。在剝離壓印片212後,於另一配線板216之另一上側基板201之上面201A配置壓印片212,將另一配線板216加熱加壓。Since the shape of the elastic deformation layer 214 of the embossed sheet 212 is cooled and returned to the shape before heating, it can be used repeatedly in the embossing step shown in Fig. 13B. That is, another wiring board 216 having another lower substrate 202 to expose a portion 202C of the upper surface 202A of the lower substrate 202 and another upper surface 202A of the other lower substrate 202 is prepared. A connection layer 203, another upper substrate 201 disposed on the upper surface 203A of the other connection layer 203, and a top portion 201A of the upper surface 202 of the other lower substrate 202 have a top surface 201A formed on the other upper substrate 201. The recess 204. The embossing sheet 212 is placed on the upper surface 201A of the upper substrate 201 of the wiring board 216, and after the wiring board 216 is heated and pressurized, the embossing plate 212 is peeled off from the upper surface 201A of the upper substrate 201. After the embossing sheet 212 is peeled off, the embossing sheet 212 is placed on the upper surface 201A of the other upper substrate 201 of the other wiring board 216, and the other wiring board 216 is heated and pressurized.

第14圖顯示連接層203之熔融黏度。連接層203之最低熔融黏度以1000Pa‧s~100000Pa‧s為適當。當最低熔融黏度不到1000Pa‧s時,熱硬化性樹脂203D之流動增大,有產生在凹部204內熱硬化性樹脂203D之流入之虞。當最低熔融黏度超過100000Pa‧s時,有產生與基板201、202之接觸不良或配線120、128之埋入不良之虞。Fig. 14 shows the melt viscosity of the connection layer 203. The minimum melt viscosity of the connection layer 203 is suitably from 1000 Pa s to 100,000 Pa s. When the minimum melt viscosity is less than 1000 Pa s, the flow of the thermosetting resin 203D increases, and the inflow of the thermosetting resin 203D in the concave portion 204 occurs. When the minimum melt viscosity exceeds 100,000 Pa ‧ , there is a problem of poor contact with the substrates 201 and 202 or poor embedding of the wirings 120 and 128.

連接層203亦可含有著色劑。藉此,提高封裝性、光反射性。The connection layer 203 may also contain a colorant. Thereby, the encapsulation and light reflectivity are improved.

為抑制熱硬化性樹脂203D之流量,連接層203宜更含有彈性體。In order to suppress the flow rate of the thermosetting resin 203D, the connection layer 203 preferably further contains an elastomer.

此外,上側基板201及下側基板202只要為通孔配線板或全層IVH構造之ALIVH配線板等樹脂基板,非特別限定者,可為兩面基板,亦可為多層基板。亦可將複數個基板201、202與複數個連接層203交互層積。In addition, the upper substrate 201 and the lower substrate 202 are not limited to a resin substrate such as a via wiring board or a full-layer IVH structure ALIVH wiring board, and may be a double-sided substrate or a multilayer substrate. A plurality of substrates 201, 202 may be alternately laminated with a plurality of connection layers 203.

又,上側基板201及下側基板202以由玻璃織布與環氧系樹脂之複合材料構成之絕緣材料形成。此絕緣材料亦可為以從醯胺、全芳香族聚酯選出之有機質纖維構成之織布與熱硬化性樹脂之複合材料形成。又,此絕緣材料亦可以以從p-醯胺、聚醯亞胺、聚亞苯基苯並二噁唑(poly(p-phen yienebenzobisoxazole)、全芳香族聚酯、PTFE、聚醚碸、聚醚醯亞胺選擇之有機質纖維構成之不織布與熱硬化性樹脂之複合材料形成。又,此絕緣材料可以以玻璃纖維構成之不織布及熱硬化性樹脂之複合材料形成。又,此絕緣材料亦可以由p-醯胺、聚亞苯基苯並二噁唑、全芳香族聚酯、聚醚醯亞胺、聚醚酮、聚醚醚酮、聚對苯二甲酸乙二醇酯、聚四氟乙烯、聚醚碸、聚乙烯對苯二甲酸酯、聚醯亞胺及聚苯硫醚之至少任一合成樹脂薄膜及設置於此合成樹脂薄膜兩面之熱硬化性樹脂層構成之複合材料形成。Further, the upper substrate 201 and the lower substrate 202 are formed of an insulating material made of a composite material of a glass woven fabric and an epoxy resin. The insulating material may be formed of a composite material of a woven fabric composed of an organic fiber selected from guanamine or a wholly aromatic polyester and a thermosetting resin. Moreover, the insulating material may also be derived from p-melamine, polyimine, poly(p-phen yienebenzobisoxazole, wholly aromatic polyester, PTFE, polyether oxime, poly A composite material of a non-woven fabric composed of an organic fiber selected from an ether quinone imine and a thermosetting resin. Further, the insulating material may be formed of a composite material of a non-woven fabric made of glass fiber and a thermosetting resin. From p-nonylamine, polyphenylene benzobisoxazole, wholly aromatic polyester, polyetherimide, polyetherketone, polyetheretherketone, polyethylene terephthalate, polytetrafluoroethylene a composite material comprising at least one of a synthetic resin film of ethylene, polyether oxime, polyethylene terephthalate, polyimide, and polyphenylene sulfide, and a thermosetting resin layer provided on both sides of the synthetic resin film .

熱硬化性樹脂103D可使用從環氧樹脂、聚丁二烯樹脂、苯酚樹脂、聚醯亞胺樹脂、聚醯胺樹脂及氰酸鹽選擇之至少一個熱硬化性樹脂。As the thermosetting resin 103D, at least one thermosetting resin selected from the group consisting of an epoxy resin, a polybutadiene resin, a phenol resin, a polyimide resin, a polyamide resin, and a cyanate can be used.

此外,在實施形態中,表示「上面」、「下面」、「正上方」、「下方」等之方向之用語顯示上側基板101、201、下側基板102、202、連接層103、203等與立體配線板116、216之構成零件相關之相對方向,非顯示上下方向等絕對方向。In the embodiment, the terms "upper", "lower", "upper", "lower", etc. indicate the upper substrates 101, 201, the lower substrates 102, 202, the connection layers 103, 203, etc. The relative directions of the components of the three-dimensional wiring boards 116 and 216 are not the absolute directions such as the vertical direction.

101...上側基板101. . . Upper substrate

101A...上面101A. . . Above

101B...下面101B. . . below

101F...側面101F. . . side

101G...部份101G. . . Part

101H...邊緣部101H. . . Edge

102...下側基板102. . . Lower substrate

102A...上面102A. . . Above

102B...下面102B. . . below

102C...一部份102C. . . a part

103...連接層103. . . Connection layer

103A...上面103A. . . Above

103B...下面103B. . . below

103C...絕緣層103C. . . Insulation

103D...熱硬化性樹脂103D. . . Thermosetting resin

103E...無機填料103E. . . Inorganic filler

103F...側面103F. . . side

103G...部份103G. . . Part

103H...第1面103H. . . First side

103J...第2面103J. . . Second side

104...凹部104. . . Concave

104A...方向104A. . . direction

104B...孔104B. . . hole

105...零件105. . . Components

106...導電性膏106. . . Conductive paste

107...導孔107. . . Guide hole

107A...導孔107A. . . Guide hole

108A...樹脂薄膜108A. . . Resin film

108B...樹脂薄膜108B. . . Resin film

108C...樹脂薄膜108C. . . Resin film

109...貫穿孔109. . . Through hole

110...配線110. . . Wiring

112...壓印片112. . . Imprint

112A...上面112A. . . Above

112B...下面112B. . . below

114...變形層114. . . Deformation layer

114A...上面114A. . . Above

115...脫模層115. . . Release layer

115A...上面115A. . . Above

116...立體配線板116. . . Three-dimensional wiring board

118...脫模層118. . . Release layer

119...導孔119. . . Guide hole

120...配線120. . . Wiring

121...連接層121. . . Connection layer

122...下側基板122. . . Lower substrate

123...上側基板123. . . Upper substrate

124...解放層124. . . Liberation layer

125...熱可塑性樹脂層125. . . Thermoplastic resin layer

126...片126. . . sheet

127...配線板127. . . Patch panel

128...凹部128. . . Concave

201...上側基板201. . . Upper substrate

201A...上面201A. . . Above

201B...下面201B. . . below

201F...側面201F. . . side

201G...部份201G. . . Part

201H...邊緣部201H. . . Edge

202...下側基板202. . . Lower substrate

202A...上面202A. . . Above

202B...下面202B. . . below

202C...一部份202C. . . a part

203...連接層203. . . Connection layer

203A...上面203A. . . Above

203B...下面203B. . . below

203C...絕緣層203C. . . Insulation

203D...熱硬化性樹脂203D. . . Thermosetting resin

203E...無機填料203E. . . Inorganic filler

203G...部份203G. . . Part

203H...第1面203H. . . First side

203J...第2面203J. . . Second side

204...凹部204. . . Concave

204A...方向204A. . . direction

204B...孔204B. . . hole

204F...側面204F. . . side

205...零件205. . . Components

206...導電性膏206. . . Conductive paste

207...導孔207. . . Guide hole

207A...導孔207A. . . Guide hole

208A...樹脂薄膜208A. . . Resin film

208B...樹脂薄膜208B. . . Resin film

208C...樹脂薄膜208C. . . Resin film

209...貫穿孔209. . . Through hole

210...配線210. . . Wiring

211...印刷遮罩211. . . Print mask

212A...上面212A. . . Above

212B...下面212B. . . below

214...彈性變形層214. . . Elastic deformation layer

215...脫模層215. . . Release layer

215A...上面215A. . . Above

216...立體配線板216. . . Three-dimensional wiring board

218...脫模層218. . . Release layer

220...配線220. . . Wiring

第1A圖係本發明實施形態之立體配線板之立體圖。Fig. 1A is a perspective view of a three-dimensional wiring board according to an embodiment of the present invention.

第1B圖係第1A圖所示之立體配線板之線1B-1B之截面圖。Fig. 1B is a cross-sectional view of the line 1B-1B of the three-dimensional wiring board shown in Fig. 1A.

第1C圖係第1實施形態之立體配線板之連接層之截面圖。Fig. 1C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the first embodiment.

第2圖係第1實施形態之立體配線板之截面圖。Fig. 2 is a cross-sectional view showing a three-dimensional wiring board of the first embodiment.

第3A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3D圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3D is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3E圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3E is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第3F圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 3F is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第4C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 4C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5A圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5B圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第5C圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 5C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第6圖係顯示第1實施形態之立體配線板之製程之截面圖。Fig. 6 is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

第7圖係顯示第1實施形態之立體配線板之連接層之熔融黏度。Fig. 7 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the first embodiment.

第8A圖係本發明第2實施形態之立體配線板之立體圖。Fig. 8A is a perspective view of a three-dimensional wiring board according to a second embodiment of the present invention.

第8B圖係第8A圖所示之立體配線板之線8B-8B之截面圖。Fig. 8B is a cross-sectional view of the line 8B-8B of the three-dimensional wiring board shown in Fig. 8A.

第8C圖係第2實施形態之立體配線板之連接層之截面圖。Fig. 8C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the second embodiment.

第9圖係第2實施形態之立體配線板之截面圖。Fig. 9 is a cross-sectional view showing a three-dimensional wiring board of the second embodiment.

第10圖係第2實施形態之立體配線板之截面圖。Fig. 10 is a cross-sectional view showing a three-dimensional wiring board of a second embodiment.

第11A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11D圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11D is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11E圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11E is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第11F圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 11F is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第12C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 12C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13A圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13B圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第13C圖係顯示第2實施形態之立體配線板之製程之截面圖。Fig. 13C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

第14圖係顯示第2實施形態之立體配線板之連接層之熔融黏度。Fig. 14 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the second embodiment.

第15A圖係顯示習知配線板之製程之截面圖。Fig. 15A is a cross-sectional view showing the process of a conventional wiring board.

第15B圖係顯示習知配線板之製程之截面圖。Fig. 15B is a cross-sectional view showing the process of a conventional wiring board.

101...上側基板101. . . Upper substrate

101A...上面101A. . . Above

101B...下面101B. . . below

102...下側基板102. . . Lower substrate

103...連接層103. . . Connection layer

103A...上面103A. . . Above

112...壓印片112. . . Imprint

112A...上面112A. . . Above

112B...下面112B. . . below

114...變形層114. . . Deformation layer

114A...上面114A. . . Above

115...脫模層115. . . Release layer

115A...上面115A. . . Above

118...脫膜層118. . . Release layer

120...配線120. . . Wiring

Claims (11)

一種壓印片,係用以製造具有形成有凹部之面之配線板者,包含有:彈性變形層,係於對具有前述凹部之前述面加壓時,可沿前述凹部及前述面可逆變形,且具耐熱性者。A stamping sheet for manufacturing a wiring board having a surface on which a concave portion is formed, comprising: an elastic deformation layer which is reversibly deformable along the concave portion and the surface when the surface having the concave portion is pressurized; And heat resistant. 如申請專利範圍第1項之壓印片,其更包含有:第1脫模層,係設置於前述彈性變形層之抵接前述配線板之前述面的面者。The embossed sheet according to claim 1, further comprising: a first release layer provided on a surface of the elastic deformation layer that abuts against the surface of the wiring board. 如申請專利範圍第1項之壓印片,其中前述彈性變形層於對具有前述凹部之前述面加壓時,伸長成具前述凹部之前述面之表面積以上的表面積。The embossed sheet according to claim 1, wherein the elastically deformable layer is elongated to have a surface area equal to or larger than a surface area of the surface of the concave portion when the surface having the concave portion is pressurized. 如申請專利範圍第1項之壓印片,其中藉伸長前述彈性變形層,以均等之載重加壓前述配線板之面全面。The embossing sheet of claim 1, wherein the surface of the wiring board is pressed by an equal weight by extending the elastic deformation layer. 如申請專利範圍第1項之壓印片,其中當前述彈性變形層從前述配線板之前述面剝離時,收縮為小於前述配線板之前述面之表面積。The embossing sheet according to claim 1, wherein when the elastic deformation layer is peeled off from the surface of the wiring board, the shrinkage is smaller than a surface area of the surface of the wiring board. 如申請專利範圍第1項之壓印片,其中前述彈性變形層具有5至30度之硬度,且較前述凹部之深度厚。The embossing sheet of claim 1, wherein the elastically deformable layer has a hardness of 5 to 30 degrees and is thicker than a depth of the recess. 如申請專利範圍第1項之壓印片,其更包含有:第2脫模層,係設置於前述彈性變形層之前述面之相反側的面者。The embossed sheet according to claim 1, further comprising: a second release layer provided on a surface opposite to the surface of the elastic deformation layer. 如申請專利範圍第1項之壓印片,其中前述彈性變形層於對具有前述凹部之前述面加壓時,填充前述凹部。The embossed sheet according to claim 1, wherein the elastically deformable layer fills the concave portion when the surface having the concave portion is pressurized. 如申請專利範圍第1項之壓印片,其中前述彈性變形層可加壓至前述配線板複數次。The embossing sheet of claim 1, wherein the elastic deformation layer is pressurizable to the wiring board a plurality of times. 一種配線板之製造方法,係具有:配線板準備步驟,係準備配線板,該配線板具有下側基板、以露出前述下側基板上面之一部份之狀態,設置於前述下側基板之前述上面的連接層、設置於前述連接層之上面的上側基板,在前述下側基板之前述上面之前述一部份正上方具有形成於前述上側基板之上面的凹部者;配線板加熱加壓步驟,係於前述配線板之前述上側基板的前述上面配置壓印片,將前述配線板加熱加壓者,前述壓印片具有彈性變形層,該彈性變形層係在於前述配線板之前述上側基板的前述上面配置壓印片,將前述配線板加熱加壓之步驟中,可沿前述凹部及前述上側基板之前述上面可逆變形,且具耐熱性者。A method of manufacturing a wiring board, comprising: a wiring board preparing step of preparing a wiring board having a lower substrate and exposing a portion of an upper surface of the lower substrate, wherein the wiring board is provided on the lower substrate The upper connecting layer and the upper substrate disposed on the upper surface of the connecting layer have a recess formed on the upper surface of the upper substrate directly above the portion of the upper surface of the lower substrate; the heating and pressing step of the wiring board, a embossed sheet is disposed on the upper surface of the upper substrate of the wiring board, and the wiring board is heated and pressurized, and the embossed sheet has an elastic deformation layer, wherein the elastic deformation layer is the aforementioned one of the upper substrate of the wiring board In the step of heating and pressurizing the wiring board, the stamping sheet may be reversibly deformable along the front surface of the concave portion and the upper substrate, and has heat resistance. 如申請專利範圍第10項之配線板之製造方法,其更具有:另一配線板準備步驟,係準備另一配線板,該另一配線板具有另一下側基板、以露出前述另一下側基板上面之一部份之狀態,設置於前述另一下側基板之前述上面的另一連接層、設置於前述另一連接層之上面的另一上側基板,在前述另一下側基板之前述上面之前述一部份正上方具有形成於前述另一上側基板之上面的凹部者;剝離步驟,係於前述配線板之前述上側基板的前述上面配置前述壓印片,將前述配線板加熱加壓之步驟後,將前述壓印板從前述配線板之前述上側基板的前述上面剝離者,另一配線板加熱加壓步驟,係在剝離前述壓印片之步驟後,於前述另一配線板之前述另一上側基板的前述上面配置前述壓印片,將前述另一配線板加熱加壓者。The manufacturing method of the wiring board of claim 10, further comprising: another wiring board preparing step of preparing another wiring board having another lower substrate to expose the other lower substrate a state of one of the upper portions, another connection layer provided on the upper surface of the other lower substrate, and another upper substrate disposed on the upper surface of the other connection layer, the aforementioned upper surface of the other lower substrate a portion having a recess formed on the upper surface of the other upper substrate directly above; a stripping step of arranging the stamp on the upper surface of the upper substrate of the wiring board, and heating and pressurizing the wiring board Removing the stamping plate from the front surface of the upper substrate of the wiring board, and heating and pressing the other wiring board, after the step of peeling off the stamping sheet, the other of the other wiring board The above-mentioned embossing sheet is disposed on the upper surface of the upper substrate, and the other wiring board is heated and pressurized.
TW98104079A 2008-02-12 2009-02-09 A method of manufacturing a wiring board and an embossing sheet for use in the manufacturing method TWI395530B (en)

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