TWI395530B - A method of manufacturing a wiring board and an embossing sheet for use in the manufacturing method - Google Patents

Description

Manufacturing method of wiring board and embossing sheet used in the manufacturing method Field of invention

The present invention relates to a method of manufacturing a wiring board widely used for various electronic devices such as a computer, a mobile communication telephone, and a video recorder, and a stamper used in the manufacturing method.

Background of the invention

Recently, mobile computers such as personal computers, digital cameras, and mobile phones have become popular, especially in terms of small size, thinness, light weight, high definition, and multi-function. In response to this, semiconductor components used in machines have also developed small, low-profile, three-dimensional packages for packaging. One of the methods for easily achieving such a low-profile semiconductor package and three-dimensional encapsulation of a semiconductor device is known as a method of using a substrate having a cavity, that is, a recess.

Fig. 15A and Fig. 15B are cross-sectional views showing the process of the conventional wiring board 127 having a cavity, as described in Japanese Laid-Open Patent Publication No. SHO63-90158.

As shown in FIG. 15A, the connection layer 121 is positioned between the lower substrate 122 and the upper substrate 123, and the upper substrate 123, the connection layer 121, and the lower substrate are overlapped while the position of the electrode or the position of the window is aligned. 122, and the wiring board 127 is produced. Thereafter, the sheet 126 is placed on the upper substrate 123. The sheet 126 is composed of a release layer 124 having a release property and a thermoplastic resin layer 125 provided on the release layer 124. The thermoplastic resin layer 125 is composed of a thermoplastic resin which can be thermally flowed.

As shown in Fig. 15B, the sheet 126 is heated on the upper substrate 123 while being pressed. When the sheet 126 is heated and pressed, before the connection layer 121 flows into the concave portion 128, the thermoplastic resin layer 125 of the sheet 126 flows into the concave portion 128 to fill the concave portion 128. Therefore, the upper substrate 123, the connection layer 121, and the lower substrate 122 are laminated without flowing the connection layer 121. Thereafter, the sheet 126 is peeled off to complete the wiring board 127.

When the sheet 126 is pressed against the wiring board 127, as shown in Fig. 15B, the same shape as the concave portion 128 is formed. The sheet 126 is peeled off from the wiring board 127 while maintaining this shape. Therefore, when the concave portion 128 is particularly deep, the sheet 126 is not easily peeled off and cannot be used repeatedly, and when the depth of the concave portion 228 is deep, peeling is less likely.

In the case of the sheet 126 having the thermoplastic resin layer 125, the amount of the thermoplastic resin is adjusted in accordance with the volume of the concave portion 128. When the amount of the thermoplastic resin is not suitable for the volume of the concave portion 128, the thermoplastic resin cannot be completely filled in the concave portion 128, and the connection layer 121 easily flows into the concave portion 128.

Invention

The embossed sheet is used to manufacture a wiring board having a face on which a recess is formed. The embossed sheet includes an elastically deformable layer which is reversibly deformable along the concave portion and the surface when pressed against the surface having the concave portion, and has heat resistance.

With this embossing sheet, a three-dimensional wiring board having a high wiring density can be manufactured with good efficiency.

Simple illustration

Fig. 1A is a perspective view of a three-dimensional wiring board according to an embodiment of the present invention.

Fig. 1B is a cross-sectional view of the line 1B-1B of the three-dimensional wiring board shown in Fig. 1A.

Fig. 1C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the first embodiment.

Fig. 2 is a cross-sectional view showing a three-dimensional wiring board of the first embodiment.

Fig. 3A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3D is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3E is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3F is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 6 is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 7 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the first embodiment.

Fig. 8A is a perspective view of a three-dimensional wiring board according to a second embodiment of the present invention.

Fig. 8B is a cross-sectional view of the line 8B-8B of the three-dimensional wiring board shown in Fig. 8A.

Fig. 8C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the second embodiment.

Fig. 9 is a cross-sectional view showing a three-dimensional wiring board of the second embodiment.

Fig. 10 is a cross-sectional view showing a three-dimensional wiring board of a second embodiment.

Fig. 11A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11D is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11E is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11F is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 14 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the second embodiment.

Fig. 15A is a cross-sectional view showing the process of a conventional wiring board.

Fig. 15B is a cross-sectional view showing the process of a conventional wiring board.

The best form for implementing the invention (First embodiment)

Fig. 1A is a perspective view of a three-dimensional wiring board 116 according to an embodiment of the present invention. Fig. 1B is a cross-sectional view taken along line 1B-1B of the three-dimensional wiring board 116 shown in Fig. 1A. The three-dimensional wiring board 116 has a lower substrate 102, a connection layer 103 provided on the upper surface 102A of the lower substrate 102, and an upper substrate 101 provided on the upper surface 103A of the connection layer 103. The upper substrate 101 and the lower substrate 102 have mutually different shapes. The connection layer 103 has a thickness of 30 μm to 300 μm. The connection layer 103 is provided on the upper surface 102A in a state where one portion 102C of the upper surface 102A of the lower substrate 102 is exposed. Therefore, a recess 104 surrounded by a portion 102C of the upper surface 102A, the connection layer 103, and the upper substrate 101 is formed directly above one portion 102C of the upper surface 102A of the lower substrate 102. Wiring is formed on the upper surface 101A of the upper substrate 101, the lower surface 101B, the upper surface 102A of the lower substrate 102, and the lower surface 102B, respectively. The component 105 is housed in the recess 104 and encapsulated in the three-dimensional wiring board 116. Thereby, the total thickness of the three-dimensional wiring board 116 in which the component 105 is packaged can be reduced.

Fig. 1C is a cross-sectional view of the connection layer 103. The connection layer 103 has an insulating layer 103C having an upper surface 103A and a lower surface 103B, and a via hole 107 provided in the insulating layer 103C. The insulating layer 103C forms a through hole 109 connected to the upper surface 103A and the lower surface 103B. The conductive paste 106 of a conductive material is filled in the through hole 109 to form a via hole 107. The insulating layer 103C is composed of a thermosetting resin 103D such as an epoxy resin and an inorganic filler 103E diffused from the thermosetting resin 103D. The connecting layer 103 does not include a core material such as a woven fabric, a nonwoven fabric, or a film, and is substantially made of a uniform material from the upper surface 103A to the lower surface 103B. When the thickness of the connection layer 103 is less than 30 μm, the wiring is less likely to be buried in the connection layer 103. When the thickness of the connection layer 0103 exceeds 300 μm, since the ratio of the diameter to the height of the via hole 107 is too large, the diameter of the via hole 107 is not easy to be formed, and the via hole 107 is not easily formed, and the connection reliability is impaired. situation. Further, the aspect ratio of the via hole 107 is preferably 1.0 or less.

The inorganic filler 103E is preferably composed of at least one of cerium oxide, aluminum oxide, and barium titanate. The inorganic filler 103E has a particle diameter of 1 to 15 μm, and the insulating layer 103C preferably contains 70% by weight to 90% by weight. When the content of the inorganic filler 103E is less than 70% by weight, the inorganic filler 103E also flows when the thermosetting resin 103D flows during pressurization. When the content of the inorganic filler 103E exceeds 90%, the wiring is less likely to be buried in the insulating layer 103C, and it is difficult to adhere to the substrates 101 and 102.

The conductive paste 106 is composed of copper, silver, gold, palladium, rhodium, tin, and the like, and preferably has a particle diameter of 1 to 20 μm.

2 is a cross-sectional view of the three-dimensional wiring board 116. The concave portion 1044 is surrounded by a portion 102C of the upper surface 102A of the lower substrate 102, a side surface 103F of the connection layer 103, and a side surface 101F of the upper substrate 101. That is, one portion 102C of the upper surface 102A of the lower substrate 102, the side surface 103F of the connection layer 103, and the side surface 101F of the upper substrate 101 face the concave portion 104. The portion 103G of the upper surface 103A of the connection layer 103 which is connected to the side surface 103F is inclined downward toward the concave portion 104, that is, toward the concave portion 104, and is inclined toward the direction 104A of the portion 102C of the upper portion 102A of the lower substrate 102. Thereby, the edge portion 101H to which the upper surface 101A of the upper substrate 101 is formed at the edge of the concave portion 104 and the side surface 101F is at an obtuse angle. The upper substrate 101 includes an inclined portion 101G which is spaced apart from the upper surface 101A to have a certain thickness. That is, the portion 101G of the upper surface 101A of the upper substrate 101 is parallel to the portion 103G of the upper surface 103A of the connection layer 103. The portions 101G and 103G of the upper portions 101A and 103A have a planar shape.

A method of manufacturing the three-dimensional wiring board 116 of the first embodiment will be described. 3A to 3F, 4A to 4C, and 5A to 5C are cross-sectional views showing a process of the three-dimensional wiring board 116.

First, as shown in FIG. 3A, the second surface 103J having the first surface 103H and the opposite side of the first surface 103H is prepared, and the insulating layer 103C of the uncured thermosetting resin 103D is prepared. The resin film 108A and the resin film 108B are attached to the first surface 103H and the second surface 103J of the insulating layer 103C, respectively. The resin films 108A and 108B are made of a strong resin such as polyethylene terephthalate (PET). Next, as shown in FIG. 3B, a hole 104B for forming the concave portion 104, a cut insulating layer 103C, and resin films 108A and 108B are formed in the insulating layer 103C and the resin films 108A and 108B. Next, as shown in FIG. 3C, the resin film 108A is peeled off, and the resin film 108C is bonded to the first surface 103H. The resin film 108C is made of a strong resin such as polyethylene terephthalate (PET). Then, as shown in FIG. 3D, the through holes 109 are formed in the insulating layer 103C by the resin films 108B and 108C. Then, as shown in FIG. 3E, the conductive paste 106 is filled in the through hole 109 to form the via hole 107, and the connection layer 103 is formed. Next, as shown in Fig. 3F, the resin film 108C is peeled off. On the other hand, the resin film 108B is provided on the second surface 103J without being peeled off.

Next, as shown in FIGS. 4A and 4B, the first layer 103H of the insulating layer 103C is positioned on the upper surface 102A of the lower substrate 102, and the connection layer 103 is disposed on the upper surface 102A of the lower substrate 102. As described above, the first surface 103H of the insulating layer 103C serves as the lower surface 103B of the connection layer 103, and the second surface 103J serves as the upper surface 103A. Wiring 110 is provided on the upper surface 102A of the lower substrate 102. When the connection layer 103 is disposed on the lower substrate 102, the wiring 110 is buried in the connection layer 103. Thereby, since the conductive paste 106 is compressed, it is closely connected to the wiring 110. Thereafter, as shown in FIG. 4C, the resin film 108B is peeled off from the upper surface 103A of the connection layer 103, that is, the second surface 103J of the insulating layer 103C.

Next, as shown in FIG. 5A, the lower surface 101B of the upper substrate 101 is placed on the upper surface 103A of the connection layer 103, that is, the second surface 103J of the insulating layer 103C, and the upper substrate 101 is placed on the connection layer 103. Further, the embossing sheet 112 is placed on the upper surface 101A of the upper substrate 101, and the upper substrate 101, the connection layer 103, and the lower substrate 102 are heated and pressurized by thermal pressing to be laminated. The embossed sheet 112 has an upper surface 112A that abuts against the lower surface 112B of the upper surface 101A of the upper substrate 101 and its opposite side. The embossed sheet 112 has a release layer 115 disposed on the lower surface 112B, an upper surface 115A disposed on the release layer 115, an elastic deformation layer 114 having heat resistance, and a release layer 118 disposed on the upper surface 114A of the elastic deformation layer 114. The release layer 118 is disposed on the upper surface 112A of the stamp 112. The elastic deformation layer 114 is a reversibly deformable shape and is formed of an elastically deformed resin such as an anthrone resin.

When the embossing sheet 112, the upper substrate 101, the connection layer 103, and the lower substrate 102 are heated and compressed so that the upper substrate 101 and the lower substrate 102 are brought close to each other, as shown in FIG. 5B, the elastic deformation layer 114 and the release film are removed. Layer 115 is pressed into recess 104. The elastic deformation layer 114 of the embossing sheet 112 suppresses the flow rate of the thermosetting resin 103D of the connection layer 103, and prevents the thermosetting resin from flowing into the concave portion 104. Thereby, the elastic deformation layer 114 is covered along the state of the upper substrate 101 and the concave portion 104, and blocks the flow of the resin 103D at the time of compression. As described above, with the elastic deformation layer 114, even if the concave portion 104 is deep, the embossed sheet 112 can be pressed into the concave portion 104 without a gap.

As shown in FIG. 5B, when the elastic deformation layer 114 is pressed into the concave portion 104, it can be made near the side 103F facing the concave portion 104 of the connection layer 103. The portion is more compressed, so that the portion 103G of the upper surface 103A connected to the side surface 103F of the connection layer 103 can be inclined in the direction 104A. At the time of this compression, the wiring 120 formed on the lower surface 101B of the upper substrate 101 is buried in the upper surface 103A of the connection layer 103. Thereby, since the conductive paste 106 is further compressed, it can be in close contact with the wirings 110 and 120. The upper substrate 101 itself is laminated so as not to be compressed, and the portion 101G of the upper surface 101A of the upper substrate 101 can be inclined in the direction 104A in parallel with the portion 103G of the upper surface 103A of the connection layer 103. Thus, the thickness of the upper substrate 101 includes the portion 101G and is uniform on the upper surface 101A.

Thereafter, the embossing sheet 112, the upper substrate 101, the connection layer 103, and the lower substrate 102 are cooled, and the embossed sheet 112 is peeled off. As shown in FIG. 5C, the three-dimensional wiring board 116 is completed. In the aspect of the three-dimensional wiring board 116, since the edge portion 101H to which the upper surface 101A of the upper substrate 101 is formed at the edge of the concave portion 104 and the side surface 101F is at an obtuse angle, the three-dimensional wiring board 116 can be left without being damaged by the embossing sheet 112. And stripped. The elastically deformable layer 114 of the embossed sheet 112 is returned to the shape before heating upon cooling. Therefore, when the embossed sheet 112 is peeled off, even if the concave portion 104 is deep, the embossed sheet 112 can be easily peeled off from the concave portion 104.

In the above-described process, first, the connection layer 103 is placed on the upper surface 102A of the lower substrate 102 in a state where the first surface 103H of the insulating layer 103C is located on the upper surface 102A of the lower substrate 102, and then the upper substrate is placed. 101 is disposed on the upper surface 103A of the connection layer 103. In the first embodiment, the first surface 103H of the insulating layer 103C may be placed on the lower surface 101B of the upper substrate 101, and the connection layer 103 may be disposed on the lower surface 101B of the upper substrate 101. Thereafter, the connection layer 103 may be disposed under The upper surface 102A of the side substrate 102.

In order to fill the stamping 112 in the recess 104 with no gap, the elastic deformation layer 114 of the stamp 112 includes the surface on which the stamp 112 abuts, that is, the surface area of the recess 104, and is elongated into the upper substrate 101. Above the surface area of 101A above. Thereby, regardless of the shape or depth of the recessed portion 104, the elastically deformable layer 114 can be filled in the recessed portion 104 without a gap. By the elongation of the elastic deformation layer 114, the entire surface 101A of the upper substrate 101 and the surface of the concave portion 104 can be pressurized with an equal load. Thereby, the resin 103D of the connection layer 103 can be prevented from overflowing into the concave portion 104.

Further, in order to be surely filled in the concave portion 104, the hardness of the elastic deformation layer 114 measured in accordance with JIS K 6253 is preferably 5 to 30 degrees. The thickness of the elastic deformation layer 114 is preferably greater than the depth of the recess 104 of the upper surface 101A of the upper substrate 101.

As shown in Fig. 5B, since the elastic deformation layer 114 is elongated to an area larger than the surface area of the abutting surface, the stamp 112 is pressed into the concave portion 104, and at the same time, the portion near the concave portion 104 of the connection layer 103 can be further compressed. Share. Therefore, the inclination can be formed in a portion near the concave portion 104 of the connection layer 103.

The thermal expansion coefficient of the connection layer 103 is not more than the thermal expansion coefficient of the upper substrate 101 and the lower substrate 102, that is, 65 ppm/° C. or less, and is preferably lower than the thermal expansion coefficient of the upper substrate 101 or the lower substrate 102.

When the thermal expansion coefficient of the connection layer 103 exceeds 65 ppm/° C. or is higher than the thermal expansion coefficients of the upper substrate 101 and the lower substrate 102, warping or deformation of the three-dimensional wiring board 116 is liable to occur due to deformation of the connection layer 103.

The glass transition point of the connection layer 103 measured by the dynamic mechanical analysis (DMA) method is preferably 185 ° C or preferably higher than the glass transition point of the upper substrate 101 and the lower substrate 102 by 10 ° C or more. When the glass transition point of the connection layer 130 is less than 185 ° C or the difference is less than 10 ° C, a deformation of a complicated shape such as warpage or bending is generated in the substrate in a step requiring high temperature such as reflow, and the deformation is irreversible.

The connecting layer 103 does not include a core material such as a woven fabric, a non-woven fabric, or a film. When the connection layer 103 includes a core material, the wirings 110 and 118 provided on the upper substrate 101 and the lower substrate 102 are less likely to be buried in the connection layer 103.

Since the shape of the elastic deformation layer 114 of the embossed sheet 112 is cooled and returned to the shape before heating, it can be used repeatedly in the embossing step shown in Fig. 5B. That is, another wiring board 116 having another lower substrate 102 to expose one portion 102C of the upper substrate 102A on the other lower substrate 102 is provided, and the other wiring substrate 116 is disposed on the upper surface 102A of the other lower substrate 102. A connection layer 103, another upper substrate 101 disposed on the upper surface 103A of the other connection layer 103, and a top portion 101A of the upper surface 102 of the other lower substrate 102 have a top surface 101A formed on the other upper substrate 101. The recess 104. The embossing sheet 112 is placed on the upper surface 101A of the upper substrate 101 of the wiring board 116, and after the wiring board 116 is heated and pressurized, the embossing plate 112 is peeled off from the upper surface 101A of the upper substrate 101. After the embossing sheet 112 is peeled off, the embossing sheet 112 is placed on the upper surface 101A of the other upper substrate 101 of the other wiring board 116, and the other wiring board 116 is heated and pressurized.

Fig. 7 shows the melt viscosity of the connection layer 103. The lowest melt viscosity of the tie layer is suitably from 1000 Pa s to 100,000 Pa s. When the minimum melt viscosity is less than 1000 Pa s, the flow rate of the thermosetting resin 103D increases, and the inflow of the thermosetting resin 103D in the concave portion 104 occurs. When the minimum melt viscosity exceeds 100,000 Pa ‧ , there is a problem of poor contact with the substrates 101 and 102 or poor embedding of the wirings 110 and 118.

The connection layer 103 may also contain a colorant. Thereby, the encapsulation and light reflectivity are improved.

In order to suppress the flow rate of the thermosetting resin 103D, the connection layer 103 preferably further contains an elastomer.

In addition, the upper substrate 101 and the lower substrate 102 are not limited to a resin substrate such as a via wiring board or a full-layer IVH structure ALIVH wiring board, and may be a double-sided substrate or a multilayer substrate. A plurality of substrates 101, 102 may be alternately laminated with a plurality of connection layers 103.

Further, the insulating material used for the upper substrate 101 and the lower substrate 102 is made of a composite material of a glass woven fabric and an epoxy resin. The insulating material may be formed of a composite material of a woven fabric composed of an organic fiber selected from guanamine or a wholly aromatic polyester and a thermosetting resin. Moreover, the insulating material may also be derived from p-melamine, polyimine, poly(p-phenylenebenzobisoxazole), wholly aromatic polyester, PTFE, polyether oxime, polyether. The composite material of the non-woven fabric composed of the organic fiber selected from the quinone imine and the thermosetting resin is formed. Further, the insulating material may be formed of a composite material of a non-woven fabric made of glass fiber and a thermosetting resin. Further, the insulating material may also be composed of P-decylamine, polyphenylene benzobisoxazole, wholly aromatic polyester, polyetherimide, polyetherketone, polyetheretherketone, polyethylene terephthalate, polytetrafluoroethylene A composite material comprising at least one of a polyether oxime, a polyethylene terephthalate, a polyimide, and a polyphenylene sulfide, and a thermosetting resin layer provided on both sides of the synthetic resin film.

As the thermosetting resin 103D of the connection layer 103, at least one thermosetting resin selected from the group consisting of an epoxy resin, a polybutadiene resin, a phenol resin, a polyimide resin, a polyamide resin, and a cyanate can be used.

(Second embodiment)

Fig. 8A is a perspective view of a three-dimensional wiring board 216 according to a second embodiment of the present invention. Fig. 8B is a cross-sectional view taken along line 8B-8B of the three-dimensional wiring board 216 shown in Fig. 8A. The three-dimensional wiring board 216 has a lower substrate 202, a connection layer 203 provided on the upper surface 202A of the lower substrate 202, and an upper substrate 201 provided on the upper surface 203A of the connection layer 203. The upper substrate 201 and the lower substrate 202 have different shapes. The connection layer 203 has a thickness of 30 μm to 300 μm. The connection layer 203 is disposed on the upper surface 202A in a state in which a portion 202C of the upper surface 202A of the lower substrate 202 is in a state. Therefore, a recess 204 surrounded by a portion 202C of the upper portion 202A, the connection layer 203, and the upper substrate 201 is formed directly over a portion 202C of the upper surface 202A of the lower substrate 202. Wiring is formed on the upper surface 201A of the upper substrate 201, the lower surface 201B, and the upper surface 202A and the lower surface 202B of the lower substrate 202. The component 205 is housed in the recess 204 and encapsulated in the three-dimensional wiring board 216. Thereby, the total thickness of the three-dimensional wiring board 216 in which the parts 205 are packaged can be reduced.

Fig. 8C is a cross-sectional view of the connection layer 203. The connection layer 203 has an insulating layer 203C having an upper surface 203A and a lower surface 203B, and a via hole 207 provided in the insulating layer 203C. The insulating layer 203C forms a through hole 209 that is connected to the upper surface 203A and the lower surface 203B. The conductive paste 206 is filled in the through hole 209 to form the via hole 207. The insulating layer 203C is composed of a thermosetting resin 203D such as an epoxy resin and an inorganic filler 203E diffused from the thermosetting resin 203D. The connection layer 203 does not include a core material such as a woven fabric, a nonwoven fabric, or a film, and is substantially made of a uniform material from the upper surface 203A to the lower surface 203B. When the thickness of the connection layer 203 is less than 30 μm, the wiring is less likely to be buried in the connection layer 203. When the thickness of the connection layer 203 exceeds 300 μm, since the aspect ratio of the via hole 207 is too large, the diameter of the via hole 207 is not easy to be formed, and the via hole 207 is less likely to be formed, which may impair the connection reliability.

The inorganic filler 203E is preferably composed of at least one of cerium oxide, aluminum oxide, and titanic acid. The inorganic filler 203E has a particle diameter of 1 to 15 μm, and the insulating layer 203C preferably contains 70% by weight to 90% by weight. When the content of the inorganic filler 203E is less than 70% by weight, the inorganic filler 203E also flows when the thermosetting resin 203D flows during pressurization. When the content of the inorganic filler 203E exceeds 90%, the wiring is less likely to be buried in the insulating layer 203C, and it is difficult to adhere to the substrates 201 and 202.

The conductive paste 206 is made of copper, silver, gold, palladium, rhodium, tin, and the like, and preferably has a particle diameter of 1 to 20 μm.

Fig. 9 is a cross-sectional view of the three-dimensional wiring board 216. The concave portion 4 is surrounded by a portion 202C of the upper surface 202A of the lower substrate 202, a side surface 203F of the connection layer 203, and a side surface 201F of the upper substrate 201. That is, one portion 202C of the upper surface 202A of the lower substrate 202, the side surface 203F of the connection layer 203, and the side surface 201F of the upper substrate 201 face the concave portion 204. The portion 203G of the upper surface 203A of the connection layer 203 which is connected to the side surface 203F is inclined downward toward the concave portion 204, that is, toward the concave portion 204, and is inclined toward the direction 204A of the portion 202C of the upper portion 202A of the lower substrate 202. Therefore, the portion 201G of the upper surface 201A of the upper substrate 201 above the upper surface 203A of the connection layer 203 is connected downward to the concave portion 204. That is, toward the concave portion 204, it is inclined toward the direction 204A of a portion 202C of the upper surface 202A of the lower substrate 202. A portion 203G of the upper surface 203A of the connection layer 203 is formed into a curved shape having a rounded shape. Similarly, a portion of the upper surface 201A of the upper substrate 201 is formed into a curved shape having a rounded shape. Thereby, the edge portion 201H to which the upper surface 201A and the side surface 201F of the upper substrate 201 on the edge of the concave portion 204 are formed has a curved shape. The upper substrate 201 includes a portion 201G which is inclined and has a curved shape, and has a certain thickness across the upper surface 201A. That is, the portion 201G of the upper surface 201A of the upper substrate 201 is parallel to the portion 203G of the upper surface 203A of the connection layer 203. The side surface 204F facing the concave portion 204 of the connection layer 203 has a curved shape.

When the via holes are formed in the portions 201G and 203G of the upper portions 201A and 203A, the via holes may be dumped. Therefore, the portions 201G and 203G are disposed in a range up to the guide hole closest to the edge of the concave portion 204. A plurality of via holes 207 are provided in the connection layer 203. A plurality of via holes 219 formed of a conductive paste filled in a hole in the upper substrate are also formed in the upper substrate 201. The guide holes 207A of the plurality of guide holes 207, 219 are closest to the recess 204, that is, the side faces 203F, 201F. The inclined portions 201G, 203G of the upper faces 201A, 203A are disposed between the side faces 201F, 203F and the through holes 207A. That is, the portion 201G of the upper surface 201A of the upper substrate 201 and the portion 203G of the upper surface 203A of the connection layer 203 do not form via holes.

FIG. 10 is a cross-sectional view of the three-dimensional wiring board 116 in which the printing mask 211 is inserted into the recess 204. The pad 220 formed on the bottom of the recess 204, that is, the portion 202C of the upper portion 202A of the lower substrate 202 is printed via the printing mask 211. Since the concave portion 204 has a curved surface, the printed mask 211 can be easily inserted into the concave portion 204. Further, when the printing mask 211 is inserted and detached, it is possible to prevent the three-dimensional wiring board 116 from being damaged due to the deviation of the alignment from the edge of the concave portion 204.

Since the sum of the thicknesses of the side surfaces 201F and 203F of the upper substrate 201 and the connection layer 203 is smaller than the height of the component 205 enclosed in the recess 204, the component 205 and the tool for packaging can be easily inserted when the component 205 is packaged, and the efficiency can be improved. Package part 205. The length of the portion 201G of the upper portion 201A of the upper substrate 201, the side surface 201F of the portion 203G of the upper surface 203 of the connection layer 203, and the side surface 203F are set at a right angle to be larger than the length of the grasping portion of the tool for packaging. Specifically, it is set to 1.0 mm or less, and more preferably set to 0.3 mm or less.

A method of manufacturing the three-dimensional wiring board 216 of the second embodiment will be described. 11A to 11F, 12A to 12C, and 13A to 13C are cross-sectional views showing a process of the three-dimensional wiring board 216.

First, as shown in FIG. 11A, the second surface having the first surface 203H and the first surface 203J on the opposite side is prepared, and the insulating layer 203C of the uncured thermosetting resin 203D is prepared. A resin film 208A and a resin film 208B are attached to the first surface 203H and the second surface 203J of the insulating layer 203C, respectively. The resin films 208A and 208B are made of a strong resin such as polyethylene terephthalate (PET). Next, as shown in FIG. 11B, a hole 204B for forming the concave portion 204, a cut insulating layer 203C, and resin films 208A and 208B are formed in the insulating layer 203C and the resin films 208A and 208B.

Next, as shown in FIG. 11C, the resin film 208A is peeled off, and the resin film 208C is bonded to the first surface 203H. The resin film 208C is made of a strong resin such as (PET). As shown in FIG. 11D, through holes 209 are formed in the insulating layer 203C by the resin films 208B and 208C. Then, as shown in Figure 11E, The conductive paste 206 is filled in the through hole 209 to form the via hole 207, and the connection layer 203 is formed. Next, as shown in Fig. 11F, the resin film 208C is peeled off. On the other hand, the resin film 208B is provided on the second surface 203J without being peeled off.

Next, as shown in FIGS. 12A and 12B, the first layer 203H of the insulating layer 203C is positioned on the upper surface 202A of the lower substrate 202, and the connection layer 203 is disposed on the upper surface 202A of the lower substrate 202. As described above, the first surface 203H of the insulating layer 203C serves as the lower surface 203B of the connection layer 203, and the second surface 203J serves as the upper surface 203A. Wiring 210 is provided on the upper surface 202A of the lower substrate 202. When the connection layer 203 is disposed on the lower substrate 202, the wiring 210 is buried in the connection layer 203. Thereby, since the conductive paste 206 is compressed, it is closely connected to the wiring 210. Thereafter, as shown in Fig. 12C, the resin film 208B is peeled off from the upper surface 203A of the connection layer 203, that is, the second surface 203J of the insulating layer 203C.

Next, as shown in FIG. 13A, the lower surface 201B of the upper substrate 201 is placed on the upper surface 203A of the connection layer 203, that is, the second surface 203J of the insulating layer 203C, and the upper substrate 201 is placed on the connection layer 203. Further, the stamp 212 is placed on the upper surface 201A of the upper substrate 201, and the upper substrate 201, the connection layer 203, and the lower substrate 202 are heated and pressurized by thermal pressurization to be laminated. The embossing sheet 212 has an upper surface 212A that abuts against the lower surface 201B of the upper surface 201A of the upper substrate 201 and its opposite side. The embossing sheet 212 has a release layer 215 disposed on the lower surface 212B, an upper surface 215A disposed on the release layer 215, an elastic deformation layer 214 having heat resistance, and a release layer 218 disposed on the upper surface 214A of the elastic deformation layer 214. The release layer 218 is disposed on the upper surface 212A of the stamp 212. The elastically deformable layer 214 is a reversibly deformable shape and is formed of an elastically deformed resin such as an anthrone resin.

When the pressurizing plate 212, the upper substrate 201, the connection layer 203, and the lower substrate 202 are heated and compressed, as shown in FIG. 13B, the elastic deformation layer 214 and the release layer 215 are pressed into the concave portion 204. The elastic deformation layer 214 of the embossed sheet 212 suppresses the flow rate of the thermosetting resin 203D of the connection layer 203, and prevents the thermosetting resin from flowing into the concave portion 204. Thereby, the elastic deformation layer 214 is covered along the state of the upper substrate 201 and the recess 204, and blocks the flow of the thermosetting resin 203D at the time of compression. Thus, by the elastic deformation layer 214, even if the concave portion 204 is deep, the stamping sheet 212 can be pressed into the concave portion 204 without a gap.

As shown in FIG. 13B, when the elastic deformation layer 214 is pressed into the concave portion 204, since the portion near the side surface 203F facing the concave portion 204 of the connection layer 203 can be more compressed, it can be connected to the connection layer 203. The portion 203G of the upper surface 203A of the side surface 203F is inclined in the direction 204A. At the time of this compression, the wiring 220 formed on the lower surface 201B of the upper substrate 201 is buried in the upper surface 203A of the connection layer 203. Thereby, since the conductive paste 206 is further compressed, it can be brought into close contact with the wirings 210 and 218. The upper substrate 201 itself is laminated so as not to be compressed, and the portion 201G of the upper surface 201A of the upper substrate 201 can be inclined in the direction 204A in parallel with the portion 203G of the upper surface 203A of the connection layer 203. Thus, the thickness of the upper substrate 201 includes the portion 201G and is uniform on the upper surface 201A.

Thereafter, the embossing sheet 212, the upper substrate 201, the connection layer 203, and the lower substrate 202 are cooled, and the embossed sheet 212 is peeled off. As shown in Fig. 13C, the three-dimensional wiring board 216 is completed. In the aspect of the three-dimensional wiring board 216, since the edge portion 201H to which the upper surface 201A of the upper substrate 201 is formed at the edge of the concave portion 204 and the side surface 201F is at an obtuse angle, the three-dimensional wiring board 216 can be left without being damaged by the stamping sheet 212. And stripped. The elastically deformable layer 214 of the embossed sheet 212 is returned to the shape before heating upon cooling. Therefore, even if the concave portion 204 is deep, the embossed sheet 212 can be easily peeled off from the concave portion 204.

In order to fill the stamping 212 in the recess 204 with no gap, the elastic deformation layer 214 of the stamp 212 includes the surface abutting the stamp 212, that is, the surface area of the recess 204, and is elongated into the upper substrate 201. Above the surface area of 201A above. Thereby, regardless of the shape or depth of the recess 204, the elastic deformation layer 214 can be filled in the recess 204 without a gap. By elongating the elastic deformation layer 214, the entire surface 201A of the upper substrate 201 and the entire surface of the concave portion 204 can be pressurized by the load. Thereby, the resin 203D of the connection layer 203 can be prevented from overflowing into the concave portion 204. Further, the elastic deformation layer 214 has an elongation of 700% or more, and has physical strength for reversing elastic deformation, and has a tear strength of 15 N/mm or more, which is similar to the shape of the upper substrate 201, and preferably has 10 N/mm. The following tensile strength.

Further, in order to be surely filled in the concave portion 204, the hardness of the elastic deformation layer 214 measured in accordance with JIS K 6253 is preferably 5 to 30 degrees. The thickness of the elastically deformable layer 214 is preferably greater than the depth of the recess 204 of the upper surface 201A of the upper substrate 201.

As shown in FIG. 13B, since the elastic deformation layer 214 is elongated to an area larger than the surface area of the abutting surface, the stamp 212 is pressed into the concave portion 204, and the portion near the concave portion 204 of the connection layer 203 can be further compressed. . Therefore, the inclination can be formed in a portion near the concave portion 204 of the connection layer 203.

The elastically deformable layer 214 of the embossed sheet 212 is reversibly deformable and heat-resistant in the heat pressurization step and before and after it. The release layer 215 is disposed to peel the stamp 212 with good efficiency after the heat pressurization step, and is not necessarily formed.

In the above-described process, first, the connection layer 203 is disposed on the upper surface 202A of the lower substrate 202 in a state where the first surface 203H of the insulating layer 203C is positioned on the upper surface 202A of the lower substrate 202, and then the upper substrate is placed. 201 is disposed on the upper surface 203A of the connection layer 203. In the second embodiment, the first surface 203H of the insulating layer 203C may be placed on the lower surface 201B of the upper substrate 201, and the connection layer 203 may be disposed on the lower surface 201B of the upper substrate 201, and then the connection layer 203 may be disposed under the second layer 203. On the upper surface 202A of the side substrate 202.

The thermal expansion coefficient of the connection layer 203 is preferably lower than the thermal expansion coefficient of the upper substrate 201 and the lower substrate 202, that is, 65 ppm/° C. or lower, and is preferably lower than the thermal expansion coefficient of the upper substrate 201 or the lower substrate 202.

When the thermal expansion coefficient of the connection layer 203 exceeds 65 ppm/° C. or is higher than the thermal expansion coefficient of the upper substrate 201 and the lower substrate 202, the deformation of the connection layer 203 easily causes warpage or deformation of the three-dimensional wiring board 216.

The glass transition point of the connection layer 203 measured by the dynamic mechanical analysis (DMA) method is preferably 185 ° C or preferably higher than the glass transition point of the upper substrate 201 and the lower substrate 202 by more than 10 ° C. When the glass transition point of the connection layer 203 is less than 185 ° C or the difference is less than 10 ° C, a deformation of a complicated shape such as warpage or bending is generated in the substrate in a step requiring high temperature such as reflow, and the deformation is irreversible.

The connecting layer 203 does not include a core material such as a woven fabric, a non-woven fabric, or a film. When the connection layer 203 includes a core material, the wirings 210 and 218 provided on the upper substrate 201 and the lower substrate 202 are less likely to be buried in the connection layer 203.

Since the shape of the elastic deformation layer 214 of the embossed sheet 212 is cooled and returned to the shape before heating, it can be used repeatedly in the embossing step shown in Fig. 13B. That is, another wiring board 216 having another lower substrate 202 to expose a portion 202C of the upper surface 202A of the lower substrate 202 and another upper surface 202A of the other lower substrate 202 is prepared. A connection layer 203, another upper substrate 201 disposed on the upper surface 203A of the other connection layer 203, and a top portion 201A of the upper surface 202 of the other lower substrate 202 have a top surface 201A formed on the other upper substrate 201. The recess 204. The embossing sheet 212 is placed on the upper surface 201A of the upper substrate 201 of the wiring board 216, and after the wiring board 216 is heated and pressurized, the embossing plate 212 is peeled off from the upper surface 201A of the upper substrate 201. After the embossing sheet 212 is peeled off, the embossing sheet 212 is placed on the upper surface 201A of the other upper substrate 201 of the other wiring board 216, and the other wiring board 216 is heated and pressurized.

Fig. 14 shows the melt viscosity of the connection layer 203. The minimum melt viscosity of the connection layer 203 is suitably from 1000 Pa s to 100,000 Pa s. When the minimum melt viscosity is less than 1000 Pa s, the flow of the thermosetting resin 203D increases, and the inflow of the thermosetting resin 203D in the concave portion 204 occurs. When the minimum melt viscosity exceeds 100,000 Pa ‧ , there is a problem of poor contact with the substrates 201 and 202 or poor embedding of the wirings 120 and 128.

The connection layer 203 may also contain a colorant. Thereby, the encapsulation and light reflectivity are improved.

In order to suppress the flow rate of the thermosetting resin 203D, the connection layer 203 preferably further contains an elastomer.

In addition, the upper substrate 201 and the lower substrate 202 are not limited to a resin substrate such as a via wiring board or a full-layer IVH structure ALIVH wiring board, and may be a double-sided substrate or a multilayer substrate. A plurality of substrates 201, 202 may be alternately laminated with a plurality of connection layers 203.

Further, the upper substrate 201 and the lower substrate 202 are formed of an insulating material made of a composite material of a glass woven fabric and an epoxy resin. The insulating material may be formed of a composite material of a woven fabric composed of an organic fiber selected from guanamine or a wholly aromatic polyester and a thermosetting resin. Moreover, the insulating material may also be derived from p-melamine, polyimine, poly(p-phen yienebenzobisoxazole, wholly aromatic polyester, PTFE, polyether oxime, poly A composite material of a non-woven fabric composed of an organic fiber selected from an ether quinone imine and a thermosetting resin. Further, the insulating material may be formed of a composite material of a non-woven fabric made of glass fiber and a thermosetting resin. From p-nonylamine, polyphenylene benzobisoxazole, wholly aromatic polyester, polyetherimide, polyetherketone, polyetheretherketone, polyethylene terephthalate, polytetrafluoroethylene a composite material comprising at least one of a synthetic resin film of ethylene, polyether oxime, polyethylene terephthalate, polyimide, and polyphenylene sulfide, and a thermosetting resin layer provided on both sides of the synthetic resin film .

As the thermosetting resin 103D, at least one thermosetting resin selected from the group consisting of an epoxy resin, a polybutadiene resin, a phenol resin, a polyimide resin, a polyamide resin, and a cyanate can be used.

In the embodiment, the terms "upper", "lower", "upper", "lower", etc. indicate the upper substrates 101, 201, the lower substrates 102, 202, the connection layers 103, 203, etc. The relative directions of the components of the three-dimensional wiring boards 116 and 216 are not the absolute directions such as the vertical direction.

101. . . Upper substrate

101A. . . Above

101B. . . below

101F. . . side

101G. . . Part

101H. . . Edge

102. . . Lower substrate

102A. . . Above

102B. . . below

102C. . . a part

103. . . Connection layer

103A. . . Above

103B. . . below

103C. . . Insulation

103D. . . Thermosetting resin

103E. . . Inorganic filler

103F. . . side

103G. . . Part

103H. . . First side

103J. . . Second side

104. . . Concave

104A. . . direction

104B. . . hole

105. . . Components

106. . . Conductive paste

107. . . Guide hole

107A. . . Guide hole

108A. . . Resin film

108B. . . Resin film

108C. . . Resin film

109. . . Through hole

110. . . Wiring

112. . . Imprint

112A. . . Above

112B. . . below

114. . . Deformation layer

114A. . . Above

115. . . Release layer

115A. . . Above

116. . . Three-dimensional wiring board

118. . . Release layer

119. . . Guide hole

120. . . Wiring

121. . . Connection layer

122. . . Lower substrate

123. . . Upper substrate

124. . . Liberation layer

125. . . Thermoplastic resin layer

126. . . sheet

127. . . Patch panel

128. . . Concave

201. . . Upper substrate

201A. . . Above

201B. . . below

201F. . . side

201G. . . Part

201H. . . Edge

202. . . Lower substrate

202A. . . Above

202B. . . below

202C. . . a part

203. . . Connection layer

203A. . . Above

203B. . . below

203C. . . Insulation

203D. . . Thermosetting resin

203E. . . Inorganic filler

203G. . . Part

203H. . . First side

203J. . . Second side

204. . . Concave

204A. . . direction

204B. . . hole

204F. . . side

205. . . Components

206. . . Conductive paste

207. . . Guide hole

207A. . . Guide hole

208A. . . Resin film

208B. . . Resin film

208C. . . Resin film

209. . . Through hole

210. . . Wiring

211. . . Print mask

212A. . . Above

212B. . . below

214. . . Elastic deformation layer

215. . . Release layer

215A. . . Above

216. . . Three-dimensional wiring board

218. . . Release layer

220. . . Wiring

Fig. 1A is a perspective view of a three-dimensional wiring board according to an embodiment of the present invention.

Fig. 1B is a cross-sectional view of the line 1B-1B of the three-dimensional wiring board shown in Fig. 1A.

Fig. 1C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the first embodiment.

Fig. 2 is a cross-sectional view showing a three-dimensional wiring board of the first embodiment.

Fig. 3A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3D is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3E is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 3F is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 4C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5A is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5B is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 5C is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 6 is a cross-sectional view showing the process of the three-dimensional wiring board of the first embodiment.

Fig. 7 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the first embodiment.

Fig. 8A is a perspective view of a three-dimensional wiring board according to a second embodiment of the present invention.

Fig. 8B is a cross-sectional view of the line 8B-8B of the three-dimensional wiring board shown in Fig. 8A.

Fig. 8C is a cross-sectional view showing a connection layer of a three-dimensional wiring board of the second embodiment.

Fig. 9 is a cross-sectional view showing a three-dimensional wiring board of the second embodiment.

Fig. 10 is a cross-sectional view showing a three-dimensional wiring board of a second embodiment.

Fig. 11A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11D is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11E is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 11F is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 12C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13A is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13B is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 13C is a cross-sectional view showing the process of the three-dimensional wiring board of the second embodiment.

Fig. 14 is a view showing the melt viscosity of the connection layer of the three-dimensional wiring board of the second embodiment.

Fig. 15A is a cross-sectional view showing the process of a conventional wiring board.

Fig. 15B is a cross-sectional view showing the process of a conventional wiring board.

101. . . Upper substrate

101A. . . Above

101B. . . below

102. . . Lower substrate

103. . . Connection layer

103A. . . Above

112. . . Imprint

112A. . . Above

112B. . . below

114. . . Deformation layer

114A. . . Above

115. . . Release layer

115A. . . Above

118. . . Release layer

120. . . Wiring

Claims (11)

A stamping sheet for manufacturing a wiring board having a surface on which a concave portion is formed, comprising: an elastic deformation layer which is reversibly deformable along the concave portion and the surface when the surface having the concave portion is pressurized; And heat resistant. The embossed sheet according to claim 1, further comprising: a first release layer provided on a surface of the elastic deformation layer that abuts against the surface of the wiring board. The embossed sheet according to claim 1, wherein the elastically deformable layer is elongated to have a surface area equal to or larger than a surface area of the surface of the concave portion when the surface having the concave portion is pressurized. The embossing sheet of claim 1, wherein the surface of the wiring board is pressed by an equal weight by extending the elastic deformation layer. The embossing sheet according to claim 1, wherein when the elastic deformation layer is peeled off from the surface of the wiring board, the shrinkage is smaller than a surface area of the surface of the wiring board. The embossing sheet of claim 1, wherein the elastically deformable layer has a hardness of 5 to 30 degrees and is thicker than a depth of the recess. The embossed sheet according to claim 1, further comprising: a second release layer provided on a surface opposite to the surface of the elastic deformation layer. The embossed sheet according to claim 1, wherein the elastically deformable layer fills the concave portion when the surface having the concave portion is pressurized. The embossing sheet of claim 1, wherein the elastic deformation layer is pressurizable to the wiring board a plurality of times. A method of manufacturing a wiring board, comprising: a wiring board preparing step of preparing a wiring board having a lower substrate and exposing a portion of an upper surface of the lower substrate, wherein the wiring board is provided on the lower substrate The upper connecting layer and the upper substrate disposed on the upper surface of the connecting layer have a recess formed on the upper surface of the upper substrate directly above the portion of the upper surface of the lower substrate; the heating and pressing step of the wiring board, a embossed sheet is disposed on the upper surface of the upper substrate of the wiring board, and the wiring board is heated and pressurized, and the embossed sheet has an elastic deformation layer, wherein the elastic deformation layer is the aforementioned one of the upper substrate of the wiring board In the step of heating and pressurizing the wiring board, the stamping sheet may be reversibly deformable along the front surface of the concave portion and the upper substrate, and has heat resistance. The manufacturing method of the wiring board of claim 10, further comprising: another wiring board preparing step of preparing another wiring board having another lower substrate to expose the other lower substrate a state of one of the upper portions, another connection layer provided on the upper surface of the other lower substrate, and another upper substrate disposed on the upper surface of the other connection layer, the aforementioned upper surface of the other lower substrate a portion having a recess formed on the upper surface of the other upper substrate directly above; a stripping step of arranging the stamp on the upper surface of the upper substrate of the wiring board, and heating and pressurizing the wiring board Removing the stamping plate from the front surface of the upper substrate of the wiring board, and heating and pressing the other wiring board, after the step of peeling off the stamping sheet, the other of the other wiring board The above-mentioned embossing sheet is disposed on the upper surface of the upper substrate, and the other wiring board is heated and pressurized.