US20110030207A1 - Multilayer printed wiring board and manufacturing method thereof - Google Patents

Multilayer printed wiring board and manufacturing method thereof Download PDF

Info

Publication number
US20110030207A1
US20110030207A1 US12/907,076 US90707610A US2011030207A1 US 20110030207 A1 US20110030207 A1 US 20110030207A1 US 90707610 A US90707610 A US 90707610A US 2011030207 A1 US2011030207 A1 US 2011030207A1
Authority
US
United States
Prior art keywords
wiring board
printed wiring
multilayer printed
interlayer connection
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/907,076
Inventor
Fumio Echigo
Shogo Hirai
Tadashi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2006101750A external-priority patent/JP2007280997A/en
Priority claimed from JP2006101749A external-priority patent/JP2007280996A/en
Application filed by Panasonic Corp filed Critical Panasonic Corp
Priority to US12/907,076 priority Critical patent/US20110030207A1/en
Publication of US20110030207A1 publication Critical patent/US20110030207A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0129Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275Fibers and reinforcement materials
    • H05K2201/0278Polymeric fibers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06Thermal details
    • H05K2201/068Thermal details wherein the coefficient of thermal expansion is important
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1461Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.

Definitions

  • the present invention relates to a multilayer printed wiring board in which an interlayer connection is formed via inner via holes, and to a manufacturing method thereof.
  • IVH structure interstitial via hole structure
  • a multilayer printed wiring board having the IVH structure includes interlayer dielectric layers forming a laminated body, and via holes and through holes made of electroless plating and electroplating.
  • the via holes electrically connect inner layer conductor circuit patterns or between inner layer conductor circuit patterns and outer layer conductor circuit patterns.
  • the through holes connect outermost layer conductor patterns.
  • Patent Document 1 One of the prior arts related to the present invention is Patent Document 1 shown below.
  • Patent Document 1 Japanese Patent Unexamined Publication No. 59-175796
  • the multilayer printed wiring board of the present invention when interlayer connection material has a coefficient of thermal expansion in a thickness direction lower than that of an electrically insulating substrate made of insulating material in the thickness direction, an interlayer connection of the interlayer connection material is formed at a temperature higher than the operating temperature, and the interlayer connection material is larger than the insulating material of the same wiring layer at the operating temperature in thickness.
  • This structure allows interlayer connection material having a lower coefficient of thermal expansion in the thickness direction than insulating material to be formed in a via hole, which is formed at a temperature higher than the operating temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used. As a result, the internal stress always functions to contract the interlayer connecting portion. Contracting the interlayer connecting portion in this manner achieves a multilayer printed wiring board having high connection reliability.
  • the method for manufacturing a multilayer printed wiring board of the present invention includes: forming a via hole in insulating material; forming interlayer connection material in the via hole, the interlayer connection material having a coefficient of thermal expansion in the thickness direction lower than the insulating material; and forming interlayer connection at a temperature higher than the operating temperature of the multilayer printed wiring board, the interlayer connection being larger than the insulating material of a same wiring layer at the operating temperature in thickness.
  • the interlayer connection material having a coefficient of thermal expansion in the thickness direction lower than the insulating material is formed in the via hole, and the interlayer connection is formed at a temperature higher than the operating temperature of the multilayer printed wiring board, the interlayer connection being larger than the insulating material of a same wiring layer at the operating temperature in thickness.
  • FIG. 1 is a sectional view showing a step of pasting protective films to an electrically insulating substrate of a method for manufacturing a multilayer printed wiring board according to a first embodiment of the present invention.
  • FIG. 2 is a sectional view showing a step of forming via holes of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 3 is a sectional view showing a step of forming interlayer connection material in the via holes of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 4 is a sectional view showing a step of laminating wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 5 is a sectional view showing a step of bonding the wiring members to the electrically insulating substrate and the interlayer connection material of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 6 is a sectional view showing a step of patterning the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 7 is a sectional view showing a step of laminating the wiring members and electrically insulating substrates which are filled with the interlayer connection material of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 8 is a sectional view showing a step of heating and pressurizing the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 9 is a sectional view showing a step of patterning the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIGS. 1 to 9 are sectional views showing steps of the method for manufacturing a multilayer printed wiring board according to a first embodiment of the present invention.
  • FIG. 1 is a sectional view showing a step of pasting protective films 10 to electrically insulating substrate 11 according to the first embodiment.
  • protective films 10 are laminated on both sides of electrically insulating substrate 11 , which has a planar shape and made of insulating material (whose coefficient of thermal expansion is 40 to 70 ppm/° C.).
  • the insulating material is a composite of glass woven cloth and thermosetting resin such as epoxy-based resin.
  • FIG. 2 is a sectional view showing a step of forming via holes. As shown in FIG. 2 , via holes 12 , which penetrate through electrically insulating substrate 11 and protective films 10 , are formed by laser drilling or the like.
  • FIG. 3 is a sectional view showing a step of forming interlayer connection material 13 in via holes 12 .
  • interlayer connection material 13 (whose coefficient of thermal expansion is 16 to 35 ppm/° C.) is formed in via holes 12 .
  • Interlayer connection material 13 is made of conductive paste having a coefficient of thermal expansion in the thickness direction lower than that of the insulating material forming electrically insulating substrate 11 .
  • the interlayer connection is made at a temperature of 180 to 400° C. using interlayer connection material 13 .
  • FIG. 4 is a sectional view showing a step of laminating wiring members 14 .
  • protective films 10 at both sides of electrically insulating substrate 11 shown in FIG. 3 are removed.
  • foil-like wiring members 14 containing, for example, copper is laminated on both sides of electrically insulating substrate 11 .
  • FIG. 5 is a sectional view showing a step of bonding wiring members 14 to electrically insulating substrate 11 and interlayer connection material 13 .
  • wiring members 14 are heated and pressurized at 180 to 200° C. and at 3 to 5 MPa so as to be bonded to electrically insulating substrate 11 and interlayer connection material 13 .
  • interlayer connection material 13 is contracted in the thickness direction, and at the same time, wiring members 14 and interlayer connection material 13 are electrically connected to each other.
  • Electrically insulating substrate 11 and interlayer connection material 13 that have wiring members 14 bonded thereto is cooled after the heating and pressurizing step.
  • FIG. 6 is a sectional view showing a step of patterning wiring members 14 . As shown in FIG. 6 , wiring members 14 are patterned to complete double-sided wiring board 15 . The patterning can be performed, for example, by etching.
  • FIG. 7 is a sectional view showing a step of laminating wiring members 14 and electrically insulating substrates 11 which are filled with interlayer connection material 13 .
  • electrically insulating substrates 11 which are formed in the same steps as FIGS. 1 to 4 and each filled with interlayer connection material 13 are laminated on both sides of double-sided wiring board 15 .
  • two more wiring members 14 are laminated on both sides thereof.
  • FIG. 8 is a sectional view showing a step of heating and pressurizing wiring members 14 . As shown in FIG. 8 , wiring members 14 are heated and pressurized, which may be performed in the same manner as in the step shown in FIG. 5 .
  • the wiring boards thus laminated are cooled after the heating and pressurizing step. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction. As a result, the internal stress allows interlayer connection material 13 to contract, thereby improving connection reliability in via holes 12 .
  • FIG. 9 is a sectional view showing a step of patterning wiring members 14 .
  • wiring members 14 disposed on the outermost surfaces are patterned to complete multilayer printed wiring board 16 shown in FIG. 9 .
  • the patterning can be performed, for example, by etching.
  • interlayer connection material 13 of multilayer printed wiring board 16 is larger in thickness than electrically insulating substrate 11 which is made of the insulating material and formed in the same wiring layer as interlayer connection material 13 .
  • the multilayer printed wiring board is a four-layer wiring board; however, the number of the wiring layers in the multilayer printed wiring board is not limited to four.
  • the multilayer printed wiring board has at least two wiring layers and may have five or more wiring layers laminated by the similar steps.
  • Multilayer printed wiring board 16 completed through the aforementioned steps is used at a temperature lower than the heating temperature used in the step of heating and pressurizing wiring members 14 shown in FIG. 5 .
  • the temperature at which multilayer printed wiring board 16 is used is, for example, 60° C. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction. As a result, the internal stress always functions to contract interlayer connecting material 13 , thereby improving connection reliability in via holes 12 .
  • the insulating material is a composite of glass woven cloth and epoxy-based resin.
  • it may be a composite of either glass unwoven cloth, aramid woven cloth, or aramid unwoven cloth and thermosetting resin such as epoxy-based resin.
  • it may be a composite of either glass woven cloth, glass unwoven cloth, aramid woven cloth, or aramid unwoven cloth and thermoplastic resin whose glass transition temperature is 180° C. or above.
  • the insulating material may be made of a film material. Examples of the thermoplastic resin whose glass transition temperature is 180° C. or above include wholly aromatic polyester resin, polyethersulfone, polyether ketone, and polyetheretherketone.
  • Interlayer connection material 13 is formed by filling via holes 12 with the conductive paste. Alternatively, as long as the temperature to form the connection is higher than the operating temperature, interlayer connection material 13 may be formed in via holes 12 by filled plating, conformal plating, evaporating, or sputtering.
  • the interlayer connection material in the via holes has a coefficient of thermal expansion in the thickness direction lower than that of the insulating material in the thickness direction.
  • the interlayer connection of the interlayer connection material is formed at a temperature higher than the operating temperature (for example, 60° C. or less) of the multilayer printed wiring board. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used. As a result, the internal stress allows the interlayer connecting portion to contract, thereby achieving a multilayer printed wiring board having high connection reliability.
  • the interlayer connection structure of the multilayer printed wiring board of the present invention provides high reliability of interlayer connection.
  • Such multilayer printed wiring board is useful to the application relating to mounting substrates such as semiconductor packages and compact module components that are required to meet high reliability standards including minute wiring pattern and semiconductor packaging.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.

Description

    RELATED APPLICATIONS
  • This application is a divisional of U.S. patent application Ser. No. 11/910,560, filed Oct. 3, 2007, which is a U.S. National Phase Application of PCT International Application PCT/JP2007/057394, filed Apr. 2, 2007, the entire disclosures of which are incorporated herein by reference.
  • TECHNICAL FIELD
  • The present invention relates to a multilayer printed wiring board in which an interlayer connection is formed via inner via holes, and to a manufacturing method thereof.
  • BACKGROUND ART
  • In recent years, as electronic devices are becoming smaller and higher performing, there is a growing demand for providing inexpensive multilayer wiring boards that mount semiconductor chips such as LSIs at high density not only for industrial use but also for consumer use. Such multilayer wiring boards are required to electrically connect a plurality of fine pitch wiring patterns at high connection reliability.
  • To meet the market request, there have been proposed multilayer printed wiring boards having an interstitial via hole structure (hereinafter, IVH structure), which is easy to achieve high density wiring.
  • A multilayer printed wiring board having the IVH structure includes interlayer dielectric layers forming a laminated body, and via holes and through holes made of electroless plating and electroplating. The via holes electrically connect inner layer conductor circuit patterns or between inner layer conductor circuit patterns and outer layer conductor circuit patterns. The through holes connect outermost layer conductor patterns.
  • One of the prior arts related to the present invention is Patent Document 1 shown below.
  • In conventional multilayer printed wiring boards, however, the difference in the coefficient of thermal expansion between insulating material and intercalating metal causes an internal stress, which may lead to breakage of plated through holes or plated via holes especially in a substrate having a thickness of 1 mm or more. Interlayer connection is formed at a temperature of 20 to 60° C. by plating and reaches its fatigue limits due to high temperature environment or cold heat stress. It has been tried to reduce the difference in the coefficient of thermal expansion by filling the insulating resin with an inorganic filler. It is, however, difficult to make the coefficient of thermal expansion of the insulating resin lower than that of the interlayer connection material.
  • Patent Document 1: Japanese Patent Unexamined Publication No. 59-175796
  • SUMMARY OF THE INVENTION
  • In the multilayer printed wiring board of the present invention, when interlayer connection material has a coefficient of thermal expansion in a thickness direction lower than that of an electrically insulating substrate made of insulating material in the thickness direction, an interlayer connection of the interlayer connection material is formed at a temperature higher than the operating temperature, and the interlayer connection material is larger than the insulating material of the same wiring layer at the operating temperature in thickness.
  • This structure allows interlayer connection material having a lower coefficient of thermal expansion in the thickness direction than insulating material to be formed in a via hole, which is formed at a temperature higher than the operating temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used. As a result, the internal stress always functions to contract the interlayer connecting portion. Contracting the interlayer connecting portion in this manner achieves a multilayer printed wiring board having high connection reliability.
  • The method for manufacturing a multilayer printed wiring board of the present invention includes: forming a via hole in insulating material; forming interlayer connection material in the via hole, the interlayer connection material having a coefficient of thermal expansion in the thickness direction lower than the insulating material; and forming interlayer connection at a temperature higher than the operating temperature of the multilayer printed wiring board, the interlayer connection being larger than the insulating material of a same wiring layer at the operating temperature in thickness.
  • According to the present invention, the interlayer connection material having a coefficient of thermal expansion in the thickness direction lower than the insulating material is formed in the via hole, and the interlayer connection is formed at a temperature higher than the operating temperature of the multilayer printed wiring board, the interlayer connection being larger than the insulating material of a same wiring layer at the operating temperature in thickness.
  • This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used. As a result, the internal stress always functions to contract the interlayer connecting portion. Contracting the interlayer connecting portion in this manner achieves a multilayer printed wiring board having high connection reliability.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a sectional view showing a step of pasting protective films to an electrically insulating substrate of a method for manufacturing a multilayer printed wiring board according to a first embodiment of the present invention.
  • FIG. 2 is a sectional view showing a step of forming via holes of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 3 is a sectional view showing a step of forming interlayer connection material in the via holes of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 4 is a sectional view showing a step of laminating wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 5 is a sectional view showing a step of bonding the wiring members to the electrically insulating substrate and the interlayer connection material of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 6 is a sectional view showing a step of patterning the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 7 is a sectional view showing a step of laminating the wiring members and electrically insulating substrates which are filled with the interlayer connection material of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 8 is a sectional view showing a step of heating and pressurizing the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • FIG. 9 is a sectional view showing a step of patterning the wiring members of the method for manufacturing a multilayer printed wiring board according to the first embodiment of the present invention.
  • REFERENCE MARKS IN THE DRAWINGS
    • 10 protective film
    • 11 electrically insulating substrate
    • 12 via hole
    • 13 interlayer connection material
    • 14 wiring member
    • 15 double-sided wiring board
    • 16 multilayer printed wiring board
    DETAILED DESCRIPTION OF PREFERRED EMBODIMENT
  • An embodiment of the present invention is described as follows with reference to drawings.
  • First Embodiment
  • FIGS. 1 to 9 are sectional views showing steps of the method for manufacturing a multilayer printed wiring board according to a first embodiment of the present invention. FIG. 1 is a sectional view showing a step of pasting protective films 10 to electrically insulating substrate 11 according to the first embodiment. First, as shown in FIG. 1, protective films 10 are laminated on both sides of electrically insulating substrate 11, which has a planar shape and made of insulating material (whose coefficient of thermal expansion is 40 to 70 ppm/° C.). The insulating material is a composite of glass woven cloth and thermosetting resin such as epoxy-based resin.
  • In the next step, via holes 12 are formed. FIG. 2 is a sectional view showing a step of forming via holes. As shown in FIG. 2, via holes 12, which penetrate through electrically insulating substrate 11 and protective films 10, are formed by laser drilling or the like.
  • In the next step, interlayer connection material 13 is formed. FIG. 3 is a sectional view showing a step of forming interlayer connection material 13 in via holes 12.
  • As shown in FIG. 3, interlayer connection material 13 (whose coefficient of thermal expansion is 16 to 35 ppm/° C.) is formed in via holes 12. Interlayer connection material 13 is made of conductive paste having a coefficient of thermal expansion in the thickness direction lower than that of the insulating material forming electrically insulating substrate 11. The interlayer connection is made at a temperature of 180 to 400° C. using interlayer connection material 13.
  • FIG. 4 is a sectional view showing a step of laminating wiring members 14. First, protective films 10 at both sides of electrically insulating substrate 11 shown in FIG. 3 are removed. Then, as shown in FIG. 4, foil-like wiring members 14 containing, for example, copper is laminated on both sides of electrically insulating substrate 11.
  • In the next step, wiring members 14 are heated and pressurized. FIG. 5 is a sectional view showing a step of bonding wiring members 14 to electrically insulating substrate 11 and interlayer connection material 13. As shown in FIG. 5, wiring members 14 are heated and pressurized at 180 to 200° C. and at 3 to 5 MPa so as to be bonded to electrically insulating substrate 11 and interlayer connection material 13. In this heating and pressurizing step, interlayer connection material 13 is contracted in the thickness direction, and at the same time, wiring members 14 and interlayer connection material 13 are electrically connected to each other.
  • Electrically insulating substrate 11 and interlayer connection material 13 that have wiring members 14 bonded thereto is cooled after the heating and pressurizing step.
  • This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction. As a result, the internal stress allows interlayer connection material 13 to contract, thereby improving connection reliability in via holes 12.
  • In the next step, wiring members 14 are patterned. FIG. 6 is a sectional view showing a step of patterning wiring members 14. As shown in FIG. 6, wiring members 14 are patterned to complete double-sided wiring board 15. The patterning can be performed, for example, by etching.
  • In the next step, a plurality of wiring boards are laminated. FIG. 7 is a sectional view showing a step of laminating wiring members 14 and electrically insulating substrates 11 which are filled with interlayer connection material 13. As shown in FIG. 7, electrically insulating substrates 11, which are formed in the same steps as FIGS. 1 to 4 and each filled with interlayer connection material 13 are laminated on both sides of double-sided wiring board 15. Then, two more wiring members 14 are laminated on both sides thereof.
  • In the next step, the wiring boards thus laminated are heated and pressurized. FIG. 8 is a sectional view showing a step of heating and pressurizing wiring members 14. As shown in FIG. 8, wiring members 14 are heated and pressurized, which may be performed in the same manner as in the step shown in FIG. 5.
  • In the same manner as in FIG. 5, the wiring boards thus laminated are cooled after the heating and pressurizing step. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction. As a result, the internal stress allows interlayer connection material 13 to contract, thereby improving connection reliability in via holes 12.
  • In the next step, wiring members 14 are patterned. FIG. 9 is a sectional view showing a step of patterning wiring members 14. As shown in FIG. 9, wiring members 14 disposed on the outermost surfaces are patterned to complete multilayer printed wiring board 16 shown in FIG. 9. The patterning can be performed, for example, by etching. At normal temperature, interlayer connection material 13 of multilayer printed wiring board 16 is larger in thickness than electrically insulating substrate 11 which is made of the insulating material and formed in the same wiring layer as interlayer connection material 13.
  • In the embodiment, the multilayer printed wiring board is a four-layer wiring board; however, the number of the wiring layers in the multilayer printed wiring board is not limited to four. The multilayer printed wiring board has at least two wiring layers and may have five or more wiring layers laminated by the similar steps.
  • Multilayer printed wiring board 16 completed through the aforementioned steps is used at a temperature lower than the heating temperature used in the step of heating and pressurizing wiring members 14 shown in FIG. 5. The temperature at which multilayer printed wiring board 16 is used is, for example, 60° C. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction. As a result, the internal stress always functions to contract interlayer connecting material 13, thereby improving connection reliability in via holes 12.
  • In the present embodiment, the insulating material is a composite of glass woven cloth and epoxy-based resin. Alternatively, it may be a composite of either glass unwoven cloth, aramid woven cloth, or aramid unwoven cloth and thermosetting resin such as epoxy-based resin. Alternatively, it may be a composite of either glass woven cloth, glass unwoven cloth, aramid woven cloth, or aramid unwoven cloth and thermoplastic resin whose glass transition temperature is 180° C. or above. Alternatively, the insulating material may be made of a film material. Examples of the thermoplastic resin whose glass transition temperature is 180° C. or above include wholly aromatic polyester resin, polyethersulfone, polyether ketone, and polyetheretherketone.
  • Interlayer connection material 13 is formed by filling via holes 12 with the conductive paste. Alternatively, as long as the temperature to form the connection is higher than the operating temperature, interlayer connection material 13 may be formed in via holes 12 by filled plating, conformal plating, evaporating, or sputtering.
  • As described hereinbefore, according to the present embodiment, the interlayer connection material in the via holes has a coefficient of thermal expansion in the thickness direction lower than that of the insulating material in the thickness direction. The interlayer connection of the interlayer connection material is formed at a temperature higher than the operating temperature (for example, 60° C. or less) of the multilayer printed wiring board. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used. As a result, the internal stress allows the interlayer connecting portion to contract, thereby achieving a multilayer printed wiring board having high connection reliability.
  • INDUSTRIAL APPLICABILITY
  • The interlayer connection structure of the multilayer printed wiring board of the present invention provides high reliability of interlayer connection. Such multilayer printed wiring board is useful to the application relating to mounting substrates such as semiconductor packages and compact module components that are required to meet high reliability standards including minute wiring pattern and semiconductor packaging.

Claims (8)

1. A method for manufacturing a multilayer printed wiring board having a plurality of wiring layers, comprising:
forming a via hole in an electrically insulating substrate made of insulating material;
forming interlayer connection material in the via hole, the interlayer connection material having a coefficient of thermal expansion in a thickness direction lower than the insulating material; and
forming interlayer connection at a temperature higher than an operating temperature of the multilayer printed wiring board, the interlayer connection being larger than the insulating material of a same wiring layer at the operating temperature in thickness.
2. The method for manufacturing a multilayer printed wiring board of claim 1, wherein
the interlayer connection is formed at a temperature of 180 to 400° C.
3. The method for manufacturing a multilayer printed wiring board of claim 1, wherein
the insulating material is made of at least one of a composite of glass woven cloth and thermosetting resin; a composite of glass unwoven cloth and thermosetting resin; a composite of aramid woven cloth and thermosetting resin; and a composite of aramid unwoven cloth and thermosetting resin.
4. The method for manufacturing a multilayer printed wiring board of claim 3, wherein
the thermosetting resin is an epoxy-based resin.
5. The method for manufacturing a multilayer printed wiring board of claim 1, wherein
the insulating material is made of at least one of a composite of glass woven cloth and thermoplastic resin; a composite of glass unwoven cloth and thermoplastic resin; a composite of aramid woven cloth and thermoplastic resin; and a composite of aramid unwoven cloth and thermoplastic resin.
6. The method for manufacturing a multilayer printed wiring board of claim 5, wherein
the thermoplastic resin has a glass transition temperature of at least 180° C.
7. The method for manufacturing a multilayer printed wiring board of claim 1, wherein
the insulating material is made of a film material.
8. The method for manufacturing a multilayer printed wiring board of claim 1, wherein
the interlayer connection material is formed by at least one of conductive pasting, filled plating, conformal plating, evaporating, and sputtering.
US12/907,076 2006-04-03 2010-10-19 Multilayer printed wiring board and manufacturing method thereof Abandoned US20110030207A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/907,076 US20110030207A1 (en) 2006-04-03 2010-10-19 Multilayer printed wiring board and manufacturing method thereof

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP2006101750A JP2007280997A (en) 2006-04-03 2006-04-03 Method of manufacturing multilayer printed-wiring board
JP2006-101750 2006-04-03
JP2006-101749 2006-04-03
JP2006101749A JP2007280996A (en) 2006-04-03 2006-04-03 Multilayer printed-wiring board
PCT/JP2007/057394 WO2007116855A1 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and method for manufacturing same
US11/910,560 US7956293B2 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and manufacturing method thereof
US12/907,076 US20110030207A1 (en) 2006-04-03 2010-10-19 Multilayer printed wiring board and manufacturing method thereof

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
US11/910,560 Division US7956293B2 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and manufacturing method thereof
PCT/JP2007/057394 Division WO2007116855A1 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and method for manufacturing same

Publications (1)

Publication Number Publication Date
US20110030207A1 true US20110030207A1 (en) 2011-02-10

Family

ID=38581145

Family Applications (2)

Application Number Title Priority Date Filing Date
US11/910,560 Expired - Fee Related US7956293B2 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and manufacturing method thereof
US12/907,076 Abandoned US20110030207A1 (en) 2006-04-03 2010-10-19 Multilayer printed wiring board and manufacturing method thereof

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US11/910,560 Expired - Fee Related US7956293B2 (en) 2006-04-03 2007-04-02 Multilayer printed wiring board and manufacturing method thereof

Country Status (3)

Country Link
US (2) US7956293B2 (en)
EP (1) EP1890524A4 (en)
WO (1) WO2007116855A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2141973A1 (en) * 2008-07-02 2010-01-06 Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO Method of providing conductive structures in a multi-foil system and multi-foil system comprising same
JP5719560B2 (en) * 2009-10-21 2015-05-20 株式会社半導体エネルギー研究所 Manufacturing method of terminal structure
US10083893B2 (en) 2014-01-30 2018-09-25 Toshiba Memory Corporation Semiconductor device and semiconductor device manufacturing method
WO2017081981A1 (en) * 2015-11-10 2017-05-18 株式会社村田製作所 Resin multilayer substrate and manufacturing method for same
US11966592B1 (en) 2022-11-29 2024-04-23 Qumulo, Inc. In-place erasure code transcoding for distributed file systems
US11921677B1 (en) 2023-11-07 2024-03-05 Qumulo, Inc. Sharing namespaces across file system clusters
US11934660B1 (en) 2023-11-07 2024-03-19 Qumulo, Inc. Tiered data storage with ephemeral and persistent tiers

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6010769A (en) * 1995-11-17 2000-01-04 Kabushiki Kaisha Toshiba Multilayer wiring board and method for forming the same
US6768061B2 (en) * 2001-07-06 2004-07-27 Denso Corporation Multilayer circuit board
US6774316B1 (en) * 1999-11-26 2004-08-10 Matsushita Electric Industrial Co., Ltd. Wiring board and production method thereof
US20040156583A1 (en) * 2002-08-07 2004-08-12 Denso Corporation Circuit board and circuit board connection structure
US20040231151A1 (en) * 2003-05-20 2004-11-25 Matsushita Electric Industrial Co., Ltd. Multilayer circuit board and method for manufacturing the same
US6889433B1 (en) * 1999-07-12 2005-05-10 Ibiden Co., Ltd. Method of manufacturing printed-circuit board
US20060274510A1 (en) * 2004-11-09 2006-12-07 Masakazu Nakada Multilayer wiring board and fabricating method of the same
US7312400B2 (en) * 2002-02-22 2007-12-25 Fujikura Ltd. Multilayer wiring board, base for multilayer wiring board, printed wiring board and its manufacturing method
US20080289866A1 (en) * 2004-12-28 2008-11-27 Ngk Spark Plug Co., Ltd. Wiring Board and Wiring Board Manufacturing Method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59175796A (en) 1983-03-25 1984-10-04 日本電気株式会社 Method of producing multilayer printed circuit board
JP3923224B2 (en) 1999-09-20 2007-05-30 大日本印刷株式会社 Multilayer printed wiring board and manufacturing method thereof
JP2003198086A (en) 2001-12-25 2003-07-11 Fujikura Ltd Circuit board and laminated circuit board as well as their manufacturing method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6010769A (en) * 1995-11-17 2000-01-04 Kabushiki Kaisha Toshiba Multilayer wiring board and method for forming the same
US6889433B1 (en) * 1999-07-12 2005-05-10 Ibiden Co., Ltd. Method of manufacturing printed-circuit board
US6774316B1 (en) * 1999-11-26 2004-08-10 Matsushita Electric Industrial Co., Ltd. Wiring board and production method thereof
US6768061B2 (en) * 2001-07-06 2004-07-27 Denso Corporation Multilayer circuit board
US7312400B2 (en) * 2002-02-22 2007-12-25 Fujikura Ltd. Multilayer wiring board, base for multilayer wiring board, printed wiring board and its manufacturing method
US20040156583A1 (en) * 2002-08-07 2004-08-12 Denso Corporation Circuit board and circuit board connection structure
US20040231151A1 (en) * 2003-05-20 2004-11-25 Matsushita Electric Industrial Co., Ltd. Multilayer circuit board and method for manufacturing the same
US20060274510A1 (en) * 2004-11-09 2006-12-07 Masakazu Nakada Multilayer wiring board and fabricating method of the same
US20080289866A1 (en) * 2004-12-28 2008-11-27 Ngk Spark Plug Co., Ltd. Wiring Board and Wiring Board Manufacturing Method

Also Published As

Publication number Publication date
US7956293B2 (en) 2011-06-07
US20090139761A1 (en) 2009-06-04
EP1890524A4 (en) 2009-07-01
EP1890524A1 (en) 2008-02-20
WO2007116855A1 (en) 2007-10-18

Similar Documents

Publication Publication Date Title
US8178191B2 (en) Multilayer wiring board and method of making the same
EP1811824B1 (en) Multilayer printed wiring board and process for producing the same
US20050016764A1 (en) Wiring substrate for intermediate connection and multi-layered wiring board and their production
US6734542B2 (en) Component built-in module and method for producing the same
CN1812088B (en) Multi-level semiconductor module and method for fabricating the same
EP1814373A1 (en) Multilayer printed wiring board and its manufacturing method
KR102032171B1 (en) Electronic component built-in substrate and method of manufacturing the same
US20110030207A1 (en) Multilayer printed wiring board and manufacturing method thereof
KR100759004B1 (en) Multi-layer substrate having conductive pattern and resin film and method for manufacturing the same
US20080128911A1 (en) Semiconductor package and method for manufacturing the same
JP2006253189A (en) Multilayer substrate and manufacturing method thereof
JP2014502792A (en) Electronic device having liquid crystal polymer solder mask and outer seal layer and related method
US8076589B2 (en) Multilayer wiring board and its manufacturing method
US20170006699A1 (en) Multilayer circuit board, semiconductor apparatus, and method of manufacturing multilayer circuit board
US10779414B2 (en) Electronic component embedded printed circuit board and method of manufacturing the same
JP2011151048A (en) Method of manufacturing electronic component, and electronic component
US20080052902A1 (en) Printed circuit board and manufacturing method thereof
JP2004273575A (en) Multilayer printed wiring board and its manufacturing method
JP3926064B2 (en) Printed wiring board and method for manufacturing printed wiring board
CN101361414A (en) Multilayer printed wiring board and method for manufacturing same
JP2001237542A (en) Wiring board
JP4892924B2 (en) Multilayer printed wiring board and manufacturing method thereof
JP4961945B2 (en) Multilayer printed wiring board and manufacturing method thereof
JP2007115952A (en) Interposer substrate and manufacturing method thereof
JP4881664B2 (en) Wiring board and method of manufacturing wiring board

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO PAY ISSUE FEE