TWI395329B - 互補式金屬-氧化物-半導體場效電晶體結構 - Google Patents

互補式金屬-氧化物-半導體場效電晶體結構 Download PDF

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TWI395329B
TWI395329B TW094123768A TW94123768A TWI395329B TW I395329 B TWI395329 B TW I395329B TW 094123768 A TW094123768 A TW 094123768A TW 94123768 A TW94123768 A TW 94123768A TW I395329 B TWI395329 B TW I395329B
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Matthias Passlack
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    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures

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Description

互補式金屬-氧化物-半導體場效電晶體結構
本發明通常係關於半導體元件,且更明確地說,係關於互補式金屬-氧化物-半導體場效電晶體。
先前技術中充滿不同互補式金屬-氧化物-半導體場效電晶體(MOSFET)技術。例如,化合物半導體上之增強型金屬-氧化物-半導體場效電晶體(EMOSFET)可使用金屬功量為約4.6 eV之標準難熔金屬閘極,未經摻雜之通道以提供增強型操作(n通道元件與p通道元件分別為正臨限電壓與負臨限電壓),及自對準離子植入物以形成低電阻源極與汲極延伸及歐姆接觸區域。然而,過去在化合物半導體GaAs上僅成功製造p通道EMOSFET。對於GaAs上之n通道EMOSFET而言,>700℃之供體植入物活化溫度與Ga2 O3 -GaAs介面穩定性不相容。在供體植入物之活化退火過程中,Ga2 O3 -GaAs介面僅可保存於溫度700℃,且該介面在溫度高於700℃時受到完全破壞。
先前技術亦包括化合物EMOSFET技術,該技術使用金屬功量為約4.3至4.6 eV之標準金屬閘極,經摻雜通道藉由離子植入物成為相反電導型式以提供增強型操作(例如n通道元件之正臨限電壓)及離子植入物以形成低電阻源極與汲極延伸及歐姆接觸區域電導型式。因為n型植入物在閘極氧化物沈積之前退火,所以氧化物-GaAs介面在植入物活化過程中不受高溫影響。然而,隨後的閘極氧化物沈積不可避避免地在經曝露半導體表面上進行,其會導致氧化物-半導體介面處的高缺陷密度。該高缺陷密度僅使得可製造約1%之具有預期效能之元件,致使該等元件大體上無用。
因此,需要與閘極氧化物技術相容之高效能互補式半導體FET技術。此外,本發明之其他所需特徵及特性將自隨後詳細的描述與附加之申請專利範圍,結合附隨圖式及前述技術領域與背景技術而變得明顯。
根據一實際實施例,互補式金屬-氧化物-半導體場效電晶體FET結構對僅一種類型之元件(n通道元件或p通道元件)使用離子植入物。使用該結構,可在實際熱預算內實現100歐姆/平方及更低之薄片電阻率,其可產生高效能元件,尤其是在短閘極長度下。
本發明之某些態樣可藉由互補式金屬-氧化物-化合物半導體場效電晶體結構以一種形態進行,該電晶體結構具有一化合物半導體基板、一形成於該基板上之n通道元件、一形成於該基板上之p通道元件、及位於該等元件中之僅一個元件中之離子植入物。
下列詳細描述實際上僅僅係例示性的,且並非用以限制本發明及本發明之應用或用途。此外,無意受先前技術領域、背景技術、發明內容或下列實施方式中提出之任何明確或暗含理論之約束。
圖1係根據本發明之例示性實施例組態的互補式金屬-氧化物-化合物半導體場效電晶體結構100之截面圖。電晶體結構100通常包括一半導體基板102,一形成於半導體基板102上之磊晶層結構104、一閘極氧化層106、歐姆接觸(由參考數字108、110、112及114識別)及閘極(由參考數字116及118識別)。在本發明之一個實施例中,半導體基板102為一化合物半導體基板。電晶體結構100包括兩個互補式元件:一形成於半導體基板102上之n通道元件120及一形成於半導體基板102上之p通道元件122。使用已知技術可實現元件隔離,例如經由氧植入物124。電晶體結構100利用兩個元件中之僅一個元件中,意即在n通道元件120或p通道元件122中的離子植入物,但並非兩個元件中的離子植入物。在說明性實施例中,離子植入物(藉由參考數字126及128識別)位於p通道元件122中,而n通道元件120保持無植入物。
更特定言之,半導體基板102係形成於化合物III-V材料,例如GaAs。III-V材料於半導體元件製造中之用途已為吾人所熟知,因此,該等材料之屬性及特性將不在此作詳細描述。磊晶層結構104係層-層生長於化合物半導體基板102上以在該等元件所在處上形成化合物半導體晶圓結構。在說明性實施例中,磊晶層結構104包括一形成於化合物半導體基板102上之緩衝層130、一形成於緩衝層130上之通道層132及一形成於通道層132上之分隔層134。在實際實施例中,閘極氧化層106係沈積於分隔層134上,且可使用習知技術形成於任何適宜材料,例如Ga2 O3 。閘極氧化層106之上表面係晶圓結構之上表面。雖然圖1中展示典型磊晶層結構104,但是實務上可使用替代性配置。
磊晶層結構104之每個獨立層係使用已知技術及方法磊晶生長。就此而言,緩衝層130(其可形成於任何適宜III-V材料,例如GaAs)係磊晶生長於化合物半導體基板102上;通道層132(其可形成於任何適宜III-V材料,例如Inx Ga1 x As)係磊晶生長於緩衝層130上,且分隔層134(其可形成於任何適宜III-V材料,例如Alx Ga1 x As)係磊晶生長於通道層132上。根據所要的元件特性選擇每層之厚度,因此,其可自一種應用變化至另一種應用。
電晶體結構100亦包括至少一個形成於磊晶層結構104內之摻雜層。該摻雜層可包括施體原子(提供n型電導性)或受體原子(提供p型電導性)。對於化合物半導體實施例而言,施體原子係較佳。圖1描述形成於緩衝層130內之第一施體層136及形成於分隔層134內之第二施體層138。實務上,可在通道層132之上、之下及/或之內實現施體層(典型元件利用一或兩個施體層,且施體層位於通道層132內係不常見)。每個施體層136/138係在化合物半導體基板102上生長之矽單層。簡言之,一部分緩衝層130生長,施體層136生長於該第一部分上,接著另一部分緩衝層130生長於施體層136上。類似技術用以使分隔層134及施體層138生長。至少一個施體層為磊晶層結構104建立一天然電導型式。在例示性實施例中,施體層136/138為磊晶層結構104建立n型電導型式。
如上所述,將離子植入物126/128引入兩互補式元件之僅一個元件中。在例示性實施例中,認為離子植入物126/128為位於p通道元件122中之p型受體植入物,而n通道元件120保持無植入物。替代實施例(未圖示)可將受體原子用於施體層136/138,施體植入物位於n通道元件中,而p通道元件保持無植入物。離子植入物126/128用以使磊晶層結構104之天然電導型式"反轉"或"逆轉"。例如,在受體植入物的情況下,該電導性發生反轉是因為離子植入物126/128之離子化受體濃度超過由施體層136/138所提供之離子化施體濃度。在該實例中,離子植入物126/128使磊晶層結構104之n型電導性反轉形成p通道元件122。如圖1所示,離子植入物126/128較佳位於各自歐姆接觸112/114之下,也位於源極與汲極延伸中,且無需採用通道植入物。在替代實施例中,通道植入物可作為調整元件之臨限電壓的手段來實施。
閘極116/118形成於閘極氧化層106之上以提供該等元件之電閘極接觸。在較佳實施例中,閘極116係形成於具有高功量之金屬材料。高功量閘極116之適宜材料包括(但不限於)鉑及銥。歐姆接觸108/110/112/114亦沈積於化合物半導體晶圓結構的上表面之上以提供該等元件之適當源極與汲極接觸。如一實際實例中,若電晶體結構100代表反轉電路,則歐姆接觸108將為n型元件120之源極接觸,歐姆接觸110將為n型元件120之汲極接觸,歐姆接觸112將為p型元件122之源極接觸,且歐姆接觸114將為p型元件122之汲極接觸。歐姆接觸108/110/112/114之適宜材料為先前技術中所熟知。
在一實際實施例中,n通道元件120之臨限電壓為正,且該臨限電壓可藉由適當設計磊晶層結構104及藉由選擇閘極116之適宜材料(具有特殊功量)來調整。p型元件122之臨限電壓為負,且該臨限電壓可藉由選擇閘極118之適宜材料來調整。根據一實際實施例,當將相同閘極金屬用於兩通道元件時,若將n通道元件120之臨限電壓調整至0.3伏特,則p通道元件122之臨限電壓為約0.3伏特減去通道層132之能帶隙。若電晶體結構100使用能帶隙為1.2 eV之In0 . 2 Ga0 . 8 As通道層132,則p通道元件122獲得-0.9伏特之臨限電壓。p通道元件122之進一步臨限電壓調整係揭示於以下有關圖2所述之本發明之另一實施例中。
電晶體結構100具有幾項優勢,可參照習知元件結構對其作出最佳解釋。一些習知結構包括化合物半導體增強型金屬-氧化物-半導體場效電晶體,其利用金屬功量為約4.6 eV之標準難熔金屬閘極用於n通道元件與p通道元件兩者,利用未經摻雜通道從而為n通道元件提供正臨限電壓及為p通道元件提供負臨限電壓,且利用自對準離子植入物以形成低電阻源極與汲極延伸及歐姆接觸區域用於p通道元件與n通道元件兩者。電晶體結構100優於該等結構之優勢如下。藉由n通道元件120中之磊晶施體層136/138替代n型離子植入物會降低熱預算且允許製造功能性n通道MOSFET,從而又製造功能性互補式技術。根據本發明組態之元件最高加工溫度係由位於p通道元件122中之p型離子植入物126/128之所需活化溫度支配。例如Mg之受體植入物在退火溫度低至600℃時提供高達101 4 cm 2 及以上之薄片載體濃度,超過對於p-通道元件122之接取區域之薄片電阻要求。因此,該最高加工溫度降至低於最高溫度多達100℃用於保存Ga2 O3 -GaAs介面。
活性受體離子植入物126/128過度補償由p通道元件122接取區域中之施體層136/138引入的負電荷。另外,n通道元件120中不存在離子植入物使得可在Alx Ga1 x As分隔層134中使用較高莫耳分率之Al,歸因於不存在DX中心(其通常發生於x>0.2之n-經摻雜Alx Ga1 x As中)所以可將其插入閘極氧化層106與通道層132之間。分隔層134中較高莫耳分率Alx Ga1 x As之使用是有利的,因為它會降低邊緣阱之效應,該等邊緣阱位於接近氧化物-磊晶層介面之閘極氧化層106中。分隔層134中較高莫耳分率Alx Ga1 x As之使用是進一步有利的,因為它分別在n通道元件120及p通道元件122中提供較好電子及電洞限制。另一個優勢為由於使用淺磊晶施體層136/138因而可達成高縱橫比,其使得電晶體結構100適宜於深次微米技術。
圖2係根據本發明之例示性實施例組態之金屬-氧化物-半導體場效電晶體結構200的簡化截面圖。電晶體結構200之許多特性及特徵與電晶體結構100相同、類似或相當,因此,亦可將部分以上描述之電晶體結構100應用於電晶體結構200。電晶體結構200通常包括一化合物半導體基板202、一形成於化合物半導體基板202上之磊晶層結構204、一閘極氧化層206、歐姆接觸(由參考數字208與210識別)及一閘極212。在一實施例中,電晶體結構200包括形成於化合物半導體基板202上之p通道元件214,且利用位於p通道元件214中之離子植入物。
化合物半導體基板202係形成於III-V材料(例如GaAs),且磊晶層結構204包括一形成於化合物半導體基板202上之緩衝層216、一形成於緩衝層216上之通道層218,及一形成於通道層218上之分隔層220。電晶體結構200亦包括至少一個形成於磊晶層結構204內之施體層。圖2描述一形成於緩衝層216內之第一施體層222及一形成於分隔層220內之第二施體層224。如上所述,施體層為磊晶層結構204建立天然電導型式(例如n型電導性)且離子植入物使電導型式反轉或逆轉。就此而言,電晶體結構200使用如圖2中所示之離子植入物226。
在例示性實施例中,認為離子植入物226為位於p通道元件214中之p型受體植入物。離子植入物226用來使磊晶層結構204之天然電導型式"反轉"或"逆轉"。該電導性發生反轉是因為植入物之離子化受體濃度超過由施體層提供的離子化施體濃度。在該實例中,離子植入物226使磊晶層結構204之n型電導性反轉形成p通道元件214。如圖2中所示,離子植入物226較佳係位於各自歐姆接觸208/210之下及源極與汲極延伸中。另外,電晶體結構200包括用於臨限電壓調整之通道植入物228。
如上關於電晶體結構100所述,p通道元件214之臨限電壓可經由閘極212之材料的功量調整。另外,p通道元件214之臨限電壓可經由閘極212之凹陷深度及受體通道植入物228之劑量來調整。例如,p通道臨限電壓可藉由改變閘極212之凹陷深度及/或藉由改變受體通道植入物228之劑量易於調整至(例如)-0.3伏特。當閘極212凹陷時,p通道元件214之效能亦得到增強。
儘管在前面實施方式中已提出至少一個例示性實施例,然應瞭解存在大量變化。亦應瞭解該或該等例示性實施例僅為實例,且並非用以以任何方式限制本發明之範圍、適用性或組態。相反,前面實施方式將給熟習該項技術者提供便利路圖以實施該或該等例示性實施例。應理解在不違反如附加之申請專利範圍及其法律均等物所述本發明之範疇的情況下元件之功能及排列可產生許多變化。
100...電晶體結構
102...化合物半導體基板
104...磊晶層結構
106...閘極氧化層
108...歐姆接觸
110...歐姆接觸
112...歐姆接觸
114...歐姆接觸
116...閘極
118...閘極
120...n通道元件
122...p通道元件
124...氧植入物
126...離子植入物
128...離子植入物
130...緩衝層
132...通道層
134...分隔層
136...施體層
138...施體層
200...電晶體結構
202...化合物半導體基板
204...磊晶層結構
206...閘極氧化層
208...歐姆接觸
210...歐姆接觸
212...閘極
214...p通道元件
216...緩衝層
218...通道層
220...分隔層
222...施體層
224...施體層
226...離子植入物
228...通道植入物
圖1係互補式金屬-氧化物-化合物半導體場效電晶體結構之簡化截面圖;且圖2係金屬-氧化物-化合物半導體場效電晶體之簡化截面圖。
100...電晶體結構
102...化合物半導體基板
104...磊晶層結構
106...閘極氧化層
108...歐姆接觸
110...歐姆接觸
112...歐姆接觸
114...歐姆接觸
116...閘極
118...閘極
120...n通道元件
122...p通道元件
124...氧植入物
126...離子植入物
128...離子植入物
130...緩衝層
132...通道層
134...分隔層
136...施體層
138...施體層

Claims (4)

  1. 一種互補式金屬-氧化物-半導體場效電晶體結構,其包含:一GaAs半導體基板;一形成於該GaAs半導體基板上之磊晶層結構,該磊晶層結構包含一形成於該GaAs半導體基板上之緩衝層、一形成於該緩衝層上之通道層,及一形成於該通道層上之分隔層,該分隔層包含Alx Ga1-x As;至少一個形成於該磊晶層結構內之摻雜層,該至少一個摻雜層為該磊晶層結構建立一電導型式;一形成於該半導體基板上之n通道元件;一形成於該半導體基板上之p通道元件;及僅位於該p通道元件之離子植入物,藉由植入至少一受體植入物,該等離子植入物使該磊晶層結構之該電導型式反轉,該離子植入物亦位於各別之源極與汲極接觸下方作為用於該p通道元件之源極/汲極延伸植入物。
  2. 如請求項1之互補式金屬-氧化物-半導體場效電晶體結構,其中該至少一個摻雜層係形成於該緩衝層內。
  3. 如請求項1之互補式金屬-氧化物-半導體場效電晶體結構,其中該至少一個摻雜層係形成於該分隔層內。
  4. 如請求項1之互補式金屬-氧化物-半導體場效電晶體結構,其中該至少一個摻雜層包含一形成於該緩衝層內之第一施體層及一形成於該分隔層內之第二施體層。
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