TWI387984B - Stacking electronics devices and producing methods - Google Patents
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- TWI387984B TWI387984B TW093125638A TW93125638A TWI387984B TW I387984 B TWI387984 B TW I387984B TW 093125638 A TW093125638 A TW 093125638A TW 93125638 A TW93125638 A TW 93125638A TW I387984 B TWI387984 B TW I387984B
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- 238000000034 method Methods 0.000 title claims description 4
- 239000013078 crystal Substances 0.000 claims description 20
- 239000000843 powder Substances 0.000 claims description 15
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000002245 particle Substances 0.000 claims description 11
- 238000010304 firing Methods 0.000 claims description 10
- 239000000919 ceramic Substances 0.000 claims description 9
- 238000010030 laminating Methods 0.000 claims description 7
- 238000005520 cutting process Methods 0.000 claims description 5
- 239000003985 ceramic capacitor Substances 0.000 description 12
- 238000007747 plating Methods 0.000 description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 9
- 239000001301 oxygen Substances 0.000 description 9
- 229910052760 oxygen Inorganic materials 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000012298 atmosphere Substances 0.000 description 6
- 230000032798 delamination Effects 0.000 description 6
- 239000011888 foil Substances 0.000 description 5
- 239000011230 binding agent Substances 0.000 description 4
- 238000000926 separation method Methods 0.000 description 4
- 239000002002 slurry Substances 0.000 description 4
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000002003 electrode paste Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000000265 homogenisation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000013001 point bending Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000010405 reoxidation reaction Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
- H03H2001/0021—Constructional details
- H03H2001/0085—Multilayer, e.g. LTCC, HTCC, green sheets
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- Inorganic Chemistry (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
Description
本發明涉及疊層型電子部件及其製法,特別涉及像疊層陶瓷電容器那樣電介質層及內部電極層被薄層、多層化的疊層型電子部件及其製法。The present invention relates to a laminated electronic component and a method of manufacturing the same, and more particularly to a laminated electronic component in which a dielectric layer and an internal electrode layer are thinned and multilayered, such as a laminated ceramic capacitor, and a method of manufacturing the same.
近年來,作為疊層型電子部件的一種的疊層陶瓷電容器,為了小型、高容量化,已經實現了電介質層及內部電極層的薄層、多層化(例如特開平11-251173)。In recent years, a multilayer ceramic capacitor which is a type of laminated electronic component has been thinned and multilayered in a dielectric layer and an internal electrode layer in order to reduce the size and capacitance (for example, JP-A-11-251173).
但是,以往的疊層型電子部件由於電介質層及內部電極層的薄層化和內部電極層相對於電介質層的面積佔有率的擴大化,電介質層之間的結合區域逐漸變小,由此產生電子部件主體的機械強度降低的問題。另外,電介質層的厚度和內部電極層的厚度差變小,在疊層工序中,由於電介質生片(green sheet)難以吸收內部電極圖案的階梯部分,因此在疊層後或燒成後,會產生在電子部件主體的層間容易發生分離的問題。However, in the conventional laminated electronic component, since the dielectric layer and the internal electrode layer are thinned and the area ratio of the internal electrode layer to the dielectric layer is increased, the bonding region between the dielectric layers is gradually reduced, thereby generating The problem of reduced mechanical strength of the electronic component body. Further, the difference between the thickness of the dielectric layer and the thickness of the internal electrode layer is small, and in the laminating step, since the dielectric green sheet is difficult to absorb the step portion of the internal electrode pattern, after lamination or after firing, There is a problem in that separation easily occurs between layers of the electronic component body.
本發明的目的在於,提供即使將電介質層及內部電極層薄層多層化也可以提高電子部件主體的機械強度並且抑制層間產生分離的疊層型電子部件及其製法。An object of the present invention is to provide a laminated electronic component capable of improving the mechanical strength of an electronic component body and suppressing separation between layers even when a thin layer of a dielectric layer and an internal electrode layer is multilayered, and a method for producing the same.
本發明的疊層型電子部件是在交互層疊多個電介質層和內部電極層而形成的電子部件主體的端面上具有外部電 極的疊層型電子部件,其特徵是,所述電介質層中的一部分電介質層為比其他的電介質層厚度更大的電介質層。The laminated electronic component of the present invention has external power on an end face of an electronic component body formed by alternately laminating a plurality of dielectric layers and internal electrode layers A multilayer laminated electronic component characterized in that a portion of the dielectric layer in the dielectric layer is a dielectric layer having a thickness greater than that of other dielectric layers.
這樣,即使將電介質層及內部電極層薄層多層化,也可以提高電子部件主體的機械強度,並且可以抑制層間的分離。Thus, even if a thin layer of the dielectric layer and the internal electrode layer is multilayered, the mechanical strength of the electronic component body can be improved, and separation between layers can be suppressed.
該疊層型電子部件中,所述較厚的電介質層與所述其他的電介質層的層構成比(厚的電介質層的層數/其他的電介質層的層數)優選為1/5~1/20。In the laminated electronic component, the layer configuration ratio of the thick dielectric layer to the other dielectric layer (the number of layers of the thick dielectric layer/the number of other dielectric layers) is preferably 1/5 to 1 /20.
另外,所述疊層型電子部件中,所述較厚的電介質層和所述其他的電介質層最好為同質材料。另外,在將所述其他的電介質層的厚度設為t1,將所述較厚的電介質層的厚度設為t2時,優選滿足t2/t1≧1.2的關係。Further, in the laminated electronic component, the thick dielectric layer and the other dielectric layers are preferably homogenous materials. Further, when the thickness of the other dielectric layer is t1 and the thickness of the thick dielectric layer is t2, it is preferable to satisfy the relationship of t2/t1≧1.2.
通過像這樣將厚的電介質層的材質與其他的電介質層設為同質,另外將厚度比率如上設定,就可以使其他的電介質層與較厚的電介質層一體化,進而可以提高強度。By setting the material of the thick dielectric layer to be uniform with the other dielectric layers as described above, and by setting the thickness ratio as described above, it is possible to integrate the other dielectric layers and the thick dielectric layer, and it is possible to improve the strength.
本發明適於所述其他的電介質層為薄層的情況,具體來說,適於其他的電介質層的厚度在3μm以下,特別適於1~2μm的情況。另外,所述內部電極層的厚度優選2μm以下,特別優選0.1~1.8μm。The present invention is suitable for the case where the other dielectric layers are thin layers, and specifically, it is suitable for other dielectric layers having a thickness of 3 μm or less, and is particularly suitable for the case of 1 to 2 μm. Further, the thickness of the internal electrode layer is preferably 2 μm or less, and particularly preferably 0.1 to 1.8 μm.
另外,本發明的疊層型電子部件中,在將構成所述其他的電介質層的陶瓷的晶粒的平均結晶粒徑設為Φ 1,將構成所述較厚的電介質層的陶瓷的晶粒的平均結晶粒徑設為Φ 2時,最好滿足Φ 2/Φ 1≧1.1的關係,所述內部電極層最好為金屬箔,金屬箔最好為電鍍膜。Further, in the laminated electronic component of the present invention, the average crystal grain size of the crystal grains of the ceramic constituting the other dielectric layer is Φ 1, and the crystal grains of the ceramic constituting the thick dielectric layer are formed. When the average crystal grain size is Φ 2 , it is preferable to satisfy the relationship of Φ 2 / Φ 1 ≧ 1.1, and the internal electrode layer is preferably a metal foil, and the metal foil is preferably a plated film.
所述疊層型電子部件中,由於構成電介質層的晶粒的粒徑越大,則電介質的介電常數就越高,因此通過將構成電介質的平均結晶粒徑設為所述範圍,就可以抑制由增厚一部分的電介質層的厚度而帶來的靜電電容的降低。In the laminated electronic component, the larger the particle diameter of the crystal grains constituting the dielectric layer, the higher the dielectric constant of the dielectric. Therefore, by setting the average crystal grain size constituting the dielectric to the above range, The reduction in electrostatic capacitance due to thickening of a portion of the dielectric layer is suppressed.
另外,本發明中,如果用電鍍膜形成內部電極層,則可以形成均質,減小厚度不均,並且可以增大有效面積,另外還可以使內部電極層極薄。Further, in the present invention, if the internal electrode layer is formed of a plating film, homogenization can be formed, thickness unevenness can be reduced, and the effective area can be increased, and the internal electrode layer can be made extremely thin.
本發明的疊層型電子部件的製法的特徵是,具有準備至少含有電介質粉末的電介質生片和厚度比該電介質生片更厚的電介質生片的工序、在所述電介質生片及所述較厚電介質生片上分別形成內部電極圖案的工序、將形成了該內部電極圖案的所述電介質生片及所述較厚電介質生片層疊而形成疊層成形體的工序、切割該疊層成形體而形成電子部件主體成形體並燒成的工序。The method for producing a laminated electronic component according to the present invention is characterized in that it has a step of preparing a dielectric green sheet containing at least a dielectric powder and a dielectric green sheet having a thickness larger than that of the dielectric green sheet, and the dielectric green sheet and the a step of forming an internal electrode pattern on the thick dielectric green sheet, a step of laminating the dielectric green sheet on which the internal electrode pattern is formed, and the thick dielectric green sheet to form a laminated molded body, and cutting the laminated molded body A step of forming an electronic component main body molded body and baking it.
根據此種製法,即使將電介質生片或內部電極圖案薄層化,由於插設有厚度較大的電介質生片,因此可以提高電介質生片上的內部電極圖案的埋入性,由此可以消除由內部電極圖案造成的階梯,即使在疊層及燒成後,也可以容易地防止層離。According to such a manufacturing method, even if the dielectric green sheet or the internal electrode pattern is thinned, since the dielectric green sheet having a large thickness is interposed, the embedding property of the internal electrode pattern on the dielectric green sheet can be improved, thereby eliminating The step caused by the internal electrode pattern can easily prevent delamination even after lamination and firing.
另外,本發明的製法中,所述較厚電介質生片和所述電介質生片的層構成比(較厚電介質生片的層數/電介質生片的層數)最好為1/5~1/20,所述較厚電介質生片和所述電介質生片最好為同質材料,當將所述電介質生片的厚度設為tG1,將所述較厚電介質生片的厚度設為tG2時,最好 滿足tG2/tG1≧1.2的關係,在將構成所述電介質生片的電介質粉末的平均粒徑設為Φ G1,將構成所述較厚的電介質生片的電介質粉末的平均粒徑設為Φ G2時,最好滿足Φ G2/Φ G1≧1.1的關係,內部電極圖案最好為金屬箔,金屬箔最好為電鍍膜。Further, in the manufacturing method of the present invention, the layer composition ratio of the thicker dielectric green sheet and the dielectric green sheet (the number of layers of the thick dielectric green sheet/the number of layers of the dielectric green sheet) is preferably 1/5 to 1 /20, the thicker dielectric green sheet and the dielectric green sheet are preferably homogenous materials, when the thickness of the dielectric green sheet is tG1, and the thickness of the thick dielectric green sheet is tG2, the best When the relationship of tG2/tG1≧1.2 is satisfied, the average particle diameter of the dielectric powder constituting the dielectric green sheet is Φ G1 , and the average particle diameter of the dielectric powder constituting the thick dielectric green sheet is Φ G2 . Preferably, the relationship of Φ G2 / Φ G1 ≧ 1.1 is satisfied, and the internal electrode pattern is preferably a metal foil, and the metal foil is preferably a plated film.
通過像所述那樣,電介質生片及較厚電介質生片中分別所含的電介質粉末為如上所述的粒徑比(Φ 2/Φ 1≧1.1),則即使將一部分的電介質生片加厚,也可以抑制燒成收縮率,從而可以減小燒成前後的內部應力。By the above, the dielectric powder contained in the dielectric green sheet and the thick dielectric green sheet is a particle diameter ratio (Φ 2 / Φ 1 ≧ 1.1) as described above, even if a part of the dielectric green sheet is thickened. Further, the firing shrinkage ratio can be suppressed, and the internal stress before and after the firing can be reduced.
本發明如上所述,即使將電介質層及內部電極層薄層多層化,也可以提高電子部件主體的機械強度,並且可以抑制層間的分離。As described above, according to the present invention, even if the dielectric layer and the internal electrode layer are thinned, the mechanical strength of the electronic component body can be improved, and the separation between the layers can be suppressed.
對於本發明的疊層型電子部件的一個實施方式進行詳細說明。第一圖是作為本發明的疊層型電子部件的代表例的疊層陶瓷電容器的概略剖面圖。該疊層型電子部件在電子部件主體1的兩個端面2上形成有外部電極3。電子部件主體1是將電介質層10和內部電極層7交互層疊而構成的。內部電極層7在電子部件主體1的相同的端面2上與外部電極3交互連接。One embodiment of the laminated electronic component of the present invention will be described in detail. The first drawing is a schematic cross-sectional view of a multilayer ceramic capacitor as a representative example of the laminated electronic component of the present invention. The laminated electronic component has external electrodes 3 formed on both end faces 2 of the electronic component body 1. The electronic component body 1 is constructed by laminating the dielectric layer 10 and the internal electrode layer 7 alternately. The internal electrode layer 7 is interactively connected to the external electrode 3 on the same end face 2 of the electronic component body 1.
此外,本發明中,十分重要的是,電介質層10當中的一部分電介質層為比其他的電介質層5更厚的電介質層8。另外,將所述其他的電介質層5的厚度設為t1,將所述 較厚電介質層8的厚度設為t2時的t2/t1比更優選為1.2以上。Further, in the present invention, it is important that a part of the dielectric layers among the dielectric layers 10 is a dielectric layer 8 thicker than the other dielectric layers 5. In addition, the thickness of the other dielectric layer 5 is set to t1, and the The ratio t2/t1 when the thickness of the thick dielectric layer 8 is t2 is more preferably 1.2 or more.
另外,根據提高所述其他的電介質層5和所述較厚電介質層8的燒結性,使機械強度提高的理由,較厚電介質層8最好與其他的電介質層5為同質材料。這裏,所謂「同質材料」是指,主成分由相同元素構成的材料。Further, the thick dielectric layer 8 is preferably made of a homogenous material to the other dielectric layers 5, because the sinterability of the other dielectric layers 5 and the thick dielectric layer 8 is improved to improve the mechanical strength. Here, the "homogeneous material" means a material in which the main component is composed of the same element.
另外,將構成其他的電介質層5的陶瓷的晶粒的平均結晶粒徑設為Φ 1,將構成較厚的電介質層8的陶瓷的晶粒的平均結晶粒徑設為Φ 2時的Φ 2/Φ 1比優選在1.1以上,更優選在1.15以上。具體來說,平均結晶粒徑Φ 1為0.1~1μm左右較好,平均結晶粒徑Φ 2為0.2~1.2μm左右較好。 另一方面,在未將比其他電介質層5更厚的電介質層8插設在電子部件主體1中的情況下,則無法實現電子部件1的機械強度的提高。Further, the average crystal grain size of the crystal grains of the ceramic constituting the other dielectric layer 5 is Φ 1, and the average crystal grain size of the crystal grains of the ceramic constituting the thick dielectric layer 8 is Φ 2 when Φ 2 The ratio of /Φ 1 is preferably 1.1 or more, more preferably 1.15 or more. Specifically, the average crystal grain size Φ 1 is preferably about 0.1 to 1 μm, and the average crystal grain size Φ 2 is preferably from about 0.2 to 1.2 μm. On the other hand, when the dielectric layer 8 thicker than the other dielectric layers 5 is not inserted in the electronic component body 1, the mechanical strength of the electronic component 1 cannot be improved.
這裏,本發明中,所謂「薄層多層化」是指,其他的電介質層5的厚度在3μm以下,內部電極層7的厚度在2μm以下,電介質層及內部電極層分別被層疊100層以上。本發明適於此種被薄層、多層化了的疊層型電子部件。特別優選其他的電介質層5的厚度為1~2μm,內部電極層7的厚度為0.1~1.8μm。In the present invention, the term "thin-layer multilayering" means that the thickness of the other dielectric layer 5 is 3 μm or less, the thickness of the internal electrode layer 7 is 2 μm or less, and the dielectric layer and the internal electrode layer are laminated by 100 or more layers, respectively. The present invention is suitable for such a laminated electronic component which is thinned or multilayered. It is particularly preferable that the thickness of the other dielectric layer 5 is 1 to 2 μm, and the thickness of the internal electrode layer 7 is 0.1 to 1.8 μm.
另外,本發明中,較厚電介質層8和其他的電介質層5的層構成比(較厚電介質層8的層數/其他電介質層5的層數)優選為1/5~1/20。Further, in the present invention, the layer constitution ratio of the thick dielectric layer 8 and the other dielectric layers 5 (the number of layers of the thick dielectric layer 8 / the number of layers of the other dielectric layers 5) is preferably 1/5 to 1/20.
電介質層5、8例如為包括以BaTiO3 等為主成分的結 晶相的陶瓷層。The dielectric layers 5 and 8 are, for example, ceramic layers including a crystal phase mainly composed of BaTiO 3 or the like.
構成本發明的電子部件主體1的內部電極層7最好為金屬箔,另外,最好由電鍍膜形成。另外,該電鍍膜優選以賤金屬材料為主成分,特別更優選Ni、Cu當中的任意1種或它們的合金。The internal electrode layer 7 constituting the electronic component main body 1 of the present invention is preferably a metal foil, and is preferably formed of a plating film. Further, the plating film is preferably a base metal material as a main component, and particularly preferably one of Ni and Cu or an alloy thereof.
下面對作為本發明的疊層型電子部件的一個適用例的疊層陶瓷電容器的製法進行說明。第二圖(a)~(d)是用於製造該疊層陶瓷電容器的工序圖。Next, a method of manufacturing a multilayer ceramic capacitor which is an application example of the laminated electronic component of the present invention will be described. The second drawings (a) to (d) are process drawings for manufacturing the laminated ceramic capacitor.
(a)首先,在BaTiO3 等電介質粉末中添加混合燒結助劑、粘合劑、溶劑等而調製了陶瓷料漿後,將該陶瓷料漿塗佈在承載薄膜(carrier film)51上,形成電介質生片53a。另外,本發明中,重要的是,準備比電介質生片53a更厚的電介質生片53b。根據容易進行與電介質生片53a的一體燒成的理由,該較厚電介質生片53b與電介質生片53a最好為同質材料。另外,將電介質生片53a的厚度設為tG1,將較厚電介質生片53b的厚度設為tG2時的tG2/tG1比最好在1.2以上。(a) First, a ceramic slurry is prepared by adding a sintering aid, a binder, a solvent, or the like to a dielectric powder such as BaTiO 3 , and then coating the ceramic slurry on a carrier film 51 to form a carrier slurry 51. The dielectric green sheet 53a. Further, in the present invention, it is important to prepare a dielectric green sheet 53b thicker than the dielectric green sheet 53a. The thick dielectric green sheet 53b and the dielectric green sheet 53a are preferably homogenous materials for the purpose of facilitating integral firing with the dielectric green sheet 53a. Further, the thickness of the dielectric green sheet 53a is tG1, and the ratio of the thickness of the thick dielectric green sheet 53b to tG2 is preferably 1.2 or more.
另外,將構成電介質生片53a的電介質粉末的平均粒徑設為Φ G1,將構成較厚的電介質生片53b的電介質粉末的平均粒徑設為Φ G2時的Φ G2/Φ G1比更優選在1.1以上。Further, the average particle diameter of the dielectric powder constituting the dielectric green sheet 53a is Φ G1 , and the Φ G2 / Φ G1 ratio when the average particle diameter of the dielectric powder constituting the thick dielectric green sheet 53b is Φ G2 is more preferable. Above 1.1.
而且,本發明中,電介質生片53a的厚度最好在12μm以下,特別是根據疊層型電子部件的小型、大容量化的理由,優選1.5~5μm的範圍。In the present invention, the thickness of the dielectric green sheet 53a is preferably 12 μm or less. In particular, the thickness of the laminated electronic component is preferably in the range of 1.5 to 5 μm.
(b)然後,在電介質生片53a及較厚電介質生片53b 上,分別形成內部電極圖案54a、54b。此時,內部電極圖案54a、54b的有效面積優選60%以上,特別優選65%以上。另外,為了消除由形成於電介質生片53a及較厚電介質生片53b上的內部電極圖案54a、54b造成的階梯,也可以沿著該內部電極圖案54a、54b的周圍塗佈有機樹脂等。而且,該有機樹脂的塗佈厚度最好按照與內部電極圖案54a、54b的厚度相當的方式形成。(b) Then, on the dielectric green sheet 53a and the thicker dielectric green sheet 53b Upper, internal electrode patterns 54a, 54b are formed, respectively. At this time, the effective area of the internal electrode patterns 54a and 54b is preferably 60% or more, and particularly preferably 65% or more. Further, in order to eliminate the step caused by the internal electrode patterns 54a and 54b formed on the dielectric green sheet 53a and the thick dielectric green sheet 53b, an organic resin or the like may be applied around the internal electrode patterns 54a and 54b. Further, it is preferable that the coating thickness of the organic resin is formed so as to correspond to the thickness of the internal electrode patterns 54a and 54b.
(c)然後,將形成了該內部電極圖案54a、54b的電介質生片53a及較厚電介質生片53b以特定的構成層疊多層,然後,在該上下面,通過層疊多層未形成內部電極圖案的電介質生片53a並進行加熱加壓,製作成疊層成形體57。(c) Then, the dielectric green sheets 53a and the thick dielectric green sheets 53b on which the internal electrode patterns 54a and 54b are formed are laminated in a specific configuration, and then, on the upper and lower surfaces, by laminating a plurality of layers in which internal electrode patterns are not formed The dielectric green sheet 53a is heated and pressurized to form a laminated molded body 57.
該疊層成形體57的電介質生片53a及較厚電介質生片53b的層構成比(較厚電介質生片53b的層數/電介質生片53a的層數)更優選為1/5~1/20。The layer configuration ratio of the dielectric green sheet 53a and the thick dielectric green sheet 53b of the multilayer molded body 57 (the number of layers of the thick dielectric green sheet 53b / the number of layers of the dielectric green sheet 53a) is more preferably 1/5 to 1/ 20.
另外,如第二圖(c)及第三圖所示,內部電極圖案54a、54b由規則地排列於電介質生片53a及較厚電介質生片53b的表面上的多個內部電極構成。另外,內部電極圖案54a和內部電極圖案54b以內部電極的長度方向的大約一半的長度相對錯開而層疊。而且,第三圖中,雖然為了方便,按照內部電極圖案54b比內部電極圖案54a更寬的方式進行描繪,但是它們的寬度優選相同。Further, as shown in the second (c) and third figures, the internal electrode patterns 54a and 54b are composed of a plurality of internal electrodes regularly arranged on the surfaces of the dielectric green sheets 53a and the thick dielectric green sheets 53b. Further, the internal electrode pattern 54a and the internal electrode pattern 54b are stacked with respect to a length of about half of the longitudinal direction of the internal electrode. Further, in the third drawing, although the internal electrode patterns 54b are drawn wider than the internal electrode patterns 54a for convenience, their widths are preferably the same.
(d)然後,將該疊層成形體57沿著第二圖(c)及第三圖所示的切割部位C切割成格子狀,一次製成多個電子 部件主體成形體59。切割部位C是穿過構成內部電極圖案54a的各內部電極之間而與電介質生片53a、53b垂直的面或穿過構成內部電極圖案54b的各內部電極之間而與電介質生片53a、53b垂直的面。(d) Then, the laminated molded body 57 is cut into a lattice shape along the cutting portion C shown in the second (c) and third drawings, and a plurality of electrons are formed at a time. Component body molded body 59. The cutting portion C is a surface perpendicular to the dielectric green sheets 53a, 53b passing between the respective internal electrodes constituting the internal electrode pattern 54a or between the internal electrodes constituting the internal electrode pattern 54b and the dielectric green sheets 53a, 53b. Vertical face.
將所得的電子部件主體成形體59在大氣中250~300℃下或在氧氣分壓0.1~1Pa的低氧氣氣氛中500~800℃下進行了脫粘合劑處理後,在非氧化性氣氛中1250~1350℃下燒成2~3小時,製作成電子部件主體1。另外,為了獲得所需的介電特性,在氧氣分壓為0.1~10-4 Pa左右的低氧氣分壓下,在900~1100℃下進行5~15小時的熱處理。The obtained electronic component main body molded body 59 is subjected to binder removal treatment at 250 to 300 ° C in the atmosphere or 500 to 800 ° C in a low oxygen atmosphere having a partial pressure of oxygen of 0.1 to 1 Pa, and then in a non-oxidizing atmosphere. The main body 1 of the electronic component was produced by firing at 1250 to 1350 ° C for 2 to 3 hours. Further, in order to obtain a desired dielectric property, heat treatment is performed at 900 to 1100 ° C for 5 to 15 hours under a low partial pressure of oxygen having an oxygen partial pressure of about 0.1 to 10 -4 Pa.
最後,在所得的電子部件主體1的端面11上塗佈外部電極糊狀物,進行烘烤,形成外部電極3。繼而,在該外部電極3上形成Ni鍍膜及Sn鍍膜,製成疊層陶瓷電容器。Finally, an external electrode paste is applied onto the end surface 11 of the obtained electronic component body 1 and baked to form the external electrode 3. Then, a Ni plating film and a Sn plating film were formed on the external electrode 3 to form a multilayer ceramic capacitor.
而且,作為本發明中使用的內部電極圖案54,不僅可以使用金屬糊狀物的印刷膜,而且還可以使用鍍膜、濺射膜、蒸鍍膜當中的任意一種。Further, as the internal electrode pattern 54 used in the present invention, not only a printed film of a metal paste but also a plating film, a sputtered film, or a vapor deposited film can be used.
本發明適於作為小型高容量的疊層陶瓷電容器。The present invention is suitable as a small-sized, high-capacity laminated ceramic capacitor.
下面雖然將舉出實施例及比較例來進一步詳細說明,但是,本發明並不限定於以下的實施例。Hereinafter, the examples and comparative examples will be described in further detail, but the present invention is not limited to the following examples.
如下製作了作為疊層型電子部件的一種的疊層陶瓷電容器。首先,準備以BaTiO3 為主成分並達到表1所示的結 晶徑比(平均結晶粒徑比)的平均粒徑的電介質粉末,分別調製各個由電介質粉末和有機粘結劑、溶劑構成的陶瓷料漿,製作了厚度不同的2種生片(電介質生片及較厚電介質生片)。電介質生片的厚度設為3.5μm,較厚電介質生片的厚度按照燒成後的電介質層的厚度比(t2/t1)達到表1所示的比率的方式進行了調整。構成較厚電介質生片的電介質粉末的平均粒徑Φ G2設為0.5μm,構成電介質生片的電介質粉末的平均粒徑Φ G1按照燒成後的電介質層的平均結晶粒徑比(Φ 2/Φ 1)達到表1所示的比率的方式進行了調整。A laminated ceramic capacitor which is one type of laminated electronic component was produced as follows. First, a dielectric powder containing BaTiO 3 as a main component and having an average particle diameter of a crystal diameter ratio (average crystal grain size ratio) shown in Table 1 is prepared, and each ceramic composed of a dielectric powder, an organic binder, and a solvent is prepared. In the slurry, two kinds of green sheets (dielectric green sheets and thick dielectric green sheets) having different thicknesses were produced. The thickness of the dielectric green sheet was set to 3.5 μm, and the thickness of the thick dielectric green sheet was adjusted so that the thickness ratio (t2/t1) of the dielectric layer after firing reached the ratio shown in Table 1. The average particle diameter Φ G2 of the dielectric powder constituting the thick dielectric green sheet is 0.5 μm, and the average particle diameter Φ G1 of the dielectric powder constituting the dielectric green sheet is in accordance with the average crystal grain size ratio of the dielectric layer after firing (Φ 2 / Φ 1) The ratio shown in Table 1 was adjusted.
然後,對於內部電極圖案,使用實施了鏡面加工的不銹鋼板制基板平板,在其表面塗佈感光性抗蝕劑樹脂,在曝光、清洗後,形成了掩模圖案。Then, a substrate plate made of a stainless steel plate subjected to mirror processing was used for the internal electrode pattern, and a photosensitive resist resin was applied to the surface of the internal electrode pattern, and after exposure and cleaning, a mask pattern was formed.
其後,在將該不銹鋼板制基板平板浸漬在Ni鍍液中的狀態下進行電鍍處理,形成了4mm×1mm、平均厚度為0.5μm的以Ni為主成分的金屬膜。Thereafter, the stainless steel plate substrate was immersed in a Ni plating solution, and a plating treatment was performed to form a metal film containing Ni as a main component of 4 mm × 1 mm and an average thickness of 0.5 μm.
其後,在80℃、80kg/cm2 的條件下,將所述內部電極圖案熱壓接轉印到該所述電介質生片及較厚電介質生片上,製成形成了內部電極圖案的電介質生片及較厚電介質生片。內部電極相對於各電介質層的有效面積設定為65%。Thereafter, the internal electrode pattern is thermocompression-bonded onto the dielectric green sheet and the thick dielectric green sheet under conditions of 80 ° C and 80 kg/cm 2 to form a dielectric material forming an internal electrode pattern. Sheets and thicker dielectric green sheets. The effective area of the internal electrode with respect to each dielectric layer was set to 65%.
然後,將轉印了該內部電極圖案的電介質生片及較厚電介質生片以表1所示的構成比層疊共200片,利用溫度100℃、壓力80kgf/cm2 的條件下的層疊壓制製成了疊層成形體。Then, the dielectric green sheets and the thick dielectric green sheets to which the internal electrode patterns were transferred were laminated in a total of 200 sheets at a composition ratio shown in Table 1, and laminated by a temperature of 100 ° C and a pressure of 80 kgf/cm 2 . It becomes a laminated body.
其後,將該疊層成形體切割成格子狀,得到了電子部件主體成形體。在該電子部件主體成形體的端面,內部電極圖案的一端交互露出。另外,沒有位置偏移地形成了沿厚度方向重疊而被層疊的內部電極層的電極圖案。Thereafter, the laminated molded body was cut into a lattice shape to obtain an electronic component main body molded body. At one end surface of the electronic component main body molded body, one end of the internal electrode pattern is alternately exposed. Further, an electrode pattern of the internal electrode layers stacked in the thickness direction is formed without a positional deviation.
然後,在將該電子部件主體成形體在大氣中以300℃或在氧氣分壓為0.1~1Pa的低氧氣氣氛中以500℃進行了脫粘合劑處理後,在氧氣分壓為10-7 Pa的非氧化性氣氛中以1300℃燒成2小時,繼而,在氧氣分壓為0.01Pa的低氧氣分壓下以1000℃實施10小時的再氧化處理,得到了電子部件主體。Then, after the electronic component main body molded body is subjected to binder removal treatment at 500 ° C in a low oxygen atmosphere at a partial pressure of oxygen of 0.1 to 1 Pa in the atmosphere, the partial pressure of oxygen is 10 -7 . The Pa was fired at 1300 ° C for 2 hours in a non-oxidizing atmosphere, and then subjected to reoxidation treatment at 1000 ° C for 10 hours under a low partial pressure of oxygen having an oxygen partial pressure of 0.01 Pa to obtain an electronic component body.
最後,對如上獲得的電子部件主體,在露出內部電極層並形成了延伸部的各端面上塗佈了含有玻璃粉末的Cu糊狀物後,在氮氣氣氛中,以900℃進行烘烤。其後,形成Ni鍍層及Sn鍍層,形成與內部電極層電連接的外部電極,製成疊層陶瓷電容器。Finally, the electronic component body obtained as described above was coated with a Cu paste containing glass powder on each end surface on which the internal electrode layer was exposed and an extension portion was formed, and then baked at 900 ° C in a nitrogen atmosphere. Thereafter, a Ni plating layer and a Sn plating layer were formed, and an external electrode electrically connected to the internal electrode layer was formed to form a laminated ceramic capacitor.
所得的疊層陶瓷電容器的外形尺寸為:寬1.25mm,長2.0mm,厚1.25mm,夾在內部電極層間的電介質層當中,作為所述電介質生片的燒結體的電介質層的厚度t1為2.5μm,作為所述較厚電介質生片的燒結體的電介質層的厚度t2與厚度t1的比率為表1所示的值。The obtained monolithic ceramic capacitor has an outer dimension of 1.25 mm in width, 2.0 mm in length, and 1.25 mm in thickness, sandwiched between the dielectric layers between the internal electrode layers, and the dielectric layer as the sintered body of the dielectric green sheet has a thickness t1 of 2.5. Μm, the ratio of the thickness t2 of the dielectric layer as the sintered body of the thicker dielectric green sheet to the thickness t1 is a value shown in Table 1.
在燒成後,對於所得的疊層陶瓷電容器,對100個試樣分別進行了靜電電容和層離的評價。層離是對截面研磨後的樣品進行評價。機械強度是對各20個進行了三點彎曲強度實驗。將各自的測定結果表示在表1中。After the firing, the obtained multilayer ceramic capacitor was subjected to evaluation of electrostatic capacitance and delamination for each of 100 samples. The delamination is the evaluation of the sample after the section grinding. The mechanical strength was a three-point bending strength test for each of the 20 pieces. The respective measurement results are shown in Table 1.
另一方面,作為比較例,製作了由厚度在全層都均一的電介質層(厚度2.5μm)構成的疊層型電子部件,用與本發明相同的方法進行了評價。On the other hand, as a comparative example, a laminated electronic component composed of a dielectric layer (thickness: 2.5 μm) having a uniform thickness in all layers was produced, and was evaluated in the same manner as in the present invention.
從表1的結果可以清楚看到,具有厚度較厚的電介質層的試樣No.2~8中,靜電電容在4.7μF以上,層離在2/100個以下,機械強度在10kgf以上。特別是,使電介質層的厚度t1與較厚電介質層的厚度t2的比t2/t1在1.2以上的試樣No.3~8中,靜電電容在4.7μF以上,並且沒有層離,機械強度高達10.4kgf。另一方面,具有未插設較厚電介質層的全層由相同厚度(2.5μm)的電介質層構成的電子部件主體 的試樣No.1中,靜電電容雖然高達4.9μF,但是層離的發生數多達10/100個,機械強度也低至9.5kgf。As is clear from the results of Table 1, in Sample Nos. 2 to 8 having a thick dielectric layer, the electrostatic capacitance was 4.7 μF or more, the delamination was 2/100 or less, and the mechanical strength was 10 kgf or more. In particular, in Sample Nos. 3 to 8 in which the ratio t2/t1 of the thickness t1 of the dielectric layer to the thickness t2 of the thick dielectric layer was 1.2 or more, the electrostatic capacitance was 4.7 μF or more, and there was no delamination, and the mechanical strength was as high as possible. 10.4kgf. On the other hand, an electronic component body having a dielectric layer of the same thickness (2.5 μm) in a full layer without a thick dielectric layer interposed therebetween In sample No. 1, the electrostatic capacitance was as high as 4.9 μF, but the number of occurrences of delamination was as high as 10/100, and the mechanical strength was as low as 9.5 kgf.
1‧‧‧電子部件主體1‧‧‧Electronic component body
2‧‧‧端面2‧‧‧ end face
3‧‧‧外部電極3‧‧‧External electrode
7‧‧‧內部電極層7‧‧‧Internal electrode layer
5、10‧‧‧電介質層5, 10‧‧‧ dielectric layer
8‧‧‧較厚電介質層8‧‧‧Thick dielectric layer
11‧‧‧端面11‧‧‧ end face
51‧‧‧承載薄膜51‧‧‧ carrying film
53a、53b‧‧‧電介質生片53a, 53b‧‧‧ dielectric green film
54‧‧‧內部電極圖案54‧‧‧Internal electrode pattern
54a、54b‧‧‧內部電極圖案54a, 54b‧‧‧ internal electrode pattern
57‧‧‧疊層成形體57‧‧‧Laminated molded body
59‧‧‧電子部件主體成形體59‧‧‧Electronic component body molded body
C‧‧‧切割部位C‧‧‧Cutting parts
第一圖是作為本發明的疊層型電子部件的代表例的疊層陶瓷電容器的概略剖面圖。The first drawing is a schematic cross-sectional view of a multilayer ceramic capacitor as a representative example of the laminated electronic component of the present invention.
第二圖是用於製造本發明的疊層型電子部件的工序圖。The second drawing is a process diagram for manufacturing the laminated electronic component of the present invention.
第三圖是表示切割疊層成形體時的切割部位的俯視圖。The third drawing is a plan view showing a cut portion when the laminated molded body is cut.
1‧‧‧電子部件主體1‧‧‧Electronic component body
2‧‧‧端面2‧‧‧ end face
3‧‧‧外部電極3‧‧‧External electrode
7‧‧‧內部電極層7‧‧‧Internal electrode layer
5、10‧‧‧電介質層5, 10‧‧‧ dielectric layer
8‧‧‧較厚電介質層8‧‧‧Thick dielectric layer
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JP6513328B2 (en) | 2013-07-10 | 2019-05-15 | 太陽誘電株式会社 | Multilayer ceramic capacitor |
KR20150053424A (en) | 2013-11-08 | 2015-05-18 | 삼성전기주식회사 | Multi-layered ceramic electronic component and board having the same mounted thereon |
KR101762032B1 (en) | 2015-11-27 | 2017-07-26 | 삼성전기주식회사 | Multi-layer ceramic electronic part and method for manufacturing the same |
JP2019062023A (en) * | 2017-09-25 | 2019-04-18 | Tdk株式会社 | Electronic component device |
KR102589835B1 (en) * | 2018-10-02 | 2023-10-16 | 삼성전기주식회사 | Multi-layered ceramic electronic component |
-
2003
- 2003-08-27 JP JP2003302923A patent/JP2005072452A/en active Pending
-
2004
- 2004-08-20 KR KR1020040065913A patent/KR20050022330A/en not_active Application Discontinuation
- 2004-08-23 CN CNB2004100576826A patent/CN100521002C/en not_active Expired - Fee Related
- 2004-08-26 TW TW093125638A patent/TWI387984B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
CN1591717A (en) | 2005-03-09 |
KR20050022330A (en) | 2005-03-07 |
JP2005072452A (en) | 2005-03-17 |
CN100521002C (en) | 2009-07-29 |
TW200518132A (en) | 2005-06-01 |
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