TWI386129B - Method for testing missing legend printing of circuit board - Google Patents

Description

Circuit board text leakage detection method

The present invention relates to the field of circuit boards, and in particular, to a method for detecting a missing printed circuit board.

Printed circuit boards have been widely used due to their high assembly density. For applications of high-density interconnect boards, see the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M- 880, IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

After the outer conductive circuit of the circuit board is completed, it is necessary to print characters at some positions of the solder resist layer of the outer conductive line to identify the lines and electronic components in the circuit board. In the process of manufacturing the circuit board, the text on the surface of the circuit board may be missed due to operational errors and the like. This inconveniences the use of subsequent boards.

In view of the above, it is necessary to provide a method for detecting a missing printed circuit board on a surface of a circuit board.

Hereinafter, a method for detecting a printed word on a circuit board will be described by way of an embodiment.

A method for detecting a printed circuit of a printed circuit board includes the steps of: providing a circuit board to be inspected, the circuit board comprising a conductive layer and a solder resist layer disposed in sequence, wherein the conductive layer comprises a first test pad and a second test pad; Connected to the connecting line between the first test pad and the second test pad, the solder resist layer has a first through hole corresponding to the first test pad and a second through hole corresponding to the second test pad, The first test pad is at least partially exposed from the first through hole, and the second test pad is at least partially exposed from the second through hole; an electrical measuring device is provided, and the electrical measuring device comprises an electric measuring machine, a test probe and a second test probe, the electrical tester is configured to detect electrical conduction between the area detected by the first test probe and the area detected by the second test probe; The area corresponding to the test pad and the area corresponding to the second test pad are detected. When the electrical measuring device detects that the area corresponding to the first test pad and the area corresponding to the second test pad are open, it is determined that the first test pad is formed with The text is formed at the same time a second shielding pattern formed on the second test pad with the insulation formed at the same time as the text, the surface of the solder resist layer is not missing printed characters, and the electric measuring device detects the area corresponding to the first test pad and When the area corresponding to the two test pads is short-circuited, it is determined that the first mask pattern formed at the same time as the character is not formed on the first test pad, and the second mask pattern formed at the same time as the character is not formed on the second test pad. The surface of the solder mask is missing printed text.

Compared with the prior art, the method for detecting the leakage of the printed circuit board of the present invention provides an electrical measuring device for detecting the electrical continuity of the corresponding first test pad and the corresponding area of the second test pad which are preset on the circuit board. Therefore, it is determined whether a shielding pattern is formed on the first test pad and the second test pad, thereby determining whether the circuit board is missing printed characters. Therefore, the detection method of the circuit board text leakage provided by the technical solution can quickly and accurately determine whether the circuit board is missing printed characters.

The method for detecting the missing printed circuit board provided by the technical solution will be further described below with reference to the accompanying drawings and embodiments.

A method for detecting a missing printed circuit board according to an embodiment of the present technical solution includes the following steps:

In the first step, please refer to FIG. 1 and FIG. 2 together to provide the circuit board 100 to be tested.

The circuit board 100 may be a single layer circuit board formed with an outer layer circuit, a double layer circuit board or a multilayer circuit board. In this embodiment, a single layer circuit board is taken as an example for description. According to a predetermined design, the circuit board 100 includes a conductive layer 110, an insulating layer 120, a solder resist layer 130, and a text layer 140. When the circuit board 100 is a multilayer circuit board, the conductive layer 110 may be a multilayer circuit board outer layer line. When the circuit board 100 is a two-layer circuit board, the conductive layer 110 may be a conductive line on either side of the two-layer circuit board. During the actual board generation process, the text layer 140 is likely to be missed due to operational errors and the like. Therefore, the circuit board 100 to be detected may include the text layer 140 or may not include the text layer 140.

Referring to FIG. 3, the conductive layer 110 includes a line pattern 111 and a test pattern 112 that are separated from each other. In this embodiment, the test pattern 112 includes a first test pad 1121, a second test pad 1122, and a connecting line 1123 connected between the first test pad 1121 and the second test pad 1122. The first test pad 1121 and the second test pad 1122 are both circular, and the first test pad 1121 and the second test pad 1122 each have a diameter of about 1 mm, that is, 40 mils (mil, one thousandth of an inch). The width of the connecting line 1123 is approximately 10 mils. The line pattern 111 and the test pattern 112 can simultaneously pass through an image transfer process-etch process. The copper foil layer to be used for forming the conductive layer is etched away except for the copper foil forming the wiring pattern 111 and other regions of the test pattern 112. The line pattern 111 includes a plurality of conductive lines 1111. The test pattern 112 is separated from the line pattern 111, that is, the test pattern 112 is not connected to the line pattern 111.

The shape of the first test pad 1121 and the second test pad 1122 is not limited to the circular shape provided in the embodiment, and may be made into an elliptical shape, a polygonal shape, or other irregular shape. The size of the first test pad 1121 and the second test pad 1122 and the width of the connection line 1123 are not limited to those provided in the present embodiment as long as the size can be used for electrical detection device testing.

The solder resist layer 130 is formed on the circuit pattern 111 and the test pattern 112. The solder resist layer 130 has a first through hole 131 corresponding to the first test pad 1121, a second through hole 132 corresponding to the second test pad 1122, and a line. The area of the pattern 111 that needs to communicate with the outside corresponds to the third through hole (not shown). The center of the first through hole 131 corresponds to the center of the first test pad 1121, the diameter of the first through hole 131 is larger than the diameter of the first test pad 1121, and the center of the second through hole 132 is opposite to the center of the second test pad 1122. Correspondingly, the aperture of the second through hole 132 is larger than the diameter of the second test pad 1122. In this embodiment, the first through hole 131 and the second through hole 132 are both circular holes, and the apertures are both about 45 mils, so that the first test pad 1121 and the second test pad 1122 are exposed from the solder resist layer 130. .

The shape of the first through hole 131 and the second through hole 132 is not limited to the circular hole provided in the embodiment. The shape of the first through hole 131 corresponds to the shape of the first test pad 1121, and the shape of the second through hole 132 corresponds to the shape of the second test pad 1122. The opening size of the first through hole 131 may also be equal to or slightly smaller than the size of the first test pad 1121, and the opening size of the second through hole 132 may also be equal to or slightly smaller than the size of the second test pad 1122.

In this embodiment, the solder resist layer 130 can be formed in the following manner. First, a solder resist ink layer is formed on the surface of the conductive layer 110, that is, the wiring pattern 111, the test pattern 112, and the wiring pattern 111 and the test pattern 112. The solder resist ink layer may be formed by spraying or printing, and the solder resist ink layer covers the surface of the wiring pattern 111, the surface of the test pattern 112, and the surface of the wiring pattern 111 and the insulating layer 120 exposed on the side of the test pattern 112. The solder resist ink layer is developed using a developing ink process. Next, the solder resist or the printed solder resist ink layer is exposed and developed, so that the regions corresponding to the first through holes 131, the second through holes 132 and the third through holes are removed from the solder resist ink, thereby forming the first pass. The solder mask layer 130 of the hole 131, the second through hole 132 and the third through hole.

The text layer 140 is formed by printing an insulating ink. The set character layer 140 includes a character pattern 141 formed on the solder resist layer 130, a first mask pattern 142 formed on the first test pad 1121, and a second mask pattern 143 formed on the second test pad 1122.

The text graphic 141 is used to mark different areas of the line graphic 111 to facilitate the application of the circuit board. The first shielding pattern 142 shields the first test pad 1121 exposed from the solder resist layer 130. The first shielding pattern 142 is disposed coaxially with the first test pad 1121. The second mask pattern 143 shields the second test pad 1122 exposed from the solder resist layer 130. The second masking pattern 143 is disposed coaxially with the second test pad 1122. In this embodiment, the first shielding pattern 142 and the second shielding pattern 143 are both circular, and the first shielding pattern 142 and the second shielding pattern 143 protrude from the surface portion of the solder resist layer 130 by a diameter of 49 mils.

In the second step, referring to FIG. 4, an electrical measuring device 20 is provided.

The electrical measuring device 20 includes an electrical measuring machine 21, a first test probe 22 and a second test probe 23. The first test probe 22 and the second test probe 23 are electrically connected to the electrical test machine 21. The electric measuring machine 21 detects the electrical conduction between the area detected by the first test probe 22 and the area detected by the second test probe 23.

In the third step, the area corresponding to the first test pad 1121 and the area corresponding to the second test pad 1122 are electrically detected by the electrical measuring device 20, thereby determining whether the circuit board 100 is missing the text layer 140.

Referring to FIG. 4, the character graphic 141 is formed simultaneously with the first masking pattern 142 and the second masking pattern 143. Therefore, when the first mask pattern 142 and the second mask pattern 143 are formed, it can be determined that the character pattern 141 is also formed on the solder resist layer 130 at the same time. When the first masking pattern 142 is formed on the first test pad 1121 and the second masking pattern 143 is formed on the second test pad 1122, the first masking pattern 142 and the second masking pattern 143 are made of an insulating material for testing. The first test probe 22 of the electrical measuring device 20 is in contact with the first shielding pattern 142, and the second testing probe 23 is in contact with the second shielding pattern 143. The area corresponding to the first testing pad 1121 and the second test pad 1122 The corresponding regions are not electrically connected to each other, that is, a short circuit between the region corresponding to the first test pad 1121 and the region corresponding to the second test pad 1122, indicating that there is no missing text graphic 141. That is, when the electrical detecting device 20 detects that the region corresponding to the first test pad 1121 and the region corresponding to the second test pad 1122 is short-circuited, it indicates that there is no missing text on the surface of the circuit board 100.

Referring to FIG. 5, when the first masking pattern 142 is not formed on the first test pad 1121, the second masking pattern 143 is not formed on the second test pad 1122, since the first test pad 1121 and the second test pad 1122 are made of copper. The first test pad 1121 and the second test pad 1122 are electrically connected to each other through a connecting line 1123. When the test is performed, the first test probe 22 of the electrical test device 20 directly contacts the first test pad 1121, and the second test probe 23 directly contacts the second test pad 1122, so that the result of the electrical test device 20 is first. The area corresponding to the test pad 1121 and the area corresponding to the second test pad 1122 are electrically connected to each other, that is, the corresponding area between the corresponding area of the first test pad 1121 and the corresponding area of the second test pad 1122 is short-circuited, indicating that the surface of the solder resist layer 130 is leaky. Printed text graphic 141.

The method for detecting the leakage of the printed circuit board of the technical solution provided by the technical solution detects the electrical continuity of the corresponding first test pad and the corresponding area of the second test pad which are preset by the electrical measuring device, thereby determining the first test pad And whether a shielding pattern of insulation is formed on the second test pad, thereby determining whether the circuit board is missing printed characters. Therefore, the detection method of the circuit board text leakage provided by the technical solution can quickly and accurately determine whether the circuit board is missing printed characters.

However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

100‧‧‧ boards

110‧‧‧ Conductive layer

111‧‧‧Line graphics

1111‧‧‧Electrical circuit

112‧‧‧ test graphics

1121‧‧‧First test pad

1122‧‧‧Second test pad

1123‧‧‧Connecting line

120‧‧‧Insulation

130‧‧‧ solder mask

131‧‧‧First through hole

132‧‧‧Second through hole

140‧‧‧Text layer

141‧‧‧ text graphics

142‧‧‧First masking graphics

143‧‧‧second masking pattern

20‧‧‧Electrical measuring device

21‧‧‧Electric measuring machine

22‧‧‧First test probe

23‧‧‧Second test probe

FIG. 1 is a schematic diagram of a circuit board provided by an embodiment of the present technical solution.

Figure 2 is a cross-sectional view of Figure 1 taken along line -I-II.

FIG. 3 is a schematic diagram of a conductive layer provided by an embodiment of the present technical solution.

4 is a schematic diagram of detecting a circuit board formed with a text layer according to an embodiment of the present technical solution.

FIG. 5 is a schematic diagram of detecting a circuit board without a text layer provided by an embodiment of the present technical solution.

131‧‧‧First through hole

132‧‧‧Second through hole

142‧‧‧First masking graphics

143‧‧‧second masking pattern

20‧‧‧Electrical measuring device

21‧‧‧Electric measuring machine

22‧‧‧First test probe

23‧‧‧Second test probe

Claims (6)

A method for detecting missing printed circuit board, comprising the steps of:
Providing a circuit board to be inspected, the circuit board comprising a conductive layer and a solder resist layer disposed in sequence, the conductive layer comprising a first test pad, a second test pad and being connected between the first test pad and the second test pad a connecting line, the first test pad and the second test pad are electrically connected through the connecting line, the solder mask has a first through hole corresponding to the first test pad and the second test pad Corresponding second through holes, the first test pad is at least partially exposed from the first through hole, and the second test pad is at least partially exposed from the second through hole;
Providing an electrical testing device, the electrical testing device comprising an electrical measuring machine, a first testing probe and a second testing probe, the electrical testing machine for detecting a region detected by the first testing probe and detecting the second testing probe Electrical conduction between the regions; and contacting the first test probe to a region corresponding to the first test pad, contacting the second test probe to a region corresponding to the second test pad, and detecting, by the electrical measuring device, the first test pad When the area is disconnected from the area corresponding to the second test pad, it is determined that the first test pad is formed with a first shielding pattern formed at the same time as the character, and the second test pad is formed with the insulation formed at the same time as the character. a masking pattern, the surface of the solder resist layer is not printed with a text, and when the electrical measuring device detects that the area corresponding to the first test pad and the area corresponding to the second test pad are short-circuited, it is determined that the first test pad is not formed with The first shielding pattern of the insulating film formed at the same time, the second shielding pattern is not formed on the second test pad, and the surface of the solder resist layer is printed with a printed image. The method for detecting a missing printed circuit board according to the first aspect of the invention, wherein the first test pad is coaxially disposed with the first through hole, and the aperture of the first through hole is larger than the first test pad. The diameter of the second test pad is coaxial with the second through hole, and the diameter of the second through hole is larger than the diameter of the second test pad. The method for detecting a missing printed circuit board according to the second aspect of the invention, wherein the first shielding pattern of the insulation is disposed coaxially with the first test pad, the second shielding pattern of the insulation and the second test pad Coaxial settings. The method for detecting a missing printed circuit board according to the second aspect of the invention, wherein the first shielding pattern protrudes from a diameter of the solder resist layer portion larger than a diameter of the first through hole, and the second shielding pattern The diameter of the portion protruding from the solder resist layer is larger than the diameter of the second through hole. The method for detecting a missing printed circuit board according to the first aspect of the invention, wherein the conductive layer further comprises a circuit pattern, and the circuit pattern is simultaneously with the first test pad, the second test pad and the connecting line. Formed by etching copper foil. The method for detecting a missing printed circuit board according to the first aspect of the invention, wherein the method for manufacturing the solder resist layer comprises the steps of:
Forming a solder resist ink layer covering the entire conductive layer on the conductive layer, the solder resist ink layer is made of a developing ink; and exposing and developing the solder resist ink layer, thereby making the first test pad and the second test The area corresponding to the pad is removed from the solder resist ink, thereby forming a solder resist layer having a first via hole and a second via hole.