JP3252085B2 - Multilayer wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board in which a plurality of conductive pattern layers are stacked via an insulator layer, and each conductive pattern layer is electrically connected via a through hole or a via hole. It relates to a manufacturing method.

[0002]

2. Description of the Related Art In recent years, as electronic devices have become smaller and lighter,
There is a demand for higher density wiring inside electronic devices. For this purpose, printed wiring boards used for connection wiring of circuit components in electronic devices have been developed to have higher multilayers and higher densities. A multi-layered wiring board including an inner via hole is known as a wiring board with higher multilayer and higher density.

FIG. 8 is a cross-sectional view showing a simplified configuration of a multilayer wiring board 1 according to a first prior art. This multilayer wiring board 1 has six conductive pattern layers 3 to 8. Each of the conductive pattern layers 3 to 8 is formed of a conductor having a shape corresponding to the wiring pattern of each layer. The conductive pattern layers 3 to 8 are stacked with insulator layers 11 to 15 interposed therebetween. The insulator layers 11, 13, 15 are realized by, for example, a hard insulator substrate material used for a printed wiring board. Further, the insulator layers 12 and 14 are realized by prepreg. The prepreg is a sheet-like member obtained by immersing a resin in a base material such as a glass cloth and semi-curing the resin.

The conductive pattern layers 3 and 4 formed on one surface 11a and the other surface 11b of the insulator layer 11, respectively,
It is electrically connected via a via hole 17 penetrating through the insulator layer 11. Similarly, conductive pattern layers 5, 6; 7, 8 formed on one and other surfaces 13a, 13b; 15a, 15b of insulator layers 13, 15 respectively have via holes penetrating insulator layers 13, 15 respectively. 18, 19
Are electrically connected via Furthermore, the external conductive pattern layers 3 and 8 formed on one surface 1a and the other surface 1b of the multilayer wiring board 1 and exposed to the outside are electrically connected to each other through the through holes 20.
Penetrates through the insulator layers 11 to 15 and the conductive pattern layers 4 to 7.

FIG. 9 is a cross-sectional view of the substrate for explaining the steps of manufacturing the multilayer wiring board 1 of FIG. 8 step by step. First, as shown in FIG.
~ 23 are manufactured. The internal substrate 21 has one surface 11a and the other surface 1 of the insulator layer 11 formed of an insulator substrate material.
1b, a conductor film 24 and a conductive pattern layer 4 are respectively formed. The conductor film 24 is processed later to become the conductive pattern layer 3.

The conductive pattern layer 4 is formed by, for example, a subtractive method. In the subtractive method, first, a conductive thin film is formed on the other surface 11b of the insulator layer 11 to cover the entire surface of each surface. Next, a portion of the thin film other than a portion matching the desired wiring pattern is selectively removed by, for example, etching. Thereby, the conductor is left along the wiring pattern, and the conductive pattern layer is formed.

The conductor film 24 and the conductive pattern layer 4 are
They are electrically connected by through holes 25. The through hole 25 becomes the via hole 17 after the completion of the multilayer wiring board 1. The through-hole 25 is formed at the position where the through-hole 17 is to be formed in the insulator layer 11 by using a drill to penetrate from one surface 11a to the other surface 11b. Next, a thin film of a conductor is formed on the wall surface of the hole, and a through hole 25 is formed.

The internal substrates 22 and 23 are manufactured by the same method as the internal substrate 21. The internal substrate 22 includes one surface 13a and the other surface 1 of the insulator layer 13 of the insulator substrate material.
Conductive pattern layers 5 and 6 are respectively formed on 3b. In the internal substrate 23, the conductive pattern layer 7 and the conductive film 26 are formed on one surface 15a and the other surface 15b of the insulating layer 15 of the insulating substrate material. The conductive pattern layers 5 and 6, and the conductive pattern layer 7 and the conductor film 26 are electrically connected by through holes 27 and 28, respectively.

Subsequently, as shown in FIG. 9 (2), the other surface 21b of the internal substrate 21 and the one surface 22a of the internal substrate 22 are arranged to face each other with the insulating layer 12 made of a prepreg therebetween. Similarly, the other surface 22b of the internal substrate 22 and the one surface 23a of the internal substrate 23 are opposed to each other via the insulating layer 14 made of a prepreg. As a result, the internal substrates 21 to 23 are overlapped with the insulator layers 12 and 14 interposed therebetween. Overlaid internal substrates 21 and 2
3 is pressed in a direction indicated by arrow 29 from the outside of the substrate to the inside. As a result, the internal substrates 21 to 23 are bonded, and a multilayer substrate having six conductive layers is formed.

As shown in FIG. 9 (3), a through hole 20 penetrating through the insulator layers 11 to 15 is formed in the multilayer substrate. The through hole 20 is formed, for example, by drilling a hole penetrating from the conductor layer 24 side of the multilayer substrate to the conductor layer 8 side, and forming a conductor thin film on the wall surface of the hole.

Further, when the through holes 20 are formed, the conductor film 2 is formed using, for example, a subtractive method.
4 and 26 are processed to form conductive pattern layers 3 and 8.
Further, on one surface and the other surface of the multilayer substrate, an insulating protective film 30 is formed along the wiring patterns of the conductive pattern layers 3 and 8, for example, to prevent rust. Thereby, the conductor of the conductive pattern layer is electrically cut off from the outside. The multilayer wiring board 1 in which, for example, six conductors are stacked can be formed by the above-described method.

FIG. 10 is a sectional view showing a simplified structure of a multilayer wiring board 31 according to a second prior art. The multilayer wiring board 31 also has six conductive pattern layers. The multilayer wiring board 31 of FIG. 10 has a configuration similar to that of the multilayer wiring board 1 of FIG. 8, and the same components are denoted by the same reference numerals and description thereof will be omitted.

The multilayer wiring board 31 has six conductive pattern layers 3 to 8. These six conductive pattern layers 3 to 8
Are laminated with the insulator layers 33 to 37 interposed therebetween. The insulator layers 34, 36 are realized with a hard insulator substrate material. The insulator layers 33, 35, and 37 are realized by, for example, a pre-breg. The conductive pattern layers 4 and 5 are electrically connected via via holes 39. Similarly, conductive pattern layers 6 and 7 are electrically connected via via hole 40.

Such a multilayer wiring board 31 is produced as follows. First, for example, the insulator layers 33, 3
An internal substrate composed of the conductive pattern layers 4, 5 and the insulator layer 34 and an internal substrate composed of the conductive pattern layers 6, 7 and the insulator layer 36 are formed, respectively. Next, the inner substrates formed between the insulator layers 33, 35, and 37 are overlapped with each other interposed therebetween.
The layers are laminated by applying pressure from a direction perpendicular to the surface of each layer. Finally, one side 33a of the insulator layer 33 and the insulator layer 37
The conductive pattern layers 3 and 8 are formed on the other surface side 37b by using, for example, a subtractive method. Through hole 2
For example, at the stage where the respective layers are stacked, a hole penetrating from one side 33a of the insulator layer 33 to the other side 37b of the insulator layer 37 is formed using a drill, and a conductor is formed on the wall surface of the hole. It is formed by depositing a layer.

In the multilayer wiring board 1 as described above, the conductive pattern layers 3, 4; 5, 6; 7, 8 adjacent to each other via the insulating layers 11, 13, 15 in the internal substrates 21 to 23 are connected to the via holes 17. To 19 can be electrically connected. Further, the conductive pattern layer 3 on the one surface 1a side and the conductive pattern layer 8 on the other surface 1b side of the multilayer wiring board 1 can be electrically connected through the through hole 20. Therefore, a single electrically connected wiring circuit can be formed by combining the conductive pattern layers thus connected.

At this time, it is difficult to realize a configuration other than the above-mentioned connection relationship by electrically connecting via via holes. For example, it is difficult to electrically connect only conductor layer 3 and conductor layer 5. Also, the insulator layers 12 and 14 realized by the pre-breg
It is difficult to electrically connect adjacent conductive pattern layers 4, 5; 6, 7 through the via holes.
Therefore, among the conductive pattern layers of the multilayer wiring board 1, combinations of conductive pattern layers that can form a single wiring circuit are limited. Similarly, the multilayer wiring board 3 shown in FIG.
Also in 1, the combination of conductive pattern layers that can form a wiring circuit is limited.

In the manufacturing process of the multilayer wiring boards 1 and 31 described above, an inspection of the electrical connectivity for detecting the presence or absence of inconvenience such as disconnection, short circuit and contact failure of each of the conductive pattern layers 3 to 8 is performed. The electrical inspection is first performed before the laminating step shown in FIG. This inspection is performed, for example, by visually observing one surface and the other surface of the internal substrates 21 to 23,
Find short-circuits and poor contacts. For example, a visual inspection of such an internal board is performed by an AOI (Automatic Op
tical Inspector). Further, the terminal of the inspection device is brought into direct contact with the conductor of the conductive pattern layer, and an inspection signal is applied to check whether the conductor is conductive. In such a continuity test, for example, a bare board tester is used.

Furthermore, in the multilayer wiring board 1, for example, a wiring circuit in which the external conductive pattern layers 3 and 8 are electrically connected to the internal conductive pattern layers 4 to 7 through through holes 17 to 20 can be considered. For example, when foreign matter is mixed in the laminating step of the internal substrates 21 to 23, it is difficult to detect the inconvenience caused by the foreign matter only after the through-hole forming step. The electrical connectivity of this wiring circuit is also checked.

The inspection is performed after the formation of the conductive pattern layer outside the multilayer substrate and before performing a process such as a rust prevention treatment. For example, inconvenience that occurs in the laminating step and the through hole 20 forming step can be detected only after the forming step. In the test of the electrical connectivity at this stage, the terminals of the tester are brought into contact with the conductive pattern layers 3 and 8, respectively, and the inconvenience of the wiring circuit in which the conductive pattern layers 3 to 8 are electrically connected is detected.

In the inspection immediately after the above-described external forming step, the electrical connectivity of the entire wiring circuit including a plurality of conductive pattern layers can be inspected, but the internal conductive pattern layers 4 to 7 must be individually inspected. It is difficult to test the electrical connectivity of the vehicle.

If the above-described electrical connectivity test detects inconveniences such as disconnection, short-circuit and poor contact,
The specific occurrence location is identified and the cause of the inconvenience is investigated. Based on this result, the production line is improved so as not to cause inconvenience. Measures for the detected inconvenience need to be implemented immediately and reflected on the production line.

The determination of the electrical connectivity of the multilayer wiring board is performed by a continuity test using a tester. In a continuity test using a tester, it is possible to obtain information on whether or not a short circuit or other inconvenience has occurred in the wiring circuit connected between the terminals of the tester. Have difficulty. In order to identify a problematic portion in the continuity test, the wiring circuit is subdivided, and each subdivided circuit portion is connected between terminals of the tester to check for a short circuit. In addition, the continuity test often uses a visual inspection of the circuit. At this time, the circuit portion of each circuit must be exposed so that at least its ends can directly contact the terminals of the tester.

Since the external conductive pattern layers 3 and 8 and the through hole 20 can be visually and directly contacted with each other, any inconvenience occurring at this position can be easily determined by the above-described visual inspection and continuity inspection using a tester. As can be found, the inner conductive pattern layers 4-7 and via holes 17-19 have insulator layers 11-1 between them.
5 is interposed, it is difficult to contact the terminals of the tester. Therefore, in this case, a so-called destructive inspection is performed.

In the destructive inspection, each layer of the multilayer wiring board is polished and removed, and each layer is sequentially exposed. For example, if the external conductive pattern layers 3 and 8 are inspected for inconvenience only, the conductive pattern layer 3 and the insulator layer 11 are checked.
Is polished with a polishing machine until the internal conductive pattern layer 4 is exposed. A visual inspection and a continuity inspection are performed on the circuit portion of the conductive pattern layer 4 thus exposed. When the inspection on the inner conductive pattern layer 4 is completed, the inner conductive pattern layer 4 and the insulator layer 12 are polished to further expose the inner conductive pattern layer 5. Such inspection is repeated to inspect all the conductive pattern layers 3 to 8 for any inconvenience.

Since such a destructive inspection takes time, the planning of a countermeasure against the inconvenience is delayed. Therefore, it takes time to respond to the production line in order to remedy the found inconvenience. Therefore, it takes time to improve the production line, which may hinder the production plan of the multilayer wiring board.

For such a time-consuming inspection, as a multilayer wiring board capable of performing the inspection in a short time, the electrical connectivity of the internal conductive pattern layer is confirmed on a part of the internal conductive pattern layer. Multi-layer wiring board in which a through hole for inspection is formed is considered. In this multilayer wiring board, the terminals of the tester are connected to the external conductive pattern layer 3 which is the end of the wiring circuit in the board and the inspection through hole. Or 2 connected to a conductor of a different conductive pattern layer
Connected to two inspection through holes. This makes it possible to detect inconvenience such as a defect in the wiring circuit portion between the external conductive pattern layer and the inspection through hole and the wiring circuit portion between the two inspection through holes.

[0027]

Generally, the diameter of a through hole is larger than that of a via hole, so that the area occupied by the inspection through hole on the surface of the multilayer wiring board is increased. In general, the through hole has a large area occupied by a land, which is a conductor connected to both ends thereof, so that the area occupied on the substrate surface further increases. Since the inspection through-hole is independent of the wiring circuit itself in the multilayer wiring board, as the number of inspection through-holes increases, the effective area of the conductive pattern for the actual wiring circuit formed in the multilayer wiring board increases. Less.
This makes it difficult to increase the wiring density of the multilayer wiring board.

The inspection through hole is formed at a position electrically insulated from the remaining conductive pattern layers other than the desired conductive pattern layer to be connected to the inspection through hole. Therefore, the position where the inspection through hole is formed is limited.

Further, the through holes are formed by making holes in the substrate one by one using a drill, for example.
One grinding step is required for one through hole. That is, as the number of through holes increases, the number of grinding steps with a drill increases, and the manufacturing process of the multilayer wiring board becomes longer. The more the wiring circuit of the multilayer wiring board is subdivided, the more an inconvenient portion can be narrowed down. If the wiring circuit of the multilayer wiring board is subdivided and the inspection through-holes are connected to the respective subdivided circuit portions, the number of through-holes becomes extremely large, so that the number of drilling steps is greatly increased. By increasing the grinding process in this way,
The manufacturing time and manufacturing cost of a single multilayer wiring board increase.

An object of the present invention is to provide a multilayer wiring board capable of inspecting the electrical connectivity of an internal conductive pattern layer without performing a destructive inspection and achieving high density wiring. It is.

[0031]

SUMMARY OF THE INVENTION The present invention provides at least 3
The conductive pattern layers are laminated with an insulator layer interposed therebetween, and each conductive pattern layer is electrically connected to another conductive pattern layer via a via hole or a through hole formed in the insulator layer. The wiring board is electrically insulated from conductors of other conductive pattern layers other than the inner conductive pattern layer to be inspected for electrical connectivity, penetrates the insulator layer, and has one end on the outermost side of the multilayer wiring board. A multilayer wiring board having a via hole for inspection of an internal conductive pattern layer which is exposed on the surface and whose other end is electrically connected to a conductor of the internal conductive pattern layer to be inspected. According to the present invention, the multilayer wiring board is formed by laminating at least three conductive pattern layers with an insulator layer interposed therebetween. Each conductive pattern layer is electrically connected to another conductive pattern layer via a via hole or a through hole formed in the insulator layer. The through hole is a hole whose both ends are exposed on one surface and the other surface of the multilayer wiring board. On the other hand, a via hole is a hole in which at least one end is exposed or a hole in which both ends are not exposed. The through hole and the via hole are formed by forming a conductor film on the wall surface of a hole penetrating the insulator layer in a normal direction perpendicular to the layer surface. Through these holes, the conductors of each conductive pattern layer are electrically connected to form a wiring circuit. This wiring circuit is used, for example, as a wiring for transmitting an electric signal between components of an electronic circuit. Such a multilayer wiring board has an inspection via hole. The inspection via hole is provided for a continuity inspection to find inconveniences such as disconnection, short circuit, and contact failure of the internal conductive pattern layer and the via hole of the multilayer wiring board. The inspection via hole is provided separately from a wiring circuit that transmits an electric signal. That is, the inspection via hole penetrates the insulator layer between the conductive pattern layer to be inspected and the outermost surface of the multilayer wiring board, and one end thereof is exposed on the outermost surface of the multilayer wiring board,
The other end is electrically connected to a conductor of the inner conductive pattern layer to be inspected, and the inspection via hole is electrically insulated from a conductor of another conductive pattern layer other than the inner conductive pattern layer to be inspected. . Such an inspection via hole is a so-called blind via hole. In a manufacturing process of a multilayer wiring board, a continuity test of a wiring circuit of the board is performed at a stage where a plurality of conductive pattern layers are stacked via an insulator layer. For example, a continuity test using a tester is performed. In the conductivity test, an inspection signal is applied to one end of the multilayer circuit board of the wiring circuit to be inspected, which is exposed on one surface, and the signal is detected at the other end of the multilayer circuit board, which is exposed on one or the other surface. Check if you can. Such an inspection can be performed when the terminals of the tester can be brought into direct contact with both ends of the wiring circuit to be inspected. In this test, when no signal is detected at the other end of the circuit, it is determined that a problem has occurred at any location between the one end and the other end of the wiring circuit. In the conventional multilayer wiring board having no inspection via hole, it is difficult to detect where in the wiring circuit the problem occurs. That is, it is difficult to directly contact the terminals of the tester with the internal conductors and via holes of the internal conductive pattern layer of the wiring circuit.
Therefore, it is difficult to individually perform a continuity test on the internal conductive pattern layer. In order to identify the location where the inconvenience occurs, it is necessary to subdivide the wiring circuit, regard each wiring circuit portion as an independent wiring circuit, and apply a test signal to each of the divided wiring circuit portions. For this purpose, it is necessary to destroy the multilayer wiring board, and it takes time for inspection. In the multilayer wiring board of the present invention, the above-mentioned inspection via hole electrically connected only to the internal conductor to be inspected is formed. By applying an inspection signal between the inspection via hole and one or the other end of the wiring circuit, a continuity inspection between the inspection via hole and the wiring circuit can be performed. Further, when there are two inspection via holes, an inspection signal can be applied between the two inspection via holes to perform a continuity inspection between the two. Therefore, the continuity test can be individually performed on the internal conductor and the via hole of the internal conductive pattern layer. As a result, the wiring circuit can be subdivided and inspected, so that it is possible to easily specify a location where an inconvenience such as disconnection, short circuit, or poor contact occurs. In the continuity inspection using the inspection via hole, there is no need to break and expose the internal conductive pattern layer of the multilayer wiring board. therefore,
Since the conventional destructive inspection is not required, the inspection time can be reduced. In addition, the number of insulating layers penetrating the inspection via hole is smaller than that of the through hole, and the diameter of the hole is relatively small. Generally, the land of the via hole is smaller than the land of the through hole. Therefore, the area of the inspection hole occupying the surface of the multilayer wiring board can be reduced as compared with the case where the through hole is used as the inspection hole.

Further, according to the present invention, the other end of the inspection via hole preferably has an internal conductor to be inspected through an auxiliary conductor further formed on a surface of an insulator layer on which the internal conductive pattern layer to be inspected is formed. It is characterized by being connected to the conductor of the conductive pattern layer. According to the invention, the inspection via hole is connected to the internal conductor of the internal conductive pattern layer to be inspected via the auxiliary conductor. This auxiliary conductor is further formed on the surface of the insulator layer on which the inner conductive pattern layer to be inspected is formed. The inspection via hole penetrates from the internal conductor pattern layer to be inspected through the insulator layer between one surface or the other surface of the substrate in a direction normal to the layer surface. The inspection via hole must be insulated from the conductor of the conductive pattern layer on the insulator layer to be penetrated. Since the inspection via hole is connected to the internal conductor to be inspected via the auxiliary conductor, it can be formed regardless of the position of the internal conductor to be inspected. Therefore, the inspection via hole can be formed insulated from the conductor of the conductive pattern layer without changing the wiring pattern of the conductive pattern layer on the penetrated insulator layer.

Further, according to the present invention, at least three conductive pattern layers are laminated with an insulator layer interposed therebetween, and the conductive pattern layer is formed via another through-hole or a through-hole formed in the insulator layer. And a multi-layer wiring board electrically connected between layers, and electrically insulated from conductors of other conductive pattern layers other than the inner conductive pattern layer to be tested for electrical connectivity and penetrate the insulator layer. A multi-layer wiring board including one end exposed on the outermost surface of the multi-layer wiring board and the other end electrically connected to a conductor of the inner conductive pattern layer to be inspected, the via hole for inspection of the internal conductive pattern layer. Forming an internal substrate having a conductive pattern layer formed on one surface and the other surface of an insulating substrate, forming a photosensitive material film on at least one surface of the internal substrate, Exposure is performed using a mask having a pattern of via holes on which a photosensitive material film is to be formed, followed by development to form an insulator layer having holes, and a conductor film on the wall surfaces of the holes and the surface of the insulator layer. Forming, selectively removing the conductor film, forming a conductive pattern layer on the insulator layer, and forming a via hole in the insulator layer, the insulator layer thus formed And a conductive pattern layer are alternately laminated a predetermined number of times to form a multilayer wiring board, and in the laminating step, the inspection via holes formed in each of the insulator layers are overlapped as viewed from the normal direction of the surface. A method for manufacturing a multilayer wiring board, comprising: arranging and sequentially electrically connecting one end of the wiring board so as to be exposed on the outermost surface of the board. According to the present invention, the multilayer wiring board including the above-described inspection via hole is formed by using, for example, the photo VIA method. In the manufacturing process of a multilayer wiring board, first, an internal board is formed. The internal substrate is a wiring substrate having a conductive pattern layer formed on one surface and the other surface of an insulating substrate. The internal substrate is formed by a method equivalent to a general method for producing a double-sided wiring board. For example, a conductive thin film is formed on one surface and the other surface of an insulating substrate, and the thin film is selectively removed along a wiring pattern to form a conductive pattern layer. Also,
The conductive pattern layers formed on one and other surfaces of the internal substrate may be electrically connected by through holes penetrating the insulating substrate. In the finished product of the multilayer wiring board, this through hole becomes a via hole penetrating a single insulator layer. Alternatively, it becomes a part of a through hole or a via hole penetrating a plurality of insulator layers. After the formation of the internal substrate, an insulator layer is formed on at least one surface of the internal substrate. The insulator layer is formed by a photo VIA method. That is, to form an insulator layer, first, a photosensitive material film is formed on the surface of the internal substrate. Next, the photosensitive material film is exposed using a mask having a pattern of via holes to be formed, and then developed. The mask includes the pattern of all via holes that penetrate the insulator layer. When a through hole is formed in the multilayer wiring board, the mask may include the pattern of the through hole. For example,
When only the light-irradiated portion of the photosensitive material becomes insoluble in the developing solution, the mask illuminates all the via-hole portions penetrating the insulator layer. This forms an insulator layer having holes that should be all via holes or through holes that penetrate the layer. After the insulator layer is formed, the via hole and the conductive pattern layer are formed. The conductive pattern layer is formed using, for example, a subtractive method.
When forming the conductive pattern layer, first, a uniform conductive film is formed on the wall surfaces of the holes in the insulator layer and on the surface of the insulator layer. Next, the conductive film is selectively removed according to the wiring pattern of the conductive pattern layer and the pattern of the via hole. As a result, a conductor corresponding to the wiring pattern is left on the surface of the insulator layer, and a conductive pattern layer is formed on the insulator layer. In addition, a conductor layer is formed on the wall surfaces of the holes in the insulator layer. This conductor layer is electrically connected to the land left on the surface of the insulator layer. The land is a conductor left around the via hole on the insulator surface. Thus, a via hole is formed in the insulator layer. Through the above-described manufacturing process, a single-layer insulator layer and a conductive pattern layer on the surface thereof are formed. When the multilayer wiring board has three or more insulator layers and conductive pattern layers, the formed conductive layer is formed. The next insulator layer is formed over the pattern layer. In this way, when the process of forming the insulator layer and the conductive pattern layer is alternately repeated a predetermined number of times by the number of laminations of the insulator layer and the conductive pattern layer of the multilayer wiring board,
A desired multilayer wiring board can be manufactured. At this time, in order to form via holes and through holes penetrating the plurality of insulator layers, holes are provided in a normal direction perpendicular to the layer surface in each insulator layer forming step.
That is, the positions of the respective layers in the plane are matched. When the via holes formed by this method are electrically connected sequentially,
Via holes and through holes penetrating a plurality of layers can be formed. One end of the inspection via hole is exposed to the outermost surface of the substrate. In the conventional manufacturing method, via holes and through holes are formed by drilling holes in an insulator layer and then forming a conductor layer. Therefore, it is necessary to repeat the steps of forming holes as many as the number of holes.
Therefore, as the number of holes increases, the manufacturing time of the holes increases. In the manufacturing method of the present invention, the holes of the via holes penetrating the same conductor layer can be formed in one exposure and development step, and when the number of via holes increases, the individual masks can be changed simply by changing the mask. The number of repetitions of the process for forming holes in the insulator layer does not change. Therefore, even if the number of via holes increases, the time required for manufacturing the substrate does not increase. The number of the inspection via holes is so large that the location where the inconvenience occurs in the wiring circuit is strictly specified. When manufacturing a multilayer wiring board including such inspection via holes, if the above-described manufacturing method is used, it can be manufactured in a short time even if the number of via holes increases. Further, in the photo VIA method, via holes are formed by chemical treatment. The hole formed by such a method has a smaller diameter than the hole formed by the drill. Therefore, the area occupied by the via holes on the substrate surface can be further reduced, and the size of the multilayer wiring substrate can be reduced. Alternatively, it is possible to increase the density of the multilayer wiring board.

According to the present invention, there is provided a multi-layer wiring board in which at least three conductive pattern layers are laminated with an insulating layer interposed therebetween. An inspection conductor having an area, the inspection conductor being electrically isolated from a conductor constituting each conductive pattern layer, and being arranged so as to face each other with an insulating layer interposed therebetween, and one end portion having a multilayer structure. A multilayer wiring board characterized by including a plurality of via holes exposed at the outermost surface of the wiring board and having the other end electrically connected to each test conductor individually. According to the present invention, in the multilayer wiring board, at least three conductive pattern layers are laminated with an insulator layer interposed therebetween. An inspection conductor is formed on each of these conductive pattern layers. The test conductors are arranged so as to face each other with an insulator layer interposed therebetween, and are used for testing the electrical characteristics of the insulator layer between the test conductors. For example, the thickness of each of the insulator layers is a predetermined thickness, and an electrical inspection is performed to determine whether required insulation is secured. Alternatively, it is electrically inspected whether the thickness of each insulator layer is a predetermined thickness and is within a predetermined tolerance of capacitance. Each inspection conductor has the same area as each other, and is arranged so as to be electrically isolated from the conductors constituting each conductive pattern layer. The two test conductors and the insulator layer portion interposed therebetween are equivalent to a capacitor having a dielectric interposed between the electrodes. Therefore, this part is regarded as a virtual capacitor,
By measuring the capacitance of the capacitor, the distance between the test conductors, that is, the thickness of the insulator layer can be obtained. By providing such an inspection conductor, the thickness of the insulator layer can be inspected. In particular, when the insulator layer is formed by using the photo VIA method, the thickness of the insulator layer may vary. At this time, if the inspection conductor is formed, the thickness of the layer, that is, the insulation between the layers and the capacitance can be confirmed. Of the plurality of inspection conductors, the inspection conductor formed on each internal conductive pattern layer is electrically connected to the via hole. This via hole is a so-called blind via hole in which one end is exposed to the outermost surface of the multilayer wiring board and the other end is individually electrically connected to each test conductor. The inspection conductor may be formed on any of the external conductive pattern layer and the internal conductive pattern layer,
A signal can be directly applied electrically and detected from outside the substrate. Therefore, inspection is easy.

According to the present invention, the other end of the via hole is electrically connected to the inspection conductor via an auxiliary conductor further formed on the surface of the insulator layer on which each conductive pattern layer is formed. It is characterized by the following. According to the present invention, the other end of the via hole is electrically connected to the test conductor via an auxiliary conductor further formed on the surface of the insulator layer on which each conductive pattern layer is formed. Thus, the formation position of the via hole is not limited by the formation position of the inspection conductor. Therefore, the formation position of the via hole can be selected according to the wiring pattern of the conductive pattern layer.

[0036]

FIG. 1 is a sectional view showing a simplified structure of a multilayer wiring board 61 according to a first embodiment of the present invention. The multilayer wiring board 61 includes six conductive pattern layers 63.
~ 68. Between the conductive pattern layers 63 and 64;
65, 64, 66, 65, 67 and 66, 68
The insulator layers 71 to 75 are interposed between them. The conductive pattern layers 63 to 66 are internal conductive pattern layers. It is difficult for the internal conductive pattern layers 63 to 66 to be directly viewed and contacted from outside the multilayer wiring board 61. The conductive pattern layers 67 and 68 are external conductive pattern layers formed to be exposed on one surface 78 and the other surface 79 of the multilayer wiring board 61, respectively. The external conductive pattern layers 67 and 68 can be directly viewed and contacted from outside the multilayer wiring board 61.

Each of the conductive pattern layers 63 to 68 has 1
Alternatively, it is configured to include a plurality of conductors. Each conductor is arranged on a coordinate of the layer surface indicated by reference numeral 80 in two directions according to a desired wiring pattern. The wiring pattern differs for each conductive pattern layer. The two directions on the layer surface are denoted by reference numeral 80.
1A and a horizontal direction of the paper surface of FIG. 1 indicated by an arrow 80b.

The conductors 86, 8 of the external conductive pattern layer 67
7 and conductors 88, 89 of the external conductive pattern layer 68.
Are electrically connected via through holes 82 and 83, respectively. The through holes 82 and 83 are formed along the normal direction of the layer surface indicated by the arrow 81. One end of the conductor 90 of the conductive pattern layer 63 is further electrically connected to the through hole 82. The other end of conductor 90 of conductive pattern layer 63 and one end of conductor 91 of conductive pattern layer 64 are electrically connected by via hole 92. The other end of the conductive pattern layer 91 is
3 and is electrically connected. Further, the conductive pattern layer 63
The other end of the conductor 90 is electrically connected to the inspection via hole 93. The inspection via hole 93 is provided with the conductor 9
One end opposite to the end connected to 0 is exposed on one surface 78 of the multilayer wiring board 61. The through hole is obtained by depositing a conductor on the wall surface of a hole penetrating through all the insulator layers 71 to 75. The via hole is obtained by depositing a conductor on the wall surface of a hole penetrating only a desired layer among the insulator layers 71 to 75.

For example, in this multilayer wiring board 61,
The wiring circuit includes conductors 86, 90, 91, 89, a hole portion 95 between the conductor 86 of the through hole 82 and the conductor 90,
The through hole 83 includes a hole portion 96 between the conductor 91 and the conductor 89, and a via hole 92. The hole portion 95 is a part of the through hole 82 and indicates a portion from one end connected to the conductor 86 to a portion connected to the conductor 90. The electric signal given to the conductor 86 of the conductive pattern layer 67 is, for example, a hole portion 95, a conductor 90,
It is transmitted to the conductor 89 of the conductive pattern layer 68 via the via hole 92, the conductor 91, and the hole portion 96 in this order.

An inspection via hole 93 is connected to the other end of the conductor 90 connected to the via hole 92.
The inspection via hole 93 is a so-called blind via hole whose one end is exposed on one surface 78 of the substrate 61. The above-described wiring circuit includes the inspection via hole 9.
It can be divided into two wiring circuit portions at the point connected to 3. For example, the divided first wiring circuit portion includes conductors 86 and 90 and a hole portion 95. The divided second wiring circuit portion has a via hole 9
2, including conductors 91 and 89 and a hole portion 96.

The electrical connectivity test of the wiring circuit is performed by a continuity test using a test tool such as a tester. When the continuity test is performed, first, the conductors 86, 8
9 is brought into contact with a terminal of an inspection instrument, and an electrical signal is applied to one of the conductors 86 and 89. When the electrical connection of the wiring circuit is good and no inconvenience such as short circuit, disconnection, or contact failure occurs, the electric signal is transmitted from one of the conductors 86 and 89 to the other. When no electrical signal is transmitted, it is considered that at least one disadvantage has occurred in any of the wiring circuits.

Inconvenience occurring in the external conductive pattern layers 67 and 68 is detected by a conduction test and a visual inspection. The visual inspection is an inspection in which the conductor of the conductive pattern layer is directly visually observed to find a rupture, disconnection, or short circuit of the conductor.
For this inspection, for example, an optical image diagnostic apparatus called AOI is used. External conductive pattern layers 67, 68
The inconvenience occurring in the wiring including the conductive pattern layers 63 to 66 other than the above is detected by a continuity test. At this time, in order to identify which of these components has a problem, the configuration inside the substrate is subdivided and a continuity test is performed for each subdivided portion. At this time, each of the subdivided portions is individually supplied with an electric signal from an inspection instrument, and it is necessary to detect a signal transmitted in the portion.

Each of the divided wiring circuit portions described above is connected to the inspection via hole 93. That is, the conductor 8
6, 90, the hole portion 95, and the via hole 93 constitute one wiring circuit. Similarly, the inspection via hole 93, the via hole 92, the conductors 91 and 89, and the hole portion 96 constitute one wiring circuit. The ends of all of these wiring circuits are exposed on one of the one surface 78 and the other surface 79 of the multilayer wiring board 61. Therefore, these wiring circuits are provided from outside the multilayer wiring board 61.
For example, the terminals of an inspection device, which is a tester, can be brought into direct contact.

The wiring circuit of the multilayer wiring board 61 can be subjected to a continuity test for each of the divided wiring circuit portions.
Therefore, inconvenience occurring in the conductors 90 and 91 and via holes 92 formed inside the multilayer wiring board 61 in the wiring circuit can be easily and quickly inspected without breaking the multilayer wiring board 61.

The above-described multilayer wiring board 61 is manufactured by using, for example, a photo VIA method. In the photo VIA method, a photosensitive insulating material which becomes insoluble or soluble in a developing solution when irradiated with light is used as a material for the insulating layer. In the photo VIA method, when forming an insulator layer,
The thin film of the photosensitive insulator material is selectively irradiated with light and then immersed in a developer. As a result, the insulator film at the position where the via hole or the through hole is to be formed is selectively removed to form a hole. By covering the wall surfaces of the holes with a conductive material, through holes and via holes are formed.

FIG. 2 is a sectional view of the multilayer wiring board 101 showing via holes and through holes that can be formed by using the photo VIA method. This multilayer wiring board 1
Reference numeral 01 denotes a structure in which a plurality of insulator layers 102 are stacked, and a conductive pattern layer (not shown) is interposed between the insulator layers.

In the photo VIA method, for example, the blind via hole 10 penetrating only a single insulator layer 102 is used.
5 can be formed. The blind via hole is a via hole in which only one end of the hole reaches the outermost layer of the multilayer wiring board 101 and is exposed to the outside, and the other end of the hole reaches another insulating layer through which the hole does not penetrate. Further, the inner via hole 104 penetrating only the single insulator layer 102 can be formed. The inner via hole is a via hole whose one end and the other end respectively reach another insulator layer through which the hole does not penetrate.

Further, in the photo VIA method, each insulator layer 1
02, the via holes formed in each layer may be formed on the same line segment along the normal direction of the layer surface to form via holes penetrating a plurality of insulator layers. it can. That is, when the via holes penetrating a single layer are connected in the normal direction indicated by the arrow 81 and electrically connected, a via hole penetrating a plurality of layers can be formed.

Using this technique, for example, both the blind via hole 106 and the inner via hole 107 penetrating the plurality of insulator layers 102 can be manufactured. Furthermore, when via holes are formed at the same position on the surface of all the insulator layers 102, the substrate 1
01 from one side to the other side.
2 can be formed.

FIG. 3 is a cross-sectional view of the substrate for explaining step by step the manufacturing procedure of the multilayer wiring substrate 61 of FIG. In the multilayer wiring board 61 of the present embodiment, via holes and through holes are formed by using the photo VIA method.

First, the internal substrate 1 shown in FIG.
11 is formed. The internal substrate 111 has the conductive pattern layer 6 on one surface 113 and the other surface 114 of the insulator layer 71.
3, 64 are formed. In the insulator layer 71, a through hole 116 connecting the conductive pattern layers 63 and 64 is formed. This through hole 116 is formed as shown in FIG.
At the stage when the multilayer wiring board 61 shown in FIG. 1 is formed, it becomes a part of the via hole 92 and the through holes 82 and 83.

The through hole 116 is formed by the following method. First, a hole penetrating from one surface 113 to the other surface 114 is formed in the insulator layer 71 at a position where the through hole 116 is formed. A conductor film, for example, a metal film is formed on the wall surface of the hole, and the conductor is deposited on the wall surface. The through hole 116 is filled with a filler 118 when a conductive thin film or an insulating film is subsequently formed on one surface 113 and the other surface 114 of the insulator layer 71.

The conductive pattern layers 63 and 64 are formed by using, for example, a subtractive method. In the subtractive method, first, a conductive film having a uniform thickness is formed on one surface 113 and the other surface 114 of the insulator layer 71. The conductor film is selectively removed by using, for example, an etching method, and a conductor layer is left only in a desired portion. Thus, a conductive pattern layer including one or a plurality of conductors is formed. The conductor, which is the remaining conductor layer, is arranged on one surface 113 and the other surface 114 of insulator layer 71, for example, along the wiring pattern of the conductive pattern layer.

The formation of the conductive film for forming the conductive pattern layers 63 and 64 and the formation of the conductive film covering the wall surfaces of the through holes 116 may be performed simultaneously. That is,
At the stage when holes are formed in the insulator layer 71, a conductor film is formed on the surface of the insulator layer 71 and the wall surfaces of the holes. Of the conductor films, the film on the surface of the insulator layer 71 is selectively removed by a subtractive method to form a conductive pattern layer.
The conductor film covering the hole wall surface is left as it is. Also, one surface 113 and the other surface 114 around the end of the through hole
Is formed with a conductor called a land, and is electrically connected to the conductor on the wall surface of the hole 116. As a result, FIG.
The internal substrate 111 shown in (1) is formed.

Subsequently, as shown in FIG. 3B, photosensitive insulator films 124 and 125 are formed on one surface 122 and the other surface 123 of the internal substrate 111. Photosensitive insulator film 12
The photosensitive insulating material forming 4,125 cures when irradiated with light. These photosensitive insulator films 124 and 125 are
For example, only one of the part irradiated with light and the part not irradiated becomes insoluble in a developer described later. Either the light-irradiated part or the non-irradiated part becomes soluble in the developer. The photosensitive insulator films 124 and 125 become the insulator layers 72 and 73 in the multilayer wiring board of FIG. 1 described above.

The photosensitive insulator films 124 and 125 are formed as uniform films on one surface 122 and the other surface 123 of the internal substrate 111. The photosensitive insulator films 124 and 125
Is covered with a mask that transmits light only at positions corresponding to positions where via holes and through holes are to be formed, or a mask that transmits light only at the aforementioned positions. The photosensitive insulator films 124 and 125 are irradiated with light through this mask. After the light irradiation, the photosensitive insulator films 124 and 125
Is immersed in a developing solution. As a result, the photosensitive insulating material at the position where the through hole and the via hole are to be formed is removed, and a hole is formed at that position. The photosensitive insulating material other than the holes hardens when irradiated with light. Thus, the member shown in FIG. 3 (3) is formed.

Holes 12 formed in insulator layers 72 and 73
Among the holes 128 and 128, the hole 128 becomes a part of a through hole or a via hole penetrating through two or more insulator layers.
The hole 128 has a through hole 98a of the internal substrate 111,
It is formed at the same position as viewed from the normal direction of the layer surface. The through hole 98a is a through hole to be connected to the via hole formed from the hole 128.

After the insulator layers 72 and 73 are formed, one surface 133 of the insulator layer 72 is then formed as shown in FIG.
And a conductor film 13 on the other surface 133 of the insulator layer 73.
5,136 are formed. The conductor films 135 and 136
Are continuously formed on the wall surfaces and bottom surfaces of the holes 127 and 128 of the insulator layer 72. As a result, via holes 138 and 139 are formed. Also via hole 139
Are electrically connected to the through holes 118a of the internal substrate 111 via some conductors of the conductive pattern layer 63.

One surface 132 of insulator layer 72 and the other surface 133 of insulator layer 73 are covered with conductor films 135 and 136. The conductive films 135 and 136 are selectively removed using a subtractive method to form a conductive pattern. Further, in the multilayer wiring board 61 of the present embodiment, another conductive film is formed on the conductive films 135 and 136,
One conductive pattern layer is formed using the two conductive films.

When another conductive film is further formed on the conductive films 135 and 136, the via holes 138 and
139 is filled with the filling material 118 as shown in FIG. Thereby, the conductor films 135, 1
The exposed surface of 36 is flattened. Conductor film 135, 1
When the surface of the conductor film 36 is flattened, the conductor film 1 is further superimposed on the conductor films 135 and 136 as shown in FIG.
41 and 142 are formed.

The conductor films 135, 1 thus laminated
41; 136, 142 are each regarded as a single conductive film, and a part thereof is selectively removed by a subtractive method. Thus, as shown in FIG. 3 (7), the conductive pattern layer layers 65 and 66 are formed so as to overlap the one surface 132 of the insulator layer 72 and the other surface 133 of the insulator layer 73.

Further, in order to laminate the insulator layers 74 and 75 on the surface of this member, the manufacturing steps shown in FIGS. 3 (2) to 3 (3) are repeated. Thus, the insulator layer 74 is formed on one surface 144 of the conductive pattern layer 65. Similarly, an insulator layer 75 is formed on the other surface 145 of the conductive pattern layer 66. In order to further laminate the conductive pattern layers 67 and 68 on the surface of the member including the insulator layers 74 and 75, the manufacturing steps shown in FIGS. 3 (4) to 3 (7) are repeated.
Thereby, the six conductive pattern layers 63 to 63 shown in FIG.
A multilayer wiring board 61 having the wiring pattern 68 is formed.

As described above, in the photo VIA method, FIG.
By performing the exposure and development steps shown in (3) and the conductor film forming step shown in FIG. 3 (4) only once, a large number of via holes formed in the same insulator layer can be formed at once. Can be. In addition, the via holes penetrating through two or more insulator layers and the through holes penetrating all the insulator layers are formed when the positions of the via holes formed by the photo VIA method are viewed from the normal direction of the surface of each layer. Can be formed by sequentially making the positions within the same. Therefore, the same process as for a single via hole can be repeated a plurality of times to form multiple layers of via holes and through holes only by matching the position where the via hole is formed with the normal direction perpendicular to the layer surface. .

As described above, even if the number of the through holes and the via holes is increased, only the shape of the mask when exposing the photosensitive insulator film is changed, and other manufacturing steps are changed. Eliminates the need. Therefore,
The number of through holes and via holes can be easily increased. Moreover, even if the number of holes is increased, the manufacturing time can be made equal to that before the increase.

Further, in the photo VIA method, holes to be used as through holes and via holes are formed by chemical treatment of exposure and development. This hole is smaller in diameter than a hole formed using a drill used in the prior art to form a through hole.

For example, the minimum diameter of a hole formed by a drill is 0.35 mm in a mass production process. Holes smaller than this diameter are difficult to drill. For example,
Drills that drill holes less than 0.35 mm are extremely fragile. Also, as the thickness of the multilayer wiring board increases, it is necessary to increase the diameter of the drill. When the photo VIA method of the present embodiment is used, the diameter of the hole is 0.15 mm in the current mass production process. It is considered that this diameter can be reduced to about 0.05 mm in the future by improving the optical characteristics of the photosensitive material and the mask in the exposure step, for example.

Therefore, the hole formed by the photo VIA method occupies a small area on the substrate surface.
Therefore, the area occupied by the wiring circuit of the multilayer wiring board 61 of the present embodiment is smaller than that of the wiring circuit of the multilayer wiring board showing the same wiring pattern in the related art. Therefore, the density of the wiring pattern of the multilayer wiring board can be increased.

FIG. 4 is a sectional view showing a simplified configuration of a multilayer wiring board 151 according to a second embodiment of the present invention.
The multilayer wiring board 151 of FIG. 4 is similar to the multilayer wiring board 61 of FIG. 1, and the same components are denoted by the same reference numerals and description thereof will be omitted. The inspection via hole 153 of the multilayer wiring board 151 is electrically connected to the conductor 90 of the conductive pattern layer 63 via the auxiliary conductor 154.

For example, the inspection via hole 93 of the first embodiment shown by a two-dot chain line extends from the other end of the conductor 90 along the normal direction of the surface of the insulator layers 71 to 75.
It is formed toward one surface 156 of multilayer wiring board 151. At this time, the conductive pattern layer 6 on one surface 156 of the substrate
7 includes a conductor 158 formed at a position overlapping the other end of the conductor 90 when viewed from the normal direction of the layer surface.
This makes it impossible to form the inspection via hole 93 at this position.

The inspection via hole of this embodiment is electrically connected to the other end of the conductor 90 via the auxiliary conductor 154. Therefore, the inspection via hole 153 is
Regardless of the position of 0, the conductive pattern layers 65 and 67 can be formed so as to pass through a position where a conductor is not formed and be exposed on one surface 156. That is, the first
The inspection via hole 93 of the embodiment can be freely moved within the surface. Therefore, in order to provide the inspection via hole 153, the conductive pattern layers 63 to 68
This eliminates the need to change the wiring pattern. Therefore, the inspection via hole 153 can be formed without changing the design flexibility of the conductive pattern layers 63 to 68. The auxiliary conductor 154 is formed, for example, so as to be electrically insulated from other conductors other than the conductor 90 of the conductive pattern layer 63.

FIG. 5 is a sectional view showing a simplified configuration of a multilayer wiring board 161 according to a third embodiment of the present invention.
The multilayer wiring board 161 has a configuration similar to that of the multilayer wiring board 61 of FIG. 1, and the same components are denoted by the same reference numerals and description thereof will be omitted. In the multilayer wiring board 161 of this embodiment, an inspection via hole 163 is formed in addition to the inspection via hole 93.

One end of the inspection via hole 163 is
One end of conductor 91 connected to via hole 92 is electrically connected. The other end of the inspection via hole 163 penetrates through the insulator layers 73 and 75 and is exposed on the other surface 165 of the multilayer wiring board 161.

As a result, the above-described wiring circuit is composed of the conductors 86 and 90 and the hole portion 95 and the via hole 92.
And the conductors 91 and 89 and the hole portion 96. Therefore, the conductors 86 and 90, the hole portion 95, and the inspection via hole 93 constitute an inspection wiring circuit that can be contacted from outside the multilayer wiring board 161. The inspection via holes 93 and 163 and the via hole 92 constitute a wiring circuit for inspection that can be contacted from the outside. Further, the inspection via hole 163, the conductors 91 and 89, and the hole portion 96 constitute a wiring circuit for inspection that can be contacted from the outside.

The divided wiring circuits thus divided and accessible from the outside can be individually subjected to a continuity test using a tester. Therefore, conductor 9
0, 91 and via holes 92 can be individually tested for electrical connectivity. Inspection via hole 1
By increasing the number of 63, it is possible to more clearly determine the electrical connectivity of the conductors of the internal conductive pattern layer and the location of disadvantages such as disconnection and short circuit. For example, if any one of these wiring circuits has a problem such as disconnection, it can be determined that the problem occurs in the conductor of the internal conductive pattern layer included in the circuit.

FIG. 6 is a sectional view showing a simplified configuration of a multilayer wiring board 166 according to a fourth embodiment of the present invention. The multilayer wiring board 166 of FIG. 6 has a configuration similar to that of the multilayer wiring boards 61 and 151 of FIGS. 1 and 4, and the same components are denoted by the same reference numerals and description thereof is omitted. In the multilayer wiring board 166 of this embodiment, the holes for inspection are through holes.

One end of inspection through hole 167 is exposed on one surface 164 of multilayer wiring board 166, and the other end is exposed on the other surface 169 of substrate 166. One end and the other end of the inspection through hole 167 are exposed at positions electrically disconnected from the conductors forming the wiring patterns of the conductive pattern layers 67 and 68. The inspection through hole 167 is electrically connected only to the conductor 90 via the auxiliary conductor 154. Thus, the wiring circuit of the wiring board can be divided into a plurality of wiring circuits having at least one end connected to the inspection through hole.
Therefore, using such an inspection through hole, it is possible to inspect the conductors 90 and 91 and the via hole 92 for inconvenience such as short-circuit and disconnection, and for electrical connectivity.

FIG. 7 is a sectional view showing a simplified configuration of a multilayer wiring board 191 according to a fifth embodiment of the present invention.
The multilayer wiring board of FIG. 7 has a configuration similar to that of the multilayer wiring boards 61, 151, 161 and 166 of FIGS. 1 and 4 to 6, and the same components are denoted by the same reference numerals and description thereof is omitted. . This multilayer wiring board 191 has insulator layers 71 to 75
An inspection conductor for detecting the layer thickness of the test piece is provided.

The conductive pattern layers 63 to 68 are located at positions electrically insulated from the conductors of the conductive pattern layers,
The inspection conductor 1 is located at an overlapping position when viewed from the normal direction of each layer surface
93 to 198 are provided respectively. Inspection conductor 193
198 are conductors having the same area and the same shape, for example.
The inspection conductors 193 to 198 face each other with the insulator layers 71 to 75 interposed therebetween.

The conductors 193 to 196 formed on the inner conductive pattern layers 63 to 66 are connected to one ends of the inspection via holes 206 to 209 via the auxiliary conductors 201 to 204. The inspection via holes 206 and 208 are blind via holes exposed on one surface 211 of the multilayer wiring board 191, respectively. Inspection via hole 20
7 and 209, one end is the other surface 2 of the multilayer wiring board 191.
12 is a blind via hole. As a result, the conductors 193 to 198 are all
One outermost layer has its ends, and can be easily electrically contacted.

In the above-described multilayer wiring board, the insulating layer 71
It is necessary to keep the thickness of ~ 75 layers uniform. In this multilayer wiring board, when the test conductors of two adjacent conductive pattern layers face each other via the insulator layer, the facing portions are regarded as equivalent to a parallel plate capacitor. That is,
It is considered that a virtual parallel plate capacitor is formed by the inspection conductors facing each other via the single insulator layer among the inspection conductors 193 to 198. The insulator layer interposed between the conductors of the adjacent conductive pattern layers can be regarded as a dielectric interposed between the electrodes in the parallel plate capacitor.

In this virtual capacitor, the interval between the test conductors corresponding to the pair of electrodes is equal to the thickness of the insulator layer interposed therebetween. Further, the dielectric constant of the insulator layer varies depending on the thickness. Therefore, when the thicknesses of the insulator layers 71 to 75 interposed between the test conductors 193 to 198 are different, the capacity of this virtual capacitor is different. Therefore, if the area of the inspection conductors 193 to 198 and the dielectric constant of the material of the insulator layer are known, the capacitance of this virtual capacitor is measured to determine the interposed insulator layers 71 to 75.
Of the layer can be determined.

In particular, in the photo VIA method, the insulator layers 71 to 71
Since the layer 75 is formed by a method such as printing, the thickness of the insulator layers 71 to 75 tends to vary. By using such a method, it is possible to reliably inspect whether the thickness is uniform. Further, the inspection conductors 193 to 198 need to be formed at the same position on the layer surface. Inspection via hole 2 connected to internal inspection conductors 193 to 196
06 to 209 are connected via auxiliary conductors 201 to 204. Therefore, these inspection via holes 206 to
Regardless of the arrangement of the inspection conductors 193 to 198, the position where the conductor 209 is formed can be formed at a position where the conductor of each of the conductive pattern layers 63 to 68 is not formed. Therefore, it can be formed without changing the wiring patterns of the conductive pattern layers 63 to 68.

[0083]

As described above, according to the present invention, in the multilayer wiring board, at least three conductive pattern layers are laminated with an insulator layer interposed therebetween. The conductor of each conductive pattern layer is electrically connected to a conductor of another conductive pattern layer via a via hole or a through hole to form a wiring circuit.
An inspection via hole is electrically connected to the internal conductor of the wiring circuit. The wiring circuit is divided into a plurality of circuit portions between connection points of the inspection via hole. Disconnection, short-circuit,
The presence or absence of inconvenience such as poor contact is measured for each circuit portion. Therefore, it is possible to narrow down and specify the location where the inconvenience occurs in the wiring circuit down to the unit of the circuit part in which the wiring circuit is divided.

The inspection via hole is a blind via hole having one end exposed outside the substrate. Therefore, the inner conductor and the inner via hole of each wiring circuit portion can be electrically easily contacted from outside the substrate. Therefore, the continuity test for the circuit portion can be easily and individually performed from outside the substrate. Therefore, as compared with the conventional destructive inspection, the inspection time is shortened, and the location of the inconvenience is faster. As a result, it is possible to create a countermeasure for the found inconvenience in a short time and to improve the production line of the multilayer wiring board at an early stage.

Also, as the number of via holes for inspection increases,
The accuracy of specifying the location where the problem occurs is improved. At this time, the area occupied by the substrate surface in the via hole is smaller than that in the through hole. Therefore, the density of the substrate can be increased.

According to the present invention, the inspection via hole is connected to the internal conductor to be inspected via an auxiliary conductor formed on the same surface as the internal conductive pattern layer to be inspected. Thereby, the inspection via hole can be formed regardless of the position of the internal conductor to be inspected. Therefore, the inspection via hole can be formed without changing the wiring pattern of the penetrated conductive pattern layer. Therefore, the degree of freedom of the wiring pattern of the conductive pattern layer does not decrease.

Further, according to the present invention, the multilayer wiring board including the above-mentioned inspection via hole is formed by using, for example, the photo VIA method. The insulator layer of this multilayer wiring board is first exposed to a photosensitive material film formed on the surface of the internal substrate via a mask corresponding to the pattern of the via hole. When the material film after the exposure is developed, an insulator layer having a hole is formed in a portion corresponding to the pattern of the via hole. Subsequently, the conductive film formed on the insulator layer is selectively removed by a subtractive method according to a wiring pattern, thereby forming a conductive pattern layer. At the same time, a conductor layer is deposited on the wall surface of the hole to form a via hole. When the insulator layers and the conductive pattern layers formed in this manner are alternately laminated a predetermined number of times, a multilayer wiring board is formed.

In addition, the inspection via hole is used to determine the position of the via hole formed in the insulator layer through which the inspection hole passes.
They are arranged so as to overlap when viewed from the normal direction of the surface. Thus, each time a via hole is formed by laminating the insulator layers, the formed via hole is electrically connected to the via hole formed before this layer. When this operation is repeated up to the insulator layer on the outermost surface of the substrate, a blind via hole is formed.

In the above-described manufacturing process, a plurality of via holes can be formed at one time. Therefore, a substrate including a large number of inspection via holes can be formed in a short time. Therefore, manufacturing costs can be reduced. In addition, via holes formed by the photo VIA method have smaller hole diameters and land sizes than via holes formed by conventional drilling. Therefore, the area occupied by the inspection via hole on the substrate surface is small. Thereby, the density of the multilayer wiring board can be increased.

Further, according to the present invention, an inspection conductor for inspecting the thickness of each insulator layer is formed on the multilayer wiring board. The insulator layer portion interposed between the pair of test conductors can be regarded as a virtual capacitor. By measuring the capacitance of this virtual capacitor, the thickness of the insulator layer between the test conductors can be calculated. Photo VI
When the insulator layer is formed by the method A, the thickness of the insulator layer may vary. At this time, if the inspection conductor is formed, the thickness of the layer can be confirmed. therefore,
Quality inspection of manufactured products becomes easy. Further, the inspection conductor formed on each internal conductive pattern layer can be electrically contacted from outside the substrate via the blind via hole. Therefore, the inspection becomes easier.

Further, according to the present invention, the other end of the via hole is electrically connected to the inspection conductor via an auxiliary conductor further formed on the surface of the insulator layer on which the inspection conductor is formed. Connected. This eliminates the need to change the wiring pattern of the conductive pattern layer in consideration of the via hole arrangement position. Therefore, the degree of freedom of the wiring pattern can be maintained.

[Brief description of the drawings]

FIG. 1 is a multilayer wiring board 61 according to a first embodiment of the present invention;
It is sectional drawing which shows the simplified structure of FIG.

FIG. 2 is a cross-sectional view of a multilayer substrate showing via holes and through holes that can be formed by using a photo VIA method.

FIG. 3 is a cross-sectional view of the substrate for describing a procedure for manufacturing the multilayer wiring board 61 of FIG. 1 step by step.

FIG. 4 is a multilayer wiring board 15 according to a second embodiment of the present invention;
1 is a sectional view showing a simplified configuration of FIG.

FIG. 5 is a multilayer wiring board 16 according to a third embodiment of the present invention;
1 is a sectional view showing a simplified configuration of FIG.

FIG. 6 shows a multilayer wiring board 16 according to a fourth embodiment of the present invention.
6 is a sectional view showing a simplified configuration of FIG.

FIG. 7 is a multilayer wiring board 19 according to a fifth embodiment of the present invention;
1 is a sectional view showing a simplified configuration of FIG.

FIG. 8 is a cross-sectional view showing a simplified configuration of a multilayer wiring board 1 according to a first conventional technique.

FIG. 9 is a cross-sectional view of the substrate for explaining step by step the manufacturing process of manufacturing the multilayer wiring board 1 of FIG. 8;

FIG. 10 is a sectional view showing a simplified configuration of a multilayer wiring board 31 according to a second conventional technique.

[Explanation of symbols]

 61, 151, 161, 166 Multilayer wiring board 63, 64, 65, 66, 67, 68 Conductive pattern layer 71, 72, 73, 74, 75 Insulator layer 82, 83 Through hole 86, 89, 90, 91 Conductor 92 Via hole 93,153,163,167 Via hole for inspection

Claims (5)

(57) [Claims] At least three conductive pattern layers are laminated with an insulator layer interposed therebetween, and each conductive pattern layer is electrically connected to another conductive pattern layer via a via hole or a through hole formed in the insulator layer. In a multi-layer wiring board that is electrically connected between layers, it is electrically insulated from conductors of other conductive pattern layers other than the inner conductive pattern layer to be tested for electrical connectivity, penetrates the insulator layer, and has one end Characterized by having a via hole for inspection of an internal conductive pattern layer electrically exposed to the outermost surface of the multilayer wiring board and having the other end electrically connected to a conductor of the internal conductive pattern layer to be inspected. substrate. 2. The other end of the inspection via hole,
2. The conductor according to claim 1, wherein the conductor is connected to a conductor of the internal conductive pattern layer to be inspected via an auxiliary conductor further formed on a surface of the insulator layer on which the internal conductive pattern layer to be inspected is formed. Multilayer wiring board. 3. At least three conductive pattern layers are laminated with an insulator layer interposed therebetween, and the conductive pattern layer is electrically connected to another conductive pattern layer via via holes or through holes formed in the insulator layer. A multi-layer wiring board, which is electrically insulated from conductors of other conductive pattern layers other than the inner conductive pattern layer to be tested for electrical connectivity, penetrates the insulator layer, and has one end A method for manufacturing a multilayer wiring board including a via hole for inspection of an internal conductive pattern layer electrically connected to a conductor of the internal conductive pattern layer to be inspected at the other end and exposed at the outermost surface of the multilayer wiring board Forming an internal substrate having a conductive pattern layer formed on one surface and the other surface of an insulating substrate, forming a photosensitive material film on at least one surface of the internal substrate, And it developed after exposure using a mask having a pattern of via holes to be formed,
Forming an insulator layer having holes, forming a conductor film on the wall surfaces of the holes and the surface of the insulator layer, selectively removing the conductor film, and forming a conductive pattern layer on the insulator layer. And forming a via hole in the insulator layer, alternately laminating the insulator layer and the conductive pattern layer thus formed a predetermined number of times to form a multilayer wiring board. The inspection via holes formed in the insulator layer are arranged so as to overlap with each other when viewed from the normal direction of the surface, and are sequentially electrically connected, and one end thereof is formed so as to be exposed on the outermost surface of the substrate. A method of manufacturing a multilayer wiring board. 4. In a multilayer wiring board in which at least three conductive pattern layers are laminated with an insulator layer interposed therebetween, an inspection of the same area provided on each conductive pattern layer and inspecting electrical characteristics of the insulator layer. Test conductors, which are electrically isolated from the conductors constituting each conductive pattern layer and are arranged so as to face each other with an insulator layer interposed therebetween; A multilayer wiring board, comprising: a plurality of via holes exposed to the outermost surface and having the other end electrically connected to each of the test conductors individually. 5. The other end of the via hole is electrically connected to a test conductor via an auxiliary conductor further formed on an insulator layer surface on which each conductive pattern layer is formed. The multilayer wiring board according to claim 4, wherein