JPH10341079A - Multilayered wiring board and inspection thereof - Google Patents

Multilayered wiring board and inspection thereof

Info

Publication number
JPH10341079A
JPH10341079A JP9152133A JP15213397A JPH10341079A JP H10341079 A JPH10341079 A JP H10341079A JP 9152133 A JP9152133 A JP 9152133A JP 15213397 A JP15213397 A JP 15213397A JP H10341079 A JPH10341079 A JP H10341079A
Authority
JP
Japan
Prior art keywords
wiring board
inspection terminal
conductor
inspection
terminal conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9152133A
Other languages
Japanese (ja)
Inventor
Saburo Osawa
三郎 大沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9152133A priority Critical patent/JPH10341079A/en
Publication of JPH10341079A publication Critical patent/JPH10341079A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To enable inspection of conduction state, etc., of intermediate layers in a wiring board consisting of a multiplicity of wiring sheets. SOLUTION: A multiplicity of wiring sheets 2 to 7 having conductive parts 4a to 7a provided on their main surfaces are stacked. The front layer wiring sheets 2 and/or back layer wiring sheets 3 are formed with inspection conductive parts 8 to 11 which are electrically connected with their conductive layers via through-holes 12 to 16 which are insulated from the conductive parts of the other wiring sheets as associated with the intermediate layer wiring sheets 4 to 7. The inspection conductive parts 9 to 11 can be electrically isolated as associated with the intermediate layer wiring sheets 4 to 7.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、主面上に導体部が
形成された多数枚の配線板を積層してなる多層配線板及
びその検査方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board formed by laminating a large number of wiring boards each having a conductor portion formed on a main surface, and a method for inspecting the multilayer wiring board.

【0002】[0002]

【従来の技術】多層配線板は、一般に、銅張基板にエッ
チング処理等を施して回路パターン等の導体部を形成し
た所定枚数の配線板を積層するとともに、各層の導体部
間をスルーホールを介して適宜電気的に接続してなる。
スルーホールは、各配線板に形成された貫通孔に対し
て、電解銅メッキ処理、無電解銅メッキ処理や導電ペー
ストの印刷等の方法によってその孔壁を導電化して構成
する。
2. Description of the Related Art In general, a multilayer wiring board is formed by laminating a predetermined number of wiring boards in which conductor parts such as circuit patterns are formed by subjecting a copper-clad board to etching or the like, and forming through holes between conductor parts of each layer. It is electrically connected as appropriate.
The through hole is formed by making the hole wall conductive by a method such as electrolytic copper plating, electroless copper plating, or printing of a conductive paste with respect to the through hole formed in each wiring board.

【0003】ところで、配線板においては、特に高密度
化が図られる場合において、製造精度或いはマイグレー
ション等によって生じる導体部の短絡や断線或いはスル
ーホール内の断線等の問題が極めて重要となっており、
各導体部やスルーホールの導通検査及び信頼性評価が実
施されている。この配線板の導通検査には、一般に多数
個のコンタクトプローブを有する導通検査装置が用いら
れ、配線板に形成された導体部の適宜箇所にコンタクト
プローブを接触させた状態で電圧を印加し、その導通抵
抗値及び絶縁抵抗値を測定することによって行われる。
[0003] In the case of wiring boards, especially when high density is to be achieved, problems such as short-circuiting or disconnection of conductors caused by production accuracy or migration, or disconnection in through-holes have become extremely important.
Conduction inspection and reliability evaluation of each conductor portion and through hole are performed. A continuity inspection device having a large number of contact probes is generally used for the continuity inspection of the wiring board, and a voltage is applied in a state where the contact probes are in contact with appropriate portions of the conductor portion formed on the wiring board, and the voltage is applied. This is performed by measuring the conduction resistance value and the insulation resistance value.

【0004】また、配線基板の信頼性の評価は、スルー
ホールや導体部の導通抵抗及びパターン間、各層間或い
はスルーホール間の絶縁抵抗値の測定を可能とするテス
トパターンを作成し、このテストパターンに環境条件、
電気的機械的ストレスを加えて導通抵抗値や絶縁抵抗値
を測定することによって行われる。一方、多層配線板に
おいては、中間各層を構成する配線板を対象として、上
述した導通検査装置による直接の導通検査や信頼性評価
を実施することができない。このため、多層配線板の導
通検査や信頼性評価は、中間層を構成する配線板の導体
部を対象としてスルーホールを介して表面層や裏面層の
適宜の箇所に電気的に接続することによって行ってい
た。多層配線板は、中間層を構成する配線板の状態が目
視にて確認することができないために、不良個所の特定
ができなかった。
In order to evaluate the reliability of the wiring board, a test pattern which enables measurement of the conduction resistance of through holes and conductors and the insulation resistance between patterns, between layers or between through holes is prepared. Environmental conditions in the pattern,
The measurement is performed by applying an electromechanical stress and measuring a conduction resistance value or an insulation resistance value. On the other hand, in the case of a multilayer wiring board, it is not possible to directly conduct a continuity test or a reliability evaluation with the continuity test device described above on a wiring board constituting each intermediate layer. For this reason, the continuity inspection and reliability evaluation of the multilayer wiring board are performed by electrically connecting the conductor portion of the wiring board constituting the intermediate layer to an appropriate portion of the surface layer or the back surface layer through a through hole. I was going. In the multilayer wiring board, since the state of the wiring board forming the intermediate layer cannot be visually confirmed, a defective portion cannot be specified.

【0005】従来の多層配線板50は、上述した第1の
検査を実施するために、例えば図4に示すような構造が
採用されていた。すなわち、スルーホール検査用多層配
線板50は、同図(B)に示すように、それぞれの主面
に所定の回路パターン等が形成された第1層配線板51
乃至第6層配線板(最下層配線板)56を互いに厚み方
向に積層して一体化してなる。多層配線板50には、こ
れら第1層配線板51乃至最下層配線板56を貫通して
第1のスルーホール57a及び第2のスルーホール57
bが形成される。
[0005] The conventional multilayer wiring board 50 employs, for example, a structure as shown in FIG. 4 in order to perform the above-described first inspection. That is, as shown in FIG. 1B, the multilayer wiring board for through-hole inspection 50 includes a first-layer wiring board 51 having a predetermined circuit pattern or the like formed on each main surface.
The sixth to sixth layer wiring boards (lowest layer wiring boards) 56 are laminated and integrated in the thickness direction. In the multilayer wiring board 50, the first through hole 57a and the second through hole 57 penetrate through the first to lowermost wiring boards 51 to 56.
b is formed.

【0006】そして、第1層配線板51と最下層配線板
56には、同図(A)に示すように、それぞれの表裏主
面に第1の検査用端子導体部58a,59aと第2の検
査用端子導体部58b,59bとが形成される。これら
第1の検査用端子導体部58a,59aと第1のスルー
ホール57aとは、接続導体部58c,59cによって
それぞれ電気的に接続されている。同様に、第2の検査
用端子導体部58b,59bと第2のスルーホール57
bとは、接続導体部58d,59dによってそれぞれ電
気的に接続されている。
As shown in FIG. 1A, the first-layer wiring board 51 and the lowermost-layer wiring board 56 have first inspection terminal conductors 58a, 59a and second Inspection terminal conductor portions 58b and 59b are formed. The first inspection terminal conductors 58a, 59a and the first through hole 57a are electrically connected by connection conductors 58c, 59c, respectively. Similarly, the second inspection terminal conductors 58b, 59b and the second through hole 57
b is electrically connected to each other by connection conductors 58d and 59d.

【0007】第1のスルーホール57aは、第2層配線
板52乃至第5層配線板55の主面に形成された導体部
52a乃至55aと絶縁を保持されたクリアランスホー
ルとして構成されている。また、第2の第2のスルーホ
ール57bは、第2層配線板52乃至第5層配線板55
の主面に形成された導体部52a乃至55aと電気的に
接続されたスルーホールを構成している。
The first through hole 57a is formed as a clearance hole that is insulated from the conductors 52a to 55a formed on the main surfaces of the second to fifth wiring boards 52 to 55. Further, the second second through holes 57b are formed in the second to fifth wiring boards 52 to 55, respectively.
Are formed through-holes electrically connected to the conductors 52a to 55a formed on the main surface of the.

【0008】以上のように構成された多層配線板50
は、導通検査装置に装填され、第1層配線板51及び最
下層配線板56に形成された第1の検査端子導体部58
a,59aと第2の検査用端子導体部58b,59bと
の間に電圧V1が印加されて測定器により導通抵抗値或
いは絶縁抵抗値が測定される。多層配線板50は、例え
ば第1のスルーホール57a内に断線がある場合に、こ
れら第1の検査端子導体部58a,59a間における接
触抵抗値が無限大となって測定器によって所定の導通抵
抗値よりも大きな導通抵抗値が測定される。また、多層
配線板50は、第1のスルーホール57aに対して絶縁
を保持されるべき各導体部52a乃至55aがマイグレ
ーション等によって不正な短絡が生じた場合に、測定器
によって所定の導通抵抗値よりも小さな接触抵抗値が測
定される。なお、多層配線板50は、第1のスルーホー
ル57bを対象として第1のスルーホール57aと逆の
検査結果を得ることができる。
[0008] The multilayer wiring board 50 constructed as described above.
Are the first inspection terminal conductors 58 mounted on the continuity inspection device and formed on the first layer wiring board 51 and the lowermost layer wiring board 56.
a, 59a and the second inspection terminal conductors 58b, 59b, a voltage V1 is applied, and the measuring device measures the conduction resistance or the insulation resistance. For example, when there is a break in the first through hole 57a, the contact resistance between the first inspection terminal conductors 58a and 59a becomes infinite, and the multi-layer wiring board 50 has a predetermined conduction resistance by the measuring device. A conduction resistance value greater than the value is measured. In addition, when the conductor parts 52a to 55a to be kept insulated from the first through hole 57a cause an improper short circuit due to migration or the like, the multilayer wiring board 50 has a predetermined conduction resistance value by a measuring device. A smaller contact resistance value is measured. Note that the multilayer wiring board 50 can obtain an inspection result opposite to that of the first through hole 57a for the first through hole 57b.

【0009】また、従来の多層配線板60は、上述した
第2の検査を実施するために、例えば図5に示すような
構造が採用されていた。すなわち、中間層検査用多層配
線板60には、例えば同図(B)に示すように、それぞ
れ第1層配線板61乃至第6層配線板(最下層配線板)
66を貫通する第1のスルーホール67と第2のスルー
ホール68とが形成される。そして、第1層配線板61
には、同図(A)に示すように、その主面に第1の検査
用端子導体部69と第2の検査用端子導体部70とが形
成される。また、最下層配線板66には、同図(A)に
示すように、その主面に第3の検査用端子導体部71と
第4の検査用端子導体部72とが形成される。
The conventional multilayer wiring board 60 employs, for example, a structure as shown in FIG. 5 in order to perform the above-described second inspection. That is, as shown in FIG. 1B, for example, as shown in FIG. 3B, the multilayer wiring board for intermediate layer inspection 60 includes a first wiring board 61 to a sixth wiring board (lowermost wiring board).
A first through-hole 67 and a second through-hole 68 penetrating through 66 are formed. Then, the first layer wiring board 61
As shown in FIG. 1A, a first inspection terminal conductor portion 69 and a second inspection terminal conductor portion 70 are formed on the main surface thereof. Also, as shown in FIG. 3A, a third inspection terminal conductor portion 71 and a fourth inspection terminal conductor portion 72 are formed on the main surface of the lowermost wiring board 66.

【0010】第1の検査用端子導体部69と第1のスル
ーホール67とは、第1層配線板61の主面に形成した
第1の接続導体部69aを介して電気的に接続される。
第2の検査用端子導体部70と第2のスルーホール68
とは、第1層配線板61の主面に形成した第2の接続導
体部70aを介して電気的に接続される。同様に、第3
の検査用端子導体部71と第1のスルーホール67と
は、最下層配線板66の主面に形成した第3の接続導体
部71bを介して電気的に接続される。第4の検査用端
子導体部70bと第2のスルーホール68とは、最下層
配線板66の主面に形成した第4の接続導体部72bを
介して電気的に接続される。換言すれば、第1の検査用
端子導体部69と第3の検査用端子導体部71とは、第
1のスルーホール67を介して互いに電気的に接続され
ている。また、第2の検査用端子導体部70と第4の検
査用端子導体部70bとは、第2のスルーホール68を
介して互いに電気的に接続されている。
The first inspection terminal conductor 69 and the first through hole 67 are electrically connected via a first connection conductor 69 a formed on the main surface of the first-layer wiring board 61. .
Second inspection terminal conductor 70 and second through hole 68
Is electrically connected via a second connection conductor portion 70a formed on the main surface of the first-layer wiring board 61. Similarly, the third
The inspection terminal conductor portion 71 and the first through hole 67 are electrically connected via a third connection conductor portion 71b formed on the main surface of the lowermost wiring board 66. The fourth inspection terminal conductor portion 70b and the second through hole 68 are electrically connected via a fourth connection conductor portion 72b formed on the main surface of the lowermost wiring board 66. In other words, the first inspection terminal conductor 69 and the third inspection terminal conductor 71 are electrically connected to each other via the first through hole 67. Further, the second inspection terminal conductor 70 and the fourth inspection terminal conductor 70b are electrically connected to each other through the second through hole 68.

【0011】第1のスルーホール67は、図5(B)に
示すように、偶数層の第2層配線板62の導体部62a
及び第4層配線板64の導体部64aと電気的に短絡さ
れるとともに奇数層の第3層配線板63及び第5層配線
板65とはクリアランスホールを構成して絶縁が保持さ
れている。したがって、第1の検査用端子導体部69と
第3の検査用端子導体部71とは、第2層配線板62と
第4の配線板64との検査端子導体部を構成する。ま
た、第2のスルーホール68は、図5(B)に示すよう
に、奇数層の第3層配線板63の導体部63a及び第5
層配線板65の導体部65aと電気的に短絡されるとと
もに偶数層の第2層配線板62及び第4層配線板64と
はクリアランスホールを構成して絶縁が保持されてい
る。したがって、第2の検査用端子導体部70と第4の
検査用端子導体部72とは、第3層配線板63と第5の
配線板65との検査端子導体部を構成する。
As shown in FIG. 5B, the first through hole 67 is formed in the conductor portion 62a of the even-numbered second-layer wiring board 62.
In addition, it is electrically short-circuited with the conductor portion 64a of the fourth-layer wiring board 64, and the third-layer wiring board 63 and the fifth-layer wiring board 65 of the odd-numbered layers form clearance holes to maintain insulation. Therefore, the first inspection terminal conductor 69 and the third inspection terminal conductor 71 constitute an inspection terminal conductor of the second layer wiring board 62 and the fourth wiring board 64. As shown in FIG. 5B, the second through-hole 68 is formed between the conductor portion 63a of the odd-numbered third-layer wiring board 63 and the fifth through-hole.
The conductor portion 65a of the layer wiring board 65 is electrically short-circuited, and the even-numbered second-layer wiring board 62 and the fourth-layer wiring board 64 form a clearance hole to maintain insulation. Therefore, the second inspection terminal conductor 70 and the fourth inspection terminal conductor 72 form an inspection terminal conductor of the third layer wiring board 63 and the fifth wiring board 65.

【0012】以上のように構成された多層配線板60
は、導通検査装置に装填され、第1層配線板51の第1
の検査端子導体部69と最下層配線板66の第3の検査
用端子導体部71との間に電圧V20が印加されて測定
器によりその間の導通抵抗値が測定される。多層配線板
60は、第1のスルーホール67内及び第2層配線板6
2の導体部62a及び第4層配線板64の導体部64a
に断線がある場合に、測定器によって所定の導通抵抗値
よりも大きな導通抵抗値が測定される。また、多層配線
板60は、測定器により測定された導通抵抗値によっ
て、第2層配線板62の導体部62a或いは第4層配線
板64の導体部64aの耐マイグレーション性が測定さ
れる。
The multilayer wiring board 60 constructed as described above
Is loaded in the continuity inspection device, and the first
A voltage V20 is applied between the inspection terminal conductor 69 and the third inspection terminal conductor 71 of the lowermost wiring board 66, and the measuring device measures the conduction resistance therebetween. The multilayer wiring board 60 is provided in the first through hole 67 and in the second layer wiring board 6.
2 conductor part 62a and conductor part 64a of fourth layer wiring board 64
When there is a disconnection in the terminal, a measuring device measures a conduction resistance value larger than a predetermined conduction resistance value. In the multilayer wiring board 60, the migration resistance of the conductor 62a of the second wiring board 62 or the conductor 64a of the fourth wiring board 64 is measured based on the conduction resistance value measured by the measuring instrument.

【0013】多層配線板60は、第1層配線板51の第
2の検査端子導体部70と最下層配線板66の第4の検
査用端子導体部72との間に電圧V30が印加されて測
定器によりその間の導通抵抗値が測定される。多層配線
板60は、第2のスルーホール68内及び第3層配線板
63の導体部63a及び第5層配線板65の導体部65
aに断線がある場合に、測定器によって所定の導通抵抗
値よりも大きな導通抵抗値が測定される。また、多層配
線板60は、測定器により測定された導通抵抗値によっ
て、第3層配線板63の導体部63a或いは第5層配線
板65の導体部65aの耐マイグレーション性が測定さ
れる。
In the multilayer wiring board 60, a voltage V30 is applied between the second inspection terminal conductor 70 of the first wiring board 51 and the fourth inspection terminal conductor 72 of the lowermost wiring board 66. The measuring device measures the conduction resistance value therebetween. The multi-layered wiring board 60 is formed in the second through hole 68, the conductor portion 63 a of the third-layer wiring board 63 and the conductor portion 65 of the fifth-layer wiring board 65.
When there is a disconnection in a, the measuring device measures a conduction resistance value larger than a predetermined conduction resistance value. In the multilayer wiring board 60, the migration resistance of the conductor 63a of the third wiring board 63 or the conductor 65a of the fifth wiring board 65 is measured based on the conduction resistance value measured by the measuring instrument.

【0014】[0014]

【発明が解決しようとする課題】上述した従来の多層配
線板50,60においては、導通検査を実施することに
よってこれを構成する各層配線板51乃至56,61乃
至66の全体の絶縁抵抗値や耐マイグレーション性の測
定が可能とされる。しかしながら、従来の多層配線板5
0,60においては、中間層を構成する各配線板52乃
至55,62乃至65を対象として直接導通検査や信頼
性の評価を実施することができないため、これらに発生
した不正短絡や断線等の不良発生箇所を特定することが
極めて困難であった。
In the above-described conventional multilayer wiring boards 50 and 60, a continuity test is performed to determine the overall insulation resistance value of each of the layer wiring boards 51 to 56 and 61 to 66 constituting the wiring board. It is possible to measure migration resistance. However, the conventional multilayer wiring board 5
At 0 and 60, since it is not possible to directly conduct a continuity test or to evaluate the reliability of each of the wiring boards 52 to 55 and 62 to 65 constituting the intermediate layer, the occurrence of an improper short-circuit or disconnection, etc. occurring in these boards is not possible. It was extremely difficult to identify the location where the defect occurred.

【0015】例えば、従来の多層配線板の製造工程にお
いては、上述した導通検査によって全体の不良発生が確
認された場合に、各個別の配線板に対してそれぞれ導通
検査を実施するといった極めて面倒な作業が行われる。
勿論、多層配線板の製造工程では、多層化工程の前段で
各個別の配線板に対する検査を実施することも行われて
いるが、製造効率を低下させるとともに例えば不良の発
生が多層化工程に起因する場合には事前検査による確認
ができないために結局面倒な対応を行わなければならな
いといった問題があった。
For example, in the conventional manufacturing process of a multilayer wiring board, when the occurrence of an entire defect is confirmed by the above-described continuity test, a continuity test is performed on each individual wiring board, which is extremely troublesome. Work is performed.
Of course, in the manufacturing process of the multilayer wiring board, an inspection is performed on each individual wiring board at a stage prior to the multilayering process, but the manufacturing efficiency is reduced and, for example, the occurrence of defects is caused by the multilayering process. In such a case, there is a problem that a troublesome response must be taken because confirmation by a preliminary inspection cannot be performed.

【0016】したがって、本発明は、各個別の配線板に
おける絶縁抵抗、耐マイグレーション性の不良発生に際
して不良個所を簡単に特定可能とする多層配線板及びそ
の検査方法を提供することを目的に提案されたものであ
る。
Accordingly, the present invention has been proposed with the object of providing a multilayer wiring board capable of easily specifying a defective portion when an insulation resistance and migration resistance failure occurs in each individual wiring board, and an inspection method therefor. It is a thing.

【0017】[0017]

【課題を解決するための手段】この目的を達成する本発
明にかかる多層配線板は、表面層配線板及び/又は裏面
層配線板に、中間層を構成する各配線板に対応して、他
の中間層配線板の導体部に対して絶縁されたスルーホー
ルを介してそれぞれの導体部と電気的に接続されるとと
もに各中間層配線板に対応して電気的に分離可能な検査
端子導体部が形成されてなる。また、多層配線板は、表
面層配線板と裏面層配線板に、各中間層配線板の導体部
に対して絶縁されたスルーホールを介して電気的に接続
された第2の検査端子導体部がそれぞれ形成されてな
る。
According to the present invention, there is provided a multilayer wiring board which achieves the above object, comprises a surface layer wiring board and / or a rear layer wiring board, each of which corresponds to each wiring board constituting an intermediate layer. Inspection terminal conductor portion electrically connected to each conductor portion through a through hole insulated from the conductor portion of the intermediate layer wiring board and electrically separateable for each intermediate layer wiring board Is formed. The multilayer wiring board has a second inspection terminal conductor portion electrically connected to the surface layer wiring board and the back layer wiring board via a through hole insulated from the conductor portion of each intermediate layer wiring board. Are formed respectively.

【0018】以上のように構成された本発明にかかる多
層配線板によれば、検査端子導体部に電圧を印加して測
定器によって絶縁抵抗、耐マグレーション特性の測定及
び/又はスルーホールと各中間層配線板の導体部の短
絡、断線等の導通検査が行われる。多層配線板は、この
第1の検査によって所定の測定値が得られなかった場合
に、各中間層配線板のいずれかに不良発生箇所が存在す
ることが確認され、各中間層配線板に対応した検査端子
導体部を切り離すとともにこれらに順次電圧を印加して
第2の検査を実施することによって不良発生箇所が存在
する中間層配線板が容易に特定される。
According to the multilayer wiring board of the present invention configured as described above, a voltage is applied to the inspection terminal conductor portion, the insulation resistance and the anti-magnation property are measured by a measuring device, and / or the through-hole is measured. A continuity test such as a short circuit or disconnection of the conductor of the intermediate layer wiring board is performed. When a predetermined measurement value is not obtained by the first inspection, it is confirmed that a defective portion exists in any of the respective intermediate-layer wiring boards, and the multilayer wiring board corresponds to each of the intermediate-layer wiring boards. By cutting off the inspection terminal conductors and applying a voltage to them sequentially and performing the second inspection, the intermediate layer wiring board where the failure occurs is easily specified.

【0019】また、上述した本発明にかかる多層配線板
の検査方法は、表面層配線板及び/又は裏面層配線板
に、中間層を構成する各配線板に対応して、他の中間層
配線板の導体部に対して絶縁されたスルーホールを介し
てそれぞれの導体部と電気的に接続された検査端子導体
部が形成された多層配線板が用いられる。多層配線板の
検査方法においては、検査端子導体部に電圧を印加して
絶縁抵抗、耐マグレーション特性の測定及び/又は上記
スルーホールと配線板の導体部の短絡、断線等の導通検
査を行う全体測定工程と、この全体測定工程によって所
定の測定値が得られず各中間層配線板のいずれかに不良
箇所が存在することが確認された場合に、これら各中間
各層配線板にそれぞれ対応した個別検査端子導体部を選
択して順次電圧を印加し、絶縁抵抗、耐マグレーション
特性の測定及び/又はスルーホールと当該配線板の導体
部の短絡、断線等の導通検査を行う個別測定工程を実施
して不良発生箇所が存在する中間層配線板を特定する。
In the above-described method for inspecting a multilayer wiring board according to the present invention, the surface layer wiring board and / or the rear layer wiring board may include other intermediate layer wiring corresponding to each wiring board constituting the intermediate layer. A multilayer wiring board is used in which test terminal conductors are formed which are electrically connected to the conductors via through holes insulated from the conductors of the board. In a method for inspecting a multilayer wiring board, a voltage is applied to the inspection terminal conductor to measure insulation resistance and anti-magnation properties and / or to conduct a continuity inspection such as a short circuit or disconnection between the through hole and the conductor of the wiring board. In the overall measurement step, when a predetermined measurement value was not obtained by the overall measurement step and it was confirmed that a defective portion was present in any of the intermediate layer wiring boards, the intermediate layer wiring board corresponded to each of these intermediate layer wiring boards, respectively. An individual measurement step of selecting an individual inspection terminal conductor portion, sequentially applying a voltage, measuring insulation resistance and anti-magnation properties, and / or conducting a continuity inspection such as a short-circuit or disconnection between the through-hole and the conductor portion of the wiring board. The process is performed to identify the intermediate layer wiring board where the failure occurs.

【0020】[0020]

【発明の実施の形態】以下、本発明の実施の形態につい
て図面を参照して詳細に説明する。実施の形態として図
1乃至図3に示した多層配線板1は、第1層配線板(表
面層配線板)2と第6層配線板(裏面層配線板)3との
間に第2層配線板4乃至第5層配線板7からなる4枚の
中間層配線板を互いに厚み方向に一体に積層してなる6
層構成の多層配線板である。各配線板2乃至7は、例え
ば紙やガラス繊維等を素材としてエポキシ樹脂やフェノ
ール樹脂を浸潤させて加圧固化してなる基板の主面に銅
箔を接合してなる銅張基板に、エッチング処理等を施し
てそれぞれ適宜の回路パターン等の導体部2a乃至7a
を形成してなる。多層配線板1は、表面層配線板2と裏
面層配線板3との間に中間層配線板4乃至中間層配線板
7を挟み込んで一体化するとともに、図示しないスルー
ホールを介して各層間の所定の回路パターンを相互に電
気的に接続してなる。
Embodiments of the present invention will be described below in detail with reference to the drawings. The multilayer wiring board 1 shown in FIGS. 1 to 3 as an embodiment has a structure in which a second layer wiring board (front layer wiring board) 2 and a sixth layer wiring board (backside layer wiring board) 3 6 formed by integrally laminating four intermediate-layer wiring boards composed of wiring boards 4 to 5 to each other in the thickness direction
It is a multilayer wiring board having a layer configuration. Each of the wiring boards 2 to 7 is etched on a copper-clad board formed by bonding a copper foil to a main surface of a board obtained by infiltrating an epoxy resin or a phenol resin using paper, glass fiber, or the like as a material and solidifying by pressing. Conductor portions 2a to 7a of appropriate circuit patterns etc.
Is formed. The multilayer wiring board 1 is formed by sandwiching the intermediate layer wiring boards 4 to 7 between the surface layer wiring board 2 and the rear layer wiring board 3 so as to be integrated with each other. Predetermined circuit patterns are electrically connected to each other.

【0021】なお、多層配線板1は、各配線板2乃至7
を、一方の主面に回路パターン等の導体部が形成された
いわゆる片面配線板によって構成したが、表裏両主面に
導体部を形成してなる両面配線板によって構成してもよ
い。また、多層配線板1は、中間層配線板4乃至中間層
配線板7が、多層配線板によって構成されたものであっ
てもよい。多層配線板1は、その基本的な構成が、一般
に用いられている多層配線板と同様とされている。勿
論、多層配線板1は、6層構成に限定されるものではな
く、適宜の枚数の配線板を積層して構成され、さらに回
路パターンにはチップ部品等も実装さる。
The multilayer wiring board 1 is composed of wiring boards 2 to 7
Is constituted by a so-called single-sided wiring board having a conductor portion such as a circuit pattern formed on one main surface, but may be constituted by a double-sided wiring board having conductor portions formed on both front and back main surfaces. Further, in the multilayer wiring board 1, the intermediate wiring boards 4 to 7 may be configured by multilayer wiring boards. The basic configuration of the multilayer wiring board 1 is the same as that of a generally used multilayer wiring board. Of course, the multilayer wiring board 1 is not limited to the six-layer structure, but is formed by laminating an appropriate number of wiring boards, and furthermore, a chip component or the like is mounted on the circuit pattern.

【0022】多層配線板1には、例えば回路パターン等
が形成されない周辺領域等に位置して検査用端子導体部
が形成されている。表面層配線板2には、第1検査端子
導体部8と第2の検査端子導体部9とが形成されてい
る。また、裏面層配線板3には、第1検査端子導体部8
と後述する第1スルーホール12を介して電気的に接続
された第3検査端子導体部10と、第2検査端子導体部
9と後述する第2スルーホール13乃至第5スルーホー
ル16とを介して電気的に接続された第4検査端子導体
部11とが形成されている。
In the multilayer wiring board 1, an inspection terminal conductor is formed, for example, in a peripheral area where a circuit pattern or the like is not formed. A first inspection terminal conductor 8 and a second inspection terminal conductor 9 are formed on the surface layer wiring board 2. Also, the first inspection terminal conductor portion 8 is provided on the back layer wiring board 3.
And a third inspection terminal conductor 10 electrically connected to the second inspection terminal conductor 9 via a first through hole 12 to be described later, and a second through fifth through hole 16 to be described later. And a fourth inspection terminal conductor 11 electrically connected to the fourth inspection terminal conductor 11.

【0023】第1検査端子導体部8と第1スルーホール
12のランド12aとは、図2に示すように、接続導体
部8aを介して電気的に接続される。なお、第3検査端
子導体部10と第1スルーホール12のランド12b
も、接続導体部10aを介して電気的に接続される。第
1検査端子導体部8は、第2検査端子導体部9と電気的
絶縁が保持されて形成されている。同様に、第3検査端
子導体部10は、第4検査端子導体部11と電気的絶縁
が保持されて形成されている。
As shown in FIG. 2, the first inspection terminal conductor 8 and the land 12a of the first through hole 12 are electrically connected through the connection conductor 8a. The third inspection terminal conductor portion 10 and the land 12b of the first through hole 12
Are also electrically connected via the connection conductor 10a. The first inspection terminal conductor 8 is formed while maintaining electrical insulation from the second inspection terminal conductor 9. Similarly, the third inspection terminal conductor 10 is formed while maintaining electrical insulation from the fourth inspection terminal conductor 11.

【0024】中間配線板層を構成する第2層配線板4乃
至第5層配線板7は、図1に示すように、第1スルーホ
ール12に対して、それぞれの主面に形成された回路導
体部4a乃至回路導体部7aが互いに絶縁を保持された
クリアランスホールを構成している。したがって、第1
スルーホール12は、第2層配線板4乃至第5層配線板
7を貫通して表面層配線板2の第1検査端子導体部8と
裏面層配線板3の第3検査端子導体部10にのみ電気的
に接続されている。
As shown in FIG. 1, the second to fifth wiring boards 4 to 7 constituting the intermediate wiring board layer are formed on the respective main surfaces with respect to the first through holes 12. The conductor portion 4a to the circuit conductor portion 7a constitute a clearance hole in which insulation is maintained. Therefore, the first
The through hole 12 penetrates through the second to fifth wiring boards 4 to 5 to the first inspection terminal conductor part 8 of the surface layer wiring board 2 and the third inspection terminal conductor part 10 of the back layer wiring board 3. Only electrically connected.

【0025】中間配線板層を構成する第2層配線板4乃
至第5層配線板7は、図1に示すように、第2スルーホ
ール13乃至第5スルーホール16に対して、それぞれ
の回路導体部が選択的に接続されている。すなわち、第
2層配線板4は、第2スルーホール13を構成する貫通
孔の周囲に接続ランド部25が形成されることによって
回路導体部4aがこの第2スルーホール13と電気的に
接続されている。これによって、第2スルーホール13
は、表面層配線板2の第2検査端子導体部9と裏面層配
線板3の第4検査端子導体部11及び第2層配線板4の
回路導体部4aと電気的に接続されている。また、第3
層配線板5は、第3スルーホール14を構成する貫通孔
の周囲に接続ランド部26が形成されることによって回
路導体部5aがこの第3スルーホール14と電気的に接
続されている。これによって、第3スルーホール14
は、表面層配線板2の第2検査端子導体部9と裏面層配
線板3の第4検査端子導体部11及び第3層配線板5の
回路導体部5aと電気的に接続されている。
As shown in FIG. 1, the second to fifth wiring boards 4 to 7 constituting the intermediate wiring board layer have respective circuit boards with respect to the second through holes 13 to fifth through hole 16, respectively. The conductor is selectively connected. That is, in the second-layer wiring board 4, the circuit land 4 a is electrically connected to the second through-hole 13 by forming the connection land 25 around the through-hole forming the second through-hole 13. ing. Thereby, the second through hole 13
Are electrically connected to the second inspection terminal conductor 9 of the front layer wiring board 2, the fourth inspection terminal conductor 11 of the back layer wiring board 3, and the circuit conductor 4 a of the second layer wiring board 4. Also, the third
The circuit conductor 5a of the layer wiring board 5 is electrically connected to the third through-hole 14 by forming the connection land 26 around the through-hole constituting the third through-hole 14. Thereby, the third through hole 14 is formed.
Are electrically connected to the second inspection terminal conductor 9 of the surface layer wiring board 2, the fourth inspection terminal conductor 11 of the back layer wiring board 3, and the circuit conductor 5 a of the third layer wiring board 5.

【0026】同様に、第4層配線板6は、第4スルーホ
ール15を構成する貫通孔の周囲に接続ランド部27が
形成されることによって回路導体部6aがこの第4スル
ーホール15と電気的に接続されている。これによっ
て、第4スルーホール15は、表面層配線板2の第2検
査端子導体部9と裏面層配線板3の第4検査端子導体部
11及び第4層配線板6の回路導体部6aと電気的に接
続されている。さらに、第5層配線板7は、第5スルー
ホール16を構成する貫通孔の周囲に接続ランド部28
が形成されることによって回路導体部7aがこの第5ス
ルーホール16と電気的に接続されている。これによっ
て、第5スルーホール16は、表面層配線板2の第2検
査端子導体部9と裏面層配線板3の第4検査端子導体部
11及び第5層配線板7の回路導体部7aと電気的に接
続されている。
Similarly, in the fourth-layer wiring board 6, the connection land 27 is formed around the through hole constituting the fourth through-hole 15, so that the circuit conductor 6a is electrically connected to the fourth through-hole 15. Connected. Thus, the fourth through hole 15 is formed between the second inspection terminal conductor 9 of the front layer wiring board 2, the fourth inspection terminal conductor 11 of the back layer wiring board 3, and the circuit conductor 6 a of the fourth layer wiring board 6. It is electrically connected. Further, the fifth-layer wiring board 7 has connection lands 28 around the through holes constituting the fifth through holes 16.
Is formed, the circuit conductor portion 7a is electrically connected to the fifth through hole 16. As a result, the fifth through-hole 16 is formed between the second inspection terminal conductor 9 of the front layer wiring board 2, the fourth inspection terminal conductor 11 of the rear layer wiring board 3, and the circuit conductor 7 a of the fifth layer wiring board 7. It is electrically connected.

【0027】ところで、第2検査端子導体部9は、図2
に示すように、第2スルーホール13に対応する第1個
別検査端子導体部17と、第3スルーホール14に対応
する第2個別検査端子導体部18と、第4スルーホール
15に対応する第3個別検査端子導体部19及び第5ス
ルーホール16に対応する第4個別検査端子導体部20
とがそれぞれ接続導体部29乃至接続導体部31を介し
て電気的に一体に接続されてなる。これら接続導体部2
9乃至接続導体部31は、切断可能に構成されており、
第1個別検査端子導体部17乃至第4個別検査端子導体
部20を個別の検査端子導体部として構成する。
By the way, the second inspection terminal conductor 9 corresponds to FIG.
As shown in the figure, the first individual inspection terminal conductor 17 corresponding to the second through hole 13, the second individual inspection terminal conductor 18 corresponding to the third through hole 14, and the fourth individual inspection terminal conductor 18 corresponding to the fourth through hole 15. Third individual inspection terminal conductor 19 corresponding to third individual inspection terminal conductor 19 and fifth through hole 16
Are electrically connected integrally via the connection conductors 29 to 31 respectively. These connecting conductors 2
9 to the connection conductor portion 31 are configured to be cuttable,
The first to fourth individual inspection terminal conductors 17 to 20 are configured as individual inspection terminal conductors.

【0028】第1個別検査端子導体部17は、接続導体
部17aを介して第2スルーホール13のランド13a
と電気的に接続されている。また、第2個別検査端子導
体部18は、接続導体部18aを介して第3スルーホー
ル14のランド14aと電気的に接続されている。第3
個別検査端子導体部19は、接続導体部19aを介して
第4スルーホール15のランド15aと電気的に接続さ
れている。さらに、第4個別検査端子導体部20は、接
続導体部20aを介して第5スルーホール16のランド
16aと電気的に接続されている。
The first individual inspection terminal conductor 17 is connected to the land 13a of the second through hole 13 via the connection conductor 17a.
Is electrically connected to Further, the second individual inspection terminal conductor 18 is electrically connected to the land 14a of the third through hole 14 via the connection conductor 18a. Third
The individual inspection terminal conductor 19 is electrically connected to the land 15a of the fourth through hole 15 via the connection conductor 19a. Further, the fourth individual inspection terminal conductor 20 is electrically connected to the land 16a of the fifth through hole 16 via the connection conductor 20a.

【0029】同様に、第4検査端子導体部11は、図2
に示すように、第2スルーホール13に対応する第1個
別検査端子導体部21と、第3スルーホール14に対応
する第2個別検査端子導体部22と、第4スルーホール
15に対応する第3個別検査端子導体部23及び第5ス
ルーホール16に対応する第4個別検査端子導体部24
とがそれぞれ接続導体部32乃至接続導体部34を介し
て電気的に一体に接続されてなる。これら接続導体部3
2乃至接続導体部34は、切断可能に構成されており、
第1個別検査端子導体部21乃至第4個別検査端子導体
部24を個別の検査端子導体部として構成する。
Similarly, the fourth inspection terminal conductor portion 11 is
As shown in FIG. 5, the first individual inspection terminal conductor 21 corresponding to the second through-hole 13, the second individual inspection terminal conductor 22 corresponding to the third through-hole 14, and the fourth individual inspection terminal conductor 22 corresponding to the fourth through-hole 15. Third individual inspection terminal conductor portion 24 corresponding to third individual inspection terminal conductor portion 23 and fifth through hole 16
Are electrically and integrally connected via the connection conductor portions 32 to 34, respectively. These connecting conductors 3
The second to connection conductors 34 are configured to be cuttable,
The first individual inspection terminal conductor 21 to the fourth individual inspection terminal conductor 24 are configured as individual inspection terminal conductors.

【0030】第1個別検査端子導体部21は、接続導体
部21aを介して第2スルーホール13のランド13b
と電気的に接続され、表面層配線板2側の第1個別検査
端子導体部17と対をなす。また、第2個別検査端子導
体部22は、接続導体部22aを介して第3スルーホー
ル14のランド14bと電気的に接続され、表面層配線
板2側の第2個別検査端子導体部18と対をなす。さら
に、第3個別検査端子導体部23は、接続導体部23a
を介して第4スルーホール15のランド15bと電気的
に接続され、表面層配線板2側の第3個別検査端子導体
部19と対をなす。さらにまた、第4個別検査端子導体
部24は、接続導体部24aを介して第5スルーホール
16のランド16bと電気的に接続され、表面層配線板
2側の第4個別検査端子導体部20と対をなす。
The first individual inspection terminal conductor 21 is connected to the land 13b of the second through hole 13 via the connection conductor 21a.
Electrically connected to the first individual inspection terminal conductor 17 on the surface layer wiring board 2 side. The second individual inspection terminal conductor 22 is electrically connected to the land 14b of the third through hole 14 via the connection conductor 22a, and is connected to the second individual inspection terminal conductor 18 on the surface layer wiring board 2 side. Make a pair. Further, the third individual inspection terminal conductor portion 23 includes a connection conductor portion 23a.
And is electrically connected to the land 15b of the fourth through hole 15 via the third through hole 15, and forms a pair with the third individual inspection terminal conductor 19 on the surface layer wiring board 2 side. Furthermore, the fourth individual inspection terminal conductor portion 24 is electrically connected to the land 16b of the fifth through hole 16 via the connection conductor portion 24a, and the fourth individual inspection terminal conductor portion 20 on the surface layer wiring board 2 side. Pair with.

【0031】以上のように構成された多層配線板1は、
導通検査装置に装填され、図3に示すように、表面層配
線板2の第1検査端子導体部8と裏面層配線板3の第3
検査用端子導体部10との間に電圧V1が印加されて測
定器により導通抵抗値が測定される。多層配線板1は、
スルーホール12内に断線がある場合に、これら第1検
査端子導体部8と第3検査用端子導体部10との間の接
触抵抗値が無限大となるために測定器に所定の導通抵抗
値よりも大きな導通抵抗値が測定される。また、多層配
線板1は、スルーホール12に対して絶縁を保持される
べき中間層を構成する配線板4乃至配線板7の各導体部
4a乃至導体部7aがマイグレーション等によって不正
な短絡が生じた場合に、測定器に所定の導通抵抗値より
も小さな接触抵抗値が測定される。
The multilayer wiring board 1 configured as above is
As shown in FIG. 3, the first inspection terminal conductor portion 8 of the surface layer wiring board 2 and the third inspection terminal
A voltage V1 is applied between the test terminal conductor portion 10 and the measuring device measures the conduction resistance. The multilayer wiring board 1
When there is a break in the through-hole 12, the contact resistance between the first inspection terminal conductor 8 and the third inspection terminal conductor 10 becomes infinite, so that the measurement device has a predetermined conduction resistance. A larger conduction resistance value is measured. Further, in the multilayer wiring board 1, the conductors 4a to 7a of the wiring boards 4 to 7 constituting the intermediate layer to be kept insulated from the through-holes 12 cause an improper short circuit due to migration or the like. In this case, a contact resistance value smaller than a predetermined conduction resistance value is measured by the measuring instrument.

【0032】一方、多層配線板1は、表面層配線板2の
第2検査端子導体部9と裏面層配線板3の第4検査用端
子導体部11との間に電圧V2が印加されて測定器によ
り導通抵抗値が測定される。多層配線板1は、中間層を
構成する各配線板4乃至配線板7の各回路導体部4a乃
至回路導体部7aにマイグレーション等によって不正な
短絡等が生じた場合に、測定器によって所定の導通抵抗
値よりも小さな接触抵抗値が測定される。したがって、
多層配線板1は、中間層を構成する各配線板4乃至配線
板7のいずれかに不良個所が存在することが確認され
る。また、多層配線板1は、測定器によって所定の導通
抵抗値が測定された場合に、良品として判定される。
On the other hand, the multilayer wiring board 1 is measured by applying a voltage V2 between the second inspection terminal conductor 9 of the front layer wiring board 2 and the fourth inspection terminal conductor 11 of the back layer wiring board 3. The continuity resistance value is measured by the device. The multilayer wiring board 1 is provided with a predetermined conduction by a measuring device when an improper short circuit or the like occurs due to migration or the like in each of the circuit conductors 4a to 7a of each of the wiring boards 4 to 7 constituting the intermediate layer. A contact resistance value smaller than the resistance value is measured. Therefore,
It is confirmed that the multilayer wiring board 1 has a defective portion in any of the wiring boards 4 to 7 constituting the intermediate layer. The multilayer wiring board 1 is determined to be non-defective when a predetermined conduction resistance value is measured by a measuring device.

【0033】多層配線板1は、上述した第1の検査によ
って、中間層を構成する各配線板4乃至配線板7のいず
れかに不良個所が存在することを確認した場合に、これ
ら各配線板4乃至配線板7を対象とした個別検査が行わ
れる。多層配線板1は、第2の検査端子導体部9を構成
する第1個別検査端子導体部17乃至第4個別検査端子
導体部20及び第4の検査端子導体部11を構成する第
1個別検査端子導体部21乃至第4個別検査導体部24
が、接続導体部29乃至接続導体部31及び接続導体部
32乃至接続導体部34を切断されて互いに電気的に分
離される。
When it is confirmed by the above-described first inspection that any of the wiring boards 4 to 7 constituting the intermediate layer has a defective portion, the multilayer wiring board 1 An individual inspection is performed on the circuit boards 4 to 7. The multilayer wiring board 1 has a first individual inspection terminal conductor portion 17 to a fourth individual inspection terminal conductor portion 20 constituting the second inspection terminal conductor portion 9 and a first individual inspection constituting the fourth inspection terminal conductor portion 11. Terminal conductor 21 to fourth individual inspection conductor 24
However, the connection conductors 29 to 31 and the connection conductors 32 to 34 are cut and electrically separated from each other.

【0034】多層配線板1は、図3に示すように、分離
された表面層配線板2の第1個別検査端子導体部17と
裏面層配線板3の第1個別検査端子導体部21との間に
電圧V3が印加されて測定器により導通抵抗値が測定さ
れる。多層配線板1は、第2層配線板4の回路導体部4
aにマイグレーション等によって不正な短絡等が生じた
場合に、測定器によって所定の導通抵抗値よりも小さな
接触抵抗値が測定されることから、この第2層配線板4
に不良個所が存在することが確認される。
As shown in FIG. 3, the multilayer wiring board 1 is formed by a first individual inspection terminal conductor 17 of the separated front layer wiring board 2 and a first individual inspection terminal conductor 21 of the back layer wiring board 3. During this time, the voltage V3 is applied and the measuring device measures the conduction resistance value. The multilayer wiring board 1 is composed of the circuit conductor 4 of the second layer wiring board 4.
a, a contact resistance value smaller than a predetermined conduction resistance value is measured by a measuring device when an illegal short circuit or the like occurs due to migration or the like in the second wiring board 4.
It is confirmed that a defective portion exists.

【0035】同様に、多層配線板1は、表面層配線板2
の第2個別検査端子導体部18と裏面層配線板3の第2
個別検査端子導体部22との間に電圧V4が印加されて
測定器により導通抵抗値が測定される。また、多層配線
板1は、表面層配線板2の第3個別検査端子導体部19
と裏面層配線板3の第3個別検査端子導体部23との間
に電圧V5が印加されて測定器により導通抵抗値が測定
される。さらに、多層配線板1は、表面層配線板2の第
4個別検査端子導体部20と裏面層配線板3の第4個別
検査端子導体部24との間に電圧V6が印加されて測定
器により導通抵抗値が測定される。多層配線板1は、こ
の検査によって、不良個所が第2層配線板4乃至第5層
配線板7のいずれかに存在するかを非破壊検査によって
素早く特定される。
Similarly, the multilayer wiring board 1 comprises a surface layer wiring board 2
Of the second individual inspection terminal conductor portion 18 and the second
A voltage V4 is applied between the conductor 22 and the individual inspection terminal conductor portion 22, and the continuity resistance value is measured by the measuring instrument. In addition, the multilayer wiring board 1 is provided with the third individual inspection terminal conductor 19 of the surface layer wiring board 2.
A voltage V5 is applied between the third individual inspection terminal conductor portion 23 of the back surface wiring board 3 and the conduction resistance value is measured by the measuring instrument. Further, in the multilayer wiring board 1, the voltage V6 is applied between the fourth individual inspection terminal conductor section 20 of the front layer wiring board 2 and the fourth individual inspection terminal conductor section 24 of the back layer wiring board 3, and the measuring instrument is used. The conduction resistance is measured. With this inspection, the multilayer wiring board 1 is quickly identified by non-destructive inspection as to whether a defective portion exists in any of the second to fifth wiring boards 4 to 5.

【0036】なお、上述した多層配線板1においては、
表面層配線板2と裏面層配線板3とに対をなす第1の検
査端子導体部8と第3の検査端子導体部10及び第2の
検査導体部9と第4の検査端子導体部11とを形成する
ようにしたが、例えば表面層配線板2或いは裏面層配線
板3の別箇所にコモン端子導体部を形成してこのコモン
端子導体部と第1の検査端子導体部8或いは第2の検査
導体部9の間に検査電圧が印加されるように構成しても
よい。
In the multilayer wiring board 1 described above,
First inspection terminal conductor 8 and third inspection terminal conductor 10 and second inspection conductor 9 and fourth inspection terminal conductor 11 forming a pair with front surface wiring board 2 and back surface wiring board 3. However, for example, a common terminal conductor is formed in another portion of the surface layer wiring board 2 or the back layer wiring board 3, and the common terminal conductor and the first inspection terminal conductor 8 or the second inspection terminal conductor 8 are formed. The inspection voltage may be applied between the inspection conductors 9 of the above.

【0037】また、多層配線板1は、第2の検査導体部
9と第4の検査端子導体部11とを、接続導体部29乃
至接続導体部31及び接続導体部32乃至34によって
それぞれ分離可能な個別検査端子導体部17乃至個別検
査端子導体部20及び個別検査端子導体部21乃至個別
検査端子導体部24を一体化して構成したが、これらを
互いに独立して構成してもよい。この場合、多層配線板
1は、第1の検査端子導体部8と第3の検査端子導体部
10とによって、短絡検査と切断検査とが行われて全体
の不良個所の有無が検査される。
In the multilayer wiring board 1, the second inspection conductor 9 and the fourth inspection terminal conductor 11 can be separated from each other by the connection conductors 29 to 31 and the connection conductors 32 to 34. Although the individual test terminal conductors 17 to 20 and the individual test terminal conductors 21 to 24 are integrally formed, they may be formed independently of each other. In this case, the multilayer wiring board 1 is subjected to the short-circuit inspection and the cut inspection by the first inspection terminal conductor portion 8 and the third inspection terminal conductor portion 10 to inspect the presence or absence of the entire defective portion.

【0038】[0038]

【発明の効果】以上詳細に説明したように、本発明に係
る多層配線板によれば、中間層を構成する各配線板の検
査端子導体部が表面層配線板及び/又は裏面層配線板に
形成されていることから、これらの検査端子導体部を介
して各中間層配線板の絶縁抵抗、耐マグレーション特性
の測定を行うことができ、これによって不良発生箇所を
極めて容易に特定することが可能となる。
As described above in detail, according to the multilayer wiring board of the present invention, the inspection terminal conductor of each wiring board constituting the intermediate layer is formed on the surface layer wiring board and / or the back layer wiring board. Since it is formed, it is possible to measure the insulation resistance and the anti-magnation property of each intermediate-layer wiring board via these inspection terminal conductors, thereby making it possible to extremely easily identify a defective portion. It becomes possible.

【0039】また、本発明に係る多層配線板の検査方法
によれば、中間層を構成する各配線板の検査端子導体部
が表面層配線板及び/又は裏面層配線板に形成された多
層基板が用いられて、各検査端子導体部を介して中間層
配線板の絶縁抵抗、耐マグレーション特性の測定を行う
ようにしたことによって、これら中間層配線板に存在す
る不良発生箇所を極めて簡単に特定することができる。
Further, according to the method for inspecting a multilayer wiring board according to the present invention, the inspection terminal conductor of each wiring board constituting the intermediate layer is formed on the surface layer wiring board and / or the rear layer wiring board. Is used to measure the insulation resistance and the anti-magnation property of the intermediate layer wiring board through each inspection terminal conductor part. Can be identified.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態として示す多層配線板の要
部縦断面図である。
FIG. 1 is a longitudinal sectional view of a main part of a multilayer wiring board shown as an embodiment of the present invention.

【図2】同多層配線板の要部平面図である。FIG. 2 is a plan view of a main part of the multilayer wiring board.

【図3】同多層配線板の検査方法の説明図である。FIG. 3 is an explanatory view of an inspection method of the multilayer wiring board.

【図4】従来の多層配線板を示し、同図(A)は要部平
面図であり、同図(B)は要部縦断面図である。
4A and 4B show a conventional multilayer wiring board, FIG. 4A is a plan view of a main part, and FIG. 4B is a longitudinal sectional view of a main part.

【図5】従来の他の多層配線板を示し、同図(A)は要
部平面図であり、同図(B)は要部縦断面図である。
5A and 5B show another conventional multilayer wiring board. FIG. 5A is a plan view of a main part, and FIG. 5B is a longitudinal sectional view of the main part.

【符号の説明】[Explanation of symbols]

1 多層配線板、2 表面層配線板、3 裏面層配線
板、4乃至7 配線板、8乃至11 検査端子導体部、
12乃至16 スルーホール、17乃至24 個別検査
端子導体部
REFERENCE SIGNS LIST 1 multilayer wiring board, 2 surface layer wiring board, 3 back layer wiring board, 4 to 7 wiring board, 8 to 11 inspection terminal conductor,
12 to 16 through hole, 17 to 24 individual inspection terminal conductor

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 主面上に導体部が形成された多数枚の配
線板を積層してなる多層配線板において、 表面層配線板及び/又は裏面層配線板には、上記中間層
を構成する各配線板に対応して、他の配線板の導体部に
対して絶縁された複数個のスルーホールを介してそれぞ
れの導体部と電気的に接続された検査端子導体部が形成
され、 この検査端子導体部は、各中間層配線板に対応してそれ
ぞれ電気的に分離可能とされることを特徴とする多層配
線板。
1. A multilayer wiring board comprising a plurality of wiring boards each having a conductor portion formed on a main surface thereof, wherein the intermediate layer is formed on a surface layer wiring board and / or a rear layer wiring board. A test terminal conductor portion is formed corresponding to each wiring board and electrically connected to each conductor portion through a plurality of through holes insulated from the conductor portion of another wiring board. The multilayer wiring board, wherein the terminal conductor portions are electrically separable from each other corresponding to the respective intermediate-layer wiring boards.
【請求項2】 上記表面層配線板と裏面層配線板には、
上記中間層を構成する各配線板の導体部に対して絶縁さ
れたスルーホールを介して電気的に接続された第2の検
査端子導体部がそれぞれ形成されたことを特徴とする請
求項1に記載の多層配線板。
2. The method according to claim 1, wherein the surface layer wiring board and the back layer wiring board have:
The second inspection terminal conductor portion electrically connected to a conductor portion of each wiring board constituting the intermediate layer via a through hole insulated from the conductor portion is formed, respectively. The multilayer wiring board as described.
【請求項3】 上記検査端子導体部は、上記中間層を構
成する各配線板に対応して、上記表面層配線板及び/又
は裏面層配線板に形成された複数個の個別検査端子導体
部によって構成されることを特徴とする請求項1に記載
の多層配線板。
3. The inspection terminal conductor section includes a plurality of individual inspection terminal conductor sections formed on the surface layer wiring board and / or the back layer wiring board corresponding to each wiring board constituting the intermediate layer. The multilayer wiring board according to claim 1, wherein:
【請求項4】 表面層配線板及び/又は裏面層配線板
に、上記中間層を構成する各配線板に対応して、他層の
配線板の導体部に対して絶縁されたスルーホールを介し
てそれぞれの導体部と電気的に接続された検査端子導体
部が形成された多層配線板が用いられ、 上記検査端子導体部に電圧を印加して絶縁抵抗、耐マグ
レーション特性の測定及び/又は上記スルーホールと配
線板の導体部の短絡、断線等の導通検査を行う全体測定
工程と、 この全体測定工程によって上記中間層を構成する各配線
板のいずれかに不良箇所が存在することが確認された場
合に、これら各中間層配線板にそれぞれ対応して上記検
査端子導体部を分離した後に順次電圧を印加し、絶縁抵
抗、耐マグレーション特性の測定及び/又は上記スルー
ホールと当該中間層配線板の導体部の短絡、断線等の導
通検査を行う個別測定工程とを経て不良発生箇所の特定
を行うことを特徴とする多層配線板の検査方法。
4. A front-layer wiring board and / or a back-layer wiring board, corresponding to each wiring board constituting the intermediate layer, via through holes insulated from conductor portions of wiring boards of other layers. A multi-layer wiring board on which a test terminal conductor portion electrically connected to each conductor portion is formed, and a voltage is applied to the test terminal conductor portion to measure insulation resistance and anti-magnation property and / or The whole measurement step of conducting a continuity test such as a short circuit or a disconnection between the through hole and the conductor part of the wiring board, and the whole measurement step confirms that a defective portion exists in any of the wiring boards constituting the intermediate layer. In this case, a voltage is sequentially applied after separating the inspection terminal conductors corresponding to each of the intermediate layer wiring boards, to measure insulation resistance and anti-magnation property, and / or to measure the through hole and the intermediate layer. Wiring board Shorting of the conductive portion, the inspection method for a multilayer wiring board and performing a specific failure point through a separate measurement step of performing a continuity test such as disconnection.
【請求項5】 上記表面層配線板と裏面層配線板には、
上記中間層を構成する各配線板の導体部に対して絶縁さ
れたスルーホールを介して電気的に接続された第2の検
査端子導体部がそれぞれ形成され、 これら第2の検査端子導体部間に電圧を印加して絶縁抵
抗、耐マグレーション特性の測定及び/又は上記スルー
ホールと中間各層配線板の導体部の短絡、断線等の導通
検査を行うことを特徴とする請求項4に記載の多層配線
板の検査方法。
5. The front-side wiring board and the back-side wiring board,
Second inspection terminal conductors electrically connected to the conductors of the respective wiring boards constituting the intermediate layer via insulated through holes are formed, respectively, between the second inspection terminal conductors. 5. The method according to claim 4, wherein a voltage is applied to the conductor to measure insulation resistance and anti-magnation property and / or conduct a continuity test such as a short circuit or a disconnection between the through hole and the conductor of the intermediate wiring board. Inspection method for multilayer wiring boards.
【請求項6】 表面層配線板及び/又は裏面層配線板
に、中間層を構成する各配線板に対応して、その他の層
の配線板の導体部に対して絶縁されたスルーホールを介
してそれぞれの導体部と電気的に接続された複数個の個
別検査端子導体部が形成された多層配線板を検査対象と
して、 上記個別検査端子部にそれぞれ電圧を印加して上記中間
各層配線板の絶縁抵抗、耐マグレーション特性の測定及
び/又はその導体部の短絡、断線等の導通検査を行うこ
とを特徴とする多層配線板の検査方法。
6. A front-layer wiring board and / or a back-layer wiring board, which correspond to each wiring board constituting an intermediate layer, through through holes insulated from conductors of wiring boards of other layers. By applying a voltage to each of the individual inspection terminals and applying a voltage to each of the intermediate inspection layers, the multilayer wiring board having a plurality of individual inspection terminals electrically connected to the respective conductors is inspected. A method for inspecting a multilayer wiring board, comprising measuring insulation resistance and anti-magnation properties and / or conducting a continuity test such as a short circuit or disconnection of a conductor portion thereof.
JP9152133A 1997-06-10 1997-06-10 Multilayered wiring board and inspection thereof Withdrawn JPH10341079A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9152133A JPH10341079A (en) 1997-06-10 1997-06-10 Multilayered wiring board and inspection thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9152133A JPH10341079A (en) 1997-06-10 1997-06-10 Multilayered wiring board and inspection thereof

Publications (1)

Publication Number Publication Date
JPH10341079A true JPH10341079A (en) 1998-12-22

Family

ID=15533779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9152133A Withdrawn JPH10341079A (en) 1997-06-10 1997-06-10 Multilayered wiring board and inspection thereof

Country Status (1)

Country Link
JP (1) JPH10341079A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6884637B2 (en) 2001-08-14 2005-04-26 Oki Electric Industry Co., Ltd. Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure
CN111432579B (en) * 2020-04-28 2022-03-29 昆山苏杭电路板有限公司 High-precision high-density circuit impedance signal processing board pressing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6884637B2 (en) 2001-08-14 2005-04-26 Oki Electric Industry Co., Ltd. Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure
US7081758B2 (en) 2001-08-14 2006-07-25 Oki Electric Industry Co., Ltd. Inspection pattern, inspection method, and inspection system for detection of latent defect of multi-layer wiring structure
CN111432579B (en) * 2020-04-28 2022-03-29 昆山苏杭电路板有限公司 High-precision high-density circuit impedance signal processing board pressing method

Similar Documents

Publication Publication Date Title
US6262579B1 (en) Method and structure for detecting open vias in high density interconnect substrates
JP2008218925A (en) Wiring board, manufacturing method of wiring board and inspection method thereof
US20080149382A1 (en) Method of inspecting printed wiring board and printed wiring board
US20040108862A1 (en) Printed wiring board, multilayer printed wiring board, and method of detecting foreign matter and voids in inner layer of multilayer printed wiring board
JPH10341079A (en) Multilayered wiring board and inspection thereof
CN114585166B (en) Layer deviation detection method for flexible antenna multilayer board
JP3252085B2 (en) Multilayer wiring board and method of manufacturing the same
JP4848676B2 (en) Component-embedded substrate, component-embedded module using the component-embedded substrate, and method of manufacturing the component-embedded substrate
KR101039775B1 (en) Evaluation method of via hole for printed circuit board and test board thereof
JP3206635B2 (en) Multilayer printed wiring board
CN109561574B (en) Impedance test, circuit board processing, circuit board production method and test assembly
JPH02297996A (en) Detection of fine through hole defect in printed board
JP7468164B2 (en) Wiring board and inspection method thereof
JP2020072122A (en) Wiring board and method for inspecting wiring board
CN113079622B (en) PCB manufacturing method and PCB, and floating monitoring method of copper foil at bottom of blind hole
JP4131137B2 (en) Interposer substrate continuity inspection method
JP4860761B2 (en) Adapter board, semiconductor device using the same, and method for measuring input / output signals between printed circuit boards
JP7257785B2 (en) Printed wiring board and its conduction inspection method
JP5697579B2 (en) Multilayer flexible wiring board manufacturing method, multilayer flexible wiring board, and probe card
JP2002100845A (en) Circuit pattern for inspecting blind via hole misregistration
JPH077272A (en) Multilayer printed interconnection board
CN115200462A (en) Method for detecting thickness of copper in hole on flexible circuit board
JP4535086B2 (en) MULTILAYER WIRING BOARD, SUBSTRATE STRUCTURE COMBINING A MULTIPLE WIRING BOARD AND METHOD OF USING THE SAME
CN112970335A (en) Method and circuit for checking the quality of metallization of a multilayer printed circuit
JPH06103330B2 (en) Inspection device for clearance hole of intermediate layer substrate

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20040907