1377883 L___L—— 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種内埋式線路的製作方法，且特別 是有關於一種具有導電孔道的内埋式線路的製作方法。. 【先前技術】 近年來隨著電子工業之生產技術的突飛猛進，線路基 板可搭載各種電子零件，以廣泛地應用於各種不同功能的 電子產品中。目前，電子產品朝向多功能化及小型化的方 向發展。在此趨勢下，線路基板需大幅提昇其佈線密度， 以搭載5多且更精密的電子零件。為此，習知技術提出一 種具有高佈線密度的内埋式線路基板。 於習知技術中，在内埋式線路基板中形成導電孔道的 方法為先在内埋式線路基板上形成盲孔，然後再進行全板 f ΐ以域填滿盲孔並覆蓋内埋式線路基板表面的導電材 2層’之後再移除導電材料層位於盲孔以外的部分而部 刀留下位於目孔内的導電材料層來作為導電孔道。 滿盲：而再需形成至一定的厚度才能填 除的外的部分時，將不易控制所移 路為細線路（如丨咖）時在内埋式線路層的線 5 年月·曰I·(更9Θ&替換頁 ^---一 【發明内容】 的製提出1内埋式線路的製作方法，其具有較佳 的製;方法:二:明:内容:在此提出-種内埋式線路 包括-基層、一第=^先，提供;:内埋式線路基板，其 第-侧與相對於第—側的!:二。基層具有7 一側中’且第二線路層内埋於第二侧中。=層二== ==其位於第-侧。然後，=二 電材科真人盲孔，以形成—導電孔道， 線路層。導電孔道與基層的第一侧齊平，而導 並二層接觸’且邹分第-線路層圍繞 在本發明之-實_巾，乾式填歧包括網版印刷。 在本發明之-料射，乾錢充法包括喷墨印刷。 在本發明之-實施例中，導電材料包括導電油墨或導 電膏。 在本發明之-實施例中，導電膏包括銅膏、銀膏、碳 膏、奈未銀、錫膏或導電南分子材料。 在本發明之-實施射，_式線路基板更包括一第 ^導”第二導電層，第一導電層配置於第-側上並 ::層第:線路層’第二導電層配置於第二側上並覆蓋第二 -- ^ ，更)娜滅 —. - 括移電ΐ形成導電材料之後’更包 層的實施例中’移除第—導電層與第二”1377883 L___L—— IX DESCRIPTION OF THE INVENTION: 1. Field of the Invention The present invention relates to a method of fabricating a buried circuit, and more particularly to a method of fabricating a buried circuit having conductive vias. [Prior Art] In recent years, with the rapid advancement of the production technology of the electronics industry, the circuit board can be equipped with various electronic components to be widely used in various electronic products with different functions. At present, electronic products are moving toward multi-functionality and miniaturization. Under this trend, the circuit board needs to greatly increase its wiring density to carry more than five more sophisticated electronic components. For this reason, the prior art proposes an embedded circuit substrate having a high wiring density. In the prior art, the method of forming the conductive vias in the buried circuit substrate is to form a blind via hole on the buried circuit substrate, and then fill the blind via hole and cover the buried circuit. The layer 2 of the conductive material on the surface of the substrate is then removed from the portion of the layer of conductive material that is outside the blind via and the portion of the knife leaves a layer of conductive material in the aperture as a conductive via. Full blindness: When it is necessary to form an outer part that can be filled to a certain thickness, it will be difficult to control the line of the buried circuit layer when the road is moved to a thin line (such as a coffee). (More 9 Θ & replacement page ^---一 [Summary of the invention] The method of making a buried circuit, which has a better system; Method: Two: Ming: Content: proposed here - a buried type The circuit includes a base layer, a first layer, and a first layer. The buried circuit substrate has a first side and a first side opposite to the first side. The base layer has a 7 side and the second circuit layer is buried in the second circuit layer. In the second side, = layer 2 == == is located on the first side. Then, = two electric material sections are blind holes to form - conductive holes, circuit layers. The conductive holes are flush with the first side of the base layer, and And the two-layer contact 'and the Zou-di-line layer is surrounded by the present invention, and the dry-type filling includes screen printing. In the present invention, the dry-filling method includes inkjet printing. In an embodiment, the conductive material comprises a conductive ink or a conductive paste. In the embodiment of the invention, the conductive paste comprises a copper paste, a silver paste, a carbon paste, a naphthalene Silver, solder paste or conductive south molecular material. In the present invention, the _ type circuit substrate further includes a second conductive layer, the first conductive layer is disposed on the first side and: layer: The circuit layer 'the second conductive layer is disposed on the second side and covers the second --^, and more) - after the shifting of the conductive material to form the conductive material, the 'more-clad embodiment' removes the first conductive Layer and second"
孔。在本㈣之-實施射’形成盲㈣方法包括雷射鐵 本發明提出-種内埋式線路的製作方法如下所述。I ^提供—内埋式祕基板’内埋式線路基板包括一基層， 2-線路層與-第二線路層。基層具有—第—侧與相# '侧的一第二側，第一線路層内埋於第一側中，且第 一線路層内埋於第二侧中。 然後，於内埋式線路基板内形成至少一貫孔，貫孔臭 有一第一開放端與一第二開放端分別位於第一側與第^ 侧。之後’以乾式填絲將-導電材料填人貫孔以形成 一導電孔道，其連接第一線路層與第二線路層。導電孔道 的兩端分別與基層的第一側及第二側齊平，且部分第一線 路層與部分第二線路層分別環繞且接觸導電孔道的這歧 端。 一 在本發明之-實施例中’乾式填充法包括網版印刷。 在本發明之一實施例中’乾式填充法包括噴墨印刷。 在本發明之一實施例中，導電材料包括導電油墨或導 電膏。 在本發明之一實施例中，導電膏包括銅膏、銀膏、碳 膏、奈米銀、錫膏或導電高分子材料。 月 ^ 在本發明之一實施例中，形成貫孔的方法包括雷射鑽 孔。 本發明還提出一種内埋式線路的製作方法如下所 述。提供一堆疊結構，包括一核心板、二第一線路層、二 第一基層與二第二線路層。第一線路層分別配置於核心板 的上下兩側，且第一基層分別配置於核心板的上下兩側， 其中每一第一基層具有一遠離核心板的一第一側與一朝向 核心板的一第二侧，而第一線路層分別内埋於第一基層的 第二侧中，且第二線路層分別内埋於第一基層的第一侧 中。分別形成至少一第一盲孔於第二線路層與第一基層 内，其中第一盲孔分別暴露出部分第一線路層，且每一第 一盲孔具有一第一開放端’且第一開放端分別位於第〆基 層的第一側。以乾式填充法將一第一導電材料填入第·一盲 孔中，以分別形成一第一導電孔道，其中第一導電孔道分 別連接第一線路層與第二線路層’且第一導電孔道與第一 基層的第一側齊平’而第一導電孔道的一端與第一線路層 接觸，且部分第二線路層圍繞並接觸第一導電孔道的男一 端0 在本發明之—實施例中，以乾式填充法將第一導電材 料填入第一盲孔中’以分別形成第一導電孔道之後，更包 括：分別形成一第二基層於第一基層的第一侧上，其中每 一第二基層具有一遠離核心板的一第三側。分別形成一第 三線路層於第二·側’其中第三線路層分別内埋於第三側。 分別形成至少一第二盲孔於第三線路層與第二基層内，其 L’n_爾頁 •- ______ 中第二盲孔分別暴露出部分第二線路層，且每一第二盲孔 具有的一第一開放端，且第二開放端分別位於第-a声的 第二側。以乾式填充法將一第二導電材料填入第-盲孔 中’以分別形成一第二導電孔道，其中第二導電孔&分別 連接第二線珞層與第三線路層，且第二導電孔道與第二基 層的第三側齊平’而第二導電孔道的一端與第二^路^^ 觸’且部分第三線路層圍繞並接觸第二導電孔道的另一端。 在本發明之一實施例中，乾式填充法包括網版印刷。 在本發明之一實施例中’乾式填充法包括噴墨印刷。 在本發明之一實施例中，第一導電材料與第二導電材 料包括導電油墨或導電膏。 在本發明之一實施例中’導電膏包括銅膏、銀膏、碳 膏、奈米銀、錫膏或導電高分子材料。 在本發明之一實施例中，形成第一盲孔與第二盲孔的 方法包括雷射鑽孔。 在本發明之一實施例中，内埋式線路的製作方法更包 括：於形成第二導電孔道之後，分別形成一防焊層於第二 基層的第三側上。 综上所述’本發明是以乾式填充法將導電材料填入盲 孔中來形成導電孔道，因此本發明不需進行習知技術中的 移除部分導電材料層的步驟。如此一來，本發明之製程較 為簡化且製程良率較高。 ▲為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文待舉實施例，並配合所附圖式，作詳細說明如 (更輝嫩頁 下。 【實施方式】 實施例之内埋式線路的製作 圖1A〜圖1G為本發明一 方法的流程剖面圖。 首^請參照圖1D ’提供—内埋式線路基板刚，其 ::-基層110、一第一線路層12〇與一第二線路層 130。 土層110具有一第一侧112與相對於第一側⑴的一第二 侧114,第-線路層12〇内埋於第—側112中，且第二線 ^層130内埋於第二側114巾。於本實施例中，基層110 j’、”電層’但在另一未繪示的實施例中，基層11〇亦可 為一包含線路層及介電層的多層結構。 於本實施例中，形成内埋式線路基板的方法如下 所述。首先，請參照圖1A，提供一載體層1〇2，並且在載 體層102的-表面l〇2a上形成一圖案化高分子層刚。載 體層102的材質例如是金屬或其合金。 接著，請參照圖1B，在未被圖案化高分子層1〇4覆 蓋的表面102a上形成一圖案化導電層1〇6，之後再移除圖 案化高分子層104以形成-線路載板Αβ形成圖案化導電 層106的方法例如是電鍍。 然後，請參照圖1C，提供二線路載板Α以及一基層 110，並將這些線路載板A分別配置於基層11〇的第一側 112與第二側114上。之後，壓合這些線路載板A與基層 110’以使這些圖案化導電層1〇6分別埋入基層11〇的第一 侧112與第二側114中。然後，請參照圖1D，移除這些線 路載板A的載體層102，以形成内埋於第一側112中的第 一線路層120以及内埋於第二側114中的第二線路層 130，並形成一内埋式線路基板1〇〇。 接著，請參照圖1E，於内埋式線路基板1〇〇内形成至 少一盲孔v，盲孔v暴露出第二線路層13(^盲孔v具有 一開放端VI，其位於第一側112。於本實施例中，形成盲 孔V的方法可為雷射鑽孔。 然後，請參照圖1F，以乾式填充法將一導電材料填入 盲孔V中，以形成一導電孔道c，導電孔道c連接第一線 路層120與第二線路層13〇。導電孔道c與基層11〇的第 一側112齊乎’而導電孔道C的一端與第二線路層13〇接 觸且邛刀第線路層i2〇圍繞並接觸導電孔道匚的另一 端。於本實關巾，乾式填充法可以是職印刷或是喷墨 印刷。導電材料例如是導電油墨解電膏，而導電膏可以 是銅膏、銀膏、碳膏、奈米銀、料或導電高分子材料、 或是其他適合的導電材料。之後，請參照圖1G，可在基芦 110的第-側112與第二側114上分別形成防焊層S1、S2曰。 值得注意的是，相較於習知，本實施例是以 法將導電材料填人盲孔V中來形成導電孔道c，因此本審 施例不需進行習知技術中的移除部分導電材料層的: 如此-來，本實施例之製程較為簡化且製程良 且，本實施例可有效利科電材料，進崎低製^本而 圖2A〜圖2E為本發明另-實施例之内埋式 作方法的流㈣面圖。請參_2A，提供—邮坑線路^ 100.127η 年月曰修(更難替換頁 板200 °值得注意的是，本實施例所提供的内埋式線路基 板200與内埋式線路基板1〇〇 (請參照圖id)相似。前述 兩者的差異之處在於内埋式線路基板2〇〇還包括一第一導 電層210與一第二導電層220。第一導電層210配置於基 層110的第一側112上並覆蓋第一線路層12〇 ’第二導電 層220配置於基層110的第二側114上並覆蓋第二線路層 130。 内埋式線路基板2〇〇的第一導電層21〇與第二導電層 220的形成方式例如是在圖1C中壓合線路載板a與基層 110之後移除部分載體層1〇2,以使剩餘的載體層1〇2形成 第一導電層210與第二導電層220。 接著，請參照圖2B，於内埋式線路基板1〇〇内形成 至少一盲孔V並在第一導電層21〇上形成一開口 〇p ,其 中盲孔V暴露出第二線路層13〇且開口 〇p與盲孔v連 通。盲孔v具有-開放端v卜其位於第—侧112。 然後，請參照圖2C，以乾式填充法將一導電材料從 ，放端vi填入盲孔v巾’以形成一導電孔道c，其連接 第線路層U0與第二線路層13〇。於本實施例中，乾式 填充法可以疋網版印刷或是喷墨印刷。 之後，請參照圖2D，移除第一導電層21〇與第二導 電層220 ’其中移除的方法包括侧。於本實施例中，在 移除第-導電層2H)與第二導電屬22() 可一併 孔道c突出於基層11〇的第一側ιΐ2的部分，以 Ί蓄C與第一側112齊平。然後，請參照圖2£，可 ^/7883 丨％(更) 的第一側m與第二側114上分別形成防焊層 圖3A〜圖3D為本發明又一眘你如 作方法的流程剖面圖。—例之内埋式線路的製 W 照圖3A ’提供―内埋式線路基板310，内 基板31〇包括-基層312、—第―線路層314盘 線路層3丨6。基層312具有—第—側仙與相動; 第-側3na的-第二侧312b，第—線路層314 _於第 -側312a中，且第二線路層316内埋於第二侧咖中第 然後，請參照圖3B，於内埋式線路基板31〇内形成 至乂貝孔T ’而形成貝孔的方法例如雷射鑽孔。貫孔τ 具有H放端τ 1與-第二開放端T2分別位於第 312a 與第二側 312b。 之後，請參照圖3C，以乾式填充法將一導電材料填 入貫孔τ ’以形成一導電孔道c，其連接第一線路層314 與第一線路層316。導電孔道c的兩端分別與基層312的 第一側312a及第二侧312b齊平，且部分第一線路層314 與部分第二線路層316分別環繞且接觸導電孔道c的這些 端。於本實施例中，乾式填充法例如為網版印刷或噴墨印 刷，且導電材料包括導電油墨或導電膏，其中導電膏例如 是銅膏、銀膏、碳膏、奈米銀、錫膏或導電高分子材料。 然後，請參照圖3D，可在基層312的第一側3l2a與第二 侧312b上分別形成防焊層SI、S2。 ' 圖4A〜圖4F為本發明再一實施例之内埋式線路的製 13 丄377883 作方法的流程剖面圖。 首先，請參照圖4A ’提供一堆疊結構400 ’其包括— 核心板410、二第一線路層420、二第一基層430與二第二 線路層440。二第一線路層420分別配置於核心板41〇的 上下兩側412、414。第一基層430分別配置於核心板41〇 的上下兩側412、414。 第一基層430具有一遠離核心板410的第一側432與 一朝向核心板的第二侧434 ’而第一線路層420内埋於第 —基層430的第二側434中，且第二線路層440内埋於第 一基層430的第一側432中。 接著，請參照圖4B，於第二線路層440與第一基層 430内形成至少一第一盲孔510’第一盲孔510暴露出第一 線路層420。第一盲孔510具有一第一開放端512,其位於 第一侧432。於本實施例中，形成第一盲孔510的方法可 為雷射鑽孔。 然後，請參照圖4C，以乾式填充法將一導電材料填 入第一盲孔510中，以形成一第一導電孔道ci，第一導電 孔道C1連接第一線路層420與第二線路層440。第一導電 孔道C1與第一基層430的第一側432齊平，而第一導電 孔道C1的一端與第一線路層420接觸，且部分第二線路 層440圍繞並接觸第一導電孔道ci的另一端。於本實施 例中’乾式填充法可以是網版印刷或是喷墨印刷。導電材 =例如是導電油墨或導電膏’而導電膏可以是銅膏、銀膏、 碳膏、奈米銀、錫膏或導電高分子材料、或是其他適合的 1377883 / 7 1—_____________ 導電材料。 之後，請參照圖4D，在二第一基層430的第一側432 上分別形成二第二基層450，其中各第二基層45〇具有一 遠離核心層410的第三側452。接著，在第三側452'形成 第三線路層460 ’且第三線路層46〇内埋於第三侧A%。 接著，請參照圖4E，在第三線路層46〇與第二美層 45〇内形成至一第二盲孔520。第二盲孔52〇暴露出；二 第二線路層440,且第二盲孔520具有的一第二 位於第三側452。錢’以乾式填充祕—導電材料填入 第二盲孔520中，以形成一第二導電孔道C2，第二導電孔 道C2連接第二線路層44〇與第三線路層46〇。第二導電孔 道C2與第二基層450的第三侧452齊平，而第二導電孔 道450的—端與第二線路層_接觸，且部分第三線路層 = α的另_端。之後，請參照 第二基層45〇的第三側452湖形成二防 導電材料層的步驟。如此—來 為簡化且製程良率較高。 a之練車乂 雖然本發明已以實施例揭露如上， 本發明，任何所胸射且右〜、並非用以限疋 明之梦— f知财，在不脫離本發 月之精神和㈣内，當可作些許 明之保護範m德^ 飾’因此本發 已固田視後附之申禎專利範圍所界 15 【圖式簡單說明】 圖1A〜圖ig為本發明一實施例之内埋式線路的製 方法的流程剖面圖。 圖2A〜圖2E為本發明另一實施例之内埋式線路 作方法的流程剖面圖。 氣 圖3A〜圖3D為本發明又一實施例之内埋式線路 作方法的流程剖面圖。 圖4A〜圖4F為本發明再一實施例之内埋式線路的製 作方法的流程剖面圖。 【主要元件符號說明】 100、200、310 :内埋 式線路基板 102 :載體層 102a :表面 104 :圖案化高分子層 106 :圖案化導電層 110、312 :基層 112、312a、432 :第一 側 114、312b、434:第二 侧 120、314、420 :第一 線路層 130、316、440 :第二 線路層 210 :第一導電層 220 :第二導電層 400 :堆疊結構 410 :核心板 412、414 :核心板之上 下二側 430 :第一基層 450 :第二基層 452 :第三側 460 :第三線路層 510 :第一盲孔 512 :第一開放端 520 :第二盲孔 16 1377883hole. In the present invention, the method of forming a blind (four) method includes a laser. The present invention proposes a method of fabricating a buried circuit as follows. I ^ Provided - buried secret substrate 'The buried circuit substrate includes a base layer, a 2-circuit layer and a - second circuit layer. The base layer has a second side on the side of the first side and the side of the phase. The first circuit layer is buried in the first side, and the first circuit layer is buried in the second side. Then, at least a consistent hole is formed in the buried circuit substrate, and the through hole has a first open end and a second open end respectively located on the first side and the second side. Thereafter, the conductive material is filled into the via holes by dry filling to form a conductive via which connects the first wiring layer and the second wiring layer. Both ends of the conductive via are flush with the first side and the second side of the base layer, and a portion of the first wiring layer and a portion of the second wiring layer respectively surround and contact the end of the conductive via. In the embodiment of the invention, the 'dry filling method' includes screen printing. In one embodiment of the invention, the 'dry fill method' includes ink jet printing. In an embodiment of the invention, the electrically conductive material comprises a conductive ink or an electrically conductive paste. In one embodiment of the invention, the conductive paste comprises a copper paste, a silver paste, a carbon paste, a nano silver, a solder paste or a conductive polymer material. Month In one embodiment of the invention, the method of forming a through hole includes a laser drilled hole. The present invention also proposes a method of fabricating a buried circuit as follows. A stack structure is provided, including a core board, two first circuit layers, two first base layers, and two second circuit layers. The first circuit layers are respectively disposed on the upper and lower sides of the core board, and the first base layers are respectively disposed on the upper and lower sides of the core board, wherein each of the first base layers has a first side away from the core board and a facing side of the core board. a second side, wherein the first circuit layers are respectively buried in the second side of the first base layer, and the second circuit layers are respectively buried in the first side of the first base layer. Forming at least one first blind via in the second circuit layer and the first base layer, wherein the first blind vias respectively expose a portion of the first circuit layer, and each of the first blind vias has a first open end 'and first The open ends are respectively located on the first side of the second base layer. Filling a first conductive hole into the first blind via hole by a dry filling method to form a first conductive via, wherein the first conductive via connects the first wiring layer and the second wiring layer respectively and the first conductive via One end of the first conductive via is in contact with the first side of the first substrate, and one end of the first conductive via is in contact with the first wiring layer, and a portion of the second wiring layer surrounds and contacts the male end of the first conductive via 0. In an embodiment of the invention After the first conductive material is filled into the first via hole by the dry filling method to form the first conductive via hole, respectively, the method further includes: forming a second base layer on the first side of the first base layer, wherein each of the first The two base layers have a third side remote from the core panel. A third circuit layer is formed on the second side, respectively, wherein the third circuit layer is buried in the third side. Forming at least one second blind hole in the third circuit layer and the second base layer respectively, wherein the second blind hole in the L'n_page_-______ exposes a part of the second circuit layer, and each second blind hole There is a first open end, and the second open end is respectively located on the second side of the first-a sound. Filling a second conductive material into the first blind via hole by a dry filling method to respectively form a second conductive via, wherein the second conductive vias are respectively connected to the second turn layer and the third wiring layer, and second The conductive via is flush with the third side of the second substrate and the one end of the second conductive via is in contact with the second via and the third interconnect layer surrounds and contacts the other end of the second conductive via. In an embodiment of the invention, the dry filling method comprises screen printing. In one embodiment of the invention, the 'dry fill method' includes ink jet printing. In an embodiment of the invention, the first conductive material and the second conductive material comprise a conductive ink or a conductive paste. In one embodiment of the invention, the conductive paste comprises a copper paste, a silver paste, a carbon paste, a nano silver, a solder paste or a conductive polymer material. In one embodiment of the invention, the method of forming the first blind hole and the second blind hole includes laser drilling. In an embodiment of the invention, the method of fabricating the buried circuit further comprises: forming a solder resist layer on the third side of the second substrate after forming the second conductive via. In summary, the present invention forms a conductive via by filling a conductive material into a blind via by a dry filling method. Therefore, the present invention does not require the step of removing a portion of the conductive material layer in the prior art. As a result, the process of the present invention is simplified and the process yield is high. The above and other objects, features, and advantages of the present invention will become more apparent from the aspects of the invention. 1A to 1G are flow cross-sectional views of a method of the present invention. First, please refer to FIG. 1D 'provided-embedded circuit substrate, which::-base layer 110, a first circuit layer 12〇 and a second circuit layer 130. The soil layer 110 has a first side 112 and a second side 114 opposite to the first side (1), and the first circuit layer 12 is buried in the first side 112, and The second layer 114 is buried in the second side 114. In this embodiment, the base layer 110 j ', the "electric layer" but in another embodiment not shown, the base layer 11 can also be an included line The multilayer structure of the layer and the dielectric layer. In the present embodiment, the method of forming the buried wiring substrate is as follows. First, referring to FIG. 1A, a carrier layer 1 〇 2 is provided, and at the surface of the carrier layer 102 A patterned polymer layer is formed on the layer 2a. The material of the carrier layer 102 is, for example, a metal or an alloy thereof. Referring to FIG. 1B, a patterned conductive layer 1〇6 is formed on the surface 102a not covered by the patterned polymer layer 1〇4, and then the patterned polymer layer 104 is removed to form a line carrier Αβ formation pattern. The method of forming the conductive layer 106 is, for example, electroplating. Then, referring to FIG. 1C, a two-line carrier Α and a base layer 110 are provided, and the line carriers A are respectively disposed on the first side 112 and the second side of the base layer 11〇. After that, the line carrier A and the base layer 110' are pressed together to embed the patterned conductive layers 1 and 6 respectively into the first side 112 and the second side 114 of the base layer 11A. Then, refer to FIG. Removing the carrier layer 102 of the line carrier A to form a first circuit layer 120 embedded in the first side 112 and a second circuit layer 130 buried in the second side 114, and forming a buried Next, referring to FIG. 1E, at least one blind hole v is formed in the buried circuit substrate 1 , and the blind hole v exposes the second circuit layer 13 (the blind hole v has an open end) VI, which is located on the first side 112. In this embodiment, the method of forming the blind hole V may be a laser drilling Then, referring to FIG. 1F, a conductive material is filled into the blind via V by a dry filling method to form a conductive via c, and the conductive via c connects the first wiring layer 120 and the second wiring layer 13. The conductive vias c and The first side 112 of the base layer 11〇 is identical and one end of the conductive via C is in contact with the second wiring layer 13 and the first wiring layer i2 is surrounded and contacts the other end of the conductive via 。. The filling method may be job printing or inkjet printing. The conductive material is, for example, a conductive ink electrolyte paste, and the conductive paste may be copper paste, silver paste, carbon paste, nano silver, material or conductive polymer material, or other Suitable conductive material. Thereafter, referring to FIG. 1G, solder resist layers S1 and S2 may be formed on the first side 112 and the second side 114 of the base glass 110, respectively. It should be noted that, in comparison with the conventional method, the conductive hole is filled in the blind hole V by the method to form the conductive hole c. Therefore, the prior art does not need to remove a part of the conductive material in the prior art. Layers: As such, the process of the present embodiment is simplified and the process is good. In this embodiment, the utility model can be effectively utilized, and the second embodiment of the present invention is shown in FIG. 2A to FIG. 2E. The flow (four) surface of the buried method. Please refer to _2A, provide the _ pit line ^ 100.127η 曰 曰 repair (more difficult to replace the page board 200 ° It is worth noting that the buried circuit substrate 200 and the buried circuit substrate provided in this embodiment 1 〇 The difference between the two is that the buried circuit substrate 2 further includes a first conductive layer 210 and a second conductive layer 220. The first conductive layer 210 is disposed on the base layer 110. The first side 112 is covered and covers the first circuit layer 12'. The second conductive layer 220 is disposed on the second side 114 of the base layer 110 and covers the second circuit layer 130. The first conductive layer of the buried circuit substrate 2 The layer 21〇 and the second conductive layer 220 are formed by, for example, removing a portion of the carrier layer 1〇2 after the line carrier a and the base layer 110 are pressed in FIG. 1C, so that the remaining carrier layer 1〇2 forms the first conductive layer. The layer 210 and the second conductive layer 220. Next, referring to FIG. 2B, at least one blind via V is formed in the buried circuit substrate 1 and an opening 〇p is formed on the first conductive layer 21〇, wherein the blind via V exposes the second circuit layer 13 and the opening 〇p is in communication with the blind hole v. The blind hole v has an open end v On the first side 112. Then, referring to FIG. 2C, a conductive material is filled from the floating end vi into the blind hole v towel by a dry filling method to form a conductive via c, which connects the first layer U0 and the second line. In the embodiment, the dry filling method can be screen printing or inkjet printing. Thereafter, referring to FIG. 2D, the first conductive layer 21 and the second conductive layer 220 are removed. The method includes a side. In the embodiment, the portion where the first conductive layer 2H and the second conductive genus 22() can be protruded from the first side ι 2 of the base layer 11 在 to remove the C and The first side 112 is flush. Then, referring to FIG. 2, a solder resist layer is formed on the first side m and the second side 114 of the ^/7883 丨% (more). FIG. 3A to FIG. 3D are still a flow of the method of the present invention. Sectional view. - The internal wiring of the buried circuit is provided as shown in Fig. 3A', and the inner substrate 31 includes a base layer 312, a first circuit layer 314, and a circuit layer 3丨6. The base layer 312 has a first side and a second side 312b, a first line side 314 is in the first side 312a, and the second circuit layer 316 is buried in the second side. Next, referring to FIG. 3B, a method of forming a bead hole into the bore hole T' in the buried circuit substrate 31 is formed, for example, a laser drilling. The through hole τ has an H discharge end τ 1 and a second open end T2 are located at the 312a and the second side 312b, respectively. Thereafter, referring to Fig. 3C, a conductive material is filled into the through holes τ' by a dry filling method to form a conductive via c which connects the first wiring layer 314 with the first wiring layer 316. Both ends of the conductive via c are flush with the first side 312a and the second side 312b of the base layer 312, respectively, and a portion of the first wiring layer 314 and a portion of the second wiring layer 316 surround and contact the ends of the conductive vias c, respectively. In this embodiment, the dry filling method is, for example, screen printing or inkjet printing, and the conductive material comprises a conductive ink or a conductive paste, wherein the conductive paste is, for example, a copper paste, a silver paste, a carbon paste, a nano silver, a solder paste or Conductive polymer material. Then, referring to FIG. 3D, solder resist layers SI, S2 may be formed on the first side 312a and the second side 312b of the base layer 312, respectively. 4A to 4F are cross-sectional views showing a flow of a method for manufacturing a buried circuit according to still another embodiment of the present invention. First, please refer to FIG. 4A' to provide a stacked structure 400' including - a core board 410, two first circuit layers 420, two first base layers 430 and two second circuit layers 440. The two first circuit layers 420 are respectively disposed on the upper and lower sides 412, 414 of the core board 41''. The first base layers 430 are respectively disposed on the upper and lower sides 412, 414 of the core board 41''. The first base layer 430 has a first side 432 away from the core board 410 and a second side 434 ′ facing the core board. The first circuit layer 420 is buried in the second side 434 of the first base layer 430, and the second line is The layer 440 is buried within the first side 432 of the first substrate 430. Next, referring to FIG. 4B, at least one first blind via 510' is formed in the second wiring layer 440 and the first base layer 430. The first blind via 510 exposes the first wiring layer 420. The first blind hole 510 has a first open end 512 that is located on the first side 432. In the present embodiment, the method of forming the first blind via 510 may be a laser drilled hole. Then, referring to FIG. 4C, a conductive material is filled into the first blind via 510 by a dry filling method to form a first conductive via ci. The first conductive via C1 connects the first wiring layer 420 and the second wiring layer 440. . The first conductive via C1 is flush with the first side 432 of the first base layer 430, and one end of the first conductive via C1 is in contact with the first wiring layer 420, and a portion of the second wiring layer 440 surrounds and contacts the first conductive via ci. another side. In the present embodiment, the dry filling method may be screen printing or ink jet printing. Conductive material = for example, conductive ink or conductive paste' and the conductive paste may be copper paste, silver paste, carbon paste, nano silver, solder paste or conductive polymer material, or other suitable 1137788 / 7 1 - _____________ conductive material . Then, referring to FIG. 4D, two second base layers 450 are respectively formed on the first side 432 of the two first base layers 430, wherein each of the second base layers 45 has a third side 452 away from the core layer 410. Next, a third wiring layer 460' is formed on the third side 452' and the third wiring layer 46 is buried in the third side A%. Next, referring to FIG. 4E, a second blind via 520 is formed in the third wiring layer 46A and the second beauty layer 45A. The second blind via 52 is exposed; the second second trace layer 440, and the second blind via 520 has a second trace on the third side 452. The money is filled with a conductive material into the second blind via 520 to form a second conductive via C2, and the second conductive via C2 is connected to the second wiring layer 44 and the third wiring layer 46. The second conductive via C2 is flush with the third side 452 of the second substrate 450, while the end of the second conductive via 450 is in contact with the second wiring layer, and a portion of the third wiring layer = the other end of the alpha. Thereafter, please refer to the step of forming a second layer of anti-conductive material on the third side 452 of the second substrate 45〇. So - for simplicity and high process yield. Although the present invention has been disclosed in the above embodiments, the present invention, any of the chest shots and right ~ is not intended to limit the dream of the dream - f knowing money, without departing from the spirit of this month and (4), When the protection of the Xu Ming can be made, the decoration is limited to the scope of the patent application scope of the application. [Fig. 1A to ig are embedded in an embodiment of the present invention. A cross-sectional view of the process of the circuit. 2A to 2E are cross-sectional views showing the flow of a buried wiring method according to another embodiment of the present invention. 3A to 3D are cross-sectional views showing the flow of a buried wiring method according to still another embodiment of the present invention. 4A to 4F are cross-sectional views showing the flow of a method of manufacturing a buried wiring according to still another embodiment of the present invention. [Main component symbol description] 100, 200, 310: buried circuit substrate 102: carrier layer 102a: surface 104: patterned polymer layer 106: patterned conductive layer 110, 312: base layer 112, 312a, 432: first Sides 114, 312b, 434: second side 120, 314, 420: first circuit layer 130, 316, 440: second circuit layer 210: first conductive layer 220: second conductive layer 400: stacked structure 410: core board 412, 414: upper and lower sides 430 of the core board: first base layer 450: second base layer 452: third side 460: third circuit layer 510: first blind hole 512: first open end 520: second blind hole 16 1377883
522 A ： C : Cl C2 OP :第二開放端 線路載板 導電孔道 :第一導電孔道 :第二導電孔道 :開口 SI、S2 : P方焊層 T :貫孔 T1 :第一開放端 T2 :第二開放端 V :盲孔 VI :開放端 17522 A : C : Cl C2 OP : second open end line carrier conductive hole: first conductive hole: second conductive hole: opening SI, S2: P square solder layer T: through hole T1: first open end T2: Second open end V: blind hole VI: open end 17