TWI373095B - A copper conductor - Google Patents

A copper conductor

Info

Publication number
TWI373095B
TWI373095B TW094122602A TW94122602A TWI373095B TW I373095 B TWI373095 B TW I373095B TW 094122602 A TW094122602 A TW 094122602A TW 94122602 A TW94122602 A TW 94122602A TW I373095 B TWI373095 B TW I373095B
Authority
TW
Taiwan
Prior art keywords
copper conductor
conductor
copper
Prior art date
Application number
TW094122602A
Other languages
English (en)
Chinese (zh)
Other versions
TW200625526A (en
Inventor
Michael Lane
Stephanie R Chiras
Terry A Spooner
Robert Rosenberg
Daniel C Edelstein
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200625526A publication Critical patent/TW200625526A/zh
Application granted granted Critical
Publication of TWI373095B publication Critical patent/TWI373095B/zh

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • C25D5/50—After-treatment of electroplated surfaces by heat-treatment
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H10P14/47—Electrolytic deposition, i.e. electroplating; Electroless plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/043—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
    • H10W20/044—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for electroless plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/055—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by formation methods other than physical vapour deposition [PVD], chemical vapour deposition [CVD] or liquid deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/064—Manufacture or treatment of conductive parts of the interconnections by modifying the conductivity of conductive parts, e.g. by alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H10W20/4424—Copper alloys

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
TW094122602A 2004-07-09 2005-07-04 A copper conductor TWI373095B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/887,087 US7119018B2 (en) 2004-07-09 2004-07-09 Copper conductor

Publications (2)

Publication Number Publication Date
TW200625526A TW200625526A (en) 2006-07-16
TWI373095B true TWI373095B (en) 2012-09-21

Family

ID=35540173

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094122602A TWI373095B (en) 2004-07-09 2005-07-04 A copper conductor

Country Status (4)

Country Link
US (2) US7119018B2 (https=)
JP (1) JP4965091B2 (https=)
CN (1) CN100375280C (https=)
TW (1) TWI373095B (https=)

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US6653236B2 (en) * 2002-03-29 2003-11-25 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates; and semiconductor constructions
US7341947B2 (en) * 2002-03-29 2008-03-11 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates
US20060163731A1 (en) * 2005-01-21 2006-07-27 Keishi Inoue Dual damascene interconnections employing a copper alloy at the copper/barrier interface
US7666787B2 (en) * 2006-02-21 2010-02-23 International Business Machines Corporation Grain growth promotion layer for semiconductor interconnect structures
US7528066B2 (en) * 2006-03-01 2009-05-05 International Business Machines Corporation Structure and method for metal integration
US20070269586A1 (en) * 2006-05-17 2007-11-22 3M Innovative Properties Company Method of making light emitting device with silicon-containing composition
US7566653B2 (en) * 2007-07-31 2009-07-28 International Business Machines Corporation Interconnect structure with grain growth promotion layer and method for forming the same
US8168532B2 (en) 2007-11-14 2012-05-01 Fujitsu Limited Method of manufacturing a multilayer interconnection structure in a semiconductor device
KR100924865B1 (ko) * 2007-12-27 2009-11-02 주식회사 동부하이텍 반도체 소자의 금속배선 형성방법
US7651943B2 (en) * 2008-02-18 2010-01-26 Taiwan Semicondcutor Manufacturing Company, Ltd. Forming diffusion barriers by annealing copper alloy layers
CN102203935A (zh) * 2008-10-27 2011-09-28 Nxp股份有限公司 生物兼容电极
JP2011009439A (ja) * 2009-06-25 2011-01-13 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
US8336204B2 (en) * 2009-07-27 2012-12-25 International Business Machines Corporation Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application
US8409960B2 (en) * 2011-04-08 2013-04-02 Micron Technology, Inc. Methods of patterning platinum-containing material
US9418937B2 (en) 2011-12-09 2016-08-16 Infineon Technologies Ag Integrated circuit and method of forming an integrated circuit
US8736055B2 (en) 2012-03-01 2014-05-27 Lam Research Corporation Methods and layers for metallization
CN102891104B (zh) * 2012-09-17 2015-07-29 上海华力微电子有限公司 一种提高Cu CMP效率的方法
US8673779B1 (en) * 2013-02-27 2014-03-18 Lam Research Corporation Interconnect with self-formed barrier
WO2021080726A1 (en) * 2019-10-21 2021-04-29 Applied Materials, Inc. Method of depositing layers
CN113363152A (zh) * 2020-03-06 2021-09-07 长鑫存储技术有限公司 半导体结构及其制作方法
TWI796607B (zh) * 2020-10-22 2023-03-21 龍華科技大學 銅銠鍍層的製備方法

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JP3512225B2 (ja) * 1994-02-28 2004-03-29 株式会社日立製作所 多層配線基板の製造方法
US5904665A (en) * 1995-03-07 1999-05-18 Vance Products Inc. Automated prolonged slow release intrauterine insemination using self retaining intrauterine insemination catheter
US6161012A (en) * 1996-03-29 2000-12-12 British Telecommunications Public Limited Company Short code dialling
JP3409831B2 (ja) * 1997-02-14 2003-05-26 日本電信電話株式会社 半導体装置の配線構造の製造方法
US5801100A (en) * 1997-03-07 1998-09-01 Industrial Technology Research Institute Electroless copper plating method for forming integrated circuit structures
US5969422A (en) * 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
US5893752A (en) * 1997-12-22 1999-04-13 Motorola, Inc. Process for forming a semiconductor device
US5904565A (en) * 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same
JPH11288936A (ja) * 1998-04-01 1999-10-19 Ricoh Co Ltd 半導体装置の製造方法
US5968333A (en) * 1998-04-07 1999-10-19 Advanced Micro Devices, Inc. Method of electroplating a copper or copper alloy interconnect
US6181012B1 (en) * 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6461675B2 (en) * 1998-07-10 2002-10-08 Cvc Products, Inc. Method for forming a copper film on a substrate
US6294836B1 (en) * 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
JP4221100B2 (ja) * 1999-01-13 2009-02-12 エルピーダメモリ株式会社 半導体装置
JP2002075995A (ja) * 2000-08-24 2002-03-15 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6599666B2 (en) * 2001-03-15 2003-07-29 Micron Technology, Inc. Multi-layer, attenuated phase-shifting mask
US7008872B2 (en) * 2002-05-03 2006-03-07 Intel Corporation Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures
US20040108217A1 (en) * 2002-12-05 2004-06-10 Dubin Valery M. Methods for forming copper interconnect structures by co-plating of noble metals and structures formed thereby
US6974768B1 (en) * 2003-01-15 2005-12-13 Novellus Systems, Inc. Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films

Also Published As

Publication number Publication date
US7495338B2 (en) 2009-02-24
JP4965091B2 (ja) 2012-07-04
TW200625526A (en) 2006-07-16
JP2006024943A (ja) 2006-01-26
CN100375280C (zh) 2008-03-12
US20060157857A1 (en) 2006-07-20
CN1719606A (zh) 2006-01-11
US7119018B2 (en) 2006-10-10
US20060006070A1 (en) 2006-01-12

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees