TWI369717B - Method for forming semiconductor device - Google Patents
Method for forming semiconductor deviceInfo
- Publication number
- TWI369717B TWI369717B TW096127962A TW96127962A TWI369717B TW I369717 B TWI369717 B TW I369717B TW 096127962 A TW096127962 A TW 096127962A TW 96127962 A TW96127962 A TW 96127962A TW I369717 B TWI369717 B TW I369717B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- forming semiconductor
- forming
- semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/740,178 US8119500B2 (en) | 2007-04-25 | 2007-04-25 | Wafer bonding |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200842933A TW200842933A (en) | 2008-11-01 |
TWI369717B true TWI369717B (en) | 2012-08-01 |
Family
ID=39887481
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096127962A TWI369717B (en) | 2007-04-25 | 2007-07-31 | Method for forming semiconductor device |
Country Status (3)
Country | Link |
---|---|
US (1) | US8119500B2 (zh) |
CN (1) | CN100547751C (zh) |
TW (1) | TWI369717B (zh) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7939941B2 (en) | 2007-06-27 | 2011-05-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Formation of through via before contact processing |
US8853830B2 (en) | 2008-05-14 | 2014-10-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | System, structure, and method of manufacturing a semiconductor substrate stack |
US9117828B2 (en) * | 2009-03-27 | 2015-08-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of handling a thin wafer |
CN101853804B (zh) * | 2009-04-03 | 2012-05-23 | 南茂科技股份有限公司 | 半导体装置的制造方法 |
US8252665B2 (en) * | 2009-09-14 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Protection layer for adhesive material at wafer edge |
US8157621B2 (en) * | 2009-10-12 | 2012-04-17 | Nanya Technology Corp. | Wafer back side grinding process |
US8613996B2 (en) * | 2009-10-21 | 2013-12-24 | International Business Machines Corporation | Polymeric edge seal for bonded substrates |
US8287980B2 (en) | 2009-10-29 | 2012-10-16 | International Business Machines Corporation | Edge protection seal for bonded substrates |
TW202315049A (zh) * | 2010-02-16 | 2023-04-01 | 凡 歐貝克 | 製造3d半導體晶圓的方法 |
KR101665302B1 (ko) * | 2010-05-20 | 2016-10-24 | 에베 그룹 에. 탈너 게엠베하 | 칩 스택 제조 방법, 및 본 방법을 실시하기 위한 캐리어 |
US20120220101A1 (en) * | 2010-08-27 | 2012-08-30 | Triune Ip Llc | Internal conductive layer |
TWI505342B (zh) * | 2010-09-02 | 2015-10-21 | United Microelectronics Corp | 薄化晶圓的方法 |
US8278189B2 (en) * | 2010-09-02 | 2012-10-02 | United Microelectronics Corp. | Method for thinning wafer |
CN102403193A (zh) * | 2010-09-17 | 2012-04-04 | 联华电子股份有限公司 | 薄化晶片的方法 |
FR2969373B1 (fr) * | 2010-12-20 | 2013-07-19 | St Microelectronics Crolles 2 | Procede d'assemblage de deux plaques et dispositif correspondant |
FR2980036A1 (fr) * | 2011-09-12 | 2013-03-15 | St Microelectronics Crolles 2 | Procede de realisation d'une structure integree tridimensionnelle et structure correspondante |
US8778737B2 (en) | 2011-10-31 | 2014-07-15 | International Business Machines Corporation | Flattened substrate surface for substrate bonding |
US8765578B2 (en) * | 2012-06-06 | 2014-07-01 | International Business Machines Corporation | Edge protection of bonded wafers during wafer thinning |
JP5784658B2 (ja) * | 2013-02-28 | 2015-09-24 | 株式会社東芝 | 半導体装置の製造方法及び製造装置 |
US9028628B2 (en) | 2013-03-14 | 2015-05-12 | International Business Machines Corporation | Wafer-to-wafer oxide fusion bonding |
US9058974B2 (en) | 2013-06-03 | 2015-06-16 | International Business Machines Corporation | Distorting donor wafer to corresponding distortion of host wafer |
US9425155B2 (en) * | 2014-02-25 | 2016-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer bonding process and structure |
CN103839776B (zh) * | 2014-03-07 | 2016-11-16 | 上海华虹宏力半导体制造有限公司 | 半导体结构及其形成方法 |
FR3021455B1 (fr) * | 2014-05-21 | 2017-10-13 | St Microelectronics Crolles 2 Sas | Procede d'aplanissement d'evidements remplis de cuivre |
US9422156B2 (en) * | 2014-07-07 | 2016-08-23 | Invensense, Inc. | Integrated CMOS and MEMS sensor fabrication method and structure |
JP2016025116A (ja) * | 2014-07-16 | 2016-02-08 | 株式会社ディスコ | ウエーハの加工方法 |
CN105448750A (zh) * | 2014-08-28 | 2016-03-30 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制作方法和电子装置 |
CN105374741B (zh) * | 2014-08-30 | 2019-07-02 | 中芯国际集成电路制造(上海)有限公司 | 晶圆键合的方法以及晶圆的键合部件 |
US9337064B2 (en) | 2014-09-15 | 2016-05-10 | Micron Technology, Inc. | Methods of protecting peripheries of in-process semiconductor wafers and related in-process wafers and systems |
TWI571978B (zh) * | 2015-02-16 | 2017-02-21 | Asia Pacific Microsystems Inc | A method of manufacturing a microelement with a support structure |
US9443782B1 (en) | 2015-08-11 | 2016-09-13 | Freescale Semiconductor, Inc. | Method of bond pad protection during wafer processing |
US9972603B2 (en) * | 2015-12-29 | 2018-05-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Seal-ring structure for stacking integrated circuits |
US10867836B2 (en) * | 2016-05-02 | 2020-12-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Wafer stack and fabrication method thereof |
US10497667B2 (en) | 2017-09-26 | 2019-12-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Apparatus for bond wave propagation control |
US11276676B2 (en) | 2018-05-15 | 2022-03-15 | Invensas Bonding Technologies, Inc. | Stacked devices and methods of fabrication |
US11296044B2 (en) | 2018-08-29 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Bond enhancement structure in microelectronics for trapping contaminants during direct-bonding processes |
CN110223909B (zh) * | 2019-05-29 | 2024-03-26 | 浙江荷清柔性电子技术有限公司 | 一种晶圆边缘处理方法及晶圆组件 |
US11296053B2 (en) | 2019-06-26 | 2022-04-05 | Invensas Bonding Technologies, Inc. | Direct bonded stack structures for increased reliability and improved yield in microelectronics |
JP2021048303A (ja) | 2019-09-19 | 2021-03-25 | キオクシア株式会社 | 半導体装置 |
CN110854011A (zh) * | 2019-09-30 | 2020-02-28 | 芯盟科技有限公司 | 堆叠键合晶圆的处理方法 |
CN112185807B (zh) * | 2020-09-30 | 2023-12-22 | 武汉新芯集成电路制造有限公司 | 一种多晶圆堆叠结构的形成方法 |
US11862609B2 (en) * | 2021-03-18 | 2024-01-02 | Taiwan Semiconductor Manufacturing Company Limited | Semiconductor die including fuse structure and methods for forming the same |
KR20240046589A (ko) * | 2021-08-26 | 2024-04-09 | 가부시키가이샤 에바라 세이사꾸쇼 | 기판 처리 방법 및 기판 처리 장치 |
WO2023032552A1 (ja) * | 2021-09-01 | 2023-03-09 | 株式会社荏原製作所 | 基板処理方法 |
WO2023042547A1 (ja) | 2021-09-14 | 2023-03-23 | 株式会社荏原製作所 | 基板処理装置、および基板処理方法 |
JP2024010745A (ja) * | 2022-07-13 | 2024-01-25 | 株式会社荏原製作所 | 基板製造方法および基板製造装置 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3352896B2 (ja) * | 1997-01-17 | 2002-12-03 | 信越半導体株式会社 | 貼り合わせ基板の作製方法 |
US6358570B1 (en) * | 1999-03-31 | 2002-03-19 | Battelle Memorial Institute | Vacuum deposition and curing of oligomers and resins |
JP3580227B2 (ja) * | 2000-06-21 | 2004-10-20 | 三菱住友シリコン株式会社 | 複合基板の分離方法及び分離装置 |
FR2823373B1 (fr) * | 2001-04-10 | 2005-02-04 | Soitec Silicon On Insulator | Dispositif de coupe de couche d'un substrat, et procede associe |
US6762076B2 (en) * | 2002-02-20 | 2004-07-13 | Intel Corporation | Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices |
US6841848B2 (en) * | 2003-06-06 | 2005-01-11 | Analog Devices, Inc. | Composite semiconductor wafer and a method for forming the composite semiconductor wafer |
US20050003650A1 (en) * | 2003-07-02 | 2005-01-06 | Shriram Ramanathan | Three-dimensional stacked substrate arrangements |
US7186637B2 (en) * | 2003-07-31 | 2007-03-06 | Intel Corporation | Method of bonding semiconductor devices |
US20050161808A1 (en) * | 2004-01-22 | 2005-07-28 | Anderson Douglas G. | Wafer, intermediate wafer assembly and associated method for fabricating a silicon on insulator wafer having an improved edge profile |
US7129172B2 (en) * | 2004-03-29 | 2006-10-31 | Intel Corporation | Bonded wafer processing method |
US7087538B2 (en) * | 2004-08-16 | 2006-08-08 | Intel Corporation | Method to fill the gap between coupled wafers |
US7348786B2 (en) * | 2004-08-31 | 2008-03-25 | Georgia Tech Research Corporation | Probe module for testing chips with electrical and optical input/output interconnects, methods of use, and methods of fabrication |
US8124455B2 (en) * | 2005-04-02 | 2012-02-28 | Stats Chippac Ltd. | Wafer strength reinforcement system for ultra thin wafer thinning |
US7807550B2 (en) * | 2005-06-17 | 2010-10-05 | Dalsa Semiconductor Inc. | Method of making MEMS wafers |
-
2007
- 2007-04-25 US US11/740,178 patent/US8119500B2/en not_active Expired - Fee Related
- 2007-07-31 TW TW096127962A patent/TWI369717B/zh not_active IP Right Cessation
- 2007-08-21 CN CNB2007101417572A patent/CN100547751C/zh active Active
Also Published As
Publication number | Publication date |
---|---|
CN101295653A (zh) | 2008-10-29 |
US20080268614A1 (en) | 2008-10-30 |
CN100547751C (zh) | 2009-10-07 |
US8119500B2 (en) | 2012-02-21 |
TW200842933A (en) | 2008-11-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |