TWI368317B - Memory cell with multiple nitride layers and method of fabricating the same - Google Patents

Memory cell with multiple nitride layers and method of fabricating the same

Info

Publication number
TWI368317B
TWI368317B TW096125162A TW96125162A TWI368317B TW I368317 B TWI368317 B TW I368317B TW 096125162 A TW096125162 A TW 096125162A TW 96125162 A TW96125162 A TW 96125162A TW I368317 B TWI368317 B TW I368317B
Authority
TW
Taiwan
Prior art keywords
fabricating
memory cell
same
nitride layers
multiple nitride
Prior art date
Application number
TW096125162A
Other languages
English (en)
Other versions
TW200814303A (en
Inventor
Lei Xue
Rinji Sugino
Youseok Suh
Hidehiko Shiraiwa
Meng Ding
Shenqing Fang
Joong Jeon
Original Assignee
Spansion Llc
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion Llc, Advanced Micro Devices Inc filed Critical Spansion Llc
Publication of TW200814303A publication Critical patent/TW200814303A/zh
Application granted granted Critical
Publication of TWI368317B publication Critical patent/TWI368317B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401Multistep manufacturing processes
    • H01L29/4011Multistep manufacturing processes for data storage electrodes
    • H01L29/40117Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234Gate electrodes for transistors with charge trapping gate insulator
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
TW096125162A 2006-07-31 2007-07-11 Memory cell with multiple nitride layers and method of fabricating the same TWI368317B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/461,428 US8809936B2 (en) 2006-07-31 2006-07-31 Memory cell system with multiple nitride layers

Publications (2)

Publication Number Publication Date
TW200814303A TW200814303A (en) 2008-03-16
TWI368317B true TWI368317B (en) 2012-07-11

Family

ID=38985301

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096125162A TWI368317B (en) 2006-07-31 2007-07-11 Memory cell with multiple nitride layers and method of fabricating the same

Country Status (3)

Country Link
US (1) US8809936B2 (zh)
TW (1) TWI368317B (zh)
WO (1) WO2008016487A2 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080032475A1 (en) * 2006-08-02 2008-02-07 Spansion Llc Memory cell system with gradient charge isolation
KR100825787B1 (ko) * 2006-08-18 2008-04-29 삼성전자주식회사 전하트랩층을 포함하는 반도체 메모리소자
US8455268B2 (en) * 2007-08-31 2013-06-04 Spansion Llc Gate replacement with top oxide regrowth for the top oxide improvement
US8119545B2 (en) * 2008-03-31 2012-02-21 Tokyo Electron Limited Forming a silicon nitride film by plasma CVD
US8431984B2 (en) * 2008-11-18 2013-04-30 Samsung Electronics Co., Ltd. Nonvolatile memory devices including deep and high density trapping layers
KR101499849B1 (ko) * 2008-11-18 2015-03-11 삼성전자주식회사 비휘발성 메모리 장치
US8263458B2 (en) 2010-12-20 2012-09-11 Spansion Llc Process margin engineering in charge trapping field effect transistors
US9412598B2 (en) 2010-12-20 2016-08-09 Cypress Semiconductor Corporation Edge rounded field effect transistors and methods of manufacturing

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5955071A (ja) * 1982-09-24 1984-03-29 Hitachi Micro Comput Eng Ltd 不揮発性半導体装置
US5739569A (en) * 1991-05-15 1998-04-14 Texas Instruments Incorporated Non-volatile memory cell with oxide and nitride tunneling layers
KR100356471B1 (ko) 1999-12-29 2002-10-18 주식회사 하이닉스반도체 플래쉬 이이피롬 셀의 제조 방법
JP4151229B2 (ja) * 2000-10-26 2008-09-17 ソニー株式会社 不揮発性半導体記憶装置およびその製造方法
US6465306B1 (en) * 2000-11-28 2002-10-15 Advanced Micro Devices, Inc. Simultaneous formation of charge storage and bitline to wordline isolation
KR100639147B1 (ko) * 2001-01-25 2006-10-31 동경 엘렉트론 주식회사 플라즈마 처리 방법
US6709928B1 (en) * 2001-07-31 2004-03-23 Cypress Semiconductor Corporation Semiconductor device having silicon-rich layer and method of manufacturing such a device
US6440797B1 (en) * 2001-09-28 2002-08-27 Advanced Micro Devices, Inc. Nitride barrier layer for protection of ONO structure from top oxide loss in a fabrication of SONOS flash memory
US20030153149A1 (en) * 2002-02-08 2003-08-14 Zhong Dong Floating gate nitridation
JP3637332B2 (ja) * 2002-05-29 2005-04-13 株式会社東芝 半導体装置及びその製造方法
US7042045B2 (en) * 2002-06-04 2006-05-09 Samsung Electronics Co., Ltd. Non-volatile memory cell having a silicon-oxide nitride-oxide-silicon gate structure
US20080090425A9 (en) * 2002-06-12 2008-04-17 Christopher Olsen Two-step post nitridation annealing for lower EOT plasma nitrided gate dielectrics
US7122415B2 (en) * 2002-09-12 2006-10-17 Promos Technologies, Inc. Atomic layer deposition of interpoly oxides in a non-volatile memory device
US6893920B2 (en) 2002-09-12 2005-05-17 Promos Technologies, Inc. Method for forming a protective buffer layer for high temperature oxide processing
JP2004152924A (ja) * 2002-10-30 2004-05-27 Renesas Technology Corp 半導体記憶素子および半導体装置
EP1487013A3 (en) * 2003-06-10 2006-07-19 Samsung Electronics Co., Ltd. SONOS memory device and method of manufacturing the same
TWI244166B (en) * 2004-03-11 2005-11-21 Ememory Technology Inc A non-volatile memory cell and fabricating method thereof
KR20050116976A (ko) * 2004-06-09 2005-12-14 동부아남반도체 주식회사 플래시 메모리 소자 및 이의 프로그래밍/소거 방법
US6933218B1 (en) * 2004-06-10 2005-08-23 Mosel Vitelic, Inc. Low temperature nitridation of amorphous high-K metal-oxide in inter-gates insulator stack
DE102005008321B4 (de) * 2005-02-23 2008-09-25 Qimonda Ag Mittels Feldeffekt steuerbares Halbleiterspeicherelement mit verbessertem Einfangdielektrikum
US7612403B2 (en) * 2005-05-17 2009-11-03 Micron Technology, Inc. Low power non-volatile memory and gate stack

Also Published As

Publication number Publication date
WO2008016487A3 (en) 2008-06-05
US8809936B2 (en) 2014-08-19
TW200814303A (en) 2008-03-16
US20080023750A1 (en) 2008-01-31
WO2008016487A2 (en) 2008-02-07

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees