TWI366886B - A method for forming rectangular-shaped spacers for semiconductor devices - Google Patents
A method for forming rectangular-shaped spacers for semiconductor devicesInfo
- Publication number
- TWI366886B TWI366886B TW093139766A TW93139766A TWI366886B TW I366886 B TWI366886 B TW I366886B TW 093139766 A TW093139766 A TW 093139766A TW 93139766 A TW93139766 A TW 93139766A TW I366886 B TWI366886 B TW I366886B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor devices
- shaped spacers
- forming rectangular
- rectangular
- forming
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 125000006850 spacer group Chemical group 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/747,680 US7022596B2 (en) | 2003-12-30 | 2003-12-30 | Method for forming rectangular-shaped spacers for semiconductor devices |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200525693A TW200525693A (en) | 2005-08-01 |
TWI366886B true TWI366886B (en) | 2012-06-21 |
Family
ID=34710826
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW093139766A TWI366886B (en) | 2003-12-30 | 2004-12-21 | A method for forming rectangular-shaped spacers for semiconductor devices |
Country Status (8)
Country | Link |
---|---|
US (1) | US7022596B2 (zh) |
EP (1) | EP1704588B1 (zh) |
JP (1) | JP2007517398A (zh) |
KR (1) | KR101129712B1 (zh) |
CN (1) | CN1894783A (zh) |
DE (1) | DE602004024234D1 (zh) |
TW (1) | TWI366886B (zh) |
WO (1) | WO2005069362A1 (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050156229A1 (en) * | 2003-12-16 | 2005-07-21 | Yeap Geoffrey C. | Integrated circuit device and method therefor |
DE102005020133B4 (de) * | 2005-04-29 | 2012-03-29 | Advanced Micro Devices, Inc. | Verfahren zur Herstellung eines Transistorelements mit Technik zur Herstellung einer Kontaktisolationsschicht mit verbesserter Spannungsübertragungseffizienz |
US9111746B2 (en) * | 2012-03-22 | 2015-08-18 | Tokyo Electron Limited | Method for reducing damage to low-k gate spacer during etching |
KR101986538B1 (ko) | 2012-09-21 | 2019-06-07 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
US9378975B2 (en) | 2014-02-10 | 2016-06-28 | Tokyo Electron Limited | Etching method to form spacers having multiple film layers |
KR102394938B1 (ko) * | 2015-05-21 | 2022-05-09 | 삼성전자주식회사 | 반도체 소자 및 반도체 소자의 제조 방법 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59138379A (ja) * | 1983-01-27 | 1984-08-08 | Toshiba Corp | 半導体装置の製造方法 |
JPH02265250A (ja) * | 1989-04-05 | 1990-10-30 | Nec Corp | 半導体装置の製造方法 |
JP3360480B2 (ja) * | 1995-04-06 | 2002-12-24 | ソニー株式会社 | 半導体装置の製造方法 |
TW332316B (en) * | 1997-07-22 | 1998-05-21 | Holtek Microelectronics Inc | Manufacturing method of MOS transistor with adjustable source/drain extension area |
JPH1187703A (ja) * | 1997-09-10 | 1999-03-30 | Toshiba Corp | 半導体装置の製造方法 |
JPH11204784A (ja) * | 1998-01-09 | 1999-07-30 | Toshiba Corp | 半導体装置の製造方法 |
US6323519B1 (en) * | 1998-10-23 | 2001-11-27 | Advanced Micro Devices, Inc. | Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process |
US6190961B1 (en) * | 1999-09-22 | 2001-02-20 | International Business Machines Corporation | Fabricating a square spacer |
JP4771607B2 (ja) * | 2001-03-30 | 2011-09-14 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
US6440875B1 (en) * | 2001-05-02 | 2002-08-27 | Taiwan Semiconductor Manufacturing Co., Ltd | Masking layer method for forming a spacer layer with enhanced linewidth control |
KR100395878B1 (ko) * | 2001-08-31 | 2003-08-25 | 삼성전자주식회사 | 스페이서 형성 방법 |
JP2004014875A (ja) * | 2002-06-07 | 2004-01-15 | Fujitsu Ltd | 半導体装置及びその製造方法 |
-
2003
- 2003-12-30 US US10/747,680 patent/US7022596B2/en not_active Expired - Lifetime
-
2004
- 2004-10-26 DE DE602004024234T patent/DE602004024234D1/de active Active
- 2004-10-26 WO PCT/US2004/035407 patent/WO2005069362A1/en active Search and Examination
- 2004-10-26 KR KR1020067013138A patent/KR101129712B1/ko not_active IP Right Cessation
- 2004-10-26 EP EP04796395A patent/EP1704588B1/en not_active Ceased
- 2004-10-26 JP JP2006546981A patent/JP2007517398A/ja active Pending
- 2004-10-26 CN CNA2004800375007A patent/CN1894783A/zh active Pending
- 2004-12-21 TW TW093139766A patent/TWI366886B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2005069362A1 (en) | 2005-07-28 |
US20050146059A1 (en) | 2005-07-07 |
US7022596B2 (en) | 2006-04-04 |
KR101129712B1 (ko) | 2012-03-28 |
CN1894783A (zh) | 2007-01-10 |
EP1704588A1 (en) | 2006-09-27 |
EP1704588B1 (en) | 2009-11-18 |
JP2007517398A (ja) | 2007-06-28 |
KR20060112676A (ko) | 2006-11-01 |
DE602004024234D1 (de) | 2009-12-31 |
TW200525693A (en) | 2005-08-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |