TWI366237B - Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure - Google Patents
Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structureInfo
- Publication number
- TWI366237B TWI366237B TW096129446A TW96129446A TWI366237B TW I366237 B TWI366237 B TW I366237B TW 096129446 A TW096129446 A TW 096129446A TW 96129446 A TW96129446 A TW 96129446A TW I366237 B TWI366237 B TW I366237B
- Authority
- TW
- Taiwan
- Prior art keywords
- silicon
- methods
- ion implantation
- implantation process
- surface activation
- Prior art date
Links
- 238000000034 method Methods 0.000 title 2
- 230000004913 activation Effects 0.000 title 1
- 238000007654 immersion Methods 0.000 title 1
- 239000012212 insulator Substances 0.000 title 1
- 238000005468 ion implantation Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32412—Plasma immersion ion implantation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Analytical Chemistry (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Drying Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/463,425 US7745309B2 (en) | 2006-08-09 | 2006-08-09 | Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200822241A TW200822241A (en) | 2008-05-16 |
| TWI366237B true TWI366237B (en) | 2012-06-11 |
Family
ID=39051326
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW096129446A TWI366237B (en) | 2006-08-09 | 2007-08-09 | Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7745309B2 (enExample) |
| JP (1) | JP5340934B2 (enExample) |
| TW (1) | TWI366237B (enExample) |
| WO (1) | WO2008021746A2 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7390708B2 (en) * | 2006-10-23 | 2008-06-24 | Interuniversitair Microelektronica Centrum (Imec) Vzw | Patterning of doped poly-silicon gates |
| US7858495B2 (en) * | 2008-02-04 | 2010-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5452590B2 (ja) * | 2008-06-20 | 2014-03-26 | 天錫 李 | 薄膜製造方法 |
| JP5663150B2 (ja) * | 2008-07-22 | 2015-02-04 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| EP2282332B1 (en) * | 2009-08-04 | 2012-06-27 | S.O.I. TEC Silicon | Method for fabricating a semiconductor substrate |
| TWI402898B (zh) * | 2009-09-03 | 2013-07-21 | Atomic Energy Council | 鈍化修補太陽能電池缺陷之方法 |
| KR101705937B1 (ko) | 2011-01-25 | 2017-02-10 | 에베 그룹 에. 탈너 게엠베하 | 웨이퍼들의 영구적 결합을 위한 방법 |
| JP2014516470A (ja) | 2011-04-08 | 2014-07-10 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | ウェハを恒久的にボンディングするための方法 |
| US8987096B2 (en) * | 2012-02-07 | 2015-03-24 | United Microelectronics Corp. | Semiconductor process |
| CN104488065B (zh) * | 2012-07-24 | 2017-09-05 | Ev 集团 E·索尔纳有限责任公司 | 永久结合晶圆的方法及装置 |
| US8951896B2 (en) | 2013-06-28 | 2015-02-10 | International Business Machines Corporation | High linearity SOI wafer for low-distortion circuit applications |
| EP3608973A1 (en) * | 2018-08-08 | 2020-02-12 | Meyer Burger Research AG | Method for manufacturing photovoltaic devices and photovoltaic devices made with the method |
| CN117174728B (zh) * | 2023-11-02 | 2024-02-20 | 合肥新晶集成电路有限公司 | 晶圆处理方法及晶圆结构 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6472522A (en) * | 1987-09-14 | 1989-03-17 | Nippon Telegraph & Telephone | Apparatus for manufacturing semiconductor substrate |
| JPH0391227A (ja) * | 1989-09-01 | 1991-04-16 | Nippon Soken Inc | 半導体基板の接着方法 |
| JP2910334B2 (ja) * | 1991-07-22 | 1999-06-23 | 富士電機株式会社 | 接合方法 |
| WO1999026277A1 (en) | 1997-11-17 | 1999-05-27 | Mattson Technology, Inc. | Systems and methods for plasma enhanced processing of semiconductor wafers |
| US6287941B1 (en) * | 1999-04-21 | 2001-09-11 | Silicon Genesis Corporation | Surface finishing of SOI substrates using an EPI process |
| US6489241B1 (en) * | 1999-09-17 | 2002-12-03 | Applied Materials, Inc. | Apparatus and method for surface finishing a silicon film |
| US6893907B2 (en) | 2002-06-05 | 2005-05-17 | Applied Materials, Inc. | Fabrication of silicon-on-insulator structure using plasma immersion ion implantation |
| US7183177B2 (en) | 2000-08-11 | 2007-02-27 | Applied Materials, Inc. | Silicon-on-insulator wafer transfer method using surface activation plasma immersion ion implantation for wafer-to-wafer adhesion enhancement |
| US7465478B2 (en) | 2000-08-11 | 2008-12-16 | Applied Materials, Inc. | Plasma immersion ion implantation process |
| FR2864336B1 (fr) * | 2003-12-23 | 2006-04-28 | Commissariat Energie Atomique | Procede de scellement de deux plaques avec formation d'un contact ohmique entre celles-ci |
| JP4730645B2 (ja) * | 2004-02-13 | 2011-07-20 | 株式会社Sumco | Soiウェーハの製造方法 |
| US7261793B2 (en) * | 2004-08-13 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | System and method for low temperature plasma-enhanced bonding |
-
2006
- 2006-08-09 US US11/463,425 patent/US7745309B2/en active Active
-
2007
- 2007-08-02 JP JP2009523910A patent/JP5340934B2/ja not_active Expired - Fee Related
- 2007-08-02 WO PCT/US2007/075118 patent/WO2008021746A2/en not_active Ceased
- 2007-08-09 TW TW096129446A patent/TWI366237B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010500761A (ja) | 2010-01-07 |
| US20080038900A1 (en) | 2008-02-14 |
| US7745309B2 (en) | 2010-06-29 |
| WO2008021746A2 (en) | 2008-02-21 |
| WO2008021746A3 (en) | 2008-04-03 |
| TW200822241A (en) | 2008-05-16 |
| JP5340934B2 (ja) | 2013-11-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |