1353031 九、發明說明： 【發明所屬之技術領域】 本發明係與測試裝置有關’特別是指用於測試積體電 路晶圓之一種高速測試裝置。 5【先前技術】 積體電路晶圓測試中，用以傳輪測試訊號之探針卡電 路板係供測試機台的測試頭點觸’以接收測試機台的測試 訊號並傳送至電路板下方近中心處所密集設置之探針上， 當各探針對應點觸的晶圓電子元件接收測試訊號後，則透 10過探針卡回傳所對應的電氣特性至測試機台以供分析，如 此在整個晶圓級測試過程中，探針卡電路板的電路傳輸設 計對電子元件的測試結果佔有很重要的影響，尤其隨著電 子科技越趨高速之運作，測試過程需操作於實際對應的高 速運作條件，故傳輸線路之製作更需符合高速訊號的操作 15 條件。 以第一圖所示為美國專利第5808475號所提供之『低 電流量測用之半導體探針卡』，該探針卡丨結構區分為上方 的接觸板ίο、下方的探針板12及中間的數個間隔材14, 其中，接觸電路板10上設置有如同軸傳輸線結構之測試接 2〇點11 ’可避免接觸電路板10本身的介質環境所產生的寄生 電阻導致漏電流問題’然由於接觸板1〇為直接供測試機台 Γ的測試頭點觸，探針板12為供以設置探針13，若接觸 10或探針板12本身沒有足夠的支㈣度與—定的剛體严 度，當測試機台1’下壓且施以應力欲於整個探針卡i結^ 4 1353031 時’接觸板10與探針板12的受力平面則容易因局部受力 不平均而使接觸板10或探針板12產生形變的問題’況且 當各探針13點觸晶圓平面時，單獨探針板12前端則需不 斷的承受來自晶圓平面產生的反作用力，如此長時間的應 5力作用下’探針板12前端用以設置探針π的平面結構亦 容易產生形變。 縱使可如第二圖所示為習用之另一探針卡2結構，其 訊號傳輸過程為經由多層印刷電路板2〇上所佈設之線路 21由外至内且由上至下的延伸穿設層疊之電路板2〇，然後 1〇由探針22送出，故電路板2〇之整體結構強度與其單一受 力平面可於承受應力時平均分散此作用力，而不致發生局 部受力不平均所產生形變的問題；然多層印刷電路板2〇係 以多層玻璃纖維材質或陶瓷材質所壓合而成，各層結構上 佈設有金屬線材以形成導線21結構，故製作上不但需耗費 I5相當的成本與工時，且將傳輸線路21佈設於電路板内部 時，相鄰線路21佈設之間的電路板2〇材質極容易造成漏 電流的主因，加上因電路板1〇各層結構所穿設的導通孔線 路210易使訊號縱向傳遞時發生介面反射的能量耗損，如 此皆嚴重影響尚頻訊號的傳輸特性，而無法符合電子電路 20元件的高逮測試需求。 【發明内容】 因此，本發明之主要目的乃在於提供一種高速測試裝 置’具有高效率且低成本的製造工程，並可使高頻測試維 5 持有1¾品質的傳輸特性。 口為達成前揭目的，本發明所提供一種高速測試裝置， 傳送則》式機台所送出之測試訊號以對積體電路晶圓做電 性，°式’係以一支撐架一體成形之剛性結構，於外環部位 支樓二電路層’於近中心部位支樓—探針組，當測試機台 自，南速顺裝置之上方下壓點顧電路層時，即由該支 撐架之外環部位承受此了壓闕之應力，且t該探針組所 設置之探針對應_於晶圓上的電子元件時，即由該支樓 架之内環部位承受來自晶圓之反作用力，能⑽支稽架之 單-結構朗於ϋ定所有可等效傳送喊之電路層及探針 組結構；更由於該電路㈣單—層厚之良好絕緣材質結 構’故即使訊號需貫穿該電路層亦僅為極短的路徑，有效 解決了測試訊號於介質材料中傳遞時相鄰傳輸訊號之間的 漏電流效應’並有效降低了如習用多層印刷f路板繁雜之 製作工程。 【實施方式】 以下，茲配合圖示列舉若干較佳實施例，用以對本 發明之結構與功效作詳細說明，其中所用圖示之簡要說 明如下： 第二圖係本發明第一較佳實施例所提供高速測試裝置之 頂視圖； 第四圖係上述第一較佳實施例所提供高速測試裝置之底 1353031 視圖； 第五圖係第三圖所示a-a連線之剖視圖； 第六圖係上述第-較佳實施靖提供支料之結構立體 圖， 5第七_上述第—較佳實施例所提供高迷測試裝置之高 頻傳輸訊號之特性曲線圖 门 第八圖係本發㈣二紐實施倾提供高制試裝置之 結構不意圖， 第九圖係本發明第三紐實關所提供高速測試裝置之 10 結構示意圖。 請參閱如第三至第五圖所示本發明所提供第一較佳實 施例之一高速測試裝置3，可傳送測試機台所送出之測試訊 號以對積體電路晶圓做電性測試，包括有一支樓架3〇、一 15電路層40、一懸臂式探針組50及多數個訊號線60,其中： 請參閱如第六圖所示，該支撐架30為具有相當強度之 環形剛體，大小相當於一般半導體晶圓之尺寸規格，以一 般不銹鋼或金屬材質一體成形製成，配合厚度上相當於習 用多層印刷電路板之結構，即可承受該高速測試裝置3於 20測試操作過程中所受之應力作用，且不會改變其剛體平面 度故不致產生形變，係區分有上、下相對之一上表面301、 一下表面302 ’以及自外圍朝中心依序分佈之一第一環部 1353031 3第 1、二環=2、多數個徑部33、-第三環部34及- 及該些徑部33之組成係定義 樓部36’其組成戴面範圍相當於 ，電路層4G德向戴面範圍且與該電路層4q於一水平面 f = ’可提該電路層4Q所承受之 該 第四㈣35贼義為該支料3Q之—第二支料，供以 堍置該探針組50且提供支撐’、 用，配合第五圖參照。牙对針組50所承受之應力作 10 15 請配合第三及第五圖參照，訪a Α =:單一層印_，:設於;支:為=; 且位於該第找部36上，該電路層⑼上設 數個測試接點41，對應於各該测試接點 設有具良好導電性之一莫^丨心# 又置I位置則貫 ^ # ，該些測試接點41供上述測 收職訊號，該⑽孔42於該電路層 所接收f該訊號線6〇,因此可將各朗試接點41 所接收之測試訊號傳輸至該訊號線6〇。 請配合第四及第五圖參照，該探針組5〇具有 二;=板52及多數個懸臂式探針53，該探針座^ ^亥支縣3G之第四環部35下方，為具有良 些:製成，供以穿設且固定該些探針53，使該 A且女之針尖部位懸設於該探針座51下方，該轉接板 之第及it躲郝之單朴㈣㈣，設於該支樓架 ίHr 35下方，貫設有多數個具良好導電性 各該導孔520之兩端因此供以焊接該訊號線 8 201353031 IX. Description of the Invention: [Technical Field] The present invention relates to a test device, particularly a high-speed test device for testing an integrated circuit wafer. 5 [Prior Art] In the integrated circuit wafer test, the probe card circuit board for transmitting the test signal is used to touch the test head of the test machine to receive the test signal of the test machine and transmit it to the lower part of the circuit board. On the probes densely arranged near the center, when the probes corresponding to the touched electronic components of the probes receive the test signals, the probes are passed through the corresponding electrical characteristics to the test machine for analysis. During the entire wafer level test process, the circuit design of the probe card board has a significant impact on the test results of the electronic components. Especially with the higher speed operation of electronic technology, the test process needs to operate at the actual corresponding high speed. Operating conditions, the production of transmission lines is more in line with the operation of high-speed signals. In the first figure, the "semiconductor probe card for low current measurement" provided by U.S. Patent No. 5,808,475, the probe cassette structure is divided into an upper contact plate ίο, a lower probe card 12 and a middle portion. a plurality of spacers 14, wherein the contact circuit board 10 is provided with a test connection 2' 11' such as a coaxial transmission line structure to avoid leakage current problems caused by the parasitic resistance of the dielectric environment contacting the circuit board 10 itself. The board 1 is directly touched by the test head of the test machine, and the probe board 12 is provided with the probe 13. If the contact 10 or the probe board 12 itself does not have sufficient support (four degrees) and the rigid body rigidity When the test machine 1' is pressed down and the stress is applied to the entire probe card i ^ 4 1353031, the contact plane of the contact plate 10 and the probe card 12 is easily affected by local uneven force. 10 or the probe card 12 produces a problem of deformation. [When the probes 13 touch the wafer plane, the front end of the single probe card 12 needs to constantly withstand the reaction force generated from the wafer plane, so long time should be 5 Under the force of the 'probe board 12 front end for setting The planar structure of the probe π is also prone to deformation. Even though the other probe card 2 structure can be used as shown in the second figure, the signal transmission process is performed from the outside to the inside and from the top to the bottom through the line 21 disposed on the multilayer printed circuit board 2 The laminated circuit board 2〇 is then sent out by the probe 22, so that the overall structural strength of the circuit board 2〇 and its single force plane can disperse the force evenly when subjected to stress, without local uneven force. The problem of deformation is generated; however, the multilayer printed circuit board 2 is formed by laminating a plurality of layers of glass fiber material or ceramic material, and each layer structure is provided with a metal wire to form a wire 21 structure, so that it is not only costly equivalent to I5. And the working hours, and the transmission line 21 is disposed inside the circuit board, the circuit board 2 between the adjacent lines 21 is very easy to cause leakage current, and the circuit board 1 is designed to be used for each layer structure. The via line 210 is easy to cause the energy loss of the interface reflection when the signal is transmitted longitudinally, which seriously affects the transmission characteristics of the still-frequency signal, and cannot meet the high-acquisition test requirements of the electronic circuit 20 component. . SUMMARY OF THE INVENTION Accordingly, it is a primary object of the present invention to provide a high-speed test apparatus that has a high efficiency and low cost manufacturing process and that allows high frequency test dimensions to have a transmission characteristic of 13⁄4 quality. In order to achieve the goal, the present invention provides a high-speed test device, which transmits a test signal sent by a machine to electrically charge an integrated circuit wafer, and a type of rigid structure integrally formed by a support frame. In the outer ring part, the second circuit layer of the branch is near the central part of the branch-probe group. When the test machine is pressed from above the south speed-shun device, the outer ring of the support frame is The part is subjected to the compressive stress, and when the probe set by the probe set corresponds to the electronic component on the wafer, the inner ring portion of the support frame receives the reaction force from the wafer, and (10) The single-structure of the branch is designed to be able to transfer all the circuits and probe sets that can be equivalently transmitted; and because of the good insulating material structure of the circuit (4) single-layer thickness, even if the signal needs to run through the circuit layer It is also a very short path, which effectively solves the leakage current effect between adjacent transmission signals when the test signal is transmitted in the dielectric material' and effectively reduces the complicated manufacturing process such as the conventional multi-layer printing f-way board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, in which FIG. A top view of the high-speed test apparatus provided; a fourth view is a view of the bottom 1353031 of the high-speed test apparatus provided in the first preferred embodiment; a fifth view is a cross-sectional view of the aa connection shown in the third figure; The first preferred embodiment provides a perspective view of the structure of the support material, and the seventh embodiment of the present invention provides a characteristic diagram of the high frequency transmission signal of the fascinating test device. The structure of the high-testing device is not intended to be provided. The ninth drawing is a schematic view of the structure of the high-speed testing device provided by the third Neusgate of the present invention. Please refer to the high-speed testing device 3 of the first preferred embodiment provided by the present invention as shown in the third to fifth figures. The test signal sent by the testing machine can be transmitted to perform electrical testing on the integrated circuit wafer, including There is a truss 3 〇, a 15 circuit layer 40, a cantilever probe set 50 and a plurality of signal lines 60, wherein: as shown in the sixth figure, the support frame 30 is a ring-shaped rigid body of considerable strength. The size is equivalent to the size of a general semiconductor wafer. It is integrally formed of stainless steel or metal. It is equivalent to the structure of a conventional multilayer printed circuit board. It can withstand the high-speed test device 3 during the 20 test operation. Under the stress, and does not change its rigid body flatness, it does not cause deformation. It is divided into upper and lower opposite upper surface 301, lower surface 302', and one of the first ring portions 1353031 from the periphery toward the center. 3, 1st and 2nd rings = 2, a plurality of diameter portions 33, - the third ring portions 34 and - and the components of the diameter portions 33 define the floor portion 36', and the composition of the surface is equivalent to the circuit layer 4G Wear range And the circuit layer 4q in a horizontal plane f = 'the fourth (four) 35 thief that the circuit layer 4Q bears is the second material of the material 3Q, for providing the probe set 50 and providing support ', use, with the fifth figure reference. The stress on the pair of teeth 50 is 10 15 Please refer to the third and fifth figures for reference. Visit a Α =: single layer _,: set at; branch: =; and located at the first finding unit 36, The circuit layer (9) is provided with a plurality of test contacts 41, corresponding to each of the test contacts, one of which has good conductivity, and the other position is the same as ^, and the test contacts 41 are provided. In the above-mentioned measurement service signal, the (10) hole 42 receives the signal line 6〇 at the circuit layer, so that the test signal received by each of the test terminals 41 can be transmitted to the signal line 6〇. Referring to the fourth and fifth figures, the probe set 5 has two; = plate 52 and a plurality of cantilever probes 53, which are below the fourth ring portion 35 of the 3G of Haizhi County. More preferably: made to provide and fix the probes 53 so that the needle portion of the A and the female is suspended under the probe holder 51, and the first and second sides of the adapter plate (4) (4), disposed under the truss ίHr 35, and having a plurality of ends of the guide holes 520 having good electrical conductivity so as to be soldered to the signal line 8 20
丄JJ 6〇及探針53。 於上=t本發明利用該支揮架30 一體成形之剛性結構’ 試· 電路層4〇 ’於下方支撑該探針座5卜故當測 路層40 之 m h ^ 卩由該第支撐部36承受此下壓點觸之 ^由^當該些探針53對應點觸於晶圓上的電子元件時， 如習it”部承受來自晶圓之反作用力，不但降低了 作3二 !路板繁雜之製作工程，更因能以大量製 1。之二：J 30之早一結構應用於固定所有可等效傳送訊號 工划.二探物結構，有效縮短了整細m裝置的製作 ’处者’由於該電路層40與轉接板52皆為單一層厚 導^ 42絕t材質結構，故貫穿該電路層4G與轉接板52之 質材料中2 Γ為極糾路徑’有效解決了測試訊號於介 15 鄰傳輸訊號之間的漏電流效應，且該些 本 520於縱向貫穿路徑上不需經過層間介質，因此 些導孔42、520時，不致發生如習用 佶貝孔結構所面臨於層間介質之能量耗損 問使該尚速測試裳置3用以高頻測試過程維持有良好 且抗匹配特性，請參閱如第七圖所示為該高速測試 〇裝置3之訊麵率特性曲線圖，圖中之反射耗損曲線sn 顯不該商相m裝置3傳遞高娜有極佳的阻抗匹 配，圖中之插人耗損曲線扣更顯示在傳輸高頻訊號之. 增益通帶限制頻率可高至數GHZ頻段，具有低損耗、匹配 佳的高頻訊號傳輸品質。 9 1353031 值得一提的是，若為更佳的高頻訊號傳遞考量，則可 如第八圖所示為本發明所提供第二較佳實施例之一高速測 试裝置4 ’係具有該支樓架3〇、一電路層45、一懸臂式探 針組55及多數個訊號線65，與上述第一較佳實施二所提供 5 者之差異在於： 該電路層45上設有多數個測試接點46以及對應於各 該測試接點46之位置所穿設之一通孔47，該些通孔47分 別供各該訊號線65穿過使電性連接該測試接點46;該探針 組55具有該探針座51及多數個懸臂式探針％，該些探針 56於鄰近該探針座51處分別與各該訊號線65相接設。 故當各該測試接點46接收測試機台所傳送之高頻測試 訊號後，直接透過專為高㈣輸所設計之峨線&傳遞高 頻測試訊號至各該探針56，因此該高速測試裝置4能進— 步免去測試訊號傳遞於介質材料中，有效阻止相鄰傳輪訊 二：間的漏電流效應，且因提供單一且高品質之訊號傳輸 更具有低損耗、匹配佳的高頻訊號傳輸品質。 當然，本發明所提供之測試裝置除了如上述實施例之 =探針結構之應用外’亦可如第九圖所示為本發明所 2。較佳實施例之一高速測試裝置5’為垂直式探針結 ‘、、，包括有該支撐架30、一電路層7〇、一垂直式探 =80及多數個訊號線9〇,與上述實施例所提供者之差異 該電路層70上設有多數個測試接點71以及對 該測試接點71之鄰近位置所電性連接之—訊號銲點72、，各 έ訊號銲點72電性連接該訊號線90,因此可將各該測試接 ‘· 71所接收之測試訊號傳輸至該訊號線9〇。 垂該探針組80具有一固定座81、一探針座82及多數個 %直式探針83，該固定座81設於該支撐架3〇之第四環部 ^，具有一開口 811朝上及一底座812，該些訊號線9〇自 二，σ 811延伸置入且穿設該底座812’該底座812下方與 =探針座82相固接，該探針座82為具有良好絕緣及防震 丨生之材質所製成，各該探針83為縱向穿設該探針座82 吏端電性連接該訊號線9 〇另一端針尖部位懸設於該 座82下方。 。故本發明所提供該高速測試裝置$同樣為利用該支樓 架30 —體成形之剛性結構，於上方支撐該電路層％，於該 第四環部35 顧定座81及探針座82，纽承受該電 路層70及該些探針83所直接接收的應力來源，且當各該 测試接點71魏職機綺料之職喊後，可透過該 些訊號線90傳遞至各贿針83，同樣能有效降仙鄰傳輸 訊號之間的漏電流效應，提供高品f之訊號傳輸環境。 唯’以上所述者，僅為本發明之較佳可行實施例而已， 故舉凡應用本發明說明書及申請專利範圍所為效 變化，理應包含在本發明之專利範圍内。 、、°構 【圖式簡單說明】 第一圖係美國專利第5808475號所提供探針卡之結構 示意圖； 第二圖係習用—懸臂式探針卡之結構示意圖； 第二圖係本㈣第—較佳實細所提供高朗試裝置之 頂視圖； 第四圖係上述第—較佳實施例所提供高迷測試裝置之底 視圖； _ 第五圖係第三圖所示A_A連線之剖視圖； 圖， 第六圖係上述[較佳實施例所提供讀架之結構立體 第七圖係上述第-較佳實施例所提供高速測試襞 頻傳輸訊號之特性曲線圖 、 第八圖係本㈣S二錄魏例峨供高 結構示意圖； 結構:意九:係本發明第简施例所提供高速測試裝 置之高 置之 置之 1353031 【主要元件符號說明】 3、4、5高速測試裝置 30支撐架 301上表面 302下表面 31第一環部 5 32第二環部 33徑部 34第三環部 35第四環部 36第一支撐部 40、45、70電路層 41、46、71測試接點 42、520導孔 47通孔 50、55懸臂式探針組 10 51、82探針座 52轉接板 53懸臂式探針 60、65、90訊號線 72訊號銲點 80垂直式探針組 81固定座 811 開口 812底座 83垂直式探針 15 S11反射耗損曲線 S12插入耗損曲線丄JJ 6〇 and probe 53. In the above, the present invention utilizes the rigid structure 'test circuit layer 4' integrally formed by the support frame 30 to support the probe holder 5 below. Therefore, the mh ^ 测 of the path layer 40 is supported by the first support portion 36. When the probes 53 touch the electronic components on the wafer, if the probes are subjected to the reaction force from the wafer, they are not only reduced by the 3! The complicated production process, but also because of the large number of systems. 2: J 30 early structure is used to fix all the equivalent transmission signal planning. Two probe structure, effectively shortening the production of the fine m device Since both the circuit layer 40 and the interposer 52 are of a single layer thickness, the material structure of the circuit layer 4G and the interposer 52 is effectively corrected. The test signal has a leakage current effect between the adjacent transmission signals, and the 520 does not need to pass through the interlayer medium in the longitudinal through path, so that the holes 42 and 520 do not face the conventional mussel hole structure. The energy consumption of the interlayer medium is asked to make the speed test 3 for high frequency test. The process is maintained with good and anti-matching characteristics. Please refer to the signal rate characteristic curve of the high-speed test device 3 as shown in the seventh figure. The reflection loss curve sn in the figure is not the commercial phase. Excellent impedance matching, the insertion loss curve buckle in the figure is displayed in the transmission of high frequency signals. The gain passband limit frequency can be as high as several GHZ frequency band, with low loss and good matching high frequency signal transmission quality. 1353031 It is worth mentioning that, for better high-frequency signal transmission considerations, as shown in the eighth figure, a high-speed test device 4' of the second preferred embodiment of the present invention has the branch. The difference between the frame 3, the circuit layer 45, the cantilever probe set 55 and the plurality of signal lines 65 is the same as the one provided in the first preferred embodiment 2: the circuit layer 45 is provided with a plurality of test connections. A through hole 47 is formed in the point 46 and a position corresponding to each of the test contacts 46. The through holes 47 are respectively passed through the signal lines 65 to electrically connect the test contacts 46. The probe set 55 Having the probe holder 51 and a plurality of cantilever probes %, the probes 56 is adjacent to each of the signal lines 65 adjacent to the probe base 51. Therefore, when the test contacts 46 receive the high frequency test signals transmitted by the test machine, they are directly designed for the high (four) transmission. The squall line & transmits a high frequency test signal to each of the probes 56, so that the high speed test device 4 can further eliminate the test signal from being transmitted to the dielectric material, effectively preventing the leakage current effect between adjacent transmissions And because of providing a single and high-quality signal transmission, the low-loss, well-matched high-frequency signal transmission quality is better. Of course, the test apparatus provided by the present invention can be used in addition to the application of the probe structure as in the above embodiment. As shown in the ninth embodiment, the high-speed testing device 5' is a vertical probe node', including the support frame 30, a circuit layer 7〇, and a vertical probe. </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; Point 72, each signal solder joint 72 electrical The signal line 90 connected, can therefore be connected to each of the test '· 71 receives the test signal transmitted to the signal line 9〇. The probe set 80 has a fixing base 81, a probe base 82 and a plurality of % straight probes 83. The fixing base 81 is disposed on the fourth ring portion of the support frame 3, and has an opening 811 And a base 812, the signal lines 9 延伸 extend from the second, σ 811 and pass through the base 812 ′. The base 812 is fixedly connected to the probe base 82 , and the probe base 82 has good insulation The probe 83 is longitudinally disposed through the probe holder 82. The end of the probe is electrically connected to the signal line 9. The other end of the probe is suspended below the seat 82. . Therefore, the high-speed test apparatus $ provided by the present invention is also a rigid structure formed by the body frame 30, and supports the circuit layer % on the upper portion, and the fourth ring portion 35 is fixed to the base 81 and the probe base 82. The button receives the stress source directly received by the circuit layer 70 and the probes 83, and can be transmitted to the respective pins through the signal lines 90 after the test contacts 71 are called for the job. 83, can also effectively reduce the leakage current effect between the transmission signals of the neighbors, and provide a high-quality signal transmission environment. It is to be understood that the above description is only a preferred embodiment of the present invention, and that the scope of the invention is intended to be included in the scope of the invention. The first figure is a schematic diagram of the structure of the probe card provided by US Pat. No. 5,808,475; the second figure is a schematic diagram of the structure of the conventional cantilever probe card; the second figure is the fourth (4) - a top view of the high test device provided by the preferred embodiment; the fourth view is a bottom view of the test device provided by the above preferred embodiment; _ the fifth figure is the A_A connection shown in the third figure FIG. 6 is a characteristic diagram of the high-speed test frequency transmission signal provided by the above-described first preferred embodiment, and the eighth diagram is the same. (4) Schematic diagram of the high-structure structure of the second example of the S-record; structure: meaning nine: the high-level test device provided by the first embodiment of the present invention is 1353031 [Major component symbol description] 3, 4, 5 high-speed test device 30 Support frame 301 upper surface 302 lower surface 31 first ring portion 5 32 second ring portion 33 diameter portion 34 third ring portion 35 fourth ring portion 36 first support portion 40, 45, 70 circuit layer 41, 46, 71 test Contact 42, 42 520 through hole 47 through hole 50, 55 Probe set 10 51, 82 probe holder 52 adapter plate 53 cantilever probe 60, 65, 90 signal line 72 signal solder joint 80 vertical probe set 81 mount 811 opening 812 base 83 vertical probe 15 S11 reflection loss curve S12 inserts the loss curve