TWI350658B - Digital delay line based frequency synthesizer and related method - Google Patents

Digital delay line based frequency synthesizer and related method

Info

Publication number
TWI350658B
TWI350658B TW097103850A TW97103850A TWI350658B TW I350658 B TWI350658 B TW I350658B TW 097103850 A TW097103850 A TW 097103850A TW 97103850 A TW97103850 A TW 97103850A TW I350658 B TWI350658 B TW I350658B
Authority
TW
Taiwan
Prior art keywords
delay line
frequency synthesizer
line based
related method
digital delay
Prior art date
Application number
TW097103850A
Other languages
English (en)
Other versions
TW200835159A (en
Inventor
Ping Ying Wang
Original Assignee
Mediatek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mediatek Inc filed Critical Mediatek Inc
Publication of TW200835159A publication Critical patent/TW200835159A/zh
Application granted granted Critical
Publication of TWI350658B publication Critical patent/TWI350658B/zh

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
TW097103850A 2007-02-09 2008-02-01 Digital delay line based frequency synthesizer and related method TWI350658B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88894907P 2007-02-09 2007-02-09

Publications (2)

Publication Number Publication Date
TW200835159A TW200835159A (en) 2008-08-16
TWI350658B true TWI350658B (en) 2011-10-11

Family

ID=39597791

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097103850A TWI350658B (en) 2007-02-09 2008-02-01 Digital delay line based frequency synthesizer and related method

Country Status (4)

Country Link
US (1) US8149022B2 (zh)
CN (1) CN101242184B (zh)
DE (1) DE102008008050B4 (zh)
TW (1) TWI350658B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024693B2 (en) 2013-06-06 2015-05-05 Industrial Technology Research Institute Crystal-less clock generator and operation method thereof
CN104967449A (zh) * 2014-03-31 2015-10-07 英特尔Ip公司 装置、用于获得校准数据和生成本地振荡器信号的方法

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US7783467B2 (en) * 2005-12-10 2010-08-24 Electronics And Telecommunications Research Institute Method for digital system modeling by using higher software simulator
TWI364169B (en) * 2008-12-09 2012-05-11 Sunplus Technology Co Ltd All digital phase locked loop circuit
CN101789783B (zh) * 2009-01-22 2013-05-29 中芯国际集成电路制造(上海)有限公司 数字延迟锁相环
US8044742B2 (en) 2009-03-11 2011-10-25 Qualcomm Incorporated Wideband phase modulator
TWI422157B (zh) * 2009-12-02 2014-01-01 Mstar Semiconductor Inc 相位產生裝置及相位產生方法
US8588720B2 (en) * 2009-12-15 2013-11-19 Qualcomm Incorproated Signal decimation techniques
WO2013048525A1 (en) * 2011-10-01 2013-04-04 Intel Corporation Digital fractional frequency divider
US9000858B2 (en) 2012-04-25 2015-04-07 Qualcomm Incorporated Ultra-wide band frequency modulator
US9490830B2 (en) 2013-01-09 2016-11-08 Star Dynamics Corporation Method and apparatus for synthesis of wideband low phase noise radio frequency signals
IL224819A (en) 2013-02-20 2016-09-29 E Levy Raphael Frequency Generator Testing System and Method
DE102013114367B4 (de) * 2013-12-18 2017-02-02 Intel IP Corporation Eine Schaltung, ein Verfahren und ein Synthesizer für das Generieren eines synthetisierten Signals mit einer wählbaren Frequenz
US10153777B2 (en) * 2016-09-30 2018-12-11 Texas Instruments Incorporated Fractional frequency clock divider with direct division
US10855294B2 (en) 2016-11-08 2020-12-01 Texas Instruments Incorporated High linearity phase interpolator
US9853650B1 (en) * 2016-11-21 2017-12-26 Realtek Semiconductor Corp. Method and apparatus of frequency synthesis
CN108736888B (zh) * 2017-04-18 2021-10-08 博通集成电路(上海)股份有限公司 用于补偿分数n频率综合器中的量化噪声的电路
JP7193914B2 (ja) * 2017-11-17 2022-12-21 ローム株式会社 可変遅延回路、pll周波数シンセサイザ、電子機器

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US4975931A (en) * 1988-12-19 1990-12-04 Hughes Aircraft Company High speed programmable divider
US5202642A (en) * 1991-05-09 1993-04-13 Iomega Corporation Apparatus and method for fractional frequency division
US5889436A (en) * 1996-11-01 1999-03-30 National Semiconductor Corporation Phase locked loop fractional pulse swallowing frequency synthesizer
KR100237567B1 (ko) * 1997-05-07 2000-01-15 김영환 지연잠금 회로
DE19840241C1 (de) * 1998-09-03 2000-03-23 Siemens Ag Digitaler PLL (Phase Locked Loop)-Frequenzsynthesizer
WO2001024420A1 (en) * 1999-09-27 2001-04-05 Parthus Technologies Plc Method and apparatus for in the field wireless device calibration
GB0003740D0 (en) 2000-02-17 2000-04-05 Nokia Networks Oy Frequency synthesiser
US6445232B1 (en) * 2000-08-31 2002-09-03 Xilinx, Inc. Digital clock multiplier and divider with output waveform shaping
US6856791B2 (en) 2002-03-14 2005-02-15 Ericsson Inc. Direct automatic frequency control method and apparatus
JP4629310B2 (ja) * 2003-01-29 2011-02-09 ルネサスエレクトロニクス株式会社 位相同期回路
SE0301005D0 (sv) 2003-04-03 2003-04-03 Ericsson Telefon Ab L M Method and system of jitter compensation
DE10326164A1 (de) 2003-06-10 2004-12-30 Schreiber, Ekkehard, Dipl.-Phys. Frequenzsynthesizer hoher Auflösung mit einstufigem Phasenregelkreis
US7274231B1 (en) * 2005-09-15 2007-09-25 Integrated Device Technology, Inc. Low jitter frequency synthesizer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9024693B2 (en) 2013-06-06 2015-05-05 Industrial Technology Research Institute Crystal-less clock generator and operation method thereof
CN104967449A (zh) * 2014-03-31 2015-10-07 英特尔Ip公司 装置、用于获得校准数据和生成本地振荡器信号的方法
TWI568191B (zh) * 2014-03-31 2017-01-21 英特爾智財公司 電路、積體電路、發射器、接收器、收發器、用以獲得校準資料之方法及用以產生本地振盪器信號之方法
CN104967449B (zh) * 2014-03-31 2018-10-12 英特尔Ip公司 装置、用于获得校准数据和生成本地振荡器信号的方法

Also Published As

Publication number Publication date
DE102008008050A1 (de) 2008-08-14
CN101242184B (zh) 2013-08-21
DE102008008050B4 (de) 2017-08-24
CN101242184A (zh) 2008-08-13
US8149022B2 (en) 2012-04-03
TW200835159A (en) 2008-08-16
US20080191750A1 (en) 2008-08-14

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MM4A Annulment or lapse of patent due to non-payment of fees