TWI349307B - Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric - Google Patents

Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric

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Publication number
TWI349307B
TWI349307B TW092133968A TW92133968A TWI349307B TW I349307 B TWI349307 B TW I349307B TW 092133968 A TW092133968 A TW 092133968A TW 92133968 A TW92133968 A TW 92133968A TW I349307 B TWI349307 B TW I349307B
Authority
TW
Taiwan
Prior art keywords
dielectric
forming
low
cap layer
reflective characteristics
Prior art date
Application number
TW092133968A
Other languages
English (en)
Other versions
TW200416881A (en
Inventor
Hartmut Ruelke
Joerg Hohage
Thomas Werner
Frank Mauersberger
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of TW200416881A publication Critical patent/TW200416881A/zh
Application granted granted Critical
Publication of TWI349307B publication Critical patent/TWI349307B/zh

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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
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    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
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    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • H01L21/0276Photolithographic processes using an anti-reflective coating
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/3143Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3144Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
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    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/952Utilizing antireflective layer

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW092133968A 2002-12-23 2003-12-03 Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric TWI349307B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10260619A DE10260619B4 (de) 2002-12-23 2002-12-23 Verfahren zur Herstellung einer Deckschicht mit antireflektierenden Eigenschaften auf einem Dielektrikum mit kleinem ε
US10/463,910 US7030044B2 (en) 2002-12-23 2003-06-16 Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric

Publications (2)

Publication Number Publication Date
TW200416881A TW200416881A (en) 2004-09-01
TWI349307B true TWI349307B (en) 2011-09-21

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TW092133968A TWI349307B (en) 2002-12-23 2003-12-03 Method of forming a cap layer having anti-reflective characteristics on top of a low-k dielectric

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Country Link
US (1) US7030044B2 (zh)
CN (1) CN100437971C (zh)
DE (1) DE10260619B4 (zh)
TW (1) TWI349307B (zh)

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KR100790452B1 (ko) * 2006-12-28 2008-01-03 주식회사 하이닉스반도체 다마신 공정을 이용한 반도체 소자의 다층 금속배선형성방법
US7704885B2 (en) * 2007-05-24 2010-04-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and method for fabricating the same
US20080299747A1 (en) * 2007-05-30 2008-12-04 Asm Japan K.K. Method for forming amorphouse silicon film by plasma cvd
US8618663B2 (en) 2007-09-20 2013-12-31 International Business Machines Corporation Patternable dielectric film structure with improved lithography and method of fabricating same
US8084862B2 (en) * 2007-09-20 2011-12-27 International Business Machines Corporation Interconnect structures with patternable low-k dielectrics and method of fabricating same
US7709370B2 (en) * 2007-09-20 2010-05-04 International Business Machines Corporation Spin-on antireflective coating for integration of patternable dielectric materials and interconnect structures
US8048813B2 (en) * 2008-12-01 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method of reducing delamination in the fabrication of small-pitch devices
JP2010171064A (ja) * 2009-01-20 2010-08-05 Panasonic Corp 半導体装置及びその製造方法
US8575019B2 (en) * 2010-09-30 2013-11-05 Institute of Microelectronics, Chinese Academy of Sciences Metal interconnection structure and method for forming metal interlayer via and metal interconnection line
US8629559B2 (en) 2012-02-09 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Stress reduction apparatus with an inverted cup-shaped layer
JP6134727B2 (ja) 2013-11-08 2017-05-24 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN104952697B (zh) * 2014-03-25 2018-03-27 中芯国际集成电路制造(上海)有限公司 一种mim结构的制备方法
US9627215B1 (en) * 2015-09-25 2017-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for interconnection
US20190157213A1 (en) 2017-11-20 2019-05-23 Globalfoundries Inc. Semiconductor structure with substantially straight contact profile

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US7030044B2 (en) 2006-04-18
CN100437971C (zh) 2008-11-26
TW200416881A (en) 2004-09-01
CN1729564A (zh) 2006-02-01
US20040121621A1 (en) 2004-06-24
DE10260619B4 (de) 2011-02-24

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