丄 3Ζ4υ：5：) 九、發明說明： •【發明所屬之技術領域】 . 本發明係有關於一種電路板及其製法，尤指一種具有 •長形電鍍導通孔之電路板及其製法。 【先前技術】 隨著電子產業的蓬勃發展，電子產品亦逐漸邁入多功 能、高性能的研發趨勢。為滿足半導體封裝件高積集度 (Integration)及微型化（Miniaturization)的封裝需求，以供更 ♦多主被動tl件及線路載接’電路板逐漸朝高密度之線路饰 局發展，且為達電子產品縮小化及功能增加之使用需求， 電路板之線路設計越來越密集，俾在有限的電路板空間 中運用層間連接技術（Interlayer connection)以擴大電路 板上可供利用的線路佈局面積，藉以配合高電子密度之積 體電2(integratedcircuit)需要，降低電路板的厚度，以在 相同單位面積下容納更多數量的線路及元件。 • 再者，為因應微處理器、晶片組、與繪圖晶片之運算 需要，佈有線路之電路板亦需提昇其傳遞晶片訊號、改盖 頻寬、控制阻抗等功能，來因應高1/〇數封裝件的發展。 •然而’為符合半導體封裝件輕薄短小、多功能、高速度及 .高頻化的開發方向，電路板已朝向細線路及小孔徑發展。 現有電路板製程從傳統100微米（/zm)之線路尺寸：包括線 路寬度（Line width)、線路間距（Space)等，已縮減至儿微 米（#m)以下，並持續朝向更小的線路精度發展。 -般多層電路板係於一核心板之上下表面形成線路 110269 5 1324035 . 該線路芦1 電鐘導通孔（PTH)以電性連接 制P胃 該核,吨及第—線路層表面形成線路增声 以王:以形成多層線路之電路板，而該核心板兩 :層_用該核心板中之電鑛導通孔以電性連接兩線路 請參閱第1A至1£圖，係為雙層電路板之 貝穿之Η形通孔100 (如第Μ闬娇+、.吐# • 10表面及其圓形通孔100中之；面;)成接：:於該核心板 _ U甲之表面形成一導電層2 ㈤所不），錢，於該導電層u表面電鍍形成—金屬層 ’復填充一導電或不導電之塞孔㈣13(如導電膏或‘ 、、性油墨等）以填滿該圓形通孔100(如第⑴圖所示）「之 :麦，圖案化製程以於該核心板10之表面上形成線路層 ，该線路層U具有複數線路141及電性連接塾142，俾 形成-電料通孔（PTH)13a以電性導通該核心板1〇上下 丨表面之線路層14(如第lr)圖所示）。 請參閱第1E，圖，係為第1E圖之上視圖，上述習知電 2板之主要缺點在於該兩圓形通孔1〇〇端部之形狀設計佔 有該核心板10之一定面積’在固定之兩圓形通孔之間 的申心間距p，該圓形福$】ΛΛ 、孔100鸲部之間剩餘的佈線空間 D1約僅能容設-條線路141 ’進而會使該圓形通孔議之 形狀限制了線路U!的佈設面積，尤其在兩個圓形通孔1〇〇 端部之間的部分更為嚴重，而在線路設計越來越密集的要 求之下，顯然該圓形通孔100之電路板無法順應未來的趨 110269 6 1324035 勢；此外，由於該圓料孔⑽ 長條形之線路⑷來說，兩者之形於 在進行電路板之線路佈設時，較為不便。因此 f以，如何解決上述習知電路板中㈣題， 種較佳之通孔形狀並可相應 x j通孔尺寸以縮小電鍍導通 孔^尺寸，並“電路板上供線路佈設 行線路佈設時之便利性，實A 價1徒冋進 【發明内容】 ，、為目心欲解決的問題。 鑒於以上所述先前技術之缺點，本發明之主要 ==電路板及其製法，得以在不增加電路板面積 下，於電路板中提高佈線的數量及密度。 、 本么月之另-目的在於提供_種電路 以提高線路佈設時之便利性。 /、衣淥付 揭目的以及其他目的，本發明揭露一種電路 ί導：Γ;核心板’係具有至少一貫穿之長形通孔；電 鍍¥通孔，係形成於該長形通孔中；以及第一線路層，得 =成於該核心板之上下表面，並具有複數線路，且該部分 線路係與電鍍導通孔電性連接。 該核心板係為銅落基板（CCL)、介電層或表面具有介 ，層之多層線路電路板；該長形通孔係為矩形、糖圓形孔 或複數個圓形重疊接續之長形孔。 該第-線路層復包括至少一電性連接墊，復包括於該 具有第-線路層之核心板表面形成—絕緣保護層，且於該 絕緣保護層中形成複數開孔以露出該第一線路層中之電性 110269 7 1324035 · 連接墊。 M 施結構料該具有第—觀層之核心 個導電：：線路增層結構’且該線路增層結射具有複數 包括有二以電，連接至該第一線路層’該線路增層結構 於該八二：層、疊置於該介電層上之第二線路層，以及位 電二：二：之導電盲孔，且該第二線路層具有複數作為 部分’復於該線路增層結構表面具有-絕緣保 線絕緣保護層表面具有複數個開孔，俾以顯露該 線路增層結構之電性連接墊。 本發明之復提供-種電路板之製法，係包括：提供一 核心板；於該核心板中形成至少一貫穿之長形通孔；以、及 於該核心板上下表面形成—具複數線路之線路層，並於該 ，形通孔中形成-電錢導通孔，且該部分線路係與該電鐘 導通孔電性連接。 該核心板係為㈣基板（CCL)、介電層或表面具有介 電層之多層線路電路板；該通孔係為矩形、擴圓形孔或複 數個圓形重疊接續之長形孔。 ，於該具有第 且於該絕緣保 中之電性連接 該第一線路層復包括至少一電性連接墊 一線路層之核心板表面形成一絕緣保護層， 護層中形成複數開孔以露出該第一線路層 塾° 該第-線路層之製法，係包括：於該核^板及其長形 通孔中形成有-導電層；於該導電層表面形成有—阻層， 且該阻層形成有開口以露出部份之導電層；以及於該二層 110269 8 1324035 電㈣成該㈣層及電性連㈣，且於該長形通孔 之導^电鍵^通孔’之後移除該阻層及被該阻層所覆蓋 之等電層。 心復提供該線路層之另—製法m於該核 成形通孔中形成有—導電層；於該導電層表面形 有門、’層，於該導電層表面形成阻層，且該阻層形成 露出部份之金屬層；以及移除該阻層開口中金屬 曰電層以形成該第—線路層及電性連接墊，且於今長 丨形通孔h彡㈣軌。 ㈣且於該長 形成製法’復包括於該核心板及第一線路層表面 疊置柯介電該線路增層結構包括有介電層、 ，盲孔，該導電盲孔電::接電層* 弟一線路層具有複數作為電性連接墊部分，於該：路3 表面具有-絕緣保護層，且該絕緣保護層表面“： 數個開孔，俾以顧命好峰A 叉日衣曲具有稷 6 …碩路該線路增層結構之電性連接墊。 板中形成有長形電主要係於核心 之面積以於電路板中提小電鍍導通孔端部 τ挺回佈線的數量及密度，俾相庙坦- ::板上可供佈線之面積，且該長形開通：： ::::以提高進行線路佈設時之便利性，伴達上::： 【實施方式】 以下係藉由特定的具體實施例說明本發明之實施方 110269 9 1324035 . 式，所屬技術領域中具有通常知識者可由本說明書所揭示 • 之内容輕易地瞭解本發明之其他優點與功效。 _第一實施例 請參閱第2A至2F圖，係為本發明電路板之製法的第 一實施例剖視圖。 如第2A圖所示，首先提供一核心板20，該核心板20 可為一銅箔基板（CCL)、介電層或表面壓合有介電層之多 層線路電路板，於本實施例之圖式中係以銅羯基板為例， •該核心板20係由一絕緣層200及形成於該絕緣層200表面 之金屬薄層201所構成，復以機械鑽孔、化學蝕刻或雷射 鑽孔方式於該核心板20上形成至少一貫穿核心板之長形 通孑L 202，該長形通孑L 202係如長矩形孔202a(如第2A-1 圖所示）、橢圓形孔202b(如第2A-2圖所示）或複數個圓形 重疊接續之長形孔202c(如第2A-3圖所示）；其中，該絕緣 層200可為環氧樹脂（Epoxy resin)、聚乙酿胺（Polyimide)、 $氰酯（Cyanate Ester)、玻璃纖維、雙順丁烯二酸酿亞胺/三 氮胖（Bismaleimide Triazine，BT)或混合環氧樹脂與玻璃纖 潍之FR5材質所製成；該金屬薄層201 —般係以導電性較 -佳之銅（Cu)為主，以作為後續製程電流傳導路徑的導電材 料。 如第2B圖所示，接著，利用物理沈積或化學沈積等 方式，例如藏鑛（Sputtering)、蒸鐘（Evaporation)、電弧蒸 氣沈積（Arc vapor deposition)、離子束藏鍍（Ion beam sputtering)' 雷射溶散沈積（Laser ablation deposition)、電 ίο 110269 ^24035 · •黎促進之化學氣相沈積及無電解電錢等方式，以於該核心 •板20及長形通孔202表面形成一導電層21。 >第2C圖所示，於該導電層2ι表面形成有一阻層 2，且該阻層22經由曝光（叫〇叫、顯影⑺㈤啊⑽ •荨圖案化製程形成複數開口 22〇以露出部份之導電層η。 ^如第2D圖所示，藉由該導電層2i#為電流傳導路 .以在該阻層開口 22〇中電鍍形成—第一線路層&該 •弟-線路層23包含有複數線路…及電性連接塾⑽，且 鲁=該長形通孔2G2中形成—電料通孔η，並於該電鐘 =通孔…之线中以導電或不導電之塞孔材料以填滿該 、幵V通孔202。其中該部分線路23a係電性連接該電鐘導 通孔23c(如第2E’圖所示）。 如第2E圖所示’之後以研磨或刷磨方式移除部份阻 多：之塞孔材料24,再完全移除該阻層22及其所 植盍Ή層2i ’以完成本發明之長形電料通孔結構。 暴如帛2E，圖所示，兩長形通孔2〇2在相同面積及中心 情況下’該兩長形通孔2〇2之間有較大的佈線空 卑可增加佈線密度；又由於該長形通孔202係與線 :::二形狀較為匹配’故而可相應提高進行線路佈設時 如第2F圖所示’於該核心板20及第-線路層23表 如防焊層，緣保護層25，且於該絕緣保護層 墊別。〇 250以路出該第-線路層23中之電性連接 110269 11 1324035 ‘ 或如第2F，圖所示，於哕 括有介電層261、疊置於該介電岸 ：“吉構26包 及形成於該介電層中之導電盲孔日—線路層犯，以 性連接至該第一線路層23，且該線路二=: 有電性連接塾264,於該線路增層結構％曰；^ 26表面具 保護層25，且該絕緣伴$ θ 9 、具有一絕緣 此 保護層25表面具有複數個門；^丨 俾以顯露該線路增層結構26 " 作為電性連接墊264之部分。 —閱第3A至3E圖’係為本發明電路板之製法的第 :广例剖視圖，與前一實施例之不同處 層係以蝕刻法製成。 弟線路 =第3A圖所示，提供—係如第2a目所示 之長形通孔202的核心板2〇。 頁貝穿 如第3B圖所示’於該核心板2〇及長形通孔如 形成一導電層21，接著藉 " ^ , s田忑V電層21具導電之特性以 屬：二 長形通孔202中之表面電鍍形成-金 緣二電或不導電之塞孔材料24(如導電膏或絕 以作Ϊ 滿該長形通孔2G2，S後進行研磨或刷磨 以私除多餘之塞孔材料24。 如第3C圖所示’於該_ 23’表面形成有一阻層 沈。且該阻層22形成複數開口 22〇以露出部份之金屬層 如第3D圖所示，移除該阻層開口 220中金屬層23， 110269 12 1324035 . .及導電層21，以於該核心板20表面形成一第一線路層23, •其中，該第一線路層23包含有複數線路23a及電性連接墊 .23b，且於該長形通孔202中形成該電鍍導通孔2心。 如第3E圖所示，移除該阻層22，俾以製成如同前述 .之於該長形it孔202中形成電錢導通孔23c之核心板2〇。 ；卜本發明提供一種電路板，係包括：核心板2〇,係具有 至少厂貫穿之長形通孔202;電鍍導通孔23c’係形成於該 癱長^通孔202巾；以及第一線路層23,係形成於該核心板 W 面，並具有複數線路仏，且該部分線路23a 係與電鍍導通孔23c電性連接。 介㈣介電層或表面具有 202' ^夕 路板；該長形通孔202係為長矩形孔 2〇2:.、二形:L:2b或複數個圓形重疊接續之長形孔 J有層23復包括至少一電性連接塾现’於 1且Λ 之核心板2G表面形成-絕緣保護層 路…之電性心：成開孔250以露出該第-線 ft明之另1施結構係於具有該第-線路層23之 核心板20表面形成一 之 %包括有介電層261二==該線路增層結構 262,以及位於該介電笔層上之第二線路層 構26中具有複數個導=之導電目孔263，該線路增層結 層η，且該線路増層結構26表面連接至該^線路 該線路增層結構26 # w WJ·生連㈣264’於 表面具有一絕緣保護層25，且該絕緣 110269 13 处接h t、具有複數個開孔250,俾以顯露該線路增層 結構26作為電性連接整264之部分。 =明之電路板及其製法，主要係於核心板中形成有 於該長形通孔中形成該電料通孔，藉以縮小 孔端部之面積以於電路板中提高佈線的數量及密 相應提高電路板上可供佈線之面積，且該長形開通 /、、’、之形狀較為匹配，以提高進行線路佈設時之便利 性，俾達上述所有目的者。 六上述之具體實施例，僅係用以例釋本發明之特點及功 效’而非用定本發明。任何所屬技術領域中具有通常 —識者均可在不違背本發明之精神及範缚下，對於上述之 貝％例進订修都與改變。因此’本發明之權利保護範圍， 應如後述之申請專利範圍所列。 【圖式簡單說明】 ，1Α至1Ε圖係為習知電路板製程之剖視示意圖； 第1E’圖係為第1E圖之上視圖； 第2A至2F圖係為本發明之電路板之製法於第一實施 例之側剖面圖； 、 第2A-1圖係為本發明之長形通孔為長矩形孔之上 圖； 第2A-2圖係為本發明之長形通孔為橢圓形孔之上視 圖； 第2A-3圖係為本發明之長形通孔為複數個圓形重疊 接續之長形孔之上視圖； Π0269 14 1324035 . 第2E圖係為第2E圖之上視圖； 第2F圖係為第p夕裒一者# α社 以及 $二實 Ρ Λ施結構剖視_ ; 弟至祀圖係顯示本發明之電路板之 施例之側剖面圖。 、古於 【主要元件符號說明】 10、20 核心板 100 圓形通孔 11、21 導電層 12 ' 2V 金屬層 .13 線路層 141 、 23a 線路 • 142 > 23b '、264 電性連接塾 13a、23c 電鍍導通孔 13 > 24 塞孔材料 200 絕緣層 201 金屬薄層 202 長形通孔 202a 長矩形孔 202b 橢圓形孔 202c 長形孔 22 阻層 220 阻層開口 23 第一線路層 25 絕緣保護層 250 • 絕緣保護層開孔 26 線路增層結構 261 介電層 262 第二線路層 263 .D1、D2 導電盲孔 佈線空間 P 中心間距 15 110269丄 3Ζ4υ:5:) IX. Description of the invention: • [Technical field to which the invention pertains] The present invention relates to a circuit board and a method of fabricating the same, and more particularly to a circuit board having a long electroplated via hole and a method of fabricating the same. [Prior Art] With the rapid development of the electronics industry, electronic products have gradually entered a multi-functional, high-performance research and development trend. In order to meet the packaging requirements of semiconductor package high integration and miniaturization, more and more active and passive t1 and line carrier 'circuit boards are gradually developing towards high-density line decoration, and As the demand for electronic products is reduced and the functions are increased, the circuit board design is becoming more and more dense. In the limited board space, Interlayer connection is used to expand the available circuit layout area on the board. In order to meet the needs of integrated circuits with high electron density, the thickness of the board is reduced to accommodate a larger number of lines and components in the same unit area. • In addition, in order to meet the computing needs of microprocessors, chipsets, and graphics chips, circuit boards with lines need to improve their functions of transmitting chip signals, changing bandwidth, and controlling impedance. The development of several packages. • However, in order to meet the development trend of thin and light, versatile, high speed and high frequency of semiconductor packages, the board has been developed towards thin lines and small apertures. Existing circuit board processes have been reduced from traditional 100 micron (/zm) line sizes, including line width and space, to less than a few micrometers (#m) and continue to be oriented toward smaller line accuracy. development of. The multi-layer circuit board is formed on the lower surface of a core board to form a line 110269 5 1324035. The line of the Lu 1 electric clock through hole (PTH) is electrically connected to form the core of the stomach, and the surface of the ton and the first layer is formed. Acoustic king: to form a multi-layer circuit board, and the core board two: layer _ use the electro-mineral via hole in the core board to electrically connect the two lines, please refer to the 1A to 1 figure, which is a double-layer circuit The slab-shaped through-hole 100 is worn by the board (such as the first + + +, 吐 # • 10 surface and its circular through hole 100; face;) 接 ::: on the surface of the core plate _ U Forming a conductive layer 2 (5), the money is formed on the surface of the conductive layer u - the metal layer is filled with a conductive or non-conductive plug hole (4) 13 (such as conductive paste or ', ink, etc.) to fill The circular through hole 100 (shown in FIG. 1) is: a wheat, a patterning process for forming a circuit layer on the surface of the core board 10, the circuit layer U having a plurality of lines 141 and an electrical connection port 142. The germanium forming-electric material via hole (PTH) 13a electrically connects the circuit layer 14 of the upper and lower crucible surfaces of the core plate 1 (as shown in FIG. 1r). Referring to FIG. 1E, the figure is a top view of FIG. 1E. The main disadvantage of the above-mentioned conventional electric 2 board is that the shape of the end portion of the two circular through holes 1 occupies a certain area of the core board 10 'is fixed The center-to-center spacing p between the two circular through-holes, the circular wiring space D1 between the two sides of the hole 100 can only accommodate the --line 141' and the circular line The shape of the hole confinement limits the layout area of the line U!, especially between the ends of the two circular through holes, and the portion is more and more dense, and the circle is apparently The circuit board of the through hole 100 cannot conform to the future trend of 110269 6 1324035; in addition, because of the long hole (10) of the round hole (10), the shape of the two is inconvenient when the circuit board is disposed. Therefore, how to solve the above-mentioned conventional circuit board (4) problem, a better shape of the through hole and corresponding xj through hole size to reduce the size of the plating via hole, and "when the circuit board is arranged for wiring on the circuit board" Convenience, real A price 1 冋 冋 [invention content], To solve the problem of the heart. In view of the above-mentioned shortcomings of the prior art, the main == circuit board of the present invention and its manufacturing method can increase the number and density of wiring in the circuit board without increasing the board area. Another month of this month - the purpose is to provide a circuit to improve the convenience of wiring. The present invention discloses a circuit Γ; the core plate ' has at least one elongated through hole; a plating hole through hole is formed in the elongated through hole; And the first circuit layer is formed on the lower surface of the core board and has a plurality of lines, and the part of the circuit is electrically connected to the plating via. The core plate is a copper drop substrate (CCL), a dielectric layer or a multilayer circuit board having a layer on the surface; the elongated through hole is a rectangular shape, a sugar circular hole or a plurality of circular overlapping continuous shapes. hole. The first circuit layer further comprises at least one electrical connection pad, and the surface of the core plate having the first circuit layer is formed with an insulating protection layer, and a plurality of openings are formed in the insulation protection layer to expose the first line Electrical properties in the layer 110269 7 1324035 · Connection pads. The M structure material has a core conduction of the first layer: a line buildup structure 'and the line buildup layer has a plurality of charges including two electricity, connected to the first circuit layer 'the line buildup structure The octa: a layer, a second circuit layer stacked on the dielectric layer, and a conductive blind hole of a bit 2:2: and the second circuit layer has a plurality of portions as a part of the circuit buildup structure The surface has an insulating wire insulation protective layer surface having a plurality of openings for exposing the electrical connection pads of the line build-up structure. The method for manufacturing a circuit board of the present invention comprises: providing a core board; forming at least one elongated through hole in the core board; and forming a plurality of lines on the lower surface of the core board a circuit layer, and in the shape through hole, a power money conducting hole is formed, and the part of the circuit is electrically connected to the electric clock conducting hole. The core board is a (4) substrate (CCL), a dielectric layer or a multilayer circuit board having a dielectric layer on the surface; the through hole is a rectangular, expanded circular hole or a plurality of circular elongated overlapping elongated holes. Forming an insulating protective layer on the surface of the core board having the first circuit layer and the at least one electrical connection pad and the circuit layer in the insulating layer, and forming a plurality of openings in the protective layer to expose The first circuit layer 塾 the first circuit layer is formed by: forming a conductive layer in the core plate and the elongated through hole; forming a resist layer on the surface of the conductive layer, and the resist The layer is formed with an opening to expose a portion of the conductive layer; and the second layer 110269 8 1324035 is electrically (four) formed into the (four) layer and the electrical connection (four), and is moved after the conductive hole of the elongated via hole In addition to the resist layer and the isoelectric layer covered by the resist layer. The core method further comprises: forming a conductive layer in the core forming through hole; forming a gate and a layer on the surface of the conductive layer, forming a resist layer on the surface of the conductive layer, and forming the resist layer Exposing a portion of the metal layer; and removing the metal germanium layer in the opening of the resist layer to form the first circuit layer and the electrical connection pad, and in the present long-shaped through hole h彡 (four) rail. (4) and in the long formation method, the composite layer is superposed on the surface of the core board and the first circuit layer, and the wiring layer-adding structure comprises a dielectric layer, a blind hole, and the conductive blind hole is electrically: the electrical layer * The first circuit layer has a plurality of electrical connection pads, and the surface of the road 3 has an insulating protective layer, and the surface of the insulating protective layer ": several openings, 俾 顾 顾 好 A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A The utility model has the electrical connection pad of the circuit of the 增6 ... 硕路. The long electric electricity is mainly formed in the core area of the board to reduce the number and density of the wiring end portion τ of the electroplated via hole in the circuit board. , 俾相庙坦- :: The area available for wiring on the board, and the extension is opened ::::: to improve the convenience of wiring, with the following::: [Embodiment] The embodiments of the present invention are described by the specific embodiments of the present invention. 110269 9 1324035. Other advantages and effects of the present invention can be easily understood by those of ordinary skill in the art from the disclosure of the present specification. Please refer to Figures 2A to 2F for the present invention. A cross-sectional view of a first embodiment of a method of fabricating a board. As shown in FIG. 2A, a core board 20 is first provided. The core board 20 may be a copper foil substrate (CCL), a dielectric layer or a surface laminated with a dielectric layer. In the embodiment of the present invention, a copper germanium substrate is used as an example. The core board 20 is composed of an insulating layer 200 and a thin metal layer 201 formed on the surface of the insulating layer 200. Forming at least one elongated through-portion L 202 through the core plate on the core plate 20 by mechanical drilling, chemical etching or laser drilling, the elongated overnight L 202 is like a long rectangular hole 202a (eg, 2A) -1 is shown), an elliptical hole 202b (as shown in Fig. 2A-2) or a plurality of circularly overlapping elongated holes 202c (as shown in Fig. 2A-3); wherein the insulating layer 200 It can be Epoxy resin, Polyimide, Cyanate Ester, glass fiber, Bismaleimide Triazine (BT) or mixed. Epoxy resin and glass fiber reinforced FR5 material; the thin metal layer 201 is generally made of copper (Cu) As a conductive material for the subsequent process current conduction path. As shown in Fig. 2B, then, by physical deposition or chemical deposition, such as sputtering, evaporation, arc vapor deposition (Arc vapor deposition) ), Ion beam sputtering' Laser ablation deposition, electric ίο 110269 ^24035 · Li promoted chemical vapor deposition and electroless money, etc. A conductive layer 21 is formed on the surface of the board 20 and the elongated through hole 202. > 2C, a resist layer 2 is formed on the surface of the conductive layer 2, and the resist layer 22 is formed by exposing (called squeaking, developing (7), (5), (10), 荨 patterning process to form a plurality of openings 22 露出 to expose a portion The conductive layer η. ^ is shown in FIG. 2D, by the conductive layer 2i# being a current conduction path. To be plated in the resist layer opening 22? - the first circuit layer & the younger-line layer 23 Included in the plurality of lines ... and the electrical connection 塾 (10), and Lu = the through hole 2G2 formed in the elongated through hole η, and in the line of the electric clock = through hole ... with conductive or non-conductive plug hole The material fills the 幵V through hole 202. The portion of the line 23a is electrically connected to the electric clock through hole 23c (as shown in FIG. 2E'). As shown in FIG. 2E, it is followed by grinding or brushing. The method further removes a portion of the plug material 24, and then completely removes the resist layer 22 and the substrate layer 2i' thereof to complete the elongated electric material through-hole structure of the present invention. As shown, the two elongated through holes 2〇2 have a large wiring gap between the two elongated through holes 2〇2 in the same area and center to increase the wiring density. Moreover, since the elongated through hole 202 is matched with the line::: two shapes, it can be correspondingly improved when the line layout is performed as shown in FIG. 2F, and the core board 20 and the first circuit layer 23 are in the form of solderproof. a layer, a protective layer 25, and the insulating protective layer is padded. The crucible 250 is connected to the electrical connection 110269 11 1324035 ' in the first-line layer 23 or as shown in FIG. 2F. The electric layer 261 is stacked on the dielectric bank: "the yoke 26 package and the conductive blind hole formed in the dielectric layer - the circuit layer is smuggled, and is connected to the first circuit layer 23, and the line 2 =: an electrical connection 塾 264, the layer buildup structure % 曰; ^ 26 surface with a protective layer 25, and the insulation with $ θ 9 , with an insulation, the surface of the protective layer 25 has a plurality of gates; In order to reveal the line build-up structure 26 " as part of the electrical connection pad 264. - see Figures 3A to 3E' is the first embodiment of the circuit board of the present invention: a cross-sectional view of a wide example, different from the previous embodiment The layer is made by etching. The line is shown in Figure 3A, providing the core of the elongated via 202 as shown in Figure 2a. Plate 2〇. The page is as shown in Fig. 3B' in the core plate 2〇 and the elongated through hole, such as forming a conductive layer 21, and then borrowing " ^, s Tian Wei V electrical layer 21 with conductive properties to Genus: The surface of the two-shaped through-hole 202 is plated to form a gold-filled or non-conductive plug material 24 (such as a conductive paste or a full-size through-hole 2G2, S is then ground or brushed) The excess plug material 24 is privately removed. As shown in FIG. 3C, a resist layer is formed on the surface of the -23. The resist layer 22 forms a plurality of openings 22 to expose a portion of the metal layer as shown in FIG. 3D. As shown, the metal layer 23, 110269 12 1324035 . . and the conductive layer 21 are removed from the resist layer opening 220 to form a first wiring layer 23 on the surface of the core board 20, wherein the first circuit layer 23 includes There are a plurality of lines 23a and an electrical connection pad .23b, and the center of the plated via 2 is formed in the elongated via 202. As shown in Fig. 3E, the resist layer 22 is removed to form a core plate 2 which forms the money money via 23c in the elongated it hole 202 as described above. The present invention provides a circuit board comprising: a core plate 2〇 having an elongated through hole 202 at least through the factory; a plated through hole 23c' formed in the long hole through hole 202; and a first line The layer 23 is formed on the W-plane of the core board and has a plurality of lines 仏, and the part of the lines 23a are electrically connected to the plating vias 23c. The dielectric layer or surface has a 202'-way board; the elongated through-hole 202 is a long rectangular hole 2〇2:., a di-shaped shape: L: 2b or a plurality of circularly overlapping continuous elongated holes J The layer 23 includes at least one electrical connection, and the electrical core of the core plate 2G is formed on the surface of the core plate 2G. The electrical core is formed as an opening 250 to expose the first line structure. The % formed on the surface of the core board 20 having the first wiring layer 23 includes a dielectric layer 261 == the wiring build-up structure 262, and the second wiring layer structure 26 on the dielectric pen layer. a plurality of conductive holes 263 having a plurality of conductive lines, the circuit is provided with a layer η, and the surface of the line layer structure 26 is connected to the line. The line layering structure 26 #w WJ· 生连(四)264' has a surface The protective layer 25 is insulated, and the insulating 110269 13 is connected to ht, and has a plurality of openings 250 to expose the line build-up structure 26 as part of the electrical connection 264. The circuit board and its manufacturing method are mainly formed in the core board to form the electric material through hole in the elongated through hole, thereby reducing the area of the end portion of the hole to increase the number and density of the wiring in the circuit board. The area available for wiring on the circuit board, and the shape of the elongated opening/, ', and the matching are matched to improve the convenience in performing circuit layout, and all of the above objects are achieved. The above-mentioned embodiments are merely illustrative of the features and functions of the present invention rather than the invention. Any of those skilled in the art can make modifications and changes to the above-mentioned examples without departing from the spirit and scope of the present invention. Therefore, the scope of the claims of the present invention should be as set forth in the appended claims. [Simple diagram of the diagram], the 1Α to 1Ε diagram is a schematic cross-sectional view of the conventional circuit board process; the 1E' diagram is the top view of the 1E diagram; the 2A to 2F diagram is the method of manufacturing the circuit board of the invention 2A-1 is a top view of the elongated through hole of the present invention; and 2A-2 is an elongated through hole of the present invention. View from above the hole; Figure 2A-3 is a top view of the elongated through hole of the present invention as a plurality of circularly overlapping elongated holes; Π0269 14 1324035. Figure 2E is a top view of Figure 2E; Fig. 2F is a side cross-sectional view showing an embodiment of the circuit board of the present invention, which is a cross-sectional view of the first embodiment of the circuit board of the present invention. Ancient [Representation of main component symbols] 10, 20 core board 100 circular through hole 11, 21 conductive layer 12 ' 2V metal layer. 13 circuit layer 141, 23a line • 142 > 23b ', 264 electrical connection 塾 13a 23c plating via 13 > 24 plug material 200 insulating layer 201 thin metal layer 202 long through hole 202a long rectangular hole 202b elliptical hole 202c long hole 22 resist layer 220 resist layer opening 23 first circuit layer 25 insulation Protective layer 250 • Insulating protective layer opening 26 Line build-up structure 261 Dielectric layer 262 Second circuit layer 263 .D1, D2 Conductive blind hole wiring space P Center spacing 15 110269