TWI310587B - Plasma oxidation and removal of oxidized material - Google Patents

Plasma oxidation and removal of oxidized material Download PDF

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Publication number
TWI310587B
TWI310587B TW095107964A TW95107964A TWI310587B TW I310587 B TWI310587 B TW I310587B TW 095107964 A TW095107964 A TW 095107964A TW 95107964 A TW95107964 A TW 95107964A TW I310587 B TWI310587 B TW I310587B
Authority
TW
Taiwan
Prior art keywords
conductive layer
layer
conductive
etching
copper
Prior art date
Application number
TW095107964A
Other languages
English (en)
Chinese (zh)
Other versions
TW200644113A (en
Inventor
Yunsang Kim
Andrew D Bailey Iii
Hyungsuk Alexander Yoon
Arthur M Howald
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of TW200644113A publication Critical patent/TW200644113A/zh
Application granted granted Critical
Publication of TWI310587B publication Critical patent/TWI310587B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/269—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/04—Planarisation of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Weting (AREA)
  • Solid-Phase Diffusion Into Metallic Material Surfaces (AREA)
  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)
TW095107964A 2005-03-09 2006-03-09 Plasma oxidation and removal of oxidized material TWI310587B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/076,725 US7540935B2 (en) 2003-03-14 2005-03-09 Plasma oxidation and removal of oxidized material

Publications (2)

Publication Number Publication Date
TW200644113A TW200644113A (en) 2006-12-16
TWI310587B true TWI310587B (en) 2009-06-01

Family

ID=36992195

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095107964A TWI310587B (en) 2005-03-09 2006-03-09 Plasma oxidation and removal of oxidized material

Country Status (6)

Country Link
US (1) US7540935B2 (enExample)
JP (1) JP2008536296A (enExample)
KR (2) KR20070112234A (enExample)
CN (1) CN101164121B (enExample)
TW (1) TWI310587B (enExample)
WO (1) WO2006098888A2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8852383B2 (en) * 1999-09-29 2014-10-07 Materials And Technologies Corporation Wet processing using a fluid meniscus apparatus
KR100729933B1 (ko) * 2005-12-19 2007-06-18 동부일렉트로닉스 주식회사 구리 시드층의 증착 온도 측정 방법 및 이를 이용한 구리층형성 방법
SG186015A1 (en) * 2007-11-21 2012-12-28 Lam Res Corp Bevel plasma treatment to enhance wet edge clean
US8414790B2 (en) * 2008-11-13 2013-04-09 Lam Research Corporation Bevel plasma treatment to enhance wet edge clean
US20120088370A1 (en) * 2010-10-06 2012-04-12 Lam Research Corporation Substrate Processing System with Multiple Processing Devices Deployed in Shared Ambient Environment and Associated Methods
CN105225976A (zh) * 2014-06-25 2016-01-06 中芯国际集成电路制造(上海)有限公司 焊盘的制作方法及半导体器件
KR20220132603A (ko) * 2015-06-17 2022-09-30 인텔 코포레이션 디바이스 제조를 위한 산화물 층들의 원자 층 제거에 의한 전이 금속 건식 에칭
CN112382608A (zh) * 2020-11-04 2021-02-19 上海华力集成电路制造有限公司 铜互连线的制造方法
US11557487B2 (en) * 2021-06-04 2023-01-17 Tokyo Electron Limited Etching metal during processing of a semiconductor structure
CN120712638A (zh) * 2023-06-29 2025-09-26 株式会社国际电气 处理方法、处理装置、半导体装置的制造方法以及程序

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US4468284A (en) * 1983-07-06 1984-08-28 Psi Star, Inc. Process for etching an aluminum-copper alloy
US4919750A (en) * 1987-09-14 1990-04-24 International Business Machines Corporation Etching metal films with complexing chloride plasma
US5098516A (en) * 1990-12-31 1992-03-24 Air Products And Chemicals, Inc. Processes for the chemical vapor deposition of copper and etching of copper
US5561082A (en) * 1992-07-31 1996-10-01 Kabushiki Kaisha Toshiba Method for forming an electrode and/or wiring layer by reducing copper oxide or silver oxide
JP2885616B2 (ja) * 1992-07-31 1999-04-26 株式会社東芝 半導体装置およびその製造方法
US5431774A (en) * 1993-11-30 1995-07-11 Texas Instruments Incorporated Copper etching
US6090701A (en) * 1994-06-21 2000-07-18 Kabushiki Kaisha Toshiba Method for production of semiconductor device
US5736002A (en) * 1994-08-22 1998-04-07 Sharp Microelectronics Technology, Inc. Methods and equipment for anisotropic, patterned conversion of copper into selectively removable compounds and for removal of same
JP3417751B2 (ja) * 1995-02-13 2003-06-16 株式会社東芝 半導体装置の製造方法
US6171661B1 (en) * 1998-02-25 2001-01-09 Applied Materials, Inc. Deposition of copper with increased adhesion
JP4307592B2 (ja) * 1998-07-07 2009-08-05 Okiセミコンダクタ株式会社 半導体素子における配線形成方法
JP3892621B2 (ja) * 1999-04-19 2007-03-14 株式会社神戸製鋼所 配線膜の形成方法
US6355979B2 (en) * 1999-05-25 2002-03-12 Stmicroelectronics, Inc. Hard mask for copper plasma etch
US6344105B1 (en) * 1999-06-30 2002-02-05 Lam Research Corporation Techniques for improving etch rate uniformity
US20030155079A1 (en) * 1999-11-15 2003-08-21 Andrew D. Bailey Plasma processing system with dynamic gas distribution control
US20020072228A1 (en) * 1999-12-15 2002-06-13 Texas A&M University System Semiconductor conductive pattern formation method
US6403491B1 (en) * 2000-11-01 2002-06-11 Applied Materials, Inc. Etch method using a dielectric etch chamber with expanded process window
US6613667B1 (en) * 2001-05-02 2003-09-02 The Texas A&M University System Forming an interconnect of a semiconductor device
TW550648B (en) * 2001-07-02 2003-09-01 Semiconductor Energy Lab Semiconductor device and method of manufacturing the same
US6518183B1 (en) * 2001-09-06 2003-02-11 Taiwan Semiconductor Manufacturing Co., Ltd. Hillock inhibiting method for forming a passivated copper containing conductor layer
JP4024508B2 (ja) * 2001-10-09 2007-12-19 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6806948B2 (en) * 2002-03-29 2004-10-19 Lam Research Corporation System and method of broad band optical end point detection for film change indication
US6794245B2 (en) * 2002-07-18 2004-09-21 Micron Technology, Inc. Methods of fabricating double-sided hemispherical silicon grain electrodes and capacitor modules
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KR100483290B1 (ko) 2002-12-14 2005-04-15 동부아남반도체 주식회사 반도체 소자의 제조 방법
KR100482180B1 (ko) * 2002-12-16 2005-04-14 동부아남반도체 주식회사 반도체 소자 제조방법
US6821899B2 (en) * 2003-03-14 2004-11-23 Lam Research Corporation System, method and apparatus for improved local dual-damascene planarization
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Also Published As

Publication number Publication date
CN101164121A (zh) 2008-04-16
JP2008536296A (ja) 2008-09-04
US7540935B2 (en) 2009-06-02
CN101164121B (zh) 2011-01-26
WO2006098888A3 (en) 2007-12-21
US20060128152A1 (en) 2006-06-15
TW200644113A (en) 2006-12-16
KR20130036066A (ko) 2013-04-09
KR20070112234A (ko) 2007-11-22
WO2006098888A2 (en) 2006-09-21
KR101376830B1 (ko) 2014-03-20

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