TWI299849B - Circuit architecture with a testing function for use in a display panel and method of making the same - Google Patents

Circuit architecture with a testing function for use in a display panel and method of making the same Download PDF

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TWI299849B
TWI299849B TW93120321A TW93120321A TWI299849B TW I299849 B TWI299849 B TW I299849B TW 93120321 A TW93120321 A TW 93120321A TW 93120321 A TW93120321 A TW 93120321A TW I299849 B TWI299849 B TW I299849B
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line
lines
test
data line
scan
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TW93120321A
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TW200603062A (en
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Chin Cheng Chien
Tzong Yau Ku
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Chi Mei Optoelectronics Corp
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Description

1299849 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種應用於一顯示面板並具有測試功能 之電路架構及其製作方法,尤指一種運用單向開關元件控 制顯示面板之掃描線或資料線導通狀態之電路架構。 【先前技術】 液晶顯示器由於具有輕薄短小、低輻射與低耗電等特 性,已取代傳統陰極射線管顯示器成為顯示器市場之主流 產品。一般說來,液晶顯示面板主要包含有一陣列基板、 一彩色濾光片基板,以及填充與上述二基板之間的液晶分 子,並利用一背光模組提供之光源以發揮影像顯示功能。 陣列基板包含有複數個呈陣列排列之晝素,且每一畫素係 利用複數條平行之掃描線與複數條與掃描線垂直之平行資 料線交錯位置之薄膜電晶體作為開關元件,並利用一晝素 電極驅動各晝素上方之液晶分子作不同程度之旋轉以調整 各晝素之亮度,同時藉由彩色濾光片基板上與各畫素對應 設置之紅色、綠色與藍色濾光片使各晝素產生不同亮度之 紅色、綠色與藍色光線,進而輸出高晝質之彩色影像。 1299849 為確保液晶顯不面板之顯不品質’ ^ 般於液晶顯不面板 完成後會進行一測試步驟,將測試訊號同時輸入掃描線與 資料線,並利用一測試光源由液晶顯示面板背面打光,藉 此判斷各晝素是否發揮正常之功能(是否具有亮點或暗 點,或是反應時間是否正常等),並依據此一測試結果進行 相關之處理避免增加後續成本。舉例來說,若液晶顯示面 板表現出異常狀況(如亮點或暗點數過多)則視為不良品提 早進行報廢,避免浪費其他元件(如控制ic、背光模組等) 組裝及重製(rework)之成本。若異常狀況在可接受之合理範 圍内,則可依測試結果將液晶顯示面板區分為一般業界常 用之不同面板等級於完成組裝後出貨,或進行適度之補救 措施(如利用雷射將亮點燒成暗點)。 請參考第1圖,第1圖為習知一顯示面板電路架構10 之示意圖。如第1圖所示,顯示面板電路架構10包含有複 數條平行之掃描線12、複數條與掃描線12垂直設置且不 相接觸之平行資料線14,以及複數個位於各掃描線12與 各資料線14交錯位置之薄膜電晶體16。其中薄膜電晶體 16之閘極係與掃描線12電連接並受掃描線12之控制開 關,而薄膜電晶體16之源極則與資料線14電連接,以於 ,1299849 薄膜電晶體16被開啟時將資料線u傳送之資料線驅動訊 號傳輸至與賴電晶體16之汲極相電連接之晝素電極,以 驅動液晶分子旋轉。各掃描線12之—端係為—掃描線訊號 端12A且電連接至至少—掃描線驅動ns,用來接收掃描 線驅動咖發出之掃描線驅動訊號,而各資料線14之-端係為-資料線訊號端14A且電連接至至少一資料線驅動 IC20,用來接收貧料線驅動IC2〇發出之資料線驅動訊號。 一般而言,掃描線驅動IC18與#料線驅動㈣係於液 晶顯示面板組裝成後才與掃描線12與資料線14連接,例 如將掃把線驅動IC18與資料線驅動IC2()設置於可挽式印 刷包路板’亚利用液晶顯示面板上預留之連接墊加以連 接故於進行液晶顯不面板測試時必須利用預先計設好之 測減笔路’並利用外接之測試訊號加以測試。因此如第工 圖所示’顯示面板電路架構1G之各掃描線.12之另一端係 為一掃描線測試端12B ’並利用—短路棒(—§_22 直接紐路在一起,藉以接收一掃描線測試訊號,而各資 料線14之另一端係為一資料線測試端MB,亦利用另一短 路棒26直接紐路在一起,藉此接收一資料線測試訊號28。 亦即在進行測試時,係先利用掃描線測試訊號24開啟所有 薄膜電晶體16,再利用資料線測試訊號28提供各晝素電 1299849 極驅動電壓,並配合一共通電極訊號3〇使各晝素產生一電 Μ差以旋轉液晶分子,同時藉由—戦光源提供之光線, 觀察液晶顯示面板各晝素是否發揮正常顯示功能。 上述習知顯示面板電路架構1〇雖可提供測試液晶顯示 面板之功能,但由於掃描線12與資料線14係利用短路棒 22、26直接紐路在_起,因此於測試完成後,必須利用雷 射方式切斷將各掃描線12與各資料線14之間的短路狀 悲,或是利用磨邊方式磨除液晶顯示面板之側邊以去除各 掃描線12與各貧料線14間之短路棒22、26,否則液晶顯 示面板將無法發揮正f功能。錢上述方式均具有增加成 本’、降低產肊的缺點,如雷射方法費時且增加成本,而磨 除方式除增加成本外,更無法適祕雙液晶顯示面板(dual display panel)共用資料線的狀況。 月,考第2圖,第2圖為習知另一顯示面板電路架構40 之丁 圖第2圖所示,顯示面板電路架構40包含有複 1条Γ行之掃七田線42、複數條與掃描線42垂直設置之平 行資料線44以及複數個位於各掃描線u與各資料線44 乂曰位置之/專膜電晶體46。此外,各掃描線42之-端係 為一掃描線訊號端42A且電連接至至少一掃描線驅動 1299849 IC48,用來接收掃描線驅動IC48發出之掃描線驅動訊號, 而各資料線44之一端係為一資料線訊號端44A且電連接至 至少一資料線驅動IC50,用來接收資料線驅動IC50發出 之貢料線驅動訊號。 與第1圖所示之習知顯示面板電路架構10不同之處在 於,習知顯示面板電路架構40係利用複數個薄膜電晶體連 接各掃描線42。如第2圖所示,各掃描線42之掃描線測 試端42B分別與一薄膜電晶體52之汲極電連接,其中該等 薄膜電晶體52係以串接方式連接,且薄膜電晶體52之閘 極受一掃描線測試電路開啟訊號54之控制開啟,而薄膜電 晶體52之源極可接受一掃描線測試訊號56。當薄膜電晶 體52之閘極被掃描線測試電路開啟訊號54開啟時,掃描 線測試訊號56會透過薄膜電晶體52之源極與汲極傳送至 各知"描線42。至於各貧料線44之貢料線測试端44B ’則係 利用短路棒58短路在一起,藉此接受一資料線測試訊號 60。藉由上述配置,於進行測試時掃描線測試訊號56與資 料線測試訊號60會分別傳送至各掃描線42與各資料線 44,再配合一共通電極訊號62使各晝素產生一電壓差並旋 轉液晶分子,同時藉由一測試光源提供之光線,即可觀察 液晶顯示面板各晝素是否發揮正常顯示功能。 1299849 上述液晶顯示面板40之測試方法係先利用一掃描線測 試電路開啟訊號開啟薄膜電晶體之閘極,接著再將實際需 要之掃描線測試訊號透過薄膜電晶體之源極與汲極傳送至 各掃描線。在必須使用二訊號源(掃描線測試電路開啟訊號 之訊號源與掃描線測試訊號之訊號源)的前提下,增加了測 試成本與困難度。 【發明内容】 因此本發明之主要目的在提供一種具有測試功能之顯 示面板電路架構,以解決習知技術無法解決之問題。 根據本發明之一較佳實施例,係揭露一種顯示面板電路 架構,其包含有複數條平行之第一導線,複數條與該等第 一導線垂直且不相交之平行之第二導線,以及至少一測試 電路。該測試電路包含有複數個單向開關元件,且各該單 向開關元件分別與該等第一導線之一第一測試端電連接, 且各該單向開關元件僅允許訊號從該第一測試電路單向傳 遞至該第一導線。 1299849 特性,、了向開關凡件具有僅受-正向偏壓驅動而開啟之 =。口此本發明在進行測試時可受一驅動訊號之開啟, ^驅動虎於各單向開關元件被開啟後即直接傳送至各 V線而使該荨第一導線導通,而於後績顯示面板正常 運作日守則保持關閉狀態,故於測試完成後不必進行額外的 去除動作。 為了使貴審查委員能更進一步了解本發明之特徵及 技術内容,請參閱以下有關本發明之詳細說明與附圖。然 而所附圖式僅供參考與輔助說明用,並非用來對本發明加 以限制者。 【實施方式】 請參考第3圖,第3圖為本發明—較佳實施例之—顯示 面板電路架構70之示意圖。如第3圖所示,顯示面板電路 架構70包含有複數條平行之掃描線72、複&條與掃描線 72垂直設置但不相接觸之平行資料線74,以及複數個位於 各掃描線72與各資料線74交錯位置之薄膜電晶體%設置 於液晶顯示面板之一顯示區71中。此外,各掃描線”之 一端係為一掃描線訊號端72A且電連接至至少—掃描線驅 1299849 動IC78,用來接收掃描線驅動IC78發出之掃插線。 號,而各資料線74之一端係為一資料線訊號端ν'1299849 IX. Description of the Invention: [Technical Field] The present invention relates to a circuit structure applied to a display panel and having a test function, and a manufacturing method thereof, and more particularly to a scanning line for controlling a display panel by using a unidirectional switching element or The circuit structure of the data line conduction state. [Prior Art] Due to its characteristics of lightness, thinness, low radiation and low power consumption, liquid crystal displays have replaced traditional cathode ray tube displays as the mainstream products in the display market. Generally, the liquid crystal display panel mainly includes an array substrate, a color filter substrate, and liquid crystal molecules filled between the two substrates, and uses a light source provided by a backlight module to perform an image display function. The array substrate comprises a plurality of pixels arranged in an array, and each pixel uses a plurality of parallel scan lines and a plurality of thin film transistors with parallel data lines perpendicular to the scan lines as switching elements, and utilizes one The halogen electrode drives the liquid crystal molecules above each element to rotate to different degrees to adjust the brightness of each element, and at the same time, the red, green and blue filters corresponding to the respective pixels on the color filter substrate are used. Each element produces red, green, and blue light of different brightness, which in turn outputs a high-quality color image. 1299849 In order to ensure the quality of the LCD display panel is not finished, the test signal will be input into the scan line and the data line at the same time, and the test light source is used to illuminate the back of the liquid crystal display panel. In order to determine whether each element plays a normal function (whether it has bright or dark spots, or whether the reaction time is normal, etc.), and according to the test result, the related processing is performed to avoid increasing the subsequent cost. For example, if the LCD panel exhibits abnormal conditions (such as too many bright spots or dark spots), it is considered as defective products to be scrapped early, avoiding wasting other components (such as control ic, backlight module, etc.) assembly and rework (rework The cost of ). If the abnormal condition is within an acceptable reasonable range, the liquid crystal display panel can be classified into different panel grades commonly used in the industry according to the test results, and the package can be shipped after completion of assembly, or moderate remedial measures (such as using a laser to burn bright spots) Become a dark spot). Please refer to FIG. 1 , which is a schematic diagram of a conventional display panel circuit architecture 10 . As shown in FIG. 1, the display panel circuit architecture 10 includes a plurality of parallel scan lines 12, a plurality of parallel data lines 14 disposed perpendicularly to the scan lines 12 and not in contact with each other, and a plurality of scan lines 12 and The thin film transistor 16 of the data line 14 is staggered. The gate of the thin film transistor 16 is electrically connected to the scan line 12 and controlled by the scan line 12, and the source of the thin film transistor 16 is electrically connected to the data line 14, so that the 12299849 thin film transistor 16 is turned on. The data line driving signal transmitted by the data line u is transmitted to the halogen electrode electrically connected to the drain of the Lai transistor 16 to drive the liquid crystal molecules to rotate. The end of each scan line 12 is - scan line signal end 12A and electrically connected to at least - scan line drive ns, for receiving the scan line drive signal from the scan line driver, and the end of each data line 14 is The data line signal terminal 14A is electrically connected to at least one data line driving IC 20 for receiving the data line driving signal sent by the lean line driving IC 2 . Generally, the scan line driver IC 18 and the #-line drive (4) are connected to the scan line 12 and the data line 14 after the liquid crystal display panel is assembled, for example, the broom line drive IC 18 and the data line drive IC 2 () are placed in a removable The printed circuit board 'Asia uses the connection pads reserved on the liquid crystal display panel to be connected. Therefore, when the liquid crystal display panel test is performed, it must be tested by using the pre-metered test path and using the external test signal. Therefore, as shown in the figure, the other end of each scan line .12 of the display panel circuit structure 1G is a scan line test end 12B' and utilizes a short circuit bar (-§_22 direct link together to receive a scan) The line test signal, and the other end of each data line 14 is a data line test terminal MB, and the other short circuit bar 26 is also used to directly contact the data line to receive a data line test signal 28. That is, when testing First, all the thin film transistors 16 are turned on by using the scan line test signal 24, and then the data line test signal 28 is used to provide the 12299849 pole drive voltage of each element, and a common electrode signal 3 is used to generate an electric enthalpy difference for each element. The liquid crystal molecules are rotated, and the light provided by the light source is used to observe whether the various elements of the liquid crystal display panel function normally. The above-mentioned conventional display panel circuit structure 1 can provide the function of testing the liquid crystal display panel, but due to scanning The line 12 and the data line 14 are directly connected to each other by the shorting bars 22 and 26, so after the test is completed, each scanning line 12 and each data line 1 must be cut by laser. Short circuit between 4, or use the edging method to remove the side of the liquid crystal display panel to remove the shorting bars 22, 26 between the scanning lines 12 and the lean lines 14, otherwise the liquid crystal display panel will not play positive f function. The above methods all have the disadvantage of increasing the cost' and reducing the calving. For example, the laser method takes time and increases the cost, and the grinding method can not be shared with the dual display panel. The status of the data line. Month, test 2, Figure 2 is a schematic diagram of another display panel circuit architecture 40 shown in Figure 2, the display panel circuit architecture 40 contains a complex line of sweeping seven fields 42. A plurality of parallel data lines 44 disposed perpendicularly to the scan line 42 and a plurality of/or film transistors 46 located at positions of the scan lines u and the data lines 44. Further, the end of each scan line 42 is A scan line signal terminal 42A is electrically connected to at least one scan line driver 1299849 IC48 for receiving the scan line drive signal from the scan line driver IC 48, and one of the data lines 44 is a data line signal end 44A and is electrically connected. At least one capital The line driver IC 50 is configured to receive the tributary line driving signal from the data line driver IC 50. The difference from the conventional display panel circuit architecture 10 shown in FIG. 1 is that the conventional display panel circuit architecture 40 utilizes a plurality of The thin film transistors are connected to the respective scan lines 42. As shown in Fig. 2, the scan line test ends 42B of the scan lines 42 are electrically connected to the drains of a thin film transistor 52, wherein the thin film transistors 52 are connected in series. The mode is connected, and the gate of the thin film transistor 52 is controlled by a scan line test circuit turn-on signal 54, and the source of the thin film transistor 52 can accept a scan line test signal 56. When the gate of the thin film transistor 52 is When the scan line test circuit turn-on signal 54 is turned on, the scan line test signal 56 is transmitted through the source and drain of the thin film transistor 52 to the known "line 42. The test line 44B' of the tributary line 44 of each of the lean lines 44 is short-circuited by the shorting bar 58 to receive a data line test signal 60. With the above configuration, the scan line test signal 56 and the data line test signal 60 are respectively transmitted to the scan lines 42 and the data lines 44, and a common electrode signal 62 is used to generate a voltage difference between the respective elements. Rotating the liquid crystal molecules while observing the light provided by the test light source can observe whether the respective elements of the liquid crystal display panel perform the normal display function. 1299849 The above test method of the liquid crystal display panel 40 first uses a scan line test circuit to turn on the signal to turn on the gate of the thin film transistor, and then transmits the actually required scan line test signal through the source and the drain of the thin film transistor to each Scan line. The test cost and difficulty are increased under the premise that the source of the two signals (the signal source of the scan line test circuit to turn on the signal and the source of the scan line test signal) must be used. SUMMARY OF THE INVENTION It is therefore a primary object of the present invention to provide a display panel circuit architecture having a test function to solve the problems that are not solved by the prior art. According to a preferred embodiment of the present invention, a display panel circuit architecture includes a plurality of parallel first conductors, a plurality of parallel second conductors that are perpendicular to the first conductors and do not intersect, and at least A test circuit. The test circuit includes a plurality of unidirectional switching elements, and each of the unidirectional switching elements is electrically connected to one of the first test ends of the first wires, and each of the unidirectional switching elements only allows signals from the first test The circuit is unidirectionally transmitted to the first wire. The 1299849 features a switch to the switch that is driven only by the forward bias. In the present invention, the driving signal can be turned on by a driving signal, and the driving driver transmits the unidirectional switching element to each V line directly after the unidirectional switching element is turned on to turn on the first wire, and the rear display panel is turned on. The normal operating day code remains closed, so no additional removal is required after the test is completed. In order to provide a more detailed understanding of the features and technical aspects of the present invention, the following detailed description of the invention and the accompanying drawings. The drawings are for illustrative purposes only and are not intended to limit the invention. [Embodiment] Please refer to FIG. 3, which is a schematic diagram of a circuit structure 70 of a display panel according to a preferred embodiment of the present invention. As shown in FIG. 3, the display panel circuit architecture 70 includes a plurality of parallel scan lines 72, parallel data lines 74 that are disposed perpendicular to but not in contact with the scan lines 72, and a plurality of parallel data lines 74. The thin film transistor % interleaved with each of the data lines 74 is disposed in one of the display regions 71 of the liquid crystal display panel. In addition, one end of each scan line is a scan line signal end 72A and is electrically connected to at least the scan line driver 1299849, and the IC78 is used to receive the scan line issued by the scan line driver IC 78. The data line 74 One end is a data line signal end ν'

接至至少一資料線驅動IC80,用來接收資料線驅動I電連 發出之資料線驅動訊號。 Ie8QIt is connected to at least one data line driving IC 80 for receiving the data line driving signal sent by the data line driving I electrical connection. Ie8Q

如上所述,由於掃描線驅動IC78與資料線驅動 液晶顯示面板進行測試時,尚未連接至掃描綠7 2與1 = ^ 74,因此必須利用測試訊號進行測試。如第3圖所示;、'’ 發明顯示面板電路架構70之各資料線74之另—端=為j 貧料線測試端74B,各資料線測試端74B分別與—二極一 82電連接,且各二極體82係與一資料線測試訊號線電: 接,並接受一資料線測試訊號84之控制。另外,各二極體 僅允許訊號從資料線測試訊號線單向傳遞至各資料線。另 -方面’於本較佳實施例中,顯示面板電路架構川之各掃 描線72 t另-端係為一掃描線測試端72b,且各掃描線測 試端72B係利用一短路棒(sh〇rtingbar)86短路在一起,並 接受一掃描線測試訊號88之控制。藉此當掃描線測試訊號 88傳送至各薄膜電晶體76之閘極時會將薄膜電晶體%開 啟,而貝料線測試訊號84會開啟各二極體Μ以使各資料 線74同時導通’進而提供各晝素電極所需之驅動電壓,此 時配合一共通電極訊號9〇使各晝素產生_電壓差以旋轉 12 1299849 液晶分子,並藉由一測試光源提供之光線,即可觀察液晶 顯示面板各晝素是否發揮正常顯示功能。除此之外,當液 晶顯示面板係應用於一具有雙液晶顯示面板之產品時,各 資料線測試端74B可分別與另一液晶顯示面板之各資料線 電連接,藉此資料線測試訊號84可同時控制二液晶顯示面 板0 為進一步說明本發明二極體82之實現手段,請參考第4 圖(並一併參考第3圖),其中苐4圖為第3圖中之二極體 82之等效電路圖。如第4圖所示,於實作上二極體82之 單向開關功效可利用薄膜電晶體83以及如第4圖所示之連 接方式加以達成,亦即將薄膜電晶體83之閘極83A與源極 83B連接在一起以同時接受資料線測試訊號84,而薄膜電 晶體83之汲極83C則連接至資料線74。如此一來,當閘 極83A接收到資料線測試訊號84時會被開啟,而此時源極 83B亦會接收資料線測試訊號84,並將資料線測試訊號84 傳送至位於顯示區71内之各薄膜電晶體76,達到測試目 的。若訊號係由資料線測試端74B方向傳來,則薄膜電晶 體83之閘極83A則不會被開啟,因此當顯示面板於正常使 用時,資料線驅動IC80所發出之訊號並無法開啟薄膜電晶 體83,因此不會影響顯示面板之正常運作。 13 1299849 至於二極體82之運作原理,請參考第5圖。第5圖為 二極體82之驅動電壓與輸出電流之關係圖。如第5圖所 示由於一極體82僅能利用正向偏廢加以開啟,當正向偏 壓超過某一預先設計之障壁電壓時二極體82即會產生對 應之輸出電流’若施加逆向偏壓則僅會產生微量之漏沒電As described above, since the scanning line driving IC 78 and the data line driving liquid crystal display panel are tested, they are not connected to the scanning green 7 2 and 1 = ^ 74, and therefore it is necessary to test using the test signal. As shown in FIG. 3, the other end of each data line 74 of the invention display panel circuit structure 70 is the j lean line test end 74B, and the data line test end 74B is electrically connected to the second pole one 82 respectively. And each of the diodes 82 is connected to a data line test signal line and is controlled by a data line test signal 84. In addition, each diode only allows signals to be transmitted from the data line test signal line to each data line in one direction. In another embodiment, in the preferred embodiment, each scan line 72 t of the display panel circuit structure is a scan line test end 72b, and each scan line test end 72B utilizes a shorting bar (sh〇 The rtingbar) 86 is shorted together and is controlled by a scan line test signal 88. Therefore, when the scan line test signal 88 is transmitted to the gate of each of the thin film transistors 76, the thin film transistor is turned on, and the bead line test signal 84 turns on each of the diodes Μ so that the data lines 74 are simultaneously turned on. Further, the driving voltage required for each of the halogen electrodes is provided. At this time, a common electrode signal 9 is used to generate a voltage difference between the respective elements to rotate 12 1299849 liquid crystal molecules, and the liquid light can be observed by a test light source to observe the liquid crystal. Whether the display panel functions as a normal display function. In addition, when the liquid crystal display panel is applied to a product having a dual liquid crystal display panel, each data line test end 74B can be electrically connected to each data line of another liquid crystal display panel, thereby using the data line test signal 84. The two liquid crystal display panels can be simultaneously controlled. To further illustrate the implementation of the diode 82 of the present invention, please refer to FIG. 4 (and refer to FIG. 3 together), wherein the 苐4 diagram is the diode 82 in FIG. The equivalent circuit diagram. As shown in FIG. 4, the unidirectional switching effect of the upper diode 82 can be achieved by using the thin film transistor 83 and the connection method as shown in FIG. 4, that is, the gate 83A of the thin film transistor 83 and Sources 83B are connected together to simultaneously receive data line test signal 84, while drain 83C of thin film transistor 83 is coupled to data line 74. As a result, when the gate 83A receives the data line test signal 84, the source 83B receives the data line test signal 84 and transmits the data line test signal 84 to the display area 71. Each of the thin film transistors 76 achieves the test purpose. If the signal is transmitted from the data line test terminal 74B, the gate 83A of the thin film transistor 83 will not be turned on. Therefore, when the display panel is in normal use, the signal sent by the data line driver IC 80 cannot be turned on. The crystal 83 does not affect the normal operation of the display panel. 13 1299849 For the operation of the diode 82, please refer to Figure 5. Fig. 5 is a graph showing the relationship between the driving voltage and the output current of the diode 82. As shown in Fig. 5, since the one pole 82 can only be turned on by using the forward bias, when the forward bias exceeds a certain pre-designed barrier voltage, the diode 82 will generate a corresponding output current 'if reverse bias is applied The pressure will only produce a trace of leakage and no electricity.

流,且逆向偏壓超過一崩潰電壓後會造成二極體82之損 毀,因此本較佳實施例利甩二極體82來達成單向開關元件 的功效。由於二極體82具有上述特性,因此本 Γ上Γ用資料線測試訊號84作為二極㈣之順向偏 2’=供各二極體82朗障,壓之電壓值,進而開啟 使各資料線74形成導通狀態,且該 亦傳遞至各該第一導線。1由The flow, and the reverse bias voltage exceeds a breakdown voltage, which causes damage to the diode 82. Therefore, the preferred embodiment benefits the diode 82 to achieve the effect of the unidirectional switching element. Since the diode 82 has the above characteristics, the data line test signal 84 is used as the two-pole (four) forward bias 2'= for each diode 82, the voltage value is pressed, and then the data is turned on. Line 74 is in an on state and is also transmitted to each of the first wires. 1 by

.. 、许注意的是二極體82僅A 早向開關讀之-例,其他類 2僅為 於顯示面板電路_7G中 ㈣開關70件均可設置 丄A 建到相同之功效〇 *以 交佳實施例中’掃描線72雖係彻短路棒午於 接但並不侷限於此,而可 乂%連 件加以連接,達到連接各或其他開關元 上迷較仫貝施例係利用單一 4 貝枓線測試訊號與單- 才田線測试訊號進行測試 早 俠h舌呪,當所有薄骐 1299849 之閘極均係接收同一掃描線測試訊號88而被開啟,而各晝 素之液晶分子亦係利用同一資料線測試訊號8 4驅動旋轉 、、' ,行剃„式。然而隨著液晶顯示面板之解析度逐漸提升, 資料線與掃描線之數目也隨之增加,以1024*768解析度之 液晶,示面板為例,即具有768條掃描線與1〇24*3條資料 線,、右僅料m職訊號&解—掃财測試訊號 88進仃測試,可能會影響測試之準確性。 因此為了增加賴之準雜與實祕,本發明另 供另一種顯示面板電路架構跡請參考第6圖, 1〇〇之ΓΓ另—較佳實闕之—顯示面板電路架構 "思圖。如第6圖所示,顯示面板電路牟 描線收與各嶋物交錯位置之薄膜2== 於液晶顯示面板之-顯示區101中。此外 口又 之一端係為一掃描線訊號端丽且電連接至至描線/02 線驅動IC108,用來接 h-掃描 驅動郭- 發出之掃描線 驅動W,而各貧料線104之一端係為— 歸且電連接至至少—資料線驅動IC11Q、來=化 線驅動IC11。發出之資料線驅動訊號。输貧料 15 1299849 本發明顯示面板電路架構100之各資料線104之另一端 係為一資料線測試端104B,且各資料線測試端iq4B分別 與一薄膜電晶體(等效於二極體)電連接。其中為了增加測 試之準確性,於本較佳實施财資料線刚係區分為二組 (例如-奇數資料線組與—偶數資料線組),同時二組資料 線104所電連接之相電晶體(等效於二極體)與丄⑽ 亦分別形成二串聯之電路,並分別接受-第-資料線測試 訊號114 A與一第二嘗^l #、日丨q 貝枓線測武矾號114B之控制。另外, 於本較佳實施例中掃插浐 緣川2之知描線測試端102B係利用 一短路棒116短路在―如 *拉/ 起’並接文一掃描線測試訊號118 之控制。 由於顯不面板電錄^ ^r〇 1 ΠΠ 3» ^ 洛木構100之資料線104係區分為二 組,並分別利用薄犋電體等 日蒞1寻政於二極體)112Α與112Β 連接至第一資料線測試气缺114Λ t 14A與第二資料線測試訊號 114Β,在配合使用〜並、s帝士^ Ί包極汛號120的情況下,二組資 料線104可獨立進行測 七揮幸父佳之測試功能並提升測 試之準確性。然而值得注音 心0疋貝料線104並不侷限於區 分為二組,而可視實際 一、 #、 而安則试結果加以調整,例如將 貧料線104區為為三級並分 」對應紅色、綠色與藍色晝 16 1299849 之紅綠藍三原色㈣Γ,並可分別測試液晶顯示面板 _系利用-短路::果。另外,上述實施例〜 上亦可視實一;^Γ加㈣連接,然而於實際設計 利用單向開 月的是於上述二較佳實施例中,為清楚表達切 月顯示面板電路架構之概念,故單向開關元件僅設置於資 t線測試端,然而於實際運用上單向開關元件亦可設置於 4線測4端以控制掃描線測試端,或是同時設置於資料 線測試端鱗料_端,简_佳_試功能。、 相車乂於t知技術,本發明顯示面板電路架構係利用單向 開關70件連接㈣線或掃描線,資料線或掃描線僅於測試 過程中形成短路狀態,因此於測試完成後不必另外進行雷 射製程或磨邊製程,因此有效減低生產成本並提升產能。 以上所述僅為本發明之較佳實施例,凡依本發明申請專 利範圍所做之均等變化與修飾,皆應屬本發明專利之涵蓋 1299849 【圖式簡單說明】 f1圖為習知-顯示面板電路架構之示意圖。 第2圖為習知另—顯示面板f路架構之示意圖。 第3^為本發明一較佳實施例之一顯示面板電路架構之示 圖。 籲 帛4圖為第3圖中之二極體之等效電路圖。 =5圖為――極體之驅動電壓與輸出電流之關係圖。 第6圖為本發明另一較佳 3 -立 1土只她例之一顯不面板電路架構 不意圖。 【主要元件符號說明】. . , Note that the diode 82 is only read by the A switch to the early switch. For example, the other class 2 is only for the display panel circuit _7G. (4) The switch 70 can be set to 相同A to the same function 〇* In the preferred embodiment, the scanning line 72 is completely short-circuited, but is not limited thereto, and can be connected to each other to achieve a connection with each other or other switching elements. 4 The Bellows test signal and the single-only field test signal are tested for the early time. When all the gates of the 12299849 are received by the same scan line test signal 88, the liquid crystal molecules of each element are turned on. Also use the same data line test signal 8 4 to drive the rotation, ', shaving type. However, as the resolution of the liquid crystal display panel gradually increases, the number of data lines and scan lines also increases, to 1024 * 768 resolution LCD, the display panel as an example, that is, there are 768 scan lines and 1〇24*3 data lines, and only the m job signal & solution - sweep test signal 88 test, may affect the test Accuracy. Therefore, in order to increase the reliance on the miscellaneous and the secret, this issue For another display panel circuit trace, please refer to Figure 6, 1〇〇 — — 较佳 较佳 较佳 显示 显示 显示 显示 显示 显示 显示 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The film 2== is disposed in the display area 101 of the liquid crystal display panel. The other end of the port is a scanning line signal and is electrically connected to the line 02 driving IC 108 for connection. The h-scan driver drives the scan line driver W that is issued, and one of the lean lines 104 is connected to at least the data line driver IC 11Q and the line driver IC 11. The data line drive signal is sent. The other end of each data line 104 of the display panel circuit architecture 100 is a data line test end 104B, and each data line test end iq4B is respectively connected with a thin film transistor (equivalent to a diode). In order to increase the accuracy of the test, the preferred data line is divided into two groups (for example, an odd data line group and an even data line group), and the two data lines 104 are electrically connected. Phase transistor (equivalent to The polar body) and the cymbal (10) also form two series-connected circuits, respectively, and respectively receive the control of the -th data line test signal 114 A and a second taste ^l #, 日丨q 贝枓线测武矾号 114B. In the preferred embodiment, the scanning line test end 102B of the 浐 川 川 2 is short-circuited by a shorting bar 116 in the control of "pull/start" and the control of the scanning line test signal 118. Panel electric record ^ ^r〇1 ΠΠ 3» ^ The information line 104 of the Luomu structure 100 is divided into two groups, and they are respectively connected to the diodes by using the thin poles and the like. A data line test gas shortage 114 Λ t 14A and a second data line test signal 114 Β, in conjunction with the use of ~ and s 帝 士 ^ Ί 汛 汛 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 120 The father's test function and improve the accuracy of the test. However, it is worthwhile to note that the 疋 疋 0 疋 料 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 104 Green and blue 昼 16 1299849 red, green and blue primary colors (four) Γ, and can be tested separately for the LCD panel _ system utilization - short circuit:: fruit. In addition, the above embodiment can also be used to view the connection of the fourth embodiment. However, in the above two preferred embodiments, the concept of the circuit structure of the moon display panel is clearly expressed. Therefore, the one-way switching element is only set on the t-test end. However, in practice, the one-way switching element can also be set on the 4-wire 4 terminal to control the scan line test end, or at the same time on the data line test end. _ end, Jane _ good _ test function. The circuit structure of the display panel of the present invention is connected to a (four) line or a scan line by using a unidirectional switch 70 pieces, and the data line or the scan line is short-circuited only during the test, so no additional time is required after the test is completed. Laser processing or edging processes are used to effectively reduce production costs and increase production capacity. The above description is only the preferred embodiment of the present invention, and all the equivalent changes and modifications made in accordance with the scope of the present invention should be covered by the patent of the present invention, 1299849 [Simplified description of the drawing] f1 is a conventional-display Schematic diagram of the panel circuit architecture. Figure 2 is a schematic diagram of a conventional display panel f-circuit architecture. 3 is a diagram showing a circuit structure of a display panel according to a preferred embodiment of the present invention. Figure 4 is the equivalent circuit diagram of the diode in Figure 3. The =5 picture is the relationship between the driving voltage and the output current of the polar body. Figure 6 is a view of another preferred embodiment of the present invention. [Main component symbol description]

10 顯示面板電路架構 12 掃描線 ~^^^^ 12A 掃描線訊號端 ---------- 12B 掃描線測試端 14 資料線 資料線訊號端 14B 資料線測試端 16 薄膜電晶體^ 18 掃描線驅動1C 20 ^_____ 資料線驅動1C 22 知·路棒 —-——---------:~ 24 掃描線測試^〜 26 短路棒 28 資料線測試Ικ^^ 30 共通電極訊號 —---------~_____ 40 顯示面板電路架揭^ 18 1299849 42 掃描線 42A 掃描線訊號端 42B 掃描線測試端 44 資料線 44A 貧料線訊號端 44B 貧料線測试端 46 薄膜電晶體 48 掃描線驅動1C 50 貧料線驅動1C 52 薄膜電晶體 54 掃描線測試電路開啟 56 掃描線測試訊號 訊號 58 短路棒 60 資料線測試訊號 62 共通電極訊號 70 顯不面板電路架構 71 顯不區 72 掃描線 72A 掃描線訊號端 72B 掃描線測試端 74 資料線 74A 貧料線訊號端 74B 貧料線測試端 76 薄膜電晶體 78 掃描線驅動1C 80 貧料線驅動IC 82 二極體 83 薄膜電晶體 83A 閘極 83B 源極 83C 没極 84 資料線測試訊號 86 短路棒 88 掃描線測試訊號 90 共通電極訊號 100 顯不面板電路架構 101 顯不區 102 掃描線 102 A 掃描線訊號端 102B 掃描線測試端 19 1299849 104 資料線 104 A 貧料線訊號端 104B 貧料線測試端 106 薄膜電晶體 108 掃描線驅動1C 110 資料線驅動1C 112A 薄膜電晶體 112B 薄膜電晶體 114A 苐一貢料線測試訊號 114B 苐二貧料線測試訊號 116 短路棒 118 掃描線測試訊號 120 共通電極訊號10 Display panel circuit architecture 12 scan line ~^^^^ 12A scan line signal end ----------- 12B scan line test end 14 data line data line signal end 14B data line test end 16 thin film transistor ^ 18 scan line driver 1C 20 ^_____ data line driver 1C 22 know · road stick --- --- --------: ~ 24 scan line test ^ ~ 26 short circuit bar 28 data line test Ι κ ^ ^ 30 common Electrode signal -----------~_____ 40 display panel circuit frame release ^ 18 1299849 42 scan line 42A scan line signal end 42B scan line test end 44 data line 44A poor material line signal end 44B poor material line test Test end 46 Thin film transistor 48 Scan line drive 1C 50 Lean line drive 1C 52 Thin film transistor 54 Scan line test circuit on 56 Scan line test signal signal 58 Short circuit bar 60 Data line test signal 62 Common electrode signal 70 Display panel circuit Architecture 71 Display area 72 Scan line 72A Scan line signal end 72B Scan line test end 74 Data line 74A Lean line signal end 74B Lean line test end 76 Thin film transistor 78 Scan line drive 1C 80 Lean line driver IC 82 II Polar body 83 film Crystal 83A Gate 83B Source 83C No pole 84 Data line test signal 86 Shorting bar 88 Scanning line test signal 90 Common electrode signal 100 Display panel structure 101 Display area 102 Scan line 102 A Scan line signal end 102B Scan line test End 19 1299849 104 Data line 104 A Lean line signal end 104B Lean line test end 106 Thin film transistor 108 Scan line drive 1C 110 Data line drive 1C 112A Thin film transistor 112B Thin film transistor 114A 苐一贡线线检测信号114B苐 贫 poor feed line test signal 116 short circuit bar 118 scan line test signal 120 common electrode signal

2020

Claims (1)

^299849 、申請專利範圍: 電路架構,該 種應用於顯不面板並具有測試功能之 電路架構包含有·· 複數條平行m各料—導狀 一測試端; 馮弟 複數條平行之第二導線, 命深遠4弟二導線與該等第一導線 “且不相接觸,且各玆第一導線與各該 區分別包含有電㈣;以及 乂錯 兮„帛測4电路’包含有複數個單向-開關元伴,各 二早向開關元件分別與各該第—_端電 且各 向開關元件僅允許訊號 ^ 〜早 —導線。 l W K電路單向傳遞至該第 2‘如申請專利範圍第1項所述之電路架構,”該等第 =線與該等第二導線分別為資料線與掃描線了各該第一導 線之另-端係為一第—訊號端,且 V 少—資料線驅動晶片電連接,各該第-導./系與至 第二訊號端,且該等第…;弟一v線之一端係為-片電連接。 、至乂—知描線驅動晶 21 1299849 曾^申%專利範圍第2項所述之電路架構,其中該等第一 第—職端另分別與另-顯示面板之複數條資 枓線電連接。 戶、 、、申W專利範圍第1項所述之電路架構,其中該等第一 導線與該等第二導線分別為掃描線與資料線,各該第一導 線t另一端係為—第—訊號端,且該等第-訊號端係盘至 / —知描線驅動日日日片電連接’各該第二導線之—端 晶 t訊號端’且該等第二訊號端係與至少—資料線驅動 片電連接。 _ Μ專利*圍第1項所述之電路架構,其中各該單向 f 70二可χ_正向偏壓之驅動而同時呈開啟狀態,藉此 鲁吏各該單向開關疋件電連接之各該第—導料通,且該正 向偏壓亦傳遞至各該第一導線。" 項所述之電路架構,其中各該單向 6·如申請專利範圍第1 開關元件係為_二極體 申明專利範圍第1項所述之電路架構,其中各該單向 開關元件包含-薄膜電晶體,該薄膜電晶體之一閑極及一 22 1299849 測試端電連接 源極係電連接,且一汲極與該第 8.如申請專利範圍第丨項所述之電路架構,其中 導線可區分為至少二第一導線組,且各該 * 別與”應之各該第—測試電路電連接^ —¥線組係分 第1項所狀,其中該電路架 有至少―第二龍電路,且各該第二導線之另- 測試端,該第二賴電路包含有複數個單向 開關元件分別與料第二導線之各二職端電連接。 )0.如申請專利範圍第!項所述之電路架構,其中該顯示面 板係為一取晶顯示面板。 U·。—種液晶顯示面板之陣列基板,該陣列基板區分為一顯# 不區域及一週邊區域,該陣列基板包含有: 複數條平賴狀資料線,設於_純域内,各該資 料線之一端係為一資料線測試端; 禝數條平行排列之掃描線,設於該顯示區域内,該等掃 把線係與该等資料線垂直且不相接觸’且各該資料線與各 該掃描線之交錯區形成一薄膜電晶體; 23 !299849 —資料線測試訊號線,設於該週邊區域;以及 複數個單向開關元件,設於該週邊區域,各該單向開關 元件分別與該資料線測試端及該資料線測試訊號線電連 接’且各該單向開關元件僅允許訊號從該資料線測試訊號 線單向傳遞至該資料線。 12·如申請專利範圍第11項所述之陣列基板,其中各該單 向開關元件可受一正向偏壓之驅動而同時呈開啟狀態,藉 此使與各該單向開關元件電連接之各該資料線導通,且該 正向偏壓亦傳遞至各該資料線。 申月專利範圍弟1 1項所述之陣列基板,其中各該單 向開關元件係為一二極體。^299849, the scope of patent application: circuit architecture, the circuit architecture used in the display panel and with test function includes · a plurality of parallel m materials - a test end; Feng Di plural parallel second wire The deeper 4th wire and the first wire are "not in contact with each other, and each of the first wire and each of the zones respectively contains electricity (4); and the error circuit 帛"4 circuit" includes a plurality of singles To the switch element, each of the two early switching elements is electrically connected to each of the first terminals, and the respective switching elements allow only the signal ^~ early-wire. l The WK circuit is unidirectionally transmitted to the second circuit structure as described in claim 1 of the patent application scope, wherein the second wire and the second wire are respectively a data line and a scan line, and the first wire is The other end is a first signal terminal, and V is less—the data line drives the chip to be electrically connected, and each of the first and second leads to the second signal end, and the first... For the ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The circuit structure of the first aspect of the invention, wherein the first wire and the second wire are respectively a scan line and a data line, and each of the first wires is another One end is the first-signal end, and the first-signal end-system discs to / / the known line drive day and day chip electrical connection 'the second wire - the end crystal t signal end' and the second signal The end system is electrically connected to at least the data line driver chip. _ Μ Patent* is the circuit structure described in item 1, Each of the one-way f 70 χ χ _ forward bias driving is simultaneously turned on, thereby rectifying each of the first conductive materials electrically connected to the unidirectional switch components, and the forward bias The voltage is also transmitted to each of the first wires. The circuit structure described in the item, wherein each of the one-way 6 is as claimed in the patent range, the first switching element is the circuit described in the first item of the patent scope. The structure, wherein each of the unidirectional switching elements comprises a thin film transistor, one of the thin film transistors and a 22 1299849 test end electrically connected to the source are electrically connected, and a drain is the same as the eighth. The circuit architecture as described in the preceding clause, wherein the wire can be divided into at least two first wire groups, and each of the wires is connected to the first test circuit. The circuit frame has at least a second dragon circuit, and another test end of each of the second wires, the second circuit includes a plurality of unidirectional switching elements respectively, and each of the second wires of the second wire is electrically connection. ) 0. If you apply for a patent range! The circuit architecture of the item, wherein the display panel is a crystal display panel. U·. An array substrate of a liquid crystal display panel, the array substrate is divided into a display area and a peripheral area, and the array substrate comprises: a plurality of flat data lines arranged in the _ pure domain, one end of each of the data lines The system is a data line test end; a plurality of parallel scan lines are disposed in the display area, the broom lines are perpendicular to the data lines and are not in contact with each other and each of the data lines and each of the scan lines a staggered area forms a thin film transistor; 23!299849 - a data line test signal line, disposed in the peripheral region; and a plurality of unidirectional switching elements disposed in the peripheral region, each of the unidirectional switching elements and the data line The test end and the data line test signal line are electrically connected' and each of the one-way switch elements allows only one-way transmission of signals from the data line test signal line to the data line. The array substrate of claim 11, wherein each of the one-way switching elements is driven by a forward bias and simultaneously turned on, thereby electrically connecting each of the one-way switching elements. Each of the data lines is turned on, and the forward bias is also transmitted to each of the data lines. The array substrate according to the above-mentioned patent scope, wherein each of the one-way switching elements is a diode. 申月專利軌圍第u項所述之陣列基板,其中 向開關元件台冬 一 Μ早 13 —缚膜電晶體,該薄膜電晶體之一閘 一源極係電連接, 」肛夂 关且一汲極與該資料線測試端電連接。 15 ·如申巧專利範圍第 料線之另一端係為一 係與至少一資料線驅 11項所述之陣列基板,其中各含亥資 資料線訊號端,且該等資料線訊號端 動晶片電連接,各該掃描線之一端係 24 1299849 為一掃描線訊號端,且該等掃描線訊號端係與至少一掃描 線驅動晶片電連接。 16. 如申請專利範圍第11項所述之陣列基板,其中該陣列 基板另包含至少二條資料線測試訊號線,且該等資料線係 區分為至少二貢料線組’各該貢料線組中之該等貢料線測 試端經由該等單向開關元件與對應之該資料線測試訊號線 電連接,且各該資料線測試訊號線係獨立傳遞訊號至各該 資料線組。 17. 如申請專利範圍第11項所述之陣列基板,其中該陣列 基板另包含有: 一掃描線測試訊號線,設於該週邊區域;以及 複數個單向開關元件設於該週邊區域,各該掃描線之另一端係 為一掃描線測試端,且各該單向開關元件分別與該等掃描線之各 該掃描線測試端及該掃描線測試訊號線電連接’且各該早向開 關元件僅允許訊號從該掃描線測試訊號線單向傳遞至該掃 描線。 18. 如申請專利範圍第17項所述之陣列基板,其中各該單 向開關元件可受一正向偏壓之驅動而同時呈開啟狀態,藉 25 1299849 此使與各該單向開關元件電連接之各該掃描線導通,且該 正向偏壓亦傳遞至各該掃描線。 19. 如申請專利範圍第18項所述之陣列基板,其中各該單 向開關元件係為一二極體。 ^ 20. 如申請專利範圍第17項所述之陣列基板,其中該陣列 > 基板另包含至少二條掃描線測試訊號線·,且該等掃描線係 區分為至少二掃描線組’各該掃描線組中之該等掃描線測 試端經由該等單向開關元件與對應之該掃描線測試訊號線 電〗連接,且各該掃描線測試訊號線係獨立傳遞訊號至各該 掃描線組。 21. 如申請專利範圍第11項所述之陣列,基板,其中該陣列 P 基板可與一彩色濾光片基板結合,且該陣列基板與該彩色 ' 濾光片基板之間包含有一液晶分子層,藉以形成該液晶顯 示面板。 22. —種液晶顯示面板之製作方法,其包含有: 提供一基板,並於該基板上形成複數條平行之第一導 線、複數條平行但與該等第一導線垂直且不相交之第二導 26 1299849 線、至少一第一測試電路,以及複數個單向開關元件分別 與該等第-導線之-端及該第—測試電路電連接,·以及 各該第二導線 提供-第-測試訊號經由該第—測試電路及該等單向 開關元件至各該第-轉,朗時提供—第二職訊號至 汀如申請專利範圍第22項所述之製作方法,其中各該第 二導線之-端係分顺複數鮮向_元件電連接。 7申請專利範圍第μ項所述之製作方法,其中該等第 ==該等第二導線係分料該液晶顯示面板之資料線 ::關申:二_第22項所述之製作方法,其中各該單 问開關兀件可香_ π A r 此使與各該單向np 動而叫呈開啟狀態’藉 #正^「D β關讀電連接之各料-⑽導通,且 Μ向偏壓亦傳遞至各該第一導線。 27 1299849 27. 如申請專利·第22項所述之製作方法,其中各該單 向開關元件係為一二極體。 28. 如申請專利範㈣22項所述之製作方法,其中於提供 該第一測試訊號至該等單向開關元件時,該方法另包含有 於該液晶顯示面板之背面提供一測試光源。 29. —種液晶顯示面板,包含有: 一彩色濾光片基板; 一陣列基板,設置該彩色濾光片基板之對側;以及 一液晶分子層,設置於該彩色濾光片基板與該陣列基板 之間; 其中,該陣列基板區分為一顯示區域及一週邊區域,兮 陣列基板包含有: 複數條平行排列之資料線,設於該顯示區域内,各 該資料線之一端係為一資料線測試端; 複數條平行排列之掃描線,設於該顯示區域内,該等掃 描線係與該等資料線垂直且不相接觸,且各該資料線與各 該掃描線之交錯區形成一薄膜電晶體; 一資料線測試訊號線,設於該週邊區域;以及 28 1299849 …複數個第—單向開關元件,設於該週邊區域,各該 第一單向開關元件分別與該資料線測試端及該資料線 測試訊躲電連接,且各辟向開關元件僅允許訊號從 該資料線測試訊號線單向傳遞至該資料線。 3〇.如申請專利範圍第29項所述之液晶顯示面板,其中各 該:-單向開關元件可受一正向偏壓之驅動而同時呈開啟 狀悲’猎此使與各該第_單向開關元件電連接之各該資料 線導通’且該正向偏壓亦傳遞至各該㈣線。 31.,如申料利範圍第29項所述之液晶顯示面板,其中各 該第一單向開關元件係為一二極體。 32.如申μ專利乾圍第29項所述之液晶顯示面板,其中各 :弟-早向開關元件包含—薄膜電晶體,該薄膜電晶體之 ’極及源極係電連接,且一没極與該資料線測試端電 連接。 ^如申請專利範圍帛29項所述之液晶顯示面板,其中各 ,料線之另柒係為一資料線訊號端,且該等資料線訊 \端係與至j 一資料線驅動晶片電連接,各該掃描線之一 29 1299849 端係為一掃描線訊號端,且該等掃描線訊號端係與至少一 掃描線驅動晶片電連接。 34·如申請專利範圍第29項所述之液晶顯示面板,其中該 車歹i基板另包含至少一條資料線測試訊號線,且該等資料 線係區分為至少二資料線組,各該資料線組中之該等資料 線測試端經由該等第—單向開關元件與對應之該資料線測 式孔號線電連接,且各該資料線測試訊號線係獨立傳遞訊 號至各該資料線組。 35.如申請專利範圍第29項所述之液晶顯示面板,其 陣列基板另包含有: 人 一掃描線測試訊號線,設於該週邊區域;以及 魏個第二單向開關元件設於該週邊區域,各該掃描線 :另’一端係為-掃描線測試端,且各該第二單向開關二牛 分別與各該掃描_試端及該掃描_試訊麟電連接且 ^該第二單向開關元件僅允許訊號從該掃描線測試訊 單向傳遞至該掃描線。。 、、、 ’其中各 時呈開啟 ^如申請專利範㈣%項所述之液晶顯示面板 °玄第一早向開關元件可受-正向偏壓之驅動而同 30 1299849 狀態,藉此使與各該第二單向開關元件電連接之各該掃描 線導通,且該正向偏壓亦傳遞至各該掃描線。 37. 如申請專利範圍第35項所述之液晶顯示面板,其中各 該第二單向開關元件係為一二極體。 38. 如申請專利範圍第35項所述之液晶顯示面板,其中各 該第二單向開關元件包含一薄膜電晶體,該薄膜電晶體之 一閘極及一源極係電連接,且一汲極與該雜描::線·^試端7電 連接。 39.如申請專利範圍第35項所述之液晶顯示面板,其中該 陣列基板另包含至少二條掃描線測試訊號線,且該等掃描 線係區分為至少二掃描線組5各該掃描線組中之該等掃描 線測試端經由該等第二單向開關元件與對應之該掃描線測 試訊號線電連接,且各該掃描線測試訊號線係獨立傳遞訊 號至各該掃描線組。 31The array substrate according to item (u) of the patent monthly trajectory, wherein the switching element is in the form of a 13-bonded transistor, and one of the gate and the source of the thin film transistor is electrically connected, The bungee is electrically connected to the test end of the data line. 15 · If the other end of the claim line is the array substrate of the system and the at least one data line drive, each of which contains the signal line end of the data line, and the data line signal end of the chip Electrically connected, one end of each of the scan lines 24 1299849 is a scan line signal end, and the scan line signal ends are electrically connected to at least one scan line drive chip. The array substrate according to claim 11, wherein the array substrate further comprises at least two data line test signal lines, and the data lines are divided into at least two tributary line groups each of the tributary line groups. The metric line test terminals are electrically connected to the corresponding data line test signal lines via the unidirectional switching elements, and each of the data line test signal lines independently transmits signals to each of the data line groups. The array substrate of claim 11, wherein the array substrate further comprises: a scan line test signal line disposed in the peripheral region; and a plurality of unidirectional switching elements disposed in the peripheral region, each The other end of the scan line is a scan line test end, and each of the unidirectional switch elements is electrically connected to each scan line test end of the scan lines and the scan line test signal line, and each of the early switch The component only allows signals to be transmitted unidirectionally from the scan line test signal line to the scan line. 18. The array substrate according to claim 17, wherein each of the one-way switching elements can be driven by a forward bias and simultaneously turned on, and the two-way switching elements are electrically connected by 25 1299849. Each of the connected scan lines is turned on, and the forward bias is also transmitted to each of the scan lines. 19. The array substrate of claim 18, wherein each of the one-way switching elements is a diode. The array substrate of claim 17, wherein the array further comprises at least two scan line test signal lines, and the scan lines are divided into at least two scan line groups. The scan line test ends of the line group are connected to the corresponding scan line test signal lines via the unidirectional switch elements, and each of the scan line test signal lines independently transmits signals to the scan line groups. 21. The array of claim 11, wherein the array P substrate is coupled to a color filter substrate, and the liquid crystal layer is included between the array substrate and the color filter substrate. Thereby forming the liquid crystal display panel. 22. A method of fabricating a liquid crystal display panel, comprising: providing a substrate, and forming a plurality of parallel first wires on the substrate, and a plurality of second parallel but not perpendicular to the first wires a lead wire 121299849, at least one first test circuit, and a plurality of unidirectional switching elements are electrically connected to the ends of the first-wires and the first test circuit, respectively, and each of the second wires provides a -test-test Transmitting, by the first test circuit and the unidirectional switching elements, to each of the first-turns, and providing the second working signal to the manufacturing method described in claim 22, wherein each of the second wires The end-to-end system is electrically connected to the component. The manufacturing method of the above-mentioned claim, wherein the second wire is a data line of the liquid crystal display panel:: Guan Shen: the production method described in Item 22, Each of the single-question switch components can be scented _ π A r so that each of the one-way np is called an open state, and the material is connected to the D-turned electrical connection - (10), and the direction is turned on. The biasing is also transmitted to each of the first conductors. 27 1299849 27. The method of claim 22, wherein the one-way switching element is a diode. 28. If the patent application (4) is 22 The method of manufacturing the method, wherein when the first test signal is provided to the unidirectional switching elements, the method further comprises providing a test light source on the back side of the liquid crystal display panel. 29. A liquid crystal display panel comprising a color filter substrate; an array substrate disposed opposite the color filter substrate; and a liquid crystal molecular layer disposed between the color filter substrate and the array substrate; wherein the array substrate is distinguished a display area and a surrounding area, The array substrate comprises: a plurality of data lines arranged in parallel, disposed in the display area, one end of each of the data lines is a data line test end; and a plurality of parallel scan lines are disposed in the display area, The scanning lines are perpendicular to the data lines and are not in contact with each other, and each of the data lines and the scanning lines form a thin film transistor; a data line test signal line is disposed in the peripheral area; and 28 1299849 a plurality of first-way switching elements are disposed in the peripheral area, and each of the first one-way switching elements is respectively connected to the data line test end and the data line test signal, and each of the turn-off switching elements only allows signals The data line of the test signal is transmitted from the data line to the data line. The liquid crystal display panel of claim 29, wherein: the unidirectional switching element can be driven by a forward bias At the same time, it is turned on, so that each of the data lines electrically connected to each of the first unidirectional switching elements is turned on and the forward bias is also transmitted to each of the (four) lines. 29th The liquid crystal display panel, wherein each of the first unidirectional switching elements is a diode. 32. The liquid crystal display panel of claim 29, wherein: Including a thin film transistor, the 'pole and source of the thin film transistor are electrically connected, and a pole is electrically connected to the test end of the data line. ^ The liquid crystal display panel according to claim 29, wherein each The other end of the material line is a data line signal end, and the data line end system is electrically connected to the j data line driving chip, and one of the scanning lines 29 2999849 is a scanning line signal end. And the scan line signal end is electrically connected to the at least one scan line drive chip. The liquid crystal display panel of claim 29, wherein the ruthenium i substrate further comprises at least one data line test signal line And the data lines are divided into at least two data line groups, and the test lines of the data lines in each of the data line groups are electrically connected to the corresponding data line measuring hole number lines via the first unidirectional switching elements And each of the funds Line test signal line is independent information is transmitted to each of the data line number set. The liquid crystal display panel of claim 29, wherein the array substrate further comprises: a human scan line test signal line disposed in the peripheral area; and a second unidirectional switch element disposed at the periphery The area, each of the scan lines: the other end is a scan line test end, and each of the second one-way switch two cows is connected to each of the scan_test end and the scan_test signal and the second The unidirectional switching element only allows signals to be transmitted unidirectionally from the scan line test signal to the scan line. . ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, Each of the scan lines electrically connected to each of the second unidirectional switching elements is turned on, and the forward bias is also transmitted to each of the scan lines. 37. The liquid crystal display panel of claim 35, wherein each of the second unidirectional switching elements is a diode. 38. The liquid crystal display panel of claim 35, wherein each of the second unidirectional switching elements comprises a thin film transistor, and one of the gate and the source of the thin film transistor is electrically connected, and The pole and the miscellaneous:: line · ^ test end 7 electrical connection. The liquid crystal display panel of claim 35, wherein the array substrate further comprises at least two scan line test signal lines, and the scan lines are divided into at least two scan line groups 5 in each of the scan line groups. The scan line test ends are electrically connected to the corresponding scan line test signal lines via the second unidirectional switch elements, and each of the scan line test signal lines independently transmits signals to the scan line groups. 31
TW93120321A 2004-07-07 2004-07-07 Circuit architecture with a testing function for use in a display panel and method of making the same TWI299849B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI399734B (en) * 2008-11-07 2013-06-21 Au Optronics Corp Liquid crystal display panel
TWI406241B (en) * 2008-10-30 2013-08-21 Chunghwa Picture Tubes Ltd Inspection circuit and display device thereof
US9576515B2 (en) 2014-10-08 2017-02-21 Au Optronics Corp. Bright dot detection method and display panel

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TWI722391B (en) * 2019-02-26 2021-03-21 瑞鼎科技股份有限公司 Light-emitting diode display panel testing device and light-emitting diode display panel testing method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI406241B (en) * 2008-10-30 2013-08-21 Chunghwa Picture Tubes Ltd Inspection circuit and display device thereof
TWI399734B (en) * 2008-11-07 2013-06-21 Au Optronics Corp Liquid crystal display panel
US9576515B2 (en) 2014-10-08 2017-02-21 Au Optronics Corp. Bright dot detection method and display panel
US10008140B2 (en) 2014-10-08 2018-06-26 Au Optronics Corp. Bright dot detection method and display panel

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