JP3273905B2 - Active matrix substrate for liquid crystal display device and inspection method therefor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an active matrix substrate of a liquid crystal display device and a method of inspecting the same.

[0002]

2. Description of the Related Art As is well known, there is an active matrix type liquid crystal display device. In this active matrix type liquid crystal display device, a pair of substrates are arranged to face each other, and a liquid crystal is sandwiched between these substrates. Also,
A counter electrode is provided on one substrate, and a plurality of signal lines and a plurality of scanning lines are arranged on the other substrate so as to be orthogonal to each other, and for each region defined by each signal line and each scanning line, Pixel electrodes are provided. These pixel electrodes are selectively driven through each signal line and each scanning line, and at the same time, the counter electrodes are driven to perform display by each pixel.

A substrate provided with each pixel electrode is called an active matrix substrate. In the active matrix substrate, as described above, each pixel electrode is selectively driven through each signal line and each scanning line. For this reason, each switching element is attached to each pixel electrode, each scanning line is sequentially scanned, and each time, each switching element along the scanning line is turned on through the scanning line, and each signal voltage is applied to each pixel electrode. A voltage is applied to each pixel electrode along the scanning line through the signal line and each of the turned on switching elements. When the scanning of each scanning line is completed, each signal voltage is applied to all the pixel electrodes, and one image is displayed.

[0004] As a switching element for driving a pixel electrode, a TFT (thin film transistor), a MIM (metal-insulating-film-metal) element, and the like are generally known.

FIG. 6 partially shows an active matrix substrate constituted by using TFTs. here,
The scanning line 102 is connected to the gate electrode of the TFT 101, and the TFT 101 is turned on through the scanning line 102. The signal line 103 is connected to the source electrode of the TFT 101, the pixel electrode 104 is connected to the drain electrode of the TFT 101 via the contact hole 105, and the signal voltage is applied to the pixel electrode 10 via the signal line 103 and the TFT 101.
In addition to 4. The drain electrode of the TFT 101 is also connected to one electrode 106a forming an auxiliary capacitance, and a signal voltage is also applied to this electrode 106a. The other electrode 106b of the auxiliary capacitance is commonly connected to an electrode 106b of another auxiliary capacitance, and is connected to a counter electrode of another substrate.

FIG. 7 shows a cross-sectional structure along the line AA 'in FIG. As is clear from FIG. 7, the active matrix substrate has a TFT 101 on a transparent insulating substrate 111.
Gate electrode 112, gate insulating film 113, semiconductor layer 1
14, n ⁺ -Si layer 115 serving as a source electrode and a drain electrode of TFT 101, and signal line 10 formed of a conductive layer
3. Interlayer insulating film 117, pixel electrode 1 composed of a transparent conductive layer
04 are sequentially laminated. The pixel electrode 104 is connected to the TF through the contact hole 105 of the interlayer insulating film 117.
It is connected to the drain electrode (n ⁺ -Si layer 115) of T101.

[0007] Here, between the scanning line 102 and the pixel electrode 104 formed in the same layer as the gate electrode 112, and the signal line 1
03 and the pixel electrode 104, the interlayer insulating film 117 is interposed between the scanning line 102 and the signal line 103.
However, the pixel electrodes 104 can overlap. Such a structure is disclosed, for example, in
No. 72,885, which is known to have an effect of improving an aperture ratio and suppressing a liquid crystal alignment defect due to shielding of an electric field caused by a signal line.

By the way, active elements such as TFTs are
It is susceptible to strong electric fields and is often destroyed by static electricity generated during the manufacturing process. For example, in a manufacturing process of a liquid crystal display device to which a TFT is applied, in a rubbing step of determining an orientation direction of a liquid layer, an alignment film made of a material such as polyimide is rubbed with a cloth. When static electricity is applied to the scan lines 102 and the signal lines 103 due to the change, the crystal structure of the semiconductor layer 114 changes,
The threshold voltage of the TFT is shifted by several volts. As a result, the switching operation of the TFT is not performed normally, and the portion of the pixel electrode 104 connected to the TFT becomes a defective pixel.

In order to prevent such a situation, generally,
In a manufacturing process of an active matrix substrate, all terminals on the substrate are short-circuited via a metal pattern called a short ring.

However, after the active matrix substrate and the other substrate are opposed to each other and bonded together, the short ring is removed, and thereafter the driving circuit for driving each signal line and each scanning line and its peripheral circuit are replaced with an active matrix substrate. Since it is mounted on top, this short ring does not provide a measure against static electricity in this mounting process.

Therefore, an input protection circuit composed of a switching element is inserted between the adjacent lines near the input terminals of the respective signal lines and the respective scanning lines, and when a certain amount of static electricity is applied to one of the lines, There is a technique which releases the charge from the line to an adjacent line via a switching element, thereby dispersing excessive static electricity and preventing the TFT from being destroyed (for example, see Japanese Patent Application Laid-Open No. 63-106788). .

According to this publication, as shown in FIG. 8, each input protection circuit 121 composed of a switching element includes a peripheral area 122 on which an input terminal 102a of each scanning line 102 and an input terminal 103a of each signal line 103 are arranged. And a display area 123 in which each pixel electrode is arranged.
Each input protection circuit 121 is composed of a pair of diodes 124 facing in opposite directions as shown in FIG.
2 (or between each signal line 103). These diodes 124 are formed in the same process as the TFT of each pixel electrode. As shown in FIG. 10, the scanning lines 102 (or the signal lines 103) are connected to the n ⁺ -Si layer on the semiconductor layer 114 through the contact holes 125. 115 and this n ⁺ -S
The short-circuit line 126 connected to the i-layer 115 is led to another adjacent scanning line 102 (or signal line 103), and the short-circuit line 12
6 is connected to another adjacent scanning line 102 (or signal line 103) via a contact hole 127.

When a diode 124 is inserted between the scanning lines 102, the sectional structure along BB 'in FIG.
The result is as shown in FIG. As is clear from FIG. 11, the scanning line 102 in the same layer as the gate electrode 112 is connected to the n ⁺ -Si layer 115 through the contact hole 125,
The short-circuit line 126 derived from the n ⁺ -Si layer 115 is connected to the scanning line 102 via the contact hole 127.

[0014]

However, in the case where the above-mentioned conventional input protection circuit is provided, leakage between signal lines,
Further, there is a problem that even if an attempt is made to inspect for a leak between the respective scanning lines, this inspection cannot be performed correctly.

That is, the resistance value of the diode of the input protection circuit is sufficiently high so as not to hinder display of an image, and the potential difference between the scanning lines and the potential difference between the signal lines are maintained. At the time of inspection, in order to improve the inspection efficiency, for example, the even-numbered lines are bundled, the odd-numbered lines are bundled, and the leak between the even-numbered lines and the odd-numbered lines is inspected. Then
Since a large number of diodes are inserted in parallel between each even-numbered line and each odd-numbered line, the resistance value between them becomes extremely small, and leakage less than the amount corresponding to this resistance value can be detected. Inspection of leaks became extremely difficult.

Therefore, the present invention has been made to solve the above-mentioned conventional problems, and is capable of dispersing static electricity to each scanning line and each signal line, and also has a leak in a state where the lines are bundled. An object of the present invention is to provide an active matrix substrate of a liquid crystal display device which enables inspection and a method of inspecting the active matrix substrate.

[0017]

According to the present invention, a plurality of signal lines and a plurality of scanning lines are arranged on an insulating substrate so as to be orthogonal to each other. for each of the regions partitioned by the line, provided <br/> pixel electrode respectively, there these pixel electrodes in the active matrix substrate of a liquid crystal display device for selectively driving via the signal lines and the scanning lines, adjacent Or adjacent signal lines
A series circuit consisting of multiple diodes connected in series
Are connected by a series connection in the series circuit.
To apply a voltage to the connection of the
Wires are connected.

According to such a configuration, for example, each signal line is connected via a series circuit in which a plurality of diodes are connected in series. For this reason, the charge of one signal line can be released to the other signal line via each diode, and excessive static electricity can be dispersed. Further, if a voltage is applied between the diodes and a reverse bias is applied to at least one of the diodes, it is possible to prevent leakage between the lines via the diodes by at least the amount of the bias. Leak inspection in a bundled state becomes possible.

In one embodiment, the series circuit includes two sets.
That are connected in series in each series circuit.
The direction of each diode is the same and one series
If the orientation of the diode in the circuit is
The direction of the diode is reversed.

In one embodiment, the two sets of series circuits
Are connected in common, and one bias line
It has become.

In one embodiment, the two sets of series circuits
Are connected to the pixel electrode side of the terminal of each signal line or the terminal of each scanning line .

In one embodiment, a terminal of each of the signal lines is provided.
The area excluding the terminals of each scanning line is
Along with the insulating film.

In one embodiment, the end of the bias line
The child is removed when the insulating substrate is cut.
You.

In one embodiment, a terminal of each of the signal lines is provided.
The area excluding the terminals of each scanning line is
Covered with insulating film along with the Aether and each bias line
And the terminals of the bias lines are arranged apart from the terminals of the signal lines or the terminals of the scanning lines.
You.

Further, the present invention provides a method of inspecting an active matrix substrate of the liquid crystal display device, each signal
Voltage is applied to the scanning line or each of the scanning lines.
Then, a voltage is applied to the bias lines, and each bias line is
A reverse bias voltage is applied to each connected diode.

As described above, when a voltage is applied between the diodes and a reverse bias voltage is applied to the diode connected to the line to which the voltage is applied, as described above, at least the amount of the bias is applied. Since leakage between the respective lines via the respective diodes can be prevented, it is possible to perform a leakage inspection in a state where the respective lines are bundled.

[0027]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a circuit diagram partially showing a first embodiment of the active matrix substrate of the present invention. In the first embodiment, the input protection circuit 1 shown in FIG.
21 instead of each diode 124,
The diodes 11 and 12 are connected in series between them, and the diodes 13 and 14 are connected between the scanning lines 102 and inserted in series. The directions of the diodes 11, 12 and the diodes 13, 14 are different from each other. Also,
Along each scan line 102, a respective bias supply line 1
5a are provided, and respective bias branch lines 15b are derived from these bias supply lines 15a.

The bias supply line 15a is connected to each diode 11, which faces in the forward direction when viewed from the neighboring scanning line 102.
12, the bias branch line 15b is connected to the scanning line 1
It is connected between the respective diodes 13 and 14 which are directed in the forward direction as viewed from 02.

Further, each of the diodes 11 to 14 is arranged near the input terminal 102a of each scanning line 102.

FIG. 2 shows a pattern for forming each of the diodes 11 to 14, and FIG. 3 shows a cross-sectional structure along CC 'in FIG. Further, in the display area 123 (shown in FIG. 1) in which each pixel electrode is arranged, the active matrix substrate of the first embodiment has the structure shown in FIGS. 2 and the cross-sectional structure of FIG.

As is clear from FIGS. 2 and 3, the right scanning line 102 on the same layer as the gate electrode 112 (shown in FIG. 7) on the insulating substrate 111 (shown in FIG. 7) is connected through the contact hole 21. Connected to the short-circuit line 22 and lead the short-circuit line 22 to the bias supply line 15a.
5a, this short-circuit line 22 is
⁺ -Si layer 115, and this n ⁺ -Si layer 115 is connected to short-circuit line 24 via contact hole 23, thereby forming diode 12. Further, the short-circuit line 24 is led to the left scanning line 102,
Was connected to the n ⁺ -Si layer 115, the n ⁺ -Si layer 115
Is connected to the scanning line 102 through the contact hole 25, thereby forming the diode 11.

Similarly, the left scanning line 102 is connected to the short-circuit line 27 via the contact hole 26, and the short-circuit line 2
7 to the bias branch 15b, and the short-circuit line 27 is connected to the n ⁺ -Si layer 115 at the position of the bias branch 15b.
The n ⁺ -Si layer 115 is connected to the short-circuit line 29 via the contact hole 28, thereby forming the diode 13. Also, direct the short-circuit line 29 to the right of scan line 102, and connecting the short-circuit line 29 to the n ⁺ -Si layer 115, connecting the n ⁺ -Si layer 115 through the contact hole 30 to the scanning line 102 Thus, the diode 14 is formed.

Here, for each scanning line 102, scanning line 1
02, one bias supply line 15a is arranged in parallel, and a pattern is used in which a bias branch line 15b is derived from the bias supply line 15a. In such a pattern, each diode 1 and 12 and each diode 1
When compared with another pattern in which respective bias supply lines are connected between 3, 14 and two bias supply lines are arranged between two adjacent scanning lines, a large space is required between each scanning line 102. Therefore, it is effective for effective use of the space between the scanning lines 102. In particular, recently, the definition of an image has been improved, and accordingly, each scanning line 102
It is desirable that both the scanning lines 102 and the bias supply lines have low resistance, and their areas need to be widened. Therefore, it is very preferable to effectively use the space between the scanning lines 102 as in the first embodiment for high definition of an image.

Next, the manufacturing process of the active matrix substrate of the first embodiment will be described. First, on the insulating substrate 111, the gate electrode 112 of the TFT 101, each bias supply line 15a, a part of each bias branch line 15b, and the scanning line 10
2 are formed, and a gate insulating film 113 is laminated thereon, and the contact holes 21, 23, 25, 26, 28, 30 are formed.
Is formed, the semiconductor layer 114 and the n ⁺ -Si layer 115 are formed.
To form Semiconductor layer 114 and n ⁺ -Si layer 115
Becomes the TFT 101 of each pixel electrode, and also becomes each of the diodes 11 to 14. Each diode 11 to 14,
Without using a TFT gate of the same dimensions as the TFT 101,
The source and drain of this TFT are used as each electrode of a diode.

Subsequently, by stacking conductive layers and patterning the conductive layers, the signal lines 103, the short-circuit lines 22, 24, 27 and 29, and the bias branch lines 15 are formed.
forming part of b.

Thereafter, as the interlayer insulating film 117, a photosensitive acrylic resin is formed to a thickness of 3 μm by spin coating. Subsequently, the interlayer insulating film 117 is exposed to a predetermined pattern and etched with an alkaline solution to form a contact hole 105 in the interlayer insulating film 117.

When forming the interlayer insulating film 117, the input terminal 102a of each scanning line 102 is not formed on the input terminal 102a of each scanning line 102.
Is not covered with the interlayer insulating film 117. Thus, the input terminal 102a of each scanning line 102 can be brought into contact with an external circuit via the external input terminal (TAB). However, the areas where the diodes 11 to 14, the bias supply lines 15a, and the bias branch lines 15b are formed are covered with the interlayer insulating film 117. This is to prevent leakage between the electrodes of the diode composed of the semiconductor layer 114 and the n ⁺ -Si layer 115. Further, after a display device is completed by mounting an external circuit or the like, any substance on the wiring is removed. This is to prevent an unnecessary voltage from being applied between the diodes due to adhesion or the like, thereby adversely affecting the display.

After the formation of the interlayer insulating film 117, a transparent conductive film is formed by a sputtering method, and the transparent conductive film is patterned to form each pixel electrode 104. These pixel electrodes 104 are connected to the drain electrodes of the respective TFTs 101 via the respective contact holes 105.

The display area 123 on which the pixel electrodes are arranged on the active matrix substrate thus formed.
Then, a polyimide-based film is formed, and a rubbing process or the like is performed on the film to form an alignment film.

On the other hand, a transparent conductive film such as ITO is formed on the other substrate opposed to the active matrix substrate, and by patterning the transparent conductive film,
A corresponding electrode is formed only in an area facing the display area 123 of the active matrix substrate while leaving the transparent conductive film.

A sealing material is applied by printing to the peripheral portions of these substrates except for the portion of the liquid crystal injection port, and then, on the output terminals of the active matrix substrate connected to the counter electrode of the other substrate, A conductor for connecting the output terminal to the counter electrode is formed by overlapping, and a spacer for keeping the gap between the substrates constant is sprayed, and then the substrates are opposed to each other and bonded. Thereafter, the sealing material is cured by heating, liquid crystal is injected between the substrates from the liquid crystal injection port, and the liquid crystal injection port is closed by the sealing member. Thus, the liquid crystal panel of the liquid crystal display device is completed.

Here, the diodes 11 to 14 are provided between the scanning lines 102 to form the bias supply lines 15a and the bias branch lines 15b. However, the same manufacturing process and substantially the same structure are used. As shown in FIG. 1, the diodes 11 to 14 can be provided between the signal lines 103 to form the bias supply lines 15a and the bias branch lines 15b.

Next, the liquid crystal panel thus formed is inspected. First, for lighting inspection, each scanning line 102,
Each signal is input to the common connection line of each signal line 103, the counter electrode, and the storage capacitor of each pixel, and each pixel is turned on. At this time, paying attention to each signal line 103, the input terminal 103a of each signal line 103 is connected to these signal lines 1
Inspection short-circuit wirings 31R to be separated after the inspection of 03,
31G and 31B are connected, and these short-circuit wires 3
1R, 31G, and 31B, the signal lines 103 are electrically bundled for red, green, and blue, and the bundled signal lines 103 are bundled.
To determine whether or not each color is displayed.

After the lighting test is performed in this manner, each of the red signal lines 103 is subjected to a leak test between the signal lines 103.
A voltage of +5 V is applied to the short-circuit wire 31R for bundling, and the other wires, that is, the short-circuit wire 3 for bundling the green signal lines 103
The short-circuit wiring 31B that bundles the 1G and blue signal lines 103, each scanning line 102, the counter electrode, and the common connection wiring of the storage capacitor of each pixel are set to the ground potential. Then, the current flowing through the short-circuit wiring 31R is measured, and based on the value of this current, it is confirmed that the resistance value between the short-circuit wiring 31R and the other wiring is infinite or sufficiently large.

At this time, if a bias voltage is not applied to the diodes 11 to 14 connected to the signal lines 103 bundled by the short-circuit wiring 31R, the short-circuit wiring 3
A current flows from 1R to each of the other short-circuit wires 31G and 31B via each of the diodes 11 to 14. Each signal line 1
The resistance value of each of the diodes 11 to 14 inserted between the short-circuit wirings 31R and 31R is high enough to be able to perform the display.
The diodes 11 to 14 between G are connected in parallel, and the diodes 11 to 14 between the short-circuit wires 31R and 31B are connected.
14 are connected in parallel, so that each short-circuit wiring 31R, 31G
The resistance value between them and the resistance value between the short-circuit wires 31R and 31B become small, and it is not possible to detect a leak less than the amount corresponding to this resistance value.

Therefore, a bias voltage of +5 V or more is applied as a voltage for leak inspection between the diodes 11 and 12 and between the diodes 13 and 14 from the bias wiring 32R via the bias supply line 15a and the bias branch line 15b.
10V is applied, and 5 is applied to the diode 11 and the diode 14.
A reverse bias voltage of V is applied. As a result, the short-circuit wiring 31
As long as there is no leak between each signal line 103 bundled by R and the other wires, no current flows through the short-circuit wire 31R, and a leak test can be performed.

Similarly, a voltage of +5 V is applied to the short-circuit line 31G that bundles the green signal lines 103, the other lines are set to the ground potential, and the bias line 32G is connected via the bias supply line 15a and the bias branch line 15b. A bias voltage of +10 V is applied between the diodes 11 and 12 and between the diodes 13 and 14, and a reverse bias voltage of 5 V is applied to the diodes 11 and 14, thereby performing a leak test on each green signal line 103. In addition, a voltage of +5 V is applied to the short-circuit line 31B that bundles the blue signal lines 103, the other lines are set to the ground potential, and the bias supply line 15a and the bias branch line 1 are connected to the bias line 32B.
5V is applied to the diode 11 and the diode 13 via 5b.
Of the blue signal line 1
03 leak inspection is performed.

In the case of a leak test of each scanning line 102, for example, each scanning line 102 is divided into even-numbered and odd-numbered ones and bound, and each of the scanning lines 102 bundled is divided into even-numbered and odd-numbered ones. , And the other wirings are set to the ground potential, and a reverse bias voltage of 5 V is applied to the diodes 11 and 14 connected to the respective scanning lines 102, thereby performing a leak test.

After performing the lighting test and the leak test as described above, the active matrix substrate is cut along the cutting lines 41 shown in FIG.
B and the respective bias wirings 32R, 32G, 32B, etc. are separated, and the respective signal lines 103 and the respective scanning lines 102 are separated from each other. Since the diodes 11 to 14 are arranged inside the dividing lines 41, they remain on the active matrix substrate and continue to play the role of preventing the occurrence of defects due to static electricity. Moreover, since the areas where the diodes 11 to 14, the bias supply lines 15a, and the bias branch lines 15b are formed are covered by the interlayer insulating film 117,
By dividing along the dividing line 41, each bias supply line 1
The exposed portion of the conductor connected to 5a and each of the bias branch lines 15b is eliminated, and there is no possibility that an unnecessary voltage is applied to these diodes 11 to 14. For this reason, by leaving each of the diodes 11 to 14, after the display device is completed, display failure does not occur and reliability is not impaired.

FIG. 4 is a circuit diagram partially showing a second embodiment of the active matrix substrate of the present invention. In the second embodiment, each of the bias wirings 32R, 32G, and 32B is disposed inside the input terminal 103a of each signal line 103.
No wiring pattern is formed. in this case,
In designing each input terminal 103a, only the accuracy of each input terminal and the external terminal (TAB) connected to each input terminal may be considered, and the pitch of each input terminal 103a is narrowed to achieve high definition. A liquid crystal panel can be realized.

FIG. 5 is a circuit diagram partially showing an active matrix substrate according to a third embodiment of the present invention. In the third embodiment, not only the bias wires 32R, 32G, and 32B are arranged inside the input terminal 103a of each signal line 103, but also the short-circuit wires 31R, 31G, and 3B.
1B and the bias wirings 32R, 32B, 32G are deleted, and the dividing line 41 is omitted accordingly.

Thus, between each input terminal 103a,
No wiring pattern is formed, and the pitch of each input terminal 103a is narrowed, so that a high-definition liquid crystal panel can be realized.

At the time of inspection, each signal is directly applied to each of the scanning lines 102, each of the signal lines 103, and the terminals 32r, 32g, 32b of each of the bias wirings 32R, 32G, 32B by using a short hand or flexible. As described above, when each signal is directly applied to each signal line 103 and each terminal,
It is extremely difficult to form a wiring pattern between the input terminals 103a of the signal lines 103 due to the arrangement space of the needles for applying each signal and the accuracy of the alignment, so that the bias wirings 32R, 32G, Arranging the 32B inside the input terminal 103a of each signal line 103 is even more preferable as compared with the second embodiment.

When the active matrix substrate is inspected, the same drive signal as that of an actual display device may be input. A single signal may be input to a signal line or each scanning line. However, when inspecting for leaks between signal lines or between scan lines, in order to perform the inspection more quickly, a large number of lines, such as even-numbered and odd-numbered lines, must be It is common sense to collectively measure the resistance value between the bundled wires and the other wires and to inspect them. Of course, in this case, it is necessary to apply a reverse bias to the diode between each line.

In the case of the structure of the third embodiment,
A terminal 32r of each bias wiring 32R, 32G, 32B,
It is preferable to arrange 32g and 32b apart from the input terminal 103a of each signal line 103. Accordingly, when a positional shift occurs when mounting an external circuit, the terminals 32r, 32R of the bias wirings 32R, 32G, 32B are provided.
An unnecessary signal is prevented from being added to g and 32b to prevent the display from being disturbed.

[0056]

According to the present invention, for example, between signal lines,
They are connected via a series circuit in which a plurality of diodes are connected in series. For this reason, the charge of one signal line can be released to the other signal line via each diode, and excessive static electricity can be dispersed even after the removal of the short ring. Further, if a voltage is applied between the diodes and a reverse bias is applied to at least one of the diodes, it is possible to prevent leakage between the lines via the diodes by at least the amount of the bias. Leak inspection in a bundled state becomes possible.

Specifically, when a diode is formed from a TFT having the same size as that used in the display area,
The measured value of the resistance between each of the 40 signal lines and each of the other signal lines and each scanning line was only 4.7 KΩ, and the leak test could not be performed substantially. Due to the bias, the measured value of the leak falls below the measurement limit, and the presence or absence of the leak can be clearly distinguished by the presence or absence of the leak current. In addition, from the viewpoint of the manufacturing process, the use of the active matrix substrate in this new structure does not require the addition of a new number of steps, and adds only one DC power supply for bias at the time of inspection. Without incurring a rise.

Further, since all the bias lines are not drawn out to the outside of the terminals of the signal lines and the terminals of the scanning lines, the bias lines are appropriately shared and connected, and then drawn out. Even when there is little room between the terminals of the signal lines and between the terminals of each scanning line, each bias line can be arranged, and the pitch between the terminals of each signal line and each scanning line can be reduced, and And the signal input to these terminals can be performed without any trouble.

Further, when each bias line is formed inside the terminal of each signal line and the terminal of each scanning line, it is not necessary to form a wiring pattern between each terminal. Each terminal and an external terminal (TA
Only the accuracy of B) needs to be considered, and the pitch of each terminal can be narrowed to realize a high-definition liquid crystal panel.

Further, since the insulating film is not formed on the terminal of each scanning line and the insulating film is formed on each diode,
Leakage of each diode and the wiring of each diode can be prevented, and application of an unnecessary voltage between the diodes due to attachment of some substance on the wiring or the like can be prevented.

Further, after performing the lighting inspection and the leak inspection, when cutting the active matrix substrate in order to disconnect the wiring for commonly connecting the terminals of each signal line and the terminals of each scanning line and the wiring of each diode, Since each diode is left on the active matrix substrate, each diode continues to play a role of preventing occurrence of a failure due to static electricity. In addition, when the active matrix substrate is divided, unnecessary wiring of each diode is cut, so that there is no exposed portion of the conductor connected to this wiring, and there is no possibility that an unnecessary voltage is applied to each diode. After completion, display failure occurs,
There is no loss of reliability.

In addition to forming each bias line inside the terminal of each signal line and the terminal of each scanning line, it is necessary to provide wiring for commonly connecting the terminal of each signal line and the terminal of each scanning line. Thus, there is no need to divide the active matrix substrate. In this case, although each signal is directly added to each scanning line and each signal line by a short hand or a flexible cable, each signal line is added due to the arrangement space of each needle for adding each signal and the positioning accuracy. It becomes extremely difficult to form a wiring pattern between the terminals of
It is even more preferable to arrange each bias line inside the terminal of each signal line. Further, a wiring pattern is not formed between the terminals, and the pitch between the terminals is narrowed, so that a high-definition liquid crystal panel can be realized.

Further, since the terminals of the respective bias lines are arranged apart from the terminals of the respective signal lines, when a positional shift occurs when an external circuit is mounted, an unnecessary signal is supplied to the terminals of the respective bias lines. To prevent the display from being disturbed.

[Brief description of the drawings]

FIG. 1 is a circuit diagram partially showing an active matrix substrate according to a first embodiment of the present invention;

FIG. 2 is a plan view showing a wiring pattern forming each diode on the active matrix substrate of FIG. 1;

FIG. 3 is a cross-sectional view showing a cross-sectional structure along the line C-C ′ in FIG. 2;

FIG. 4 is a circuit diagram partially showing an active matrix substrate according to a second embodiment of the present invention;

FIG. 5 is a circuit diagram partially showing an active matrix substrate according to a third embodiment of the present invention;

FIG. 6 is a plan view partially showing an active matrix substrate formed using TFTs.

7 is a cross-sectional view showing a cross-sectional structure along A-A 'in FIG.

FIG. 8 is a plan view partially showing a conventional active matrix substrate.

FIG. 9 is a circuit diagram showing a conventional input protection circuit.

10 is a plan view showing a wiring pattern forming each diode in the input protection circuit of FIG. 9;

11 is a sectional view showing a sectional structure along BB 'in FIG.

[Explanation of symbols]

11, 12, 13, 14 Diode 15a Bias supply line 15b Bias branch line 21, 23, 25, 26, 28, 30 Contact hole 22, 24, 27, 29 Short line 31R, 31G, 31B Short line 32R, 32G, 32B Bias wiring 41 Breaking line 102 Scanning line 103 Signal line

Continuation of front page (56) References JP-A-10-10493 (JP, A) JP-A-3-2838 (JP, A) JP-A-6-11739 (JP, A) JP-A-63-106788 (JP) JP-A-7-318980 (JP, A) JP-A-9-146111 (JP, A) JP-A-9-80471 (JP, A) JP-A-63-303322 (JP, A) (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/136 G02F 1/133

Claims (8)

(57) [Claims] A plurality of signal lines and a plurality of scanning lines are arranged on an insulating substrate so as to be orthogonal to each other, and a pixel electrode is provided for each region defined by each signal line and each scanning line. An active matrix substrate of a liquid crystal display device for selectively driving these pixel electrodes through each signal line and each scanning line, wherein adjacent signal lines or adjacent scanning lines are provided in plural numbers.
Are connected by a series circuit consisting of a series of diodes.
And a diode connected in series in the series circuit
Is connected to the bias line that applies the voltage.
Active matrix substrate of a liquid crystal display device. 2. The circuit according to claim 1, wherein two sets of said series circuits are provided.
Of each diode connected in series in the column circuit
The direction is the same, and the
The direction of the diode is the same as the direction of the diode in the other series circuit.
2. The active matrix substrate of a liquid crystal display device according to claim 1, wherein the active matrix substrate is opposite . 3. The two sets of series circuits are connected respectively.
3. The bias line is commonly used as one.
An active matrix substrate for a liquid crystal display device according to item 1. 4. A circuit connected to each of the two sets of series circuits.
The active matrix substrate of a liquid crystal display device according to claim 1 , wherein the bias line passes through an area closer to the pixel electrode than a terminal of each signal line or a terminal of each scanning line. 5. The terminal of each signal line and the terminal of each scanning line.
Except for the above, the area excluding
The active matrix substrate of the liquid crystal display device according to claim 1, wherein the active matrix substrate is covered with: 6. The terminal of the bias line, wherein the insulating substrate is
The active matrix substrate of the liquid crystal display device according to claim 1, wherein the active matrix substrate is removed when being divided . 7. A terminal for each signal line and a terminal for each scanning line.
The area excluding the terminals is the diode and bias
2. The active matrix according to claim 1, wherein the active matrix is covered with an insulating film together with the lines, and the terminals of the bias lines are arranged apart from the terminals of the signal lines or the terminals of the scanning lines. substrate. 8. The method for testing an active matrix substrate of a liquid crystal display device according to claim 1, wherein a voltage is applied to each of said signal lines or each of said scanning lines.
And apply a voltage to the bias line to
Apply a reverse bias voltage to each diode connected to the
In addition, a method for inspecting an active matrix substrate of a liquid crystal display device.