TWI292208B - - Google Patents

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Publication number
TWI292208B
TWI292208B TW092115874A TW92115874A TWI292208B TW I292208 B TWI292208 B TW I292208B TW 092115874 A TW092115874 A TW 092115874A TW 92115874 A TW92115874 A TW 92115874A TW I292208 B TWI292208 B TW I292208B
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TW
Taiwan
Prior art keywords
wire
conductive
circuit portion
wires
wiring
Prior art date
Application number
TW092115874A
Other languages
Chinese (zh)
Other versions
TW200428614A (en
Original Assignee
Hitachi Ltd
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Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of TW200428614A publication Critical patent/TW200428614A/en
Application granted granted Critical
Publication of TWI292208B publication Critical patent/TWI292208B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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Description

1292208 (1) 玫、發明說明 【發明所屬之技術領域】 本發明是有關電子裝置及半導體裝置，特別是適用於 裝入包含放大微弱的訊號之低雜訊放大器（LNA : Low1292208 (1) FIELD OF THE INVENTION The present invention relates to an electronic device and a semiconductor device, and particularly to a low noise amplifier (LNA: Low) that incorporates a weakly amplified signal.

Noise Amplifier)的高頻部類比訊號處理1C的高頻功率 模組（半導體裝置）以及無線通訊裝置（電子裝置）之有 效技術。 【先前技術】 攜帶電話機等的移動通訊機（移動終端）係如可對應 複數個通訊系統的構成。即用以在攜帶電話機的發送接收 機（前端，Front end )進行複數個通訊系統的發送接收而 組裝有複數個電路系。例如使在通訊方式（系統）不同的 攜帶電話（例如行動電話機）間的通話爲可能的方式，已 知有雙頻（Dual band )通訊方式。 關於雙頻方式已知有例如發送頻帶爲8 8 0〜9 1 5 Μ Η z的 GSM (移動通訊全球系統，Global System for Mobile Communications )、利用發送頻帶爲 1710〜1785MHz的 DCS- 1 8 00 (數位蜂巢式系統，Digital Cellular System 1 8 00 )的雙頻方式以及雙頻用高頻功率放大器。 而且，在日本特開平1 1 - 1 8 6 92 1號揭示可利用於PCN (個人通訊網路，P，— r s ο n a 1 C 〇 m ni u n i c a t i ο n s N e t w 〇 r k : DCS- 1 8 00 ) 、PCS (個人通訊服務，Personal C o m m u n i c. a t i ο n s S e r v i c e : D C S -1 9 0 0 )以及 G S M 等的攜帶 (2) 1292208 電話系統的多帶移動體通訊裝置。 而且，在攜帶電話機的前端可謀求G S Μ用的高頻部 類比訊號處理電路的模組化。例如有利用Μ 0 S F Ε Τ (金屬 氧化半導體場效電晶體，Metal Oxide Semico n ductoi· Field-Effect-Transistor)的雙頻或三頻的 GSM 用 RF (無 線電頻率，R a d i 〇 F ι· e q u e n c y )功率模組。 雙頻方式是處理GSM以及DCS ( Digital Cellular System) 1 8 00方式等的兩個通訊系的訊號，三頻方式是 處理GSM以及DCS1800以及PCS1900方式等的三個通訊 系的訊號。GSM連結有GSM900或GSM 8 5 0。 而且，高頻模組組裝有LNA、混頻器（Mixer )、 P L L (鎖相迴路，P h a s e - L 〇 c k e d L ο ο p )合成器（ Synthesizer )、附自動校準（A u t o c a 1 i b ]· a t i ο n )的 P G A ( 可規劃程式的增益放大器，Programmable Gain Amplifier )、IQ調變器/解調器、偏移PLL、VCO (壓控振盪器， Voltage-Controlled Oscillator)等的單晶片的半導體元件 c 另一方面，攜帶電話機爲了搬運方便起見被要求小型 、輕量化。其結果高頻功率模組等的電子零件也希望更小 型、輕量化。 半導體裝置依照其封裝的形態有各種，而其中之一已 知有使絕緣性樹脂的密封體（封裝）的背面（安裝面）露 出在導線（外部電極端子），不在密封體的側面使導線長 長地突出的非導線型（Non-lead )半導體裝置。 (3) 1292208 非導線型半導體裝置有沿著密封體的背面的對面的兩 邊，使導線露出的SON (小外型非導線封裝，Small Outline Non-Leaded Package)或在密封體的背面的四邊 側使露出的QFN (四邊扁平非導線封裝，Quad F]at Non-Leaded Package ) 。 對 於小型 不發生 導線彎 曲的非 導線型 半導體裝置例如記載於日本特開200卜3 1 3 3 63號公報。 記載於此文獻的樹脂密封型半導體裝置具有連接固定 半導體晶片的晶粒座( Die pad )與焊接線（Wire )的打 線接合（W i r e b ο n d i n g )部的焊塾（Island)，半導體晶 片被固定於晶粒座上，半導體晶片的各電極端子是連接於 導線或焊墊的打線接合部的構造。在晶粒座與打線接合部 之間設有空隙部，防止因熱應力造成的接合的焊接線的脫 落或切斷。這種構造藉由以焊接線連接半導體晶片的接地 端子與焊墊，可將焊墊連接於作爲接地導線的印刷基板等 〇 曰本特開平1卜2 5.1 4 9 4號公報記載以半導體元件搭載 部爲接地的攜帶電話機等所使用的導線構造爲鷗翼（Gull wing )型的高頻裝置（Device )。此技術除了以焊接線連 接半導體元件的電極與導線外，因以晶粒座爲接地電極而 利用’故以焊接線連接半導體元件的電極與半導體元件搭 載部（住後，稱爲朝下接合，D 〇 w n b ο n d i n g )。由於進行 朝下接合’故半導體元fr |苔載部比半導體元件大，而且在 安裝狀態下成爲在半導體元件的外側半導體元件搭載部的 周緣@分突出，於此部分連接有焊接線的構造。 冬 (4) 1292208 另一方面，本申請人檢討將高頻功率模組連結到非導 線型半導體裝置，且爲了接地電位的穩定化，經由焊接線 電性連接構成高頻功率模組的各電路部的接地端子於調整 片的手法的採用。藉由採用朝下接合可減少外部電極端子 的數目，可謀求封裝的小型化，最終可謀求半導體裝置的 小型化。 但是’在以無線通訊系（通訊系統）爲用途的高頻功 率模組判明發生如以下的問題。 在攜帶電話機的接收系以天線捕捉的訊號被低雜訊放 大器（LN A )放大，但是輸入訊號極爲微弱。因此，各電 路邰特別是依照周期動作的振盪器的動作，共通端子的調 整片的電位即接地電位變動，起因於此變動在與--部分的 電路部之間發生串擾（Crosstalk )，輸出變動無法進行良 好的通話。 特別是因導線之間的串擾所造成的感應電流或接地電 位的變動所造成的訊號波形的失真由通訊系統輸出，此輸 出訊號進入使用中的通訊系統變成雜訊。 這種接地電位的變動以及容易接受串擾的影響的電路 部，除了低雜訊放大器（LN A )以外，例如有處理高頻的 RFVC0 (高頻電壓控制振盪器）等。 亦即，低雜訊放大器（LN A )或高頻電壓控制振盪器 (RFV7C0 )容易受到接地電位的變動及串擾的苏響，因此 搭載高頻功率模組的攜帶電話機等電子裝置的高頻特性會 受損。 >7- (5) 1292208 因應於此，本發明的目的是在於提供一種在搭載有無 線通訊裝置等用途的高頻功率模組之電子裝置中，可以提 升高頻特性的電子裝置。 本發明之另一目的是在於提供一種可以提升可靠度的 電子裝置（無線通訊裝置）。 本發明之另一目的是在於提供一種低雜訊放大器或高 頻電壓控制振盪器等的電路部可不易受到其他電路部的接 地電位的變動所造成的串擾的影響之半導體裝置。 本發明的前述以及其他目的與新穎的特徵可由本說明 書的記述以及添付圖面而明瞭。 【發明內容】 在本案中所揭示的發明之中，若簡單地說明代表的發 明槪要的話如以下所示。 本發明之電子裝置係具備： 半導體裝置；該半導體裝置具有：複數條導線，及具 有主面及背面的調整片，及具有複數個電極端子及分別藉 由複數個半導體元件來構成的複數個電路部之半導體晶片 ，及連接前述複數個電極端子與前述導線之複數個導電性 的焊接線，及連接前述複數個電極端子與前述調整片的主 面，而來將第1電位供應給前述複數個電極端子之複數個 導電性的焊接線；及 ^ 配線基板；該配線基板安裝有前述半導體裝置，具備 第1配線層與第2配線層，且設有共通配線，該共通配線 -8- (6) 1292208 係配置在開口於前述第1配線層與第2配線層的複數個貫 通孔，而來分別連接前述配線層的配線； 前述半導體晶片係固定於前述調整片的主面； 前述電路部係包含：經由前述導線來輸入外部訊號的 第1電路部，及經由前述調整片與前述導電性的焊接線來 連接的第2電路部； 前述複數個電極端子係具有：在前述第1電路部輸入 前述外部訊號的第1電極端子，及在前述第1電路部供給 固定電位的第2電極端子； 前述複數條導線係包含：傳達前述外部訊號的第1導 線，及配置於前述第1導線兩側的第2導線； 在連接前述第1導線與前述第1電極端子的前述導電 性的焊接線的兩側配置有連接前述第2導線與前述第2電 極端子的前述導電性的焊接線； 前述調整片與前述配線基板的前述共通配線會被連接 〇 又，本發明之半導體裝置係具有： 密封體；該密封體係由絕緣性樹脂所構成；及 複數條導線；該複數條導線係沿著前述密封體的周圍 而配置，且橫跨前述密封體的内外而設置；及 調整片；該調整片係具有主面及背面；及 半導m晶片；該半導體晶片係具有主面及背面〜·在該 主面上具有複數個電極端子，及分別藉由複數個半導體元 件來構成的複數個電路部；及 (7) 1292208 複數條導電性的焊接線；該複數條導電性的焊接線係 連接前述複數個電極端子與前述導線；及 複數條導電性的焊接線；該複數條導電性的焊接線係 連接前述複數個電極端子與前述調整片的主面，而於前述 複數個電極端子供給第1電位； 則述半導體晶片係被固定於前述調整片的主面； 前述電路部係包含··經由前述導線來輸入外部訊號的 第1電路部，及經由前述調整片與前述導電性的焊接線來 連接的第2電路部； 前述複數個電極端子係具有：在前述第1電路部輸入 前述外部訊號的第1電極端子，及在前述第1 .電路部供給 固定電位的第2電極端子； 前述複數條導線係包含：傳達前述外部訊號的第1導 線，及配置於前述第1導線兩側的第2導線； 在連接前述第1導線與前述第1電極端子的前述導電 性的焊接線的兩側配置有連接前述第2導線與前述第2 « 極端子的前述導電性的焊接線。 【實施方式】 以下參照圖面詳細說明本發明的實施形態。此外’在 用以說明發明的實施形態的全圖中，對具有相同功能的構 件附加相同的符號，省略其重複許明。 (實施形態]) -10- (8) 1292208 圖1至圖1 9是有關本發明的實施形態1之一例，亦 即高頻功率模組及組裝該高頻功率模組的無線通訊裝置。 圖1至圖5是有關局頻功率模組’圖6至圖11是有關高 頻功率模組的製造方法’圖1 2〜1 9是有關無線通訊裝置 〇 在本實施形態1說明關於在四角形狀的密封體（封裝 )的背面的安裝面適用本發明於露出調整片以及連接於此 調整片的調整片吊導線以及導線（外部電極端子）的Q F N 型的半導體裝置的例子。又，就前述半導體裝置的一例而 言，是舉高頻功率模組1來進行說明。 QFN型的高頻功率模組.1，如圖1及圖2所示，具有 以扁平的四角形狀的絕緣性樹脂所形成的密封體（封裝） 2。在此密封體2的內部埋入有四角形狀的半導體元件（ 半導體晶片：晶片）3。前述半導體晶片3是藉由接著劑 5來固定於四角形狀的調整片4的調整片表面（主面）（ 參照圖2 )。如圖2所示’密封體2的背面（底面）成爲 被安裝的面側（安裝面）。 在密封體2的背面露出調整片4及支持調整片4的調 整片吊導線6以及導線（外部電極端子）7的一面（安裝 面7 a )。這些調整片4及調整片吊導線6以及導線7是 在高頻功率模組1的製造中，以形成圖案（Patterning ) 的一片金屬製、(例如銅製）的導線架（Lead frame )形成 ，然後被切斷而形成。 因此，在本實施形態1中，這些調整片4及調整片吊 -11 - (9) 1292208 導線6以及導線7的厚度是形成相同。但是，在導線7中 ，因內端部分是蝕刻背面一定的深度而薄薄地形成，故在 此薄的導線部分的下側成爲構成密封體2的樹脂進入的構 造。藉此，導線7很難由密封體2脫落。 調整片4的四角落是由細細的調整片吊導線6所支持 。這些調整片吊導線6是位於四角形狀的密封體2的對角 線上，使外端面臨四角形狀的密封體2的各角落部。密封 體2爲扁平的四角形體，角部（角落部）會被施以倒角加 工而形成斜面2 a (參照圖1 )。調整片吊導線6的外端是 在此倒角部分僅突出0 . 1 m m以下。此突出長度是根據切 斷導線架狀態的調整片吊導線時之沖壓（p r e s s )機械的 切斷模而定，.例如可選擇0 · 1 mm以下。 而且，如圖1所示，在調整片4的周邊使內端面對調 整片4的導線7是沿著四角形的密封體2的各邊，以預定 間隔配置複數個。調整片吊導線6及導線7的外端是延伸 到密封體2的周緣。亦即，導線7及調整片吊導線6是遍 及密封體2的內外而延伸。由導線7的密封體2的突出長 是與前述調整片吊導線6同樣的，根據切斷導線架狀態的 導線時之沖壓機械的切斷模而定，例如僅突出〇 . 1 m m以 下。 而且，密封體2的側面是形成傾斜面2 b (參照圖2 ) 。此傾斜面2 b是在導線架的一面進行單面封膠（Μ ο 1 d ) 形成密封體2後，當由封膠模具的模槽（Cavity )抽出密 封體2時，爲了使抽出容易起見，令模槽的側面爲傾斜面 -12 - (10) 1292208 的結果所造成者。此外，圖1是切去密封體2的上部而可 見到調整片4、調整片吊導線6、導線7及半導體晶片3 等的模式圖。 而且，如圖1及圖4所示，在半導體晶片3的露出的 主面配設有電極端子9。電極端子9是在半導體晶片3的 主面中沿著四角形的各邊大致被配設成預定的間距（ Pitch )。此電極端子9會經由導電性的焊接線1 〇來連接 於導線7的內端側。 調整片4與半導體晶片3比較下形成較大，如圖8所 示，在其主面的中央具有半導體元件固定區域，亦即半導 體兀件搭載部4 a，並且在此半導體元件搭載部4 a的外側 ，亦即調整片4的周緣部分具有焊接線連接.區域4b。並 且，-半導體晶片3會被固定於此半導體元件搭載部。 而且’在；接線連接區域4 b中連接有一端連接於半導體 晶片3的電極端子9的導電性的焊接線1 〇的他端。特別 是將連接於調整片4的焊接線10稱爲朝下接合焊接線 1 0 a。由於是錯由打線接合裝置來進行電極端子9與導線 7之間的打線接合及電極端子9與調整片4之間的打線接 合’因此焊接線10與朝下接合焊接線1〇a皆屬同樣的材 質。 朝下接合構造的採用目的一般是利用調整片4的半導 體晶片內的各電路·部的接地電位（第—電位）的共通化。 令調整片4爲共通的接地端子，藉由經由焊接線連接此調 整片4與成爲接地電極端子的許多電極端子，可減少沿著 -13- (11) 1292208 密封體2的周圍排列的外部電極端子的導線7 (針腳， P i η )的數目，可謀求導線數降低所造成的密封體2的小 型化。此與半導體裝置之高頻功率模組1的小型化有關。 其次，針對搭載於本實施形態1之高頻功率模組1的 半導體晶片3的電路構成來進行說明。圖4是顯示半導體 晶片3中的各電路部的配置的模式的佈局圖。在半導體晶 片3的主面沿著邊配置有電極端子（焊墊）9。而且，在 這些電極端子9的內側區分區域配置有各電路部。如圖4 所不在半導體晶片3中央配置有ADC/DAC&DC偏移用控 制邏輯電路部3 5，在其左側排列混頻器2 6、6 4與三個 L N A (低雜訊放大器）2 4 , r ρ V C 0 4 4 (第2電路部）會位 於上側，在右側由上到下排列RF合成器（第2電路部） 41、VCXO (第2電路部）50、IF合成器（第2電路部） 4 2、13F V C 0 4 5，T X V C Ο (第2電路部）6 7位於下側。 在圖5顯示各電路部（第I電路部以及第2電路部） 與其電極端子9的關係，電極端子9與導線7的焊接線 1 〇之接線狀態。焊接線1 〇顯示連接電極端子9與導線7 的焊接線1 〇與連接電極端子9與調整片4的朝下接合焊 接線l〇a。 若著眼於特定電路部1丨（第〗電路部）.的三個 LNA24的話，貝ij與外接零件的帶通濾波器23 (參照圖12 0-連接的預定的導線7、即記載於左側的,s i g n a 1的導線7 (第一導線）與LNA24的訊號電極端子（第一電極端子 )9會經由焊接線]〇連接。由電極端子9經由焊接線！ 〇 -14 - (12) 1292208 而到達導線7的訊號配線配設兩條，此兩條訊號 側，特定電路部1 1的LNA24的接地電極端子（ 端子）9會經由焊接線1 0來連接於接地導線7 ( ，圖中記載於左側的GND的導線7 )，而形成 線。 此刻，在本實施型態的高頻功率模組1中， 配線的兩側的接地用的導線（第二導線）7爲供 位者，作爲前述固.定電位的一例來表示接地電位 〇 藉此，鄰接的其他VCO等的第2電路部的 LNA24的導電7之間會藉由固定電位（在此'爲 接地電位）的導線 7而被電磁屏蔽。而且 LNA24彼此也會藉由固定電位的導線7而被電磁 又，如圖1 2所示，與放大由天線20進入的 的LNA24比較，在處理由基帶晶片22輸出的電 發送系的各電路部（例如偏移PLL、TXVC067 因該電氣訊號比前述微弱訊號大，故具有因接地 動或串擾所造成的雜訊強的特性。因此，對發送 部的接地電位的供給藉由經由各V C Ο等與調整. 共通，可減少導線7的數目，可使高頻功率模組 體裝置）小型化。 LNA爲了防止因己.形成於半導體晶片3主 線間的串擾所造成的訊號的劣化，最好是比例如 照圖1 2 )等、處理被前述LNA放大的訊號的電 配線的兩 第二電極 第二導線 有接地配 兩條訊號 給固定電 的情況時 導線7與 被固定的 ，接鄰的 屏蔽。· 微弱訊號 氣訊號的 等）中， 電位的變 系的電路 片4使其 .1 (半導 面上的配 PGA (參 路或發送 -15- (13) 1292208 系的電路等，還要使前述配線的長度變短而配置於更接近 電極端子9。 其次’本實施型態的高頻功率模組1，如圖3所示， 在各導線7與導線7之間，及導線7與調整片吊導線6之 間存在形成密封體2時所產生的樹脂毛邊。此樹脂毛邊部 分是在半導體裝置1的製造中在導線架的一面進行單面封 膠，形成密封體2時產生的。 封膠後雖然切斷不要的導線架部分，惟因在此時的導 線7或調整片吊導線6的切斷時樹脂毛邊也同時被切斷， 故樹脂毛邊的外緣變成與導線7的緣或調整片吊導線6的 緣一起，一部分的樹脂毛邊殘留於各導線7與導線7之間 以及導線7與調整片吊導線6之間。 而且，在本實施形.1是密封體2的背面比調整片4、 調整片吊導線6以及導線7的背面（安裝面）還凹入的構 造。此在傳送封膠（T r a n s f e r m ο 1 d i n g )中的單片封膠中 ，在封膠模具的上下模間舖設樹脂製的薄片（Sheet )， 使導線架的一面接觸此薄片而進行封膠，因薄片在導線架 的間隙咬入，故密封體2的背面變成凹入形。 而且，在利用傳送封膠的單片封膠後，於導線架13 的表面形成表面安裝用的電鍍膜。因此，露出在高頻功率 模組1的密封體2的背面的調整片4、調整片吊導線6以 及導線7的表面雖然未圖示但是具有電鍍膜。， 如此，在導線7或調整片吊導線6的背面之安裝面突 出，密封體2的背面凹入的偏移構造具有在安裝基板80 -16 - (14) 1292208 (參照圖1 3 )等的焊接線基板表面安裝高頻功率模組j 時，因焊錫83的潤濕區域被特定’故焊錫安裝良好的特. 長。 其次，針對於本實施形態].的高頻功率模組】的製造 方法，參照圖6至圖i i來說明。如圖6的流程圖所示， 局頻功率模組1是經過導線架準備（s〗〇、晶片接合（ Sl〇2 )、打線接合（S103 )、密封（封膠：sl〇4 )、電鍍 處理（S 1 0 5 )、切斷除去不要的導線架（s〗〇6 )的各製程 而製造。 圖7是在製造本實施形態].之qfn型的高頻功率模 組1時所使用的矩陣構成的導線架】3的模式平面圖。 此_線架1 3其單位導線架圖案1 4沿著X方向配置 2 〇行，沿著Y方向配置4列，可由一片導線架1 3製造 8 〇個高頻功率模組1。在導線架1 3的兩側配設有導線架 1 3的傳送或定位等所使用的導孔（g u i d e h ο 1 e ) 1 5 a〜1 5 c o 而且，澆道（Runner )在進行傳送封膠時位於各列的 左側。因此，因利用頂桿（Ejector pin )的突出由導線架 1 3撕下澆道硬化樹脂，故設有頂桿可貫通的頂桿孔16。 而且，因利用頂桿的突出由導線架1 3撕下由此澆道分歧 ，在流到模槽的澆口（ Gate )部分硬化的澆口硬化樹脂， 故設有頂桿可貫通的頂桿孔17。 圖8是顯示單位導線架圖案1 4的一部分的平面圖。 單位導線架圖案1 4由於是實際製造的圖案’故有模式圖 -17- (15) 1292208 的圖1或圖2等未必一致的部分。 單位導線架圖案1 4具有矩形框狀的框部1 8。調整片 吊導線6由此框部1 8的四角落延伸，成爲支持中央的調 整片4的圖案。複數條導線7由框部1 8的各邊的內側朝 內方延伸，其內端接近調整片4的外周緣。在調整片4以 及導線7的主面配設有晶片接合或打線接合用的未圖示的 電鍍膜。 而且，導線7其前端側背面被半蝕刻（Half-etching )而變薄（參照圖2 )。此外，導線7或調整片4等令其 周緣爲像主面的寬度比背面的寬度還寬的斜面，形成倒梯 形剖面很難由密封體2抽出的構造也可以。此也可藉由蝕 刻或沖壓（Press )來製造。 而且’如圖8所示在調整片4的主面中，中央的四角 形區域成爲半導體元件搭載部4 a (被二點鏈線框包圍的 區域），其外側的區域成爲焊接線連接區域4 b。 在準備這種導線架1 3後如圖9所示，藉由接著劑5 將半導體晶片3固定（晶片接合）於各單位導線架圖案 1 4的調整片4的半導體元件搭載部4a ( S丨02 )。 其次’如圖1 〇所示進行打線接合，以導電性的焊接 線1 0連接半導體晶片3的電極端子9與導線7的前端， 並且以導電性的焊接線〗〇連接預定的電極端子9與調整 片4的户、·.接線連接區域4b ( s 1 03 )。焊接線1 0.朝下接 合焊接線1 0a是例如使用金線。 在打線接合後，進行常用的傳送封膠的單片封膠，在 -18- (16) 1292208 導線架1 3的主面形成圖1 1所示之絕緣性樹脂的密 (S 1 〇4 )。密封體2會覆蓋導線架1 3的主面側的 晶片3、導線7等。在圖8中以二點鏈線框表示的 形成有密封體2的區域。 其次，未圖示，進行電鍍處理（S 1 05 )。其結 線架1 3的背面形成有未圖示的電鍍膜。此電鍍膜 高頻功率模組1的表面安裝時的接合材使用，例如 電鍍膜。又，亦可取代形成前述電鍍膜的製程，預 線架1 3的表面全面使用被實施鍍p d的物質。此刻 是當使用被鍍P d的導線架1 3時可省略前述密封後 製程’使製造製程簡略化，可削減製造成本。 其次’切斷除去不要的導線架部分（S 1 0 6 )， 圖1所示的高頻功率模組1。在圖8所示的二點鏈 密封體2的稍外側，利用未圖示的沖壓機械的切斷 線7以及調整片吊導線6被切斷。利用切斷模的構 微脫離密封體2的位置切斷導線7以及調整片吊導 而距此稍微脫離的位置的密封體2的距離例如令成 以下。距導線7以及調整片吊導線6的密封體2的 度’由防止卡住等的觀點來看，以較短爲佳。此突 在沖壓機械的切斷模的變更下可自由選擇〇.] m ηι以 在此，舉高頻功率模組1的各部的尺寸的一例 架1 3 (調整片4、調整片吊導線6、導線7 )的 0.2mm，半導體晶片3的厚度爲〇.2 8mm，高頻功率 的厚度爲]· 0 m m，導線7的寬度爲〇 · 2 ηι ηι，導線7 ‘封體2 半導體 部分爲 果在導 是當作 爲焊錫 先在導 ，特別 的電鍍 製造如 線框的 模使導 造在稍 線6， 0.1m m 突出長 出長度 上。 。導線 厚度爲 模組1 的長度 (17) 1292208 爲0.5 mm，調整片4的焊接線連接位置（點）距所搭載的 半導體晶片3的端1 · 〇mm，而且調整片4與導線7的間隔 爲 0.2mm ° 此外，就以往的高頻功率模組而言，在輸出振盪器等 的高頻訊號的電路部中會有可能如先前所述，因接地電位 的變動而發生串擾，分別在電路部產生輸出變動或訊號波 形失真。並且，在具有雙頻或三頻等複數個通訊電路的高 頻功率模組中，會有可能在動作中的通訊電路的影響下不 使動作的通訊電路中發生感應電流，此感應電流會形成雜 訊來進入動作中的通訊電路。 而且，有因輸入訊號配線彼此的串擾，使在各個電路 部的輸出變動或訊號波形的失真發生之虞，特別是在來自 輸入訊號小的天線的外部訊號輸入用導線中，需要極力避 開與接鄰的導線的串擾的影響。 在此，於本實施形態1之高頻功率模組i中，如圖5 所示’在將外部訊號傳達至第1電路部（特定電路部；[! )的導電性焊接線1 0的兩側，設有例如被供給接地電位 等固定電位的導電性焊接線1 0。 亦即’在圖5所示的高頻功率模組1中，從LN A ( 低雜訊放大器）24的電極端子經由焊接線1 〇來到達導線 7的訊號配線在其兩側配置有被供給接地電位等固定電位 的導電性焊接.，線1 〇，藉此，LNA24的訊號配線會被也磁 屏蔽’其結果，前記訊號配線會難以受到串擾。並且，固 定電位並非只限於接地電位，只要是被固定的電位即可。 -20 - (18) 1292208 在此，本實施形態1之高頻功率模組1 ’例如爲攜帶 電話機的三頻用的高頻功率模組，因此如圖5所示，特定 電路部1 1爲LNA (低雜訊放大器）24，且由於是三頻， 故連接於天線20 (參照圖12 )的LNA24也配置三個。 單一的LNA24成爲本發明所謂的狹義的特定電路部 1 1。亦即，如圖5所示，來自各LNA24的天線20的輸入 訊號會分別形成兩條。而且，爲了電磁屏壁此兩條訊號配 線，兩條訊號用導線與其他訊號用導線之間，最好在兩條 訊號用導線的兩側分別配置固定電位（本實施型態1爲接 地電位）的導電7。 又，若使輸入訊號配線成爲兩條而形成差動輸入構成 的話，則會在兩條輸入訊號配線出現同程度的串擾所造成 的影響，而使能夠抵銷（消除）雜訊（串擾）。在此，如 圖5所示，令包圍三個LNA24的矩形框部分爲廣義的特 定電路部1 1。 此特定電路部1 1在半導體晶片3中，在由其他電路 部絕緣隔離的區域中形成有各LNA24。而且各LNA24的 接地電位是形成共通。這是因爲雙頻通訊系統、三頻通訊 系統在使用一個通訊系統（通訊系）的期間，剩餘的通訊 系統會形成空載（Idling)狀態，因此對屬於成爲空載狀 態的通訊系統的LNA24所造成的接地電位的影響小，所 以即使使屬於個別的通訊系統的LNA24彼此的接地電極 以及接地配線共通化，互相的不良影響也小。但是，若有 需要，亦可對各個LNA實施隔離（Iso】ati〇n )，而使各 -21 - (19) 1292208 LNA的接地電位獨立。 其次，針對本實施型態1的電子裝置的構造進行說明 。本實施型態1的電子裝置是包含搭載有本實施型態1的 局頻功率模組1的安裝構造者，例如攜帶電話機等的無線 通訊裝置69。 圖1 3是顯示本實施形態1的半導體裝置（高頻功率 模組）1的攜帶電話機的安裝狀態的基本構造模式剖面圖 〇 爲了在無線通訊裝置6 9 (參照圖1 2 )，亦即攜帶電 話機的安裝基板（配線基板）8 0的主面上搭載高頻功率 模組1，而配設有對應於高頻功率模組1的導線7及調整 片4來連接於配線的焊墊8 1及調整片固定部8 2。在此， 是以高頻功率模組1的導線7及調整片4能夠與前述焊墊 8 1及固定部8 2 —致重疊之方式，來定位載置高頻功率模 組1。而且，在此狀態下一時地熔融（迴焊，Reflow)預 先形成於高頻功率模組1的導線7及調整片4的背面之焊 錫電鍍膜，而以焊錫8 3來連接（安裝）導線7及調整片 4 〇 在此，參照圖1 2來簡單說明有關三頻構成的攜帶電 話機的電路構成（功能構成）。亦即，此攜帶電話機可進 行例如 900MHz帶的 GSM通訊方式與 1 8 00MHz帶的 DCS 1 8 00通訊方:令，與1 9 00MHz帶的PCS 1 900通訊方式的 訊號處理。 圖1 2的區塊圖顯示經由天線開關2 1來連接於天線 -22 - (20) 1292208 20的發送系與接收系，發送系及接收系皆是連接於基帶 (Baseband)晶片 22 。 接收系具有天線2 0、天線開關2 1、並聯連接於此天 線開關2 1的三個帶通濾波器2 3、分別連接於前述帶通濾 波器23的低雜訊放大器（LNA ) 24、連接於前述三個 LNA24且並聯連接的可變放大器25。在此兩個可變放大 器25分別連接有混頻器26、低通濾波器27、PGA28、低 通濾波器29、PGA30、低通濾波器31、PGA32、低通濾 波器 33、解調器 34。PGA28、PGA30、PGA32是藉由 ADC/DAC&DC偏移用控制邏輯電路部35來予以控制。而 且，兩個混頻器2 6是以9 0度相位轉換器4 0來進行相位 控制。 在圖12中，由90相位轉換器40及兩個混頻器26所 構成的I/Q調變器，爲了對應於各頻帶區域，會分別對應 三個LNA而配設，但在圖12中爲了簡略化，而僅繪出一 個。 在半導體晶片3中，設有由RF合成器41及IF (中 間，Intermediate)合成器42所構成的合成器來作爲訊號 處理1C。RF合成器41是經由緩衝器 43來連接於 RFVC044，且以RFVC044能夠輸出RF局部訊號之方式 來進行控制。而且，在緩衝器43中串聯有兩個局部訊號 用分頻器3 7、3 8，在各個輸出端連接冇:開關4 8、4 9。又 ，由RFVC〇44輸出的RF局部訊號會藉由開關48的切換 來輸入至90相位轉換器40。並且，90相位轉換器40會 -23- (21) 1292208 根據此RF局部訊號來控制混頻器26。 當RFVC044的訊號輸出模式爲Rx模式時，在GSm 爲 3780 〜3840MHz，在 DCS 爲 3610 〜3 7 60 MHz，在 PCS 爲 3860〜3980MHz。而且，Tx 模式在 GS Μ 爲 3840 〜3980 M Hz ，在 DCS 爲 3 5 8 0 〜3 7 3 0MHz，在 PCS 爲 3 8 6 0 〜3 9 8 0 Μ Η z。 IF合成器42是經由分頻器46來連接於IFVCO (中 間波電壓控制振盪器）4 5，且以IF V C 0 4 5能夠輸出I F局 部訊號來進行控制。並且，I F V C Ο 4 5的輸出訊號的頻率在 各通訊方式中皆爲640MHz。而且，藉由RF合成器41及 IF合成器42來控制VCXO (電壓控制水晶振盪器）50， 輸出基準訊號，然後傳送到基帶晶片22。 在接收系中，是利用合成器及 ADC/DAC&DC偏移用 控制邏輯電路部3 5來控制IF訊號，且利用解·調器34來 轉換成基帶晶片訊號（I，Q訊號），然後傳送到基帶晶 片22。 發送系是由： 以自基帶晶片22輸出的I，Q訊號當作輸入訊號的兩 個混頻器61 ;及 控制此兩個混頻器6 1的相位的9 0相位轉換器62; 及 累加此兩個混頻器6 1的輸出的加法器6 3 ;及 將加法器6 3的較社1都當作輸入的混頻器64以及DPP (數位檢相器，Digital Phase Detector) 65 ;及 將混頻器6 4以及D P D 6 5的輸出都當作輸入的環路濾 -24 - (22) 1292208 波器（L ο o p f i ] t e r ) 6 6 ;及 將環路濾波器6 6的輸出都當作輸入的兩個TXV C 0 ( 發送波電壓控制發送器）67 ;及 將此兩個TXVC067的輸出都當作輸入的功率模組68 ;及 天線開關2 1所構成。 此外，環路濾波器66爲外接零件。 另外，藉由混頻器6 1、9 0相位轉換器6 2以及加法器 63來構成直交調變器。90相位轉換器62是經由分頻器 47來連接於分頻器46，且根據自IFVC045 ·輸出的IF局 部訊號來進行控制。 兩個 TXVC067的輸出是藉由耦合器（Coupler.) 70 來檢測電流。此檢測訊號是經由放大器7 1來輸入到混頻 器72。混頻器72是經由開關49來輸入自RFVC044輸出 的RF局部訊號。混頻器7 2的輸出訊號與加法器6 3的輸 出訊號一起輸入到混頻器64及DPD65。藉由混頻器64與 DPD65 來構成偏移 PLL( Phase-Locked Loop)。由混頻 器72產生的輸出訊號的頻率在各通訊方式皆爲80MHz。 兩個TXVC067之中的一個的TXVC067爲GSM通訊 方式用，輸出訊號的頻率爲880〜915MHz。而且，其他的 TXVC067爲DCS、PCS通訊方式用，輸出訊號的頻率爲 17.Λ 0〜178 5 MHz或1 8 5 0〜1910 MHz。功率歐龃68內裝低 頻用功率模組與高頻用功率模組，低頻用功率模組接受來 自輸出8 8 0〜91 5 MHz的訊號的TXVC 067的訊號而進行放 -25· (23) 1292208 大處理，高頻用功率模組接受來自輸出1710〜1 7 8 5 MHz 或1 8 5 0〜1910 MHz的訊號的TXVC067的訊號而進行放大 處理，傳送到天線開關2 1。 在本實施形態1的高頻功率模組1中，邏輯電路60 亦形成單片，且將輸出訊號傳送到基帶晶片22。 本實施形態1的高頻功率模組1在圖1 2中以粗線包 圍的部分的各電路部是單片地形成。而且，三個 LNA24 的部分會形成本實施形態1中的特定電路部1](參照圖4 、圖5 )。雖以模式方式來顯示該等各電路部的一部份， 但實際上爲圖4及圖5之半導體晶片3的區塊俯視圖。 以天線2 0接收的無線訊號（電波）會被轉換成電氣 訊號，且於接收系的各零件依次被處理，然後傳送到基帶 晶片22。而且，由基帶晶片22輸出的電氣訊號會在發送 系的各零件依次被處理，然後由天線20當作電波來發射 〇 圖1 4〜圖1 6是表示本實施形態1之高頻功率模組1 的攜帶電話機的安裝構造的詳細圖。 圖1 4是表示安裝有高頻功率模組1的安裝基板8 0的 端子圖案。在安裝基板80的主面上形成有調整片連接用 端子之調整片固定部8 2，且於調整片固定部8 2的外側周 圍形成有與高頻功率模組1的各導線7連接的複數個焊墊 81，如圖15所不》除了 女裝基板80主面的局頻功率模 組1連接處以外，會藉由絕緣膜的防焊阻絕層9 1來覆蓋 -26- (24) 1292208 在安裝基板8 0中形成有主面的第1配線層8 6 (調整 片固定部8 2，焊墊8 1等）及内層的第2配線層8 7，第3 配線層8 8等，且貫通孔8 4會以能夠連接任一配線層彼此 的方式，在開孔於所期望的配線層的貫通孔配置導體，前 述導體大多是以電鍍來形成。 在圖14中，雖晶片3内的電路構成被省略，但實際 晶片3内的電路構成及所連接之導線7的配置是相當於 圖5所示之構成，在LNA24供給接地電位的導線7爲顯 示（固定電位），且供以輸入訊號至LNA24的導線7爲 顯不S i g η a 1者。 在圖1 5所示的安裝基板8 0中，主面上形成有調整片 固定部8 2及焊墊8 1等，的第1配線層，且作爲第2配線層 87的内層GND89，及作爲第3配線層88的内層Vcc90等 各配線層會被形成於内部，又，第1配線層的調整片固定 部82與第2配線層87的内層GND 89會藉由多數個的貫 通孔84來連接。 又，就圖1 4及圖1 5所示的構造而言，會在調整片固 定部82中沿著其各邊而配置有複數條共通配線的貫通孔 84。亦即，於調整片固定部82的背面側，在幾乎沿著其 各邊的而排列的狀態下配置有複數個貫通？L 84，各貫通 孔84會被連接於調整片固定部8 2，因此會在調整片固定 部82 B由多數個貫通孔84來供給與内層GN DM同電位 的共通接地電位（第1電位）。 又，因爲在高頻功率模組1的LNA (第1電路部） -27- (25) 1292208 24供給固定電位的接地電位之導線連接用的焊墊8 1也會 經由貫通？L 84來與内層GND89連接，因此如圖16所示 ’在安裝基板8 0搭載高頻功率模組1時，會在LN A 2 4經 由導線7及焊接線1 〇來供給一固定電位的接地電位（與 自調整片固定部8 2經由調整片4來供給的接地電位爲共 通相同的接地電位）.。 但’有關供給至LNA24的接地電位方面，亦可由與 供給固定電位的導線7及電極端子9 (第2電極端子）有 所不同的其他導線7經由焊接線1 0及其他電極端子9 ( 第3電極端子）來供給，或者經由連接於調整片4的朝下 接合焊接線1 〇 a來供給。又，於L N A 2 4中經由導線7及 焊接線1 0來供給的接地電位亦可爲使與供:給至調整片4 的第1電位（接地電位 > 分離（未連接）的其他接地電位 〇 亦即，亦可事先在安裝基板8 0上形成一能夠供給與 供給至調整片固定部82的第1電位（接地電位）不連接 的其他接地電位的構造，在高頻功率模組1的動作時，經 由導線7及焊接線1 0來將與供給至調整片固定部8 2的接 地電位有所不同的接地電位供給至LNA24。無論是哪種 情況，LN A 24等的特定電路部1 1的接地與其他剩下的電 路部的接地’雖未圖示，但最好在半導體晶片3内的配線 也是藉由接地間絕緣膜等來絕、緣分離。這是因爲晶片3内 的配線與安裝基板8 0上的配線或導線等相較之下具有較 高的電感，所以若藉由晶片3内的配線來連接LNA24等 -28- (26) 1292208 的特定電路部1 1與形成其他電源雜訊源的電路部連接， 貝lj LNA24 %高頻特性會有可能受到電源雜訊的影響而導 致LNA24的高頻特性受損。 又’局頻功率模組1中，調整片4及各導線7於露出 於g亥密封體2的安裝面（背面），安裝基板8 〇的各焊墊 8 1及對應於各焊墊8 1的各導線7會再經由焊錫8 3來電 性連接調整片4與安裝基板8 〇的調整片連接用端子（調 整片固定部82 )。 因此，在如此安裝構造的無線通訊裝置6 9中，經由 安裝基板80的内層G>JD89與多數個貫通孔84及調整片 固定部8 2而焊錫連接的調整片4之接地電位會充分地被 低電感化，而得以謀求其安定化。 藉此’對於具有在LNA24以外的調整片4被朝下接 合的第2電路部之振盪器等的各電子零件而言，由於充分 被低電感化的接地電位會經由朝下接合焊接線10a來供給 ，因此可極爲縮小對供給至LNA24等的第1電路部的接 地電位所造成的影響，及對往LNA2等的輸入訊號所造成 的影響。 亦即，安裝基板8 0的貫通孔8 4，其各個的電感大。 其理由乃貫通孔内的導電材（例如銅）會與線圈同樣作用 ，與形成於安裝基板8 0的主面上的配線9 4 5 9 5，9 6相較之 下，其電感0會形成較大所致。這在一般形成於安裝，基扳 8 0的貫通孔8 4 (導電性的插頭）中，與貫通孔的半徑相 較之下，由於形成於其内部的導體肖旲厚較小’因此貫通孔 -29- (27) 1292208 84的内部會形成中空。爲了解決如此的問題，例如有在 安裝基板8 〇的製程中以導體來充塡貫通孔8 4的内部之技 術，但如此的技術會增加安裝基板8 0的製程負荷，使安 裝基板8 0的成本增加，因此非所期望者。 在採用如此具有中空的貫通孔8 4之安裝基板8 0時， 若内層GND89與調整片固定部82只以1個貫通孔84來 連接，則供給至調整片4的接地電位不會被充分地低電感 化，而形成不安定的狀態，隨著具有第2電路部的高頻振 盪器的ΟΝ/OFF切換，會對第1電路部造成影響。又，由 於LNA (低雜訊放大器)24會放大微弱的訊號，因此接 地電位的變動會成爲低雜訊放大器24的輸出變動，且會 導致訊號波形失真。 相對的，就本實施形態1的無線通訊裝置6 9而言， 在安裝有高頻功率模組1的安裝基板8 0中，調整片固定 部82與内層GND89會在調整片固定部82的近傍，以多 數個的貫通孔8 4來連接，因此供給至調整片4的接地電 位會充分地被低電感化。 而且，在高頻功率模組1中，由於從具有第1電路部 的LNA (低雜訊放大器）24的電極端子9經由焊接線I 0 到達導線7的訊號配線會在其兩側配置有供給接地電位等 的固定電位之導電性的焊接線，因此LNA24的訊號配線 會被電磁屏壁，故訊號配線很難受到串擾。 因此，可提高無線通訊裝置6 9的高頻特性。 又，.爲了充分地使供給至調整片4的接地電位形成低 -30- (28) 1292208 電感化，而來使接地電位能夠充分地形成安定，而如圖 ]4所示，亦可使和供給接地電位（GND )至LNA24的 火干墊8 1連接的配線9 4與調整片固定部8 2連接。特別是 可配置於比連接則述配線9 4的焊墊8 1還要靠内側，藉此 使比焊墊81還要靠外側的領域能夠作爲配置其他配95或 零件的領域來有効地利用。 尤其是爲了改善往LN A 2 4輸入之訊號的高頻特性， 而配置與焊墊8 1 (在前述L N A 2 4輸入訊號（Signal)) 連接的線圈 （L ).、電容元件 （C )或電阻元件 （R ) 等的被動元件時，如前述，將來自供給接地電位（G.ND ) 的焊墊8 1的配線9 4引入內側，藉此可使前述各種元件能 夠配置更接近訊號（S i g n a】）輸入用焊墊8;1，進而能夠更 有效地達成高頻特性的改善。例如，在圖1 4所示的例子 中，是藉由使線圈（L )及電容元件（C )配置於非常接 近訊號（S i g n a 1 )輸入用的焊塾8 1，而使能夠縮短各被動 元件與焊墊8 1之間的配線9 6長度，因此可達成損失小的 電感整合。 又，圖1 7爲使用變形例的安裝基板8 0時。圖1 7所 示的安裝基板8 0是採用：連接第1配線層與第2配線層 8 7的各配線之共通配線不會到達安裝基板8 0背面的盲孔 8 5之例。 在採用盲孔.《85時，雖會有流入貫通孔84内的焊錫不 足等間題發生之虞，但卻有能夠藉由盲孔8 5來容易控制 焊錫量之効果。 -31 - (29) 1292208 即使是在形成有盲孔8 5的安裝基板8 0上安裝高頻功 率模組1時，照樣可以取得與前述貫通孔8 4的安裝基板 8 0時同樣的効果。 圖1 8所示之變形例的安裝基板8 0爲橫跨其調整片固 定部8 2的全體來設置盲孔8 5的情況。圖丨9是表示在圖 1 8所示之安裝基板8 〇上安裝高頻功率模組1的構造。若 利用圖1 9所示的安裝構造，則可將盲孔8 5 (或者貫通孔 84 )配置於調整片固定部82的全體，而使供給至調整片 4 (與調整片固定部8 2焊錫連接）的接地電位能夠更低電 感化’進而能夠更爲提高無線通訊裝置6 9的高頻特性。 若利用本實施形態.1，則會在高頻功率模組1等的半 導體裝置中，於導電性焊接線1 0的兩側（將外部訊號傳 達至LNA (低雜訊放大器）24等的第1電路部）配置供 給接地電位等固定電位的導電性焊接線1 0，且連接合成 器’ VC等的第2電路部及調整片4，而設有在前述第2 電路部供給接地電位（第1電位）之複數條導電性的朝 下接合焊接線l〇a，又，於安裝此半導體裝置的構造中， 調整片4與安裝基板80的複數個貫通孔84 (共通配線 )會在面積較大的調整片固定部82上經由焊錫83來連接 ，藉此使調整片4形成接地電位被充分低電感化的狀態。 如此一來，前述第2電路部的調整片4之接地電位也 會形成安定的狀態，可降低調整片4 ;：：接地電位的變動。 例如，可降低對應於週期性動作之振盪器等的第2電路部 的動作之接地電位的變動’而使能夠防止因此產生的串擾 -32 - (30) 1292208 又，由於在導電性焊接線1 0 (將外部訊號傳達至前 述第1電路部）的兩側配置有供給固定電位的導電性焊接 線1 0 ’因此傳達外部訊號的導電性焊接線1 〇的電位可藉 由固定電位的導電性焊接線1 0來形成被電磁屏蔽的狀態 ，藉此，即使在前述第2電路部發生接地電位變動，前述 弟1電路部照樣不易受到前述第2電路部的接地電位的變 動影響。 其結果’如本實施形態1所示，在安裝有高頻功率模 組1等的半導體裝置之攜帶電話機等的無線通訊裝置69 (電子裝置）中，可減少往LNA (低雜訊放大器）24等 的電路部之電源雜訊及訊號雜訊的輸入，藉此，可提高無 線通訊裝置69的高頻特性。 又，由'於可減少往LN A 24等的電路部之電源雜訊及 訊號雜訊的輸入，因此可提高無線通訊裝置69的信頼性 及品質。 亦即，在無線通訊裝置69中，可形成無輸出變動或 失真的良好通話。 又’在半導體裝置之局頻功率模組1中，因由LNa (低雜訊放大器）24的電極端子9經由焊接線i 0到達導 線7的訊號配線在其兩側配置有接地配線而被電磁屏壁， 故可不易受到其他思路部的訊號輸出入的串擾。 又，因高頻功率模組1爲調整片4露出在密封體2的 背面，故可有效地將在半導體晶片3產生的熱經由調整片 -33- (31) 1292208 固定部82散發到安裝基板80。因此，可謀求裝入此高頻 功率模組1的無線通訊裝置69的動作安定化。 又’因局頻功率模組1爲調整片4以及導線7露出在 密封體2的背面的非導線型半導體裝置，故高頻功率模組 1的小型、薄型化爲可能，也可謀求輕量化。0此，裝入 此高頻功率模組1的無線通訊裝置的小型、輕量化也可能 〇 又，因高頻功率模組1成爲經由焊接線1 〇連接半導 體晶片3的電極端子9與導線（針腳）7，並且以朝下接 合焊接線1 0 a連接成爲接地電位（第1電位）的調整片4 與半導體晶片3 0勺電極端子（接地電極端子）9的朝下接 合構造，故可減:少形成外部電極端子的,接地用的導線7。 其結果，可藉由降低針腳數來使密封體2小型化，進 而能夠達成高頻功率模組1的小型化。 (實施形態2 ) 圖2 0是切去本發明的其他實施形態（實施形態2 ) 之高頻功率模組的密封體的~部分之平面圖。 在本實施形態2中，有關搭載於無線通訊裝置69 ( 參照圖1 2 )等電子裝置的高頻功率模組1，除了在實施形 態1中特定電路部Π具有三個低雜訊放大器（LN A ) 2 4 :的電路部外，乂(：0之中處理高頻的1^¥(：〇。44也是當作特 定電路部1丨。因此，RFVC 044的所有的接地電極端子 9 會經由焊接線]〇來連接於導線（接地用的導線）7，而不 -34- (32) 1292208 經由焊接線連接於調整片4。 又，在由半導體晶片3的電極端子9經由焊接線1 0 到達導線7的配線中，在RFVC 044的兩條訊號配線（ S i gnal )的兩側配置有固定電位的接地配線，與實施形態 1的高頻功率模組1同樣的，進行訊號配線的電磁屏蔽。 又，有關3個LN A 24方面亦與實施形態1同樣的， 分別在2條訊號配線 （Signal )的兩側配置有固定電位 的接地配線。 藉此，除了 LNA24 (低雜訊放大器）以外， RFVC044 (高頻電壓控制振盪器）在處理所含的高頻訊號 的特定電路部1 1的接地電位也會不易受到其他電路部的 接地電位影響，因此可提高搭載高頻功率模組1之攜帶電 話機等無線通訊裝置6 9 (電子裝置）的高頻特性。 (實施形態3 ) 圖2 1是切去本發明的其他實施形態（實施形態3 ) 之高頻功率模組的密封體的一部分之平面圖。 就本實施形態3而言，是在搭載於無線通訊裝置6 9 (參照圖1 2 )等電子裝置的高頻功率模組1中，將 RFVC044當作外加零件，在半導體晶片3中不形成單片 的例子。就此雙頻通訊方式而言，是單片地形成低雜訊放 大器、混頻器、VCO、合:成器、iq調變器/解調器、分頻 器、直交調變器等各電路部。 接收系的兩個混頻器分別被分頻器控制，而且此分頻 -35- (33) 1292208 器是用以將由外加零件的RFVCO輸出的高頻訊號轉換成 更低頻的訊號的頻率轉換電路。 因此，在本實施形態3中，如圖21所示，在半導體 裝置 1的外側存在 RFVC044，RFVC044的訊號酉己線（ Signal)會被連接於兩條半導體裝置1的導線7。而且，Noise Amplifier) The high-frequency analog signal processing 1C high-frequency power module (semiconductor device) and wireless communication device (electronic device) are effective technologies. [Prior Art] A mobile communication device (mobile terminal) such as a portable telephone can be configured to correspond to a plurality of communication systems. That is, a plurality of circuit systems are assembled by transmitting and receiving a plurality of communication systems on a transmitting and receiving machine (front end, Front end) of a portable telephone. For example, a dual band communication method is known in which a call between mobile phones (e.g., mobile phones) having different communication methods (systems) is possible. Regarding the dual-frequency method, for example, GSM (Global System for Mobile Communications) having a transmission band of 8 8 0 to 9 1 5 Μ Η z is known, and DCS-1800 (with a transmission band of 1710 to 1785 MHz) is used ( Digital cellular system, Digital Cellular System 1 8 00) dual-frequency mode and dual-frequency high-frequency power amplifier. Moreover, it is disclosed in Japanese Patent Laid-Open No. 1 1 - 1 8 6 92 1 for use in PCN (Personal Communication Network, P, - rs ο na 1 C 〇m ni unicati ο ns N etw 〇rk : DCS- 1 8 00 ) , PCS (personal communication service, Personal C ommuni c.  a t i ο n s S e r v i c e : D C S -1 9 0 0 ) and G S M carrying (2) 1292208 Telephone system multi-band mobile communication device. Further, in the front end of the portable telephone, the high-frequency analog signal processing circuit for the G S can be modularized. For example, there is a dual-frequency or tri-band GSM RF using radio frequency (radio frequency, R adi 〇F ι equency) using Μ 0 SF Ε Τ (Metal Oxide Semico n ductoi·Field-Effect-Transistor) ) Power module. The dual-frequency mode is a signal for processing two communication systems such as GSM and DCS (Digital Cellular System) 1 800 mode, and the three-frequency method is to process signals of three communication systems such as GSM, DCS1800, and PCS1900. The GSM link has GSM900 or GSM 8 50. Moreover, the high frequency module is equipped with an LNA, a mixer (Mixer), a PLL (Phase-L 〇cked L ο ο p) synthesizer, and an automatic calibration (A utoca 1 ib ]· ati ο n) PGA (Programmable Gain Amplifier), IQ modulator/demodulator, offset PLL, VCO (Voltage-Controlled Oscillator), etc. On the other hand, portable telephones are required to be small and lightweight for the convenience of transportation. As a result, electronic components such as high-frequency power modules are also expected to be smaller and lighter. The semiconductor device has various forms depending on the package, and one of them is known in which the back surface (mounting surface) of the sealing body (package) of the insulating resin is exposed to the lead wire (external electrode terminal), and the wire length is not formed on the side surface of the sealing body. A long-lead non-lead semiconductor device. (3) 1292208 The non-conducting type semiconductor device has SON (Small Outline Non-Leaded Package) which exposes the lead wires on both sides of the opposite side of the sealing body, or the four sides of the back surface of the sealing body Make the exposed QFN (Quad F]at Non-Leaded Package). A non-conducting type semiconductor device which does not cause wire bending in a small size is described, for example, in JP-A No. 200 1 3 3 3 63. The resin-sealed type semiconductor device described in this document has a solder joint for bonding a die pad of a semiconductor wafer and a wire bonding wire, and the semiconductor wafer is fixed. On the die pad, each electrode terminal of the semiconductor wafer is configured to be connected to a wire bonding portion of a wire or a pad. A gap portion is provided between the die pad and the wire bonding portion to prevent the welding wire from being broken or cut by the thermal stress. In this configuration, the grounding terminal and the bonding pad of the semiconductor wafer are connected by a bonding wire, and the bonding pad can be connected to a printed substrate as a grounding conductor, etc. 曰 特 特 开 ping 1 Bu 2 5. In the case of the mobile phone or the like in which the semiconductor element mounting portion is grounded, the wire used in the invention is a Gull wing type high frequency device (Device). In this technique, in addition to the electrodes and the wires of the semiconductor element being connected by the bonding wires, the electrode is connected to the semiconductor element by the bonding wire by using the die pad as the ground electrode. D 〇wnb ο nding ). In the mounted state, the semiconductor element fr is a larger portion than the semiconductor element, and in the mounted state, the periphery of the semiconductor element mounting portion of the semiconductor element is protruded, and the structure of the bonding line is connected to the portion. Winter (4) 1292208 On the other hand, the applicant reviewed the connection of a high-frequency power module to a non-conducting type semiconductor device, and electrically connected the circuits constituting the high-frequency power module via a bonding wire for stabilizing the ground potential. The grounding terminal of the part is used in the method of adjusting the piece. By using the downward bonding, the number of external electrode terminals can be reduced, and the size of the package can be reduced, and finally, the size of the semiconductor device can be reduced. However, the high-frequency power module used for the wireless communication system (communication system) has been found to have the following problems. The signal captured by the antenna on the receiving side of the portable telephone is amplified by the low noise amplifier (LN A ), but the input signal is extremely weak. Therefore, in each circuit, particularly in accordance with the operation of the oscillator operating in a periodic manner, the potential of the tab of the common terminal, that is, the ground potential fluctuates, and the crosstalk occurs between the circuit portion and the circuit portion due to the fluctuation, and the output changes. Unable to make a good call. In particular, the distortion of the signal waveform caused by the variation of the induced current or the ground potential caused by the crosstalk between the wires is output by the communication system, and the output signal enters the in-use communication system to become noise. In addition to the low noise amplifier (LN A ), the circuit portion that changes the ground potential and the influence of the crosstalk is, for example, RFVC0 (high-frequency voltage controlled oscillator) that processes high frequencies. In other words, the low noise amplifier (LN A ) or the high frequency voltage controlled oscillator (RFV7C0 ) is susceptible to variations in ground potential and crosstalk, so the high frequency characteristics of electronic devices such as mobile phones equipped with high frequency power modules are high. Will be damaged. <7- (5) 1292208 In view of the above, an object of the present invention is to provide an electronic device capable of improving frequency characteristics in an electronic device in which a high-frequency power module for use in a wireless communication device or the like is mounted. Another object of the present invention is to provide an electronic device (wireless communication device) which can improve reliability. Another object of the present invention is to provide a semiconductor device in which a circuit portion such as a low noise amplifier or a high frequency voltage controlled oscillator can be less susceptible to crosstalk caused by variations in ground potential of other circuit portions. The above and other objects and novel features of the present invention will be apparent from the description and appended claims. SUMMARY OF THE INVENTION Among the inventions disclosed in the present invention, the following is a brief description of the representative invention. The electronic device of the present invention includes: a semiconductor device; the semiconductor device includes: a plurality of wires; and a tab having a main surface and a back surface; and a plurality of electrodes having a plurality of electrode terminals and respectively formed by a plurality of semiconductor elements And a plurality of conductive solder wires connecting the plurality of electrode terminals and the wires, and a plurality of electrode terminals and a main surface of the tab, and supplying the first potential to the plurality of a plurality of conductive soldering wires of the electrode terminals; and a wiring board; the wiring board is provided with the semiconductor device, and includes a first wiring layer and a second wiring layer, and is provided with a common wiring, the common wiring -8- (6) 1292208 is a wiring that is connected to the plurality of through holes that are formed in the first wiring layer and the second wiring layer, and is connected to the wiring layer; the semiconductor wafer is fixed to a main surface of the adjustment sheet; and the circuit portion is The method includes: a first circuit portion that inputs an external signal via the wire, and a solder that is electrically conductive via the adjustment piece a plurality of electrode terminals; the plurality of electrode terminals: a first electrode terminal that inputs the external signal in the first circuit portion; and a second electrode terminal that supplies a fixed potential to the first circuit portion; The lead wire includes: a first wire that transmits the external signal; and a second wire that is disposed on both sides of the first wire; and two sides of the conductive wire that connects the first wire and the first electrode terminal a conductive wire connecting the second conductive wire and the second electrode terminal; wherein the adjustment piece and the common wiring of the wiring substrate are connected, and the semiconductor device of the present invention has a sealing body; The sealing system is composed of an insulating resin; and a plurality of wires; the plurality of wires are disposed along the periphery of the sealing body and disposed across the inside and the outside of the sealing body; and an adjusting piece; the adjusting piece has a main And a semi-conductive m wafer; the semiconductor wafer has a main surface and a back surface - a plurality of electrode terminals on the main surface, and respectively borrowed a plurality of circuit portions composed of a plurality of semiconductor elements; and (7) 1292208 a plurality of conductive solder lines; the plurality of conductive solder lines connecting the plurality of electrode terminals and the wires; and a plurality of conductive lines a plurality of conductive bonding wires connecting the plurality of electrode terminals and the main surface of the tab, and supplying a first potential to the plurality of electrode terminals; wherein the semiconductor wafer is fixed to the tab The main circuit portion includes: a first circuit portion that inputs an external signal via the wire, and a second circuit portion that is connected to the conductive bonding wire via the adjustment piece; the plurality of electrode terminals The first electrode terminal for inputting the external signal to the first circuit portion, and the first electrode. The circuit portion supplies a second electrode terminal of a fixed potential; the plurality of wires include: a first wire that transmits the external signal; and a second wire that is disposed on both sides of the first wire; and the first wire and the first wire are connected The conductive wire connecting the second wire and the second « terminal is electrically connected to both sides of the conductive wire of the first electrode terminal. [Embodiment] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the entire drawings for explaining the embodiments of the invention, the same reference numerals will be given to the components having the same functions, and the repeated explanation will be omitted. (Embodiment) -10- (8) 1292208 FIG. 1 to FIG. 1 are an example of a first embodiment of the present invention, that is, a high-frequency power module and a wireless communication device in which the high-frequency power module is assembled. 1 to 5 are related to a local frequency power module'. FIGS. 6 to 11 are diagrams related to a method for manufacturing a high frequency power module. FIG. 1 to FIG. 9 are related to a wireless communication device. The mounting surface of the back surface of the sealing body (package) is applied to the QFN type semiconductor device in which the tab and the tab suspension wire and the lead wire (external electrode terminal) connected to the tab are exposed. Further, an example of the above-described semiconductor device will be described with reference to the high-frequency power module 1. QFN type high frequency power module. 1, as shown in Figs. 1 and 2, a sealing body (package) 2 having a flat rectangular insulating resin. A semiconductor element (semiconductor wafer: wafer) 3 having a quadrangular shape is buried in the inside of the sealing body 2. The semiconductor wafer 3 is fixed to the surface (main surface) of the tab of the quadrangular tab 4 by the adhesive 5 (see Fig. 2). As shown in Fig. 2, the back surface (bottom surface) of the sealing body 2 is the surface side (mounting surface) to be mounted. One surface (mounting surface 7a) of the regulating piece 4 and the adjusting piece hanging wire 6 and the lead wire (external electrode terminal) 7 of the regulating piece 4 are exposed on the back surface of the sealing body 2. These tabs 4 and the tab suspension wires 6 and the wires 7 are formed in a high-voltage power module 1 by forming a lead frame of a metal (for example, copper) formed by patterning, and then It is cut and formed. Therefore, in the first embodiment, the thicknesses of the tabs 4 and the tab suspensions -11 - (9) 1292208 wires 6 and the wires 7 are formed in the same manner. However, in the lead wire 7, since the inner end portion is formed to be thin at a certain depth of the etching back surface, the lower side of the thin wire portion becomes a structure in which the resin constituting the sealing body 2 enters. Thereby, the wire 7 is hard to be detached from the sealing body 2. The four corners of the tab 4 are supported by a thin tab suspension wire 6. These tab suspension wires 6 are located on the diagonal of the square-shaped sealing body 2, and the outer ends are faced with corner portions of the rectangular sealing body 2. The sealing body 2 is a flat quadrangular body, and the corner portion (corner portion) is chamfered to form a slope 2a (see Fig. 1). The outer end of the tab suspension wire 6 is only protruded from this chamfered portion.  Below 1 m m. The protruding length is determined according to the mechanical cutting mode of the stamping (p r e s s ) when the wire is cut to adjust the state of the lead frame. For example, it can be selected from 0 · 1 mm or less. Further, as shown in Fig. 1, at the periphery of the tab 4, the inner end surface pair of the wires 7 of the regulating sheet 4 is arranged along the sides of the rectangular sealing body 2 at a predetermined interval. The outer ends of the tab suspension wires 6 and the wires 7 extend to the periphery of the sealing body 2. That is, the wire 7 and the tab suspension wire 6 extend over the inside and outside of the sealing body 2. The projection length of the sealing body 2 of the wire 7 is the same as that of the above-described tab suspension wire 6, and is determined by the cutting die of the press machine when the wire in the state of the lead frame is cut.  Below 1 m m. Further, the side surface of the sealing body 2 is formed with an inclined surface 2b (see Fig. 2). The inclined surface 2 b is a single-sided seal ( ο ο 1 d ) on one side of the lead frame, and after the sealing body 2 is formed, when the sealing body 2 is taken out from the cavity of the sealing mold, the extraction is easy. See, the side of the cavity is caused by the result of the inclined surface -12 - (10) 1292208. Further, Fig. 1 is a schematic view showing the upper portion of the sealing body 2, and the tab 4, the tab suspension wire 6, the lead wire 7, the semiconductor wafer 3, and the like are visible. Further, as shown in Figs. 1 and 4, the electrode terminal 9 is disposed on the exposed main surface of the semiconductor wafer 3. The electrode terminal 9 is disposed substantially at a predetermined pitch (Pitch) along each side of the square in the main surface of the semiconductor wafer 3. This electrode terminal 9 is connected to the inner end side of the wire 7 via a conductive bonding wire 1 〇. The tab 4 is formed to be larger in comparison with the semiconductor wafer 3. As shown in FIG. 8, the semiconductor element mounting portion 4a is provided in the center of the main surface thereof, that is, the semiconductor element mounting portion 4a, and the semiconductor element mounting portion 4a is used. The outer side, that is, the peripheral portion of the tab 4 has a weld line connection. Area 4b. Further, the semiconductor wafer 3 is fixed to the semiconductor element mounting portion. Further, the other end of the conductive bonding wire 1 which is connected to the electrode terminal 9 of the semiconductor wafer 3 at one end is connected to the wiring connection region 4b. In particular, the bonding wire 10 connected to the tab 4 is referred to as a downward bonding bonding wire 10 a. Since the wire bonding of the electrode terminal 9 and the wire 7 and the wire bonding between the electrode terminal 9 and the tab 4 are performed by the wire bonding device, the bonding wire 10 and the downward bonding bonding wire 1A are the same. Material. The purpose of the downward bonding structure is generally to achieve the commonality of the ground potential (first potential) of each circuit portion in the semiconductor wafer of the tab 4. The tab 4 is a common ground terminal. By connecting the tab 4 and a plurality of electrode terminals serving as the ground electrode terminals via the bonding wires, the external electrodes arranged along the circumference of the seal body 2 of -13-(11) 1292208 can be reduced. The number of the wires 7 (pins, P i η ) of the terminals can reduce the size of the sealing body 2 due to the reduction in the number of wires. This is related to the miniaturization of the high frequency power module 1 of the semiconductor device. Next, the circuit configuration of the semiconductor wafer 3 mounted on the high-frequency power module 1 of the first embodiment will be described. Fig. 4 is a layout view showing a mode of arrangement of each circuit portion in the semiconductor wafer 3. An electrode terminal (pad) 9 is disposed along the main surface of the semiconductor wafer 3. Further, each circuit portion is disposed in the inner division area of the electrode terminals 9. As shown in Fig. 4, the ADC/DAC & DC offset control logic circuit unit 35 is disposed in the center of the semiconductor wafer 3, and the mixers 26, 64 and three LNAs (low noise amplifiers) are arranged on the left side thereof. , r ρ VC 0 4 4 (second circuit unit) is located on the upper side, and the RF synthesizer (second circuit unit) 41, VCXO (second circuit unit) 50, and IF synthesizer (2nd) are arranged from top to bottom on the right side. Circuit section) 4 2, 13F VC 0 4 5, TXVC Ο (2nd circuit part) 6 7 is located on the lower side. Fig. 5 shows the relationship between the respective circuit portions (the first circuit portion and the second circuit portion) and the electrode terminals 9, and the wiring state of the electrode terminals 9 and the bonding wires 1 of the wires 7. The bonding wire 1 〇 shows the bonding wire 1 〇 connecting the electrode terminal 9 and the wire 7 and the downward bonding bonding wire l 〇 a of the connecting electrode terminal 9 and the tab 4. If you look at the specific circuit part 1 (the first circuit part). For the three LNAs 24, the band-pass filter 23 of the external part and the external part 7 (refer to the predetermined wire 7 connected to FIG. 12, that is, the wire 7 (first wire) of the signa 1 and the signal of the LNA 24 are described on the left side. The electrode terminals (first electrode terminals) 9 are connected via a bonding wire 〇. Two signal sides are provided by the electrode terminals 9 via the bonding wires! 〇-14 - (12) 1292208 to the wires 7 The ground electrode terminal (terminal) 9 of the LNA 24 of the specific circuit portion 1 is connected to the ground lead 7 (the lead 7 shown in the GND on the left side) via the bonding wire 10 to form a line. In the high-frequency power module 1 of the embodiment, the grounding conductor (second conductor) 7 on both sides of the wiring is a donor, as the aforementioned solid. An example of the constant potential indicates the ground potential 〇, whereby the conduction 7 of the LNA 24 of the second circuit portion such as another adjacent VCO is electromagnetically shielded by the wire 7 having a fixed potential (here, 'ground potential'). Further, the LNAs 24 are also electromagnetically coupled to each other by the fixed potential conductor 7, as shown in Fig. 12, in comparison with the LNA 24 which is amplified by the antenna 20, and processes the circuit portions of the electric transmission system output from the baseband wafer 22. (For example, the offset PLL and TXVC067 have characteristics of strong noise due to grounding or crosstalk because the electrical signal is larger than the aforementioned weak signal. Therefore, the supply of the ground potential of the transmitting unit is performed via each VC, etc. With adjustments.  Commonly, the number of wires 7 can be reduced, and the high-frequency power module device can be miniaturized. LNA in order to prevent self. The deterioration of the signal caused by the crosstalk formed between the main lines of the semiconductor wafer 3 is preferably two grounded and the second wires of the electric wiring for processing the signal amplified by the LNA, for example, as shown in FIG. When the signal is given to the fixed power, the wire 7 is shielded from the fixed, adjacent. · In the weak signal, etc.), the circuit of the potential is changed. 1 (PGA on the semi-conductive surface (parameter or transmission -15- (13) 1292208-based circuit, etc., the length of the wiring is also shortened and placed closer to the electrode terminal 9. Next, this embodiment As shown in FIG. 3, the high frequency power module 1 has a resin burr generated between the wires 7 and the wires 7, and between the wires 7 and the tab suspension wires 6, which are formed when the sealing body 2 is formed. In part, in the manufacture of the semiconductor device 1, one side sealing is performed on one side of the lead frame to form the sealing body 2. Although the unnecessary lead frame portion is cut after the sealing, the wire 7 or the adjustment at this time is obtained. When the sheet hanging wire 6 is cut, the resin burrs are also cut at the same time, so that the outer edge of the resin burr becomes the edge of the wire 7 or the edge of the tab hanging wire 6, and a part of the resin burr remains on each wire 7 and the wire 7. Between the wire 7 and the tab suspension wire 6. Moreover, in this embodiment. 1 is a configuration in which the back surface of the sealing body 2 is recessed from the regulating piece 4, the regulating piece hanging wire 6, and the back surface (mounting surface) of the wire 7. In the single-sealing sealant in the transfer sealant (T ransferm ο 1 ding ), a resin sheet is placed between the upper and lower molds of the seal mold, and one side of the lead frame is contacted with the sheet to seal the film. Since the sheet bites in the gap of the lead frame, the back surface of the sealing body 2 becomes concave. Further, after the single-piece sealant of the transfer sealant is used, a plating film for surface mounting is formed on the surface of the lead frame 13. Therefore, the tab 4, the tab suspension wire 6 and the surface of the lead wire 7 exposed on the back surface of the sealing body 2 of the high-frequency power module 1 have a plating film although not shown. In this manner, the mounting surface of the back surface of the wire 7 or the tab suspension wire 6 protrudes, and the offset structure of the back surface of the sealing body 2 is recessed on the mounting substrate 80 - 16 - (14) 1292208 (see FIG. 13). When the high-frequency power module j is mounted on the surface of the soldering wire substrate, since the wetted area of the solder 83 is specified, the solder is well mounted.  long. Second, for this embodiment]. The manufacturing method of the high frequency power module will be described with reference to Figs. 6 to i. As shown in the flow chart of FIG. 6, the local power module 1 is prepared through a lead frame (s), wafer bonding (S1), wire bonding (S103), sealing (sealing: sl4), plating Process (S 1 0 5 ), cutting and removing the unnecessary lead frames (s) 〇 6 to manufacture each process. Fig. 7 is in the manufacture of this embodiment]. A pattern plan view of a lead frame formed by a matrix of the qfn type high frequency power module 1 is used. The _ wire rack 1 3 has its unit lead frame pattern 14 arranged 2 in the X direction, and 4 rows along the Y direction, and 8 high frequency power modules 1 can be manufactured from one lead frame 13 . Guide holes (guideh ο 1 e ) 1 5 a~1 5 co used for the transfer or positioning of the lead frame 13 are disposed on both sides of the lead frame 13 and the runner is performing the transfer seal The time is on the left side of each column. Therefore, since the runner hardening resin is torn off by the lead frame 13 by the protrusion of the Ejector pin, the jack hole 16 through which the jack can pass is provided. Moreover, since the protrusion of the ejector rod is torn off by the lead frame 13 and the runner is diverged, the gate hardened by the gate which flows to the gate of the cavity hardens the resin, so that the ejector rod through which the ejector rod can pass is provided Hole 17. FIG. 8 is a plan view showing a part of the unit lead frame pattern 14. Since the unit lead frame pattern 14 is a pattern actually manufactured, there is a portion of the pattern -17-(15) 1292208 which is not necessarily identical to Fig. 1 or Fig. 2 and the like. The unit lead frame pattern 14 has a frame portion 18 having a rectangular frame shape. The tab suspension wire 6 extends from the four corners of the frame portion 18 to form a pattern supporting the central adjustment sheet 4. The plurality of wires 7 extend inwardly from the inner side of each side of the frame portion 18, and the inner ends thereof are close to the outer periphery of the tab 4. A plating film (not shown) for wafer bonding or wire bonding is disposed on the main surface of the tab 4 and the lead wire 7. Further, the front end side of the lead wire 7 is thinned by half-etching (see Fig. 2). Further, the lead wire 7 or the regulating piece 4 or the like has a configuration in which the peripheral edge is a slope having a width larger than the width of the back surface, and a structure in which the inverted trapezoidal cross section is difficult to be extracted by the sealing body 2 is also possible. This can also be made by etching or stamping. Further, as shown in Fig. 8, in the main surface of the tab 4, the central quadrangular region becomes the semiconductor element mounting portion 4a (the region surrounded by the two-point chain frame), and the outer region becomes the bonding wire connection region 4b. . After preparing the lead frame 13 as shown in FIG. 9, the semiconductor wafer 3 is fixed (wafer bonded) to the semiconductor element mounting portion 4a of the tab 4 of each unit lead frame pattern 14 by the adhesive 5 (S丨). 02). Next, the wire bonding is performed as shown in FIG. 1A, and the electrode terminal 9 of the semiconductor wafer 3 and the leading end of the wire 7 are connected by the conductive bonding wire 10, and the predetermined electrode terminal 9 is connected by a conductive bonding wire. Adjust the household of the film 4, Wiring connection area 4b ( s 1 03 ). Welding line 1 0. The bonding of the bonding wires 10a downward is, for example, the use of a gold wire. After the wire bonding, a common one-piece sealant for the transfer seal is formed, and the insulating resin (Fig. 1) shown in Fig. 11 is formed on the main surface of the -18-(16) 1292208 lead frame 13 . The sealing body 2 covers the wafer 3, the wires 7, and the like on the main surface side of the lead frame 13. In Fig. 8, a region in which the sealing body 2 is formed is indicated by a two-dot chain line frame. Next, a plating process (S 1 05 ) is performed, not shown. A plating film (not shown) is formed on the back surface of the bobbin 13. This plating film is used as a bonding material for surface mounting of the high-frequency power module 1, for example, a plating film. Further, instead of the process of forming the plating film, the surface on which the pd is plated may be used in the entire surface of the prewire frame 13. At this time, when the lead frame 13 to be plated with Pd is used, the above-described sealing process can be omitted, and the manufacturing process can be simplified, and the manufacturing cost can be reduced. Next, the high-frequency power module 1 shown in Fig. 1 is cut off to remove the unnecessary lead frame portion (S 1 0 6 ). On the slightly outer side of the two-point chain sealing body 2 shown in Fig. 8, the cutting wire 7 of the press machine (not shown) and the tab suspension wire 6 are cut. The distance between the wire 7 and the sealing member 2 at a position slightly separated from the position where the wire 7 is detached from the sealing body 2 by the cutting die is, for example, stipulated below. The degree of the sealing body 2 from the wire 7 and the tab suspension wire 6 is preferably shorter from the viewpoint of preventing seizure or the like. This protrusion can be freely selected under the change of the cutting die of the press machine. ] m ηι Here, an example of the dimensions of the respective portions of the high-frequency power module 1 is shown in the frame 1 3 (the adjustment piece 4, the adjustment piece hanging wire 6, the wire 7). 2mm, the thickness of the semiconductor wafer 3 is 〇. 2 8mm, the thickness of the high-frequency power is ·· 0 mm, the width of the wire 7 is 〇· 2 ηι ηι, the wire 7 'the body of the sealing body 2 is the first part of the lead when the solder is used as a solder, especially for electroplating. The mold of the wireframe is guided at a slightly line 6, 0. 1m m protrudes over the length. . The thickness of the wire is the length of the module 1 (17) 1292208 is 0. 5 mm, the bonding wire connection position (dot) of the tab 4 is from the end 1 · 〇 mm of the mounted semiconductor wafer 3, and the interval between the tab 4 and the wire 7 is 0. 2mm ° In addition, in the conventional high-frequency power module, in the circuit portion of the high-frequency signal such as the output oscillator, crosstalk may occur due to fluctuations in the ground potential as described above, and is generated in the circuit portion. Output changes or signal waveform distortion. Moreover, in a high-frequency power module having a plurality of communication circuits such as dual-frequency or triple-frequency, there is a possibility that an induced current does not occur in the operating communication circuit under the influence of the communication circuit under operation, and the induced current is formed. The noise comes into the communication circuit in action. In addition, there is a crosstalk between the input signal lines, so that the output fluctuation of each circuit portion or the distortion of the signal waveform occurs, especially in the external signal input wire from the antenna with a small input signal, it is necessary to avoid the The effect of crosstalk on adjacent wires. Here, in the high-frequency power module i of the first embodiment, as shown in FIG. 5, the external signal is transmitted to the first circuit portion (the specific circuit portion; [!) of the conductive bonding wire 10 On the side, for example, a conductive bonding wire 10 to which a fixed potential such as a ground potential is supplied is provided. That is, in the high-frequency power module 1 shown in FIG. 5, the signal wiring from the electrode terminal of the LN A (low noise amplifier) 24 to the wire 7 via the bonding wire 1 配置 is disposed on both sides thereof. Conductive soldering with a fixed potential such as ground potential. The line 1 is 〇, whereby the signal wiring of the LNA 24 is also magnetically shielded. As a result, the pre-signal wiring is difficult to be crosstalked. Further, the fixed potential is not limited to the ground potential, and may be a fixed potential. -20 - (18) 1292208 Here, the high-frequency power module 1' of the first embodiment is, for example, a high-frequency power module for a tri-band of a cellular phone. Therefore, as shown in FIG. 5, the specific circuit unit 11 is an LNA. (Low noise amplifier) 24, and since it is a tri-band, three LNAs 24 connected to the antenna 20 (see Fig. 12) are also arranged. The single LNA 24 becomes the specific circuit portion 1 1 of the present invention which is narrowly defined. That is, as shown in Fig. 5, the input signals from the antennas 20 of the respective LNAs 24 are respectively formed into two. Moreover, for the two signal wires on the electromagnetic screen wall, between the two signal wires and the other signal wires, it is preferable to respectively arrange a fixed potential on both sides of the two signal wires (this embodiment 1 is a ground potential) Conductive 7. Further, if the input signal wiring is formed to form a differential input configuration, the influence of the same degree of crosstalk occurs on the two input signal lines, and the noise (crosstalk) can be cancelled (eliminated). Here, as shown in Fig. 5, the rectangular frame portion surrounding the three LNAs 24 is a specific circuit portion 11 in a generalized manner. In the specific circuit portion 11, in the semiconductor wafer 3, each LNA 24 is formed in a region insulated and isolated by other circuit portions. Moreover, the ground potential of each LNA 24 is formed in common. This is because the dual-band communication system and the tri-band communication system use a communication system (communication system), and the remaining communication systems form an idle state, so the LNA24 belongs to the communication system that becomes a no-load state. Since the influence of the ground potential is small, even if the ground electrodes and the ground wirings of the LNAs 24 belonging to the individual communication systems are shared, the adverse effects are small. However, if necessary, isolation (Iso) ati〇n can be performed for each LNA, and the ground potential of each -21 - (19) 1292208 LNA is independent. Next, the structure of the electronic device of the first embodiment will be described. The electronic device of the first embodiment includes a wireless communication device 69 such as a cellular phone or the like that is mounted on the local power module 1 of the first embodiment. Fig. 13 is a cross-sectional view showing a basic structure of a state in which the portable telephone of the semiconductor device (high-frequency power module) 1 of the first embodiment is mounted, in order to carry it in the wireless communication device 6 (see Fig. 12). The high-frequency power module 1 is mounted on the main surface of the mounting substrate (wiring substrate) 80 of the telephone, and the bonding pad 8 corresponding to the high-frequency power module 1 and the tab 4 are connected to the wiring pad 8 1 . And the tab fixing portion 8 2 . Here, the high-frequency power module 1 is placed so that the wires 7 and the tabs 4 of the high-frequency power module 1 can overlap with the pads 8 1 and the fixing portions 8 2 . Further, in this state, the solder (electroplating) is formed in advance on the lead wires 7 of the high-frequency power module 1 and the solder plating film on the back surface of the tab 4, and the wires 8 are connected (mounted) by the solder 8 And the adjustment piece 4 Here, the circuit configuration (functional configuration) of the mobile phone having the three-frequency configuration will be briefly described with reference to FIG. That is, the portable telephone can perform, for example, a GSM communication method with a 900 MHz band and a DCS 1 800 communication with a 1 800 MHz band: a signal processing with a PCS 1 900 communication mode with a 1 00 MHz band. The block diagram of Fig. 12 shows the transmission system and the reception system connected to the antenna -22 - (20) 1292208 20 via the antenna switch 21, and the transmission system and the reception system are all connected to the baseband wafer 22. The receiving system has an antenna 20, an antenna switch 21, three band pass filters 23 connected in parallel to the antenna switch 21, and a low noise amplifier (LNA) 24 connected to the band pass filter 23, respectively. The variable amplifier 25 is connected to the aforementioned three LNAs 24 and connected in parallel. The two variable amplifiers 25 are respectively connected with a mixer 26, a low pass filter 27, a PGA 28, a low pass filter 29, a PGA 30, a low pass filter 31, a PGA 32, a low pass filter 33, and a demodulator 34. . The PGA 28, PGA 30, and PGA 32 are controlled by the ADC/DAC & DC offset control logic circuit unit 35. Moreover, the two mixers 26 are phase-controlled with a 90 degree phase converter 40. In FIG. 12, an I/Q modulator composed of a 90-phase converter 40 and two mixers 26 is provided corresponding to three LNAs corresponding to each frequency band region, but in FIG. For the sake of simplicity, only one is drawn. In the semiconductor wafer 3, a synthesizer composed of an RF synthesizer 41 and an IF (Intermediate) synthesizer 42 is provided as the signal processing 1C. The RF synthesizer 41 is connected to the RFVC 044 via the buffer 43, and is controlled in such a manner that the RFVC 044 can output the RF local signal. Further, two local signals are connected in series in the buffer 43 by frequency dividers 3 7 and 3 8 , and 冇: switches 4 8 and 49 are connected to the respective output terminals. Further, the RF local signal outputted by the RFVC 〇 44 is input to the 90 phase converter 40 by switching of the switch 48. Also, the 90-phase converter 40 -23-(21) 1292208 controls the mixer 26 based on the RF local signal. When the signal output mode of RFVC044 is Rx mode, the GSm is 3780 to 3840MHz, the DCS is 3610 to 3 7 60 MHz, and the PCS is 3860 to 3980 MHz. Moreover, the Tx mode is 3840 to 3980 M Hz in the GS, 3 5 8 0 to 3 7 3 0 MHz in the DCS, and 3 8 6 0 to 3 9 8 0 Μ Η z in the PCS. The IF synthesizer 42 is connected to the IFVCO (intermediate wave voltage controlled oscillator) 45 via the frequency divider 46, and is capable of outputting the I F local signal by the IF V C 0 4 5 for control. Also, the frequency of the output signal of I F V C Ο 4 5 is 640 MHz in each communication mode. Further, the VCXO (Voltage Controlled Crystal Oscillator) 50 is controlled by the RF synthesizer 41 and the IF synthesizer 42 to output a reference signal, which is then transferred to the baseband wafer 22. In the receiving system, the IF signal is controlled by the synthesizer and the ADC/DAC& DC offset control logic circuit unit 35, and converted into a baseband chip signal (I, Q signal) by the demodulator 34, and then Transfer to the base tape wafer 22. The transmission system is composed of: two mixers 61 using I, Q signals output from the baseband chip 22 as input signals; and a 90 phase converter 62 controlling the phases of the two mixers 61; and accumulating The adder 6 3 of the output of the two mixers 6 1 ; and the mixer 64 of the adder 6 3 as the input, and the DPP (Digital Phase Detector) 65; The output of the mixer 6 4 and the DPD 6 5 is regarded as the input loop filter - 24 - (22) 1292208 wave filter (L ο opfi ] ter ) 6 6 ; and the output of the loop filter 6 6 is Two TXV C 0 (transmission wave voltage control transmitters) 67 as input, and a power module 68 that takes the outputs of both TXVC067 as inputs, and an antenna switch 21 are formed. Further, the loop filter 66 is an external component. Further, a quadrature modulator is constructed by a mixer 61, a phase converter 6 2 and an adder 63. The 90 phase converter 62 is connected to the frequency divider 46 via the frequency divider 47, and is controlled based on the IF local signal output from the IFVC 045. The output of the two TXVC067 is via the coupler (Coupler. ) 70 to detect the current. This detection signal is input to the mixer 72 via the amplifier 71. The mixer 72 inputs the RF local signal output from the RFVC 044 via the switch 49. The output signal of the mixer 72 is input to the mixer 64 and the DPD 65 together with the output signal of the adder 63. The mixer PLL (Phase-Locked Loop) is formed by the mixer 64 and the DPD65. The frequency of the output signal generated by the mixer 72 is 80 MHz in each communication mode. The TXVC 067 of one of the two TXVCs 067 is used for the GSM communication mode, and the frequency of the output signal is 880 to 915 MHz. Moreover, other TXVC067 are used for DCS and PCS communication methods, and the frequency of the output signal is 17. Λ 0~178 5 MHz or 1 8 5 0~1910 MHz. The power 龃 68 contains a low-frequency power module and a high-frequency power module, and the low-frequency power module receives a signal from the TXVC 067 that outputs a signal of 8 8 0 to 91 5 MHz and puts it on -25 (23) 1292208 Large processing, high-frequency power module receives the signal from the TXVC067 outputting signals of 1710~1 7 5 5 MHz or 1 8 5 0~1910 MHz, and amplifies the processing and transmits it to the antenna switch 21 . In the high-frequency power module 1 of the first embodiment, the logic circuit 60 is also formed into a single piece, and the output signal is transmitted to the base tape wafer 22. In the high-frequency power module 1 of the first embodiment, the circuit portions of the portion surrounded by the thick lines in Fig. 12 are formed in a single piece. Further, the portion of the three LNAs 24 forms the specific circuit portion 1] in the first embodiment (see Figs. 4 and 5). Although a part of each of the circuit sections is displayed in a mode, it is actually a block top view of the semiconductor wafer 3 of FIGS. 4 and 5. The wireless signals (electric waves) received by the antenna 20 are converted into electrical signals, and the components of the receiving system are processed in turn and then transferred to the baseband wafer 22. Moreover, the electrical signals outputted from the baseband chip 22 are sequentially processed in the components of the transmission system, and then transmitted by the antenna 20 as radio waves. FIG. 14 to FIG. 16 show the high frequency power module of the first embodiment. A detailed view of the installation structure of a portable telephone. Fig. 14 is a view showing a terminal pattern of the mounting substrate 80 to which the high-frequency power module 1 is mounted. A tab fixing portion 8 2 for adjusting the tab connecting terminal is formed on the main surface of the mounting substrate 80, and a plurality of wires connected to the respective wires 7 of the high-frequency power module 1 are formed around the outer side of the tab fixing portion 82. The solder pads 81, as shown in Fig. 15, except for the connection of the local frequency power module 1 on the main surface of the women's substrate 80, are covered by the solder resist layer 9 1 of the insulating film -26-(24) 1292208 In the mounting substrate 80, a first wiring layer 86 (a tab fixing portion 8 2, a pad 8 1 or the like) on the main surface, a second wiring layer 8 7 in the inner layer, a third wiring layer 8 8 and the like are formed, and In the through hole 84, a conductor is disposed in a through hole that is opened to a desired wiring layer so that any of the wiring layers can be connected to each other, and the conductor is often formed by plating. In FIG. 14, although the circuit configuration in the wafer 3 is omitted, the circuit configuration in the actual wafer 3 and the arrangement of the connected wires 7 correspond to the configuration shown in FIG. 5, and the wire 7 to which the ground potential is supplied to the LNA 24 is The display (fixed potential) is displayed, and the wire 7 supplied with the input signal to the LNA 24 is shown as S ig η a 1 . In the mounting substrate 80 shown in FIG. 15, a first wiring layer such as a tab fixing portion 8 2 and a pad 8 1 is formed on the main surface, and an inner layer GND 89 as the second wiring layer 87 is provided. The wiring layers such as the inner layer Vcc90 of the third wiring layer 88 are formed inside, and the inner layer GND 89 of the first wiring layer and the inner layer GND 89 of the second wiring layer 87 are provided by a plurality of through holes 84. connection. Further, in the structure shown in Fig. 14 and Fig. 15, a through hole 84 of a plurality of common wirings is disposed along the respective sides of the tab fixing portion 82. In other words, on the back side of the tab fixing portion 82, a plurality of through-holes are arranged in a state of being arranged almost along each side thereof. L 84, since each of the through holes 84 is connected to the tab fixing portion 82, the common ground potential (the first potential) of the same potential as the inner layer GNDM is supplied from the plurality of through holes 84 in the tab fixing portion 82B. . Further, in the LNA (first circuit portion) -27-(25) 1292208 24 of the high-frequency power module 1, the bonding pad 8 1 for supplying the ground potential of the fixed potential is also penetrated. Since L 84 is connected to the inner layer GND 89, when the high-frequency power module 1 is mounted on the mounting substrate 80 as shown in FIG. 16, a fixed potential ground is supplied to the LN A 2 4 via the wire 7 and the bonding wire 1 〇. The potential (the ground potential supplied from the tab unit fixing portion 8 via the tab 4 is the same ground potential). . However, in terms of the ground potential supplied to the LNA 24, other wires 7 different from the wire 7 and the electrode terminal 9 (second electrode terminal) to which the fixed potential is supplied may be passed through the bonding wire 10 and the other electrode terminals 9 (3rd) The electrode terminal is supplied or supplied via a bonding wire 1 〇a that is connected to the tab 4 so as to be joined downward. Further, the ground potential supplied via the wire 7 and the bonding wire 10 in the LNA 24 may be another ground potential that is supplied to the first potential (ground potential > separated (not connected) to the tab 4 In other words, a structure in which another ground potential that is not connected to the first potential (ground potential) supplied to the tab fixing portion 82 can be supplied to the mounting substrate 80 can be formed in advance in the high-frequency power module 1 At the time of operation, the ground potential different from the ground potential supplied to the tab fixing portion 8 2 is supplied to the LNA 24 via the wire 7 and the bonding wire 10. In either case, the specific circuit portion 1 such as LN A 24 Although the grounding of 1 and the grounding of the remaining circuit portions are not shown, it is preferable that the wiring in the semiconductor wafer 3 is also separated by an interlayer insulating film or the like. This is because the wiring in the wafer 3 is wired. Compared with the wiring or the lead wire on the mounting substrate 80, the inductor has a high inductance. Therefore, if the LNA 24 or the like is connected to the specific circuit portion 1 1 of the -28-(26) 1292208 by the wiring in the wafer 3, the other circuit portion 1 1 is formed. The circuit part of the power supply noise source is connected, The high-frequency characteristics of the LNA 24% may be affected by the power supply noise, which may cause the high-frequency characteristics of the LNA 24 to be damaged. In the 'local frequency power module 1, the tab 4 and the wires 7 are exposed to the g-sea seal 2 The mounting surface (back surface), the bonding pads 8 1 of the mounting substrate 8 and the respective wires 7 corresponding to the pads 8 1 are electrically connected to the tabs of the mounting substrate 8 via the solder 8 3 The terminal (the tab fixing portion 82) is adjusted by the solder connection of the inner layer G > JD89 of the mounting substrate 80 and the plurality of through holes 84 and the tab fixing portion 82 in the wireless communication device 6 having the mounting structure. The ground potential of the sheet 4 is sufficiently inductively stabilized, and it is stabilized. This is used for each electronic component such as an oscillator having a second circuit portion in which the tab 4 other than the LNA 24 is joined downward. In other words, since the ground potential that is sufficiently low-inducted is supplied through the bonding wire 10a, the influence on the ground potential supplied to the first circuit portion such as the LNA 24 can be extremely reduced, and the LNA 2 or the like can be used. Input signal That is, the through hole 84 of the mounting substrate 80 has a large inductance. The reason is that the conductive material (for example, copper) in the through hole acts as the coil and is formed on the main surface of the mounting substrate 80. In the upper wiring 9 4 5 9 5, 9 6 , the inductance 0 will be formed larger. This is generally formed in the through hole 8 4 (conductive plug) of the mounting board 80, Compared with the radius of the through hole, since the conductor formed in the inside thereof has a small thickness, the inside of the through hole -29-(27) 1292208 84 is hollow. In order to solve such a problem, for example, there is a technique in which a conductor is used to fill the inside of the through hole 84 in a process of mounting the substrate 8 ,, but such a technique increases the process load of the mounting substrate 80 to make the mounting substrate 80 The cost increases, so it is not expected. When the mounting substrate 80 having the hollow through-holes 8 is used, if the inner layer GND 89 and the tab fixing portion 82 are connected by only one through hole 84, the ground potential supplied to the tab 4 is not sufficiently sufficient. When the inductance is low, an unstable state is formed, and the 电路/OFF switching of the high-frequency oscillator having the second circuit portion affects the first circuit portion. Also, since the LNA (Low Noise Amplifier) 24 amplifies the weak signal, the fluctuation of the ground potential becomes a change in the output of the low noise amplifier 24, and the signal waveform is distorted. On the other hand, in the wireless communication device 6 of the first embodiment, in the mounting substrate 80 to which the high-frequency power module 1 is mounted, the tab fixing portion 82 and the inner layer GND 89 are close to the tab fixing portion 82. Since a plurality of through holes 84 are connected, the ground potential supplied to the tab 4 is sufficiently low-inducted. Further, in the high-frequency power module 1, the signal wiring from the electrode terminal 9 of the LNA (low noise amplifier) 24 having the first circuit portion to the wire 7 via the bonding wire I 0 is disposed on both sides thereof. A conductive wire having a fixed potential such as a ground potential. Therefore, the signal wiring of the LNA 24 is shielded by the electromagnetic screen wall, so that the signal wiring is hard to be crosstalked. Therefore, the high frequency characteristics of the wireless communication device 69 can be improved. also,. In order to sufficiently induct the ground potential supplied to the tab 4 to be low -30-(28) 1292208, the ground potential can be sufficiently stabilized, and as shown in FIG. 4, the ground potential can also be supplied. The wiring 943 to which the fire dry pad 8 1 of (L) 24 is connected to the LNA 24 is connected to the tab fixing portion 8 2 . In particular, it can be disposed on the inner side of the pad 8 1 which is connected to the wiring 94, whereby the field outside the pad 81 can be effectively utilized as a field in which other 95 or parts are disposed. In particular, in order to improve the high frequency characteristics of the signal input to the LN A 2 4, a coil (L) connected to the pad 8 1 (in the aforementioned L N A 2 4 input signal (Signal)) is arranged. When a passive component such as a capacitive element (C) or a resistive element (R), as described above, will come from the supply ground potential (G. The wiring 94 of the pad 8 1 of ND is introduced to the inner side, whereby the various components described above can be disposed closer to the input pad 8;1, thereby enabling more efficient improvement of high frequency characteristics. . For example, in the example shown in FIG. 14, the coil (L) and the capacitive element (C) are arranged to be close to the welding pad 8 1 for signal input (S igna 1 ), so that each passive can be shortened. The wiring between the component and the pad 8 1 has a length of 96, so that a small loss of inductance integration can be achieved. Moreover, FIG. 17 is a case where the mounting substrate 80 of the modification is used. The mounting substrate 80 shown in Fig. 17 is an example in which the common wiring connecting the wirings of the first wiring layer and the second wiring layer 87 does not reach the blind hole 85 of the back surface of the mounting substrate 80. In the blind hole. At "85", although there is a problem that the solder flowing into the through hole 84 is insufficient, there is an effect that the amount of solder can be easily controlled by the blind hole 85. -31 - (29) 1292208 Even when the high-frequency power module 1 is mounted on the mounting substrate 80 in which the blind vias 85 are formed, the same effect as in the case of mounting the substrate 80 of the through-holes 8 can be obtained. The mounting substrate 80 of the modification shown in Fig. 18 is a case where the blind holes 85 are provided across the entire adjustment piece fixing portion 8 2 . Fig. 9 is a view showing a structure in which the high-frequency power module 1 is mounted on the mounting substrate 8A shown in Fig. 18. According to the mounting structure shown in FIG. 19, the blind hole 8 5 (or the through hole 84) can be placed on the entire adjustment piece fixing portion 82, and supplied to the adjustment piece 4 (with the adjustment piece fixing portion 8 2 soldered) The ground potential of the connection can be made lower in inductance, which in turn can further improve the high frequency characteristics of the wireless communication device 69. If this embodiment is used. 1, in the semiconductor device such as the high-frequency power module 1, the two sides of the conductive bonding wire 10 (the external signal is transmitted to the first circuit portion such as the LNA (low noise amplifier) 24) are placed and supplied. A conductive bonding wire 10 having a fixed potential such as a ground potential, and a second circuit portion such as a combiner 'VC, and an adjustment piece 4 are connected thereto, and a plurality of strips for supplying a ground potential (first potential) to the second circuit portion are provided. The conductive bonding wire 10a is bonded downward, and in the structure in which the semiconductor device is mounted, the plurality of through holes 84 (common wiring) of the regulating piece 4 and the mounting substrate 80 are fixed to the fixing piece having a large area. 82 is connected via the solder 83, whereby the tab 4 is in a state in which the ground potential is sufficiently low-inducted. As a result, the ground potential of the tab 4 of the second circuit portion is also stabilized, and the adjustment of the tab 4:: ground potential can be reduced. For example, it is possible to reduce the fluctuation of the ground potential corresponding to the operation of the second circuit unit such as the oscillator of the periodic operation, and to prevent the crosstalk caused thereby. -32 - (30) 1292208 Further, in the conductive bonding wire 1 0 (the external signal is transmitted to the first circuit portion) is disposed on both sides of the conductive bonding wire 10' that supplies a fixed potential. Therefore, the potential of the conductive bonding wire 1 that transmits the external signal can be electrically conductive by a fixed potential The welding line 10 is in a state of being electromagnetically shielded, whereby even if the ground potential fluctuation occurs in the second circuit portion, the circuit portion of the first circuit is not easily affected by the fluctuation of the ground potential of the second circuit portion. As a result, as shown in the first embodiment, the wireless communication device 69 (electronic device) such as a cellular phone in which the semiconductor device such as the high-frequency power module 1 is mounted can be reduced to the LNA (Low Noise Amplifier) 24 The input of the power supply noise and the signal noise of the circuit portion of the circuit can improve the high frequency characteristics of the wireless communication device 69. Further, since the input of the power supply noise and the signal noise to the circuit portion such as the LN A 24 can be reduced, the reliability and quality of the wireless communication device 69 can be improved. That is, in the wireless communication device 69, a good call without output fluctuation or distortion can be formed. Further, in the local power module 1 of the semiconductor device, the signal wiring of the electrode terminal 9 of the LNa (low noise amplifier) 24 reaches the wire 7 via the bonding wire i 0, and the ground wiring is disposed on both sides thereof to be electromagnetically shielded. Because of the wall, it is not easy to be cross-talked by the signal input from other ideas. Further, since the high-frequency power module 1 is exposed on the back surface of the sealing body 2, the heat generated in the semiconductor wafer 3 can be efficiently radiated to the mounting substrate via the fixing piece-33-(31) 1292208 fixing portion 82. 80. Therefore, the operation of the wireless communication device 69 incorporated in the high-frequency power module 1 can be stabilized. In addition, since the local power module 1 is a non-conducting type semiconductor device in which the tab 4 and the lead wire 7 are exposed on the back surface of the sealing body 2, the high-frequency power module 1 is small and thin, and it is also possible to reduce the weight. . In this case, the wireless communication device incorporated in the high-frequency power module 1 may be small and lightweight, and the high-frequency power module 1 is connected to the electrode terminal 9 and the wire of the semiconductor wafer 3 via the bonding wire 1 ( The stitch 7) is connected to the downward bonding structure of the tab 4 which is the ground potential (first potential) and the electrode terminal (ground electrode terminal) 9 of the semiconductor wafer by the bonding bonding wire 10 a. : A wire 7 for grounding that has less external electrode terminals. As a result, the sealing body 2 can be downsized by reducing the number of stitches, and the size of the high-frequency power module 1 can be reduced. (Embodiment 2) Fig. 20 is a plan view showing a portion of a sealing body of a high-frequency power module according to another embodiment (Embodiment 2) of the present invention. In the second embodiment, the high-frequency power module 1 mounted on the electronic device such as the wireless communication device 69 (see FIG. 12) has three low-noise amplifiers (LN) in the specific circuit portion 实施 in the first embodiment. A) 2 4 : Outside the circuit section, 乂(:0) handles high-frequency 1^¥(:〇.44 is also treated as a specific circuit section 1丨. Therefore, all ground electrode terminals 9 of RFVC 044 will pass through The bonding wire is connected to the wire (the wire for grounding) 7, and not -34- (32) 1292208 is connected to the tab 4 via the bonding wire. Further, the electrode terminal 9 of the semiconductor wafer 3 passes through the bonding wire 10 In the wiring that reaches the wire 7, a ground wire having a fixed potential is disposed on both sides of the two signal wires (S i gnal ) of the RFVC 044, and the electromagnetic wiring of the signal wiring is performed in the same manner as the high-frequency power module 1 of the first embodiment. In addition, as for the three LN A 24s, the ground wiring with a fixed potential is placed on both sides of the two signal wirings in the same manner as in the first embodiment. In addition to the LNA 24 (low noise amplifier) Other than RFVC044 (high frequency voltage controlled oscillator) The ground potential of the specific circuit portion 1 1 for processing the high-frequency signal to be contained is also less susceptible to the ground potential of the other circuit portion, so that the wireless communication device such as the mobile phone equipped with the high-frequency power module 1 can be improved. (Embodiment 3) FIG. 2 is a plan view showing a part of a sealing body of a high-frequency power module according to another embodiment (Embodiment 3) of the present invention. In the high-frequency power module 1 mounted on an electronic device such as the wireless communication device 6 (see FIG. 12), the RFVC 044 is used as an external component, and a single chip is not formed in the semiconductor wafer 3. This is a dual-band communication. In a way, a circuit unit such as a low noise amplifier, a mixer, a VCO, a combiner, an iq modulator/demodulator, a frequency divider, and a quadrature modulator is formed monolithically. The two mixers are respectively controlled by a frequency divider, and the frequency division -35-(33) 1292208 is a frequency conversion circuit for converting the high frequency signal outputted by the RFVCO of the external part into a lower frequency signal. In the third embodiment, As shown in FIG., The presence RFVC044, RFVC044 has a unitary signal line (Signal) on the outside of the semiconductor device 1 21 is connected to the two wires of the semiconductor device 7. Further,

由連接於RFVC 044的兩條導線7經由焊接線1〇到達半導 體晶片3的電極端子9的兩條訊號配線的兩側的電極端子 9與導線7會經由焊接線1 0來連接。此兩條訊號配線的 兩側的電極端子9爲接地甩的電極端子9，因此經由焊接 線1 0來連接於此接地用的電極端子9的導線7也會形成 接地用的導線7。藉此，與實施形態2的情形一樣，處理 高頻訊號的訊號配線也會被電磁屏蔽，.並且與半導體晶片> 3中的其他電路部形成接地電位爲獨立的構成。The electrode terminals 9 and the wires 7 on both sides of the two signal wirings which are connected to the electrode terminals 9 of the semiconductor wafer 3 via the bonding wires 1 to the two wires 7 connected to the RFVC 044 are connected via the bonding wires 10. Since the electrode terminals 9 on both sides of the two signal wirings are the electrode terminals 9 of the grounding electrode, the wires 7 connected to the electrode terminals 9 for grounding via the bonding wires 10 also form the wires 7 for grounding. As a result, in the same manner as in the second embodiment, the signal wiring for processing the high-frequency signal is electromagnetically shielded, and the ground potential is formed independently of the other circuit portions in the semiconductor wafer > 3.

又，與實施形態2同樣的，有關3個LNA24方面， 也會分別在2條訊號配線 （Signal )的兩側配置有固定 電位的接地配線。 其結果，在本實施形態3中也與實施形態2 —樣，不 會隨著R F V C Ο 4 4的接地電位的變動而產生的障礙。因此 ，可提高搭載高頻功率模組1之攜帶電話機等無線通訊裝 置6 9的高頻特性。 (導施形態4) 圖2 2以及圖2 3是有關本發明的其他實施形態（實施 形態4 )之高頻功率模組的圖’圖22是表示切去高頻功 -36 - (34) 1292208 率模組的密封體的一部分之平面圖，圖2 3是表示圖2 2所 示之高頻功率模組的剖面圖’圖2 4是表示實施形態4之 高頻功率模組的變形例之剖面圖。 本實施形態4，如圖22及圖23所示，是藉由導電性 的焊接線1 來電性連接成爲共通的接地端子的調整片4 與被製作成接地電位的導線7，且使導線7形成接地外部 電極端子。在本實施形態4的高頻功率模組1中，因調整 片4的背面會由密封體2的背面（安裝面）露出，故可以 調整片4來當作接地用的外部電極端子使用，並且經由焊 接線1 〇b來連接於調整片4的導線7也能當作接地用的外 部電極端子使用。 此外，在本實施形態，4的變形例之圖2 4所示的構造 中，因調整片4的背面側會被半蝕刻而變薄，故在單片封 膠時，密封用樹脂也會繞入調整片4的背面側，藉此調整 片4的背面也不會由密封體2露出，完全埋沒於密封體2 內。 在如此的構造中，由於調整片4不會露出於密封體2 的背面，因此無法直接經由焊錫來連接調整片4與圖i 3 所示之安裝基板8 0的調整片固定部8 2。在此，於安裝基 板8 0中’會事先在與導線7 (將接地電位供應給調整片4 )連接的焊墊8 1連接複數個貫通孔84，而來謀求接地電 位的低電感化，藉由複數條焊·接線10b來連接導線7 (連 接於焊墊8 1 )與調整片4，謀求導線一調整片間的接地低 電感化。 (35) 1292208 或者’直接藉由導線架上的導線材來連接被接地低電 感化的導線7與調整片4，藉此與上述同樣的，謀求導線 一調整片問的接地低電感化。 如此一來，即使是將調整片4埋入密封體内的構 造之高頻功率模組1，照樣能夠提高搭載此高頻功率模組 1之攜帶電話機等無線通訊裝置69的高頻特性。 又，就圖24所示構造的情況而言，由於調整片4是 經由焊接線10b來連接於導線7，因此可以此導線7作爲 接地用的外部電極端子來使用。又，就使調整片4埋入密 封體2内的其他構造而言，亦可在調整片吊導線的途.中折 彎成階梯狀的構造。 在圖24所示的變形例的構成中與:經由焊接線10a來 連接於調整片4的接地電位供給用的電極端子9的數目相 較下，由於可藉由減少經由焊接線1 〇b來與調整片連接的 導線7的數目，因此可減少沿著密封體2的周圍來排列的 導線7的條數，可使半導體裝置小型化，且因爲調整片4 的背面會被密封體2所覆蓋，所以在將本實施形態4之高 頻功率模組1等的半導體裝置安裝於安裝基板8 0 (參照 圖1 3 )上時，高頻功率模組1之下的區域也可當作配置 安裝基板8 0上的配線之區域使用。因此，在本實施例中 ，具有可與高頻功率模組1的小型化一起提高安裝基板 8 0等配線基板上的安裝密度的優點。 (實施形態5 ) -38- (36) 1292208 圖2 5是表示切去本發明的其他實施形態（實施 5 )之高頻功率模組的構造之密封體的一部份之平面圖 圖2 5是表示本發明的其他實施形態（實施形態 ’亦即切去高頻功率模組構造的密封體的一部份之平 〇 本實施形態5的高頻功率模組1是在實施形態1 的高頻功率模組1中，經由調整片4與焊接線1 〇a所 的第3電極端子（電極端子9 )來進行往LNA24之 電位（第1電位）的供給。 亦即，在本實施形態5的高頻功率模組1中，搭 此的半導體晶片3具有在LNA24供給接地電位（第 位）的電極端子9 (第3電極端子），此電極端子9 3電極端子）與調整片4會藉由導電性的焊接線l〇a 接。 因此，在本實施形態 5的高頻功率模組1中 LNA24之接地電位（第1電位）的供給不是經由訊 線（Signal )的兩側之固定電位的導線7來進行，而 與安裝基板80的複數個貫通孔84連接，經由使電源 配線形成低電感化後的調整片4來進行。 此外，在本實施形態5的高頻功率模組1中， LNA24的訊號配線（Signal)的雨側配置有與調整片 接地電位不同的固定電位之I:線 7及焊接線1〇 LNA24的訊號配線是與實施形態1的高頻功率模組 樣地被電磁屏蔽。 形態 〇 5 ) 面圖 所述 連接 接地 載於 1電 (第 來連 ，往 號配 是使 供給 亦於 4的 ，且 1同 -39- (37) 1292208 因此，在搭載本實施形態5的高頻功率模組1之攜帶 電話機等的無線通訊裝置6 9中，亦可謀求其高頻特性的 提升。 另外，在本貫施形態5的商頻功率模組1中，連接電 極端子9 (第3電極端子）與調整片4的導電性焊接線 1 0a和連接訊號配線 （Signal )用的電極端9 (第1電極 端子）與導線7 (第1導線）的導電性焊接線1 〇相較之 下，可使·其長度形成非常短。 藉此，由於往LNA24之供給用的電源的焊接線長度 變短，因此可縮小該配線的阻抗，而使能夠更提升高頻功 率模組1的特性。、 因此，在搭載本實施形態.5的高頻功率模組1之攜帶 電話機等的無線通訊裝置6 9中，更可謀求其高頻特性的 提升。 以上，雖是根據實施形態來具體說明本發明者所硏發 的發明，但本發明並非只限於上記實施形態，只要不脫離 其主旨範圍，亦可實施其他各種的變更。 在前述實施形態1〜5中，有關共通化的電源電位方 面’雖只針對接地電位來予以記載，但本發明的適用範圍 並非只限於接地電位及其關聯的構成者，只要適用本發明 ’形成適當的電源電位（第1電位），例如形成電極的共 通化，藉此來、潑成可減少導線7的數量之電源電位，亦可 適用於供以供給該電源電位的電極端子9或導線7的構成 -40- 1292208 (38) 又，前述實施形態1〜5中，雖是針對在Q FN型半導 體裝置的製造中適用本發明的例子來進行説明，但本發明 同樣可適用於 SON型半導體裝置的製造，可具有同樣的 効果。又，本發明的半導體裝置、或搭載於電子裝置的半 導體裝置並非只限於非導線型半導體裝置，例如沿著密封 體2的周圍而折彎成鷗翼狀的導線會突出之所謂QFp ( Quad F1 a t P a c k a g e )或 S Ο P ( S m a 1 ] 〇 u 11 i n e P a c k a g e )的 半導體裝置亦可同様適用，但與前述QFP或SOP相較之 下，採用密封體2的周圍之導線的突出量較小的QFN型 構造較能夠達成半導體裝置的小型化。 又，前述實施形態1〜5中，搭載有半導體裝置的攜 帶電話機等無線通訊裝置（電子裝置）雖是舉一事先在 本體安裝天線2 0之無線通訊裝置6 9爲例來進行説明，但 本發明的電子裝置亦可如圖2 6變形例所示，例如之後將 電視，機上盒或汽車衛星導航裝置等的天線92安裝於各 本體上之天線外接裝置93，同樣的在此天線外接裝置93 中可藉由裝入實施形態1〜5所述的高頻功率模組丨來謀 求其高頻特性的提升。 (産業上的利用可能性） 如以上所述’本發明的電子裝置及半導體裝置是被使 用於攜帶電話機等的無線通訊裝置p特是在通訊系統爲 複數系統的攜帶電話機中，在低雜訊放大器處理輸入訊號 爲極微弱的訊號的電路部中，將固定電位的配線配置於傳 -41 - (39) 1292208 送前述輸入訊號的訊號配線的兩側，且在安裝此半導體裝 置的配線基板中具有藉由複數條共通配線來將被低電感化 的接地電位供給至半導體裝置的調整片之安裝構造，藉此 ，在使用1系統的通訊系統中，不會在與其他系統的通訊 系統之間發生串擾，進而能夠提供一種通話良好的電子裝 置及半導體裝置。 【圖式簡單說明】 圖1是表示本發明之實施形態1的半導體裝置例，亦 即切去局頻功率模組的密封體的一部分之平面圖。 圖2是表示圖1所示之高頻功率模組的構造剖面圖。 圖3是表示圖1所、示之高頻功率模組的構造平面圖。 圖4是表示組裝於圖1所示之高頻功率模組中的半導 體晶片之電路構成例的方塊平面圖。 圖5是表示圖1所示之高頻功率模組的外部電極端子 與半導體晶片的低雜訊放大器等的各電路都的結線狀態例 的平面圖。 圖6是表示圖1所示之高頻功率模組的組裝程序例的 製造流程圖。 圖7是表示使用於圖1所示之高頻功率模組的製造之 導線架的構造例平面圖。 圖8是表示E7所示之導線架的單位導線圖案例的部 份擴大平面圖。 圖9是表示圖1所示之高頻功率模組的組裝之晶片接 -42- (40) 1292208 合狀態例的部分剖面圖。 圖1 0是表示圖1所示之高頻功率模組的組裝之打線 接合狀態例的部分剖面圖。 圖1 1是表示圖1所示之高頻功率模組的組裝之樹脂 密封後的構造例的部分剖面圖。 圖1 2是表示組裝有圖1所示之高頻功率模組的電子 裝置例，亦即攜帶電話機的電路構成方塊圖。 圖1 3是表示圖1所示之高頻功率模組的攜帶電話機 (電子裝置）的安裝構造例的部分剖面圖。 圖1 4是表示安裝於本發明之電子裝置中的配線基板 的模組安裝部的端子圖案例的部分平面圖。 圖15是表示在圖14所示之配:線.基、板上搭載高頻功淳 模組時之A— A剖面構造例的剖面圖。 圖1 6是表示切去圖1 5所示之安裝構造的密封體的一 部份之平面圖。 圖1 7是表示在變形例的配線基板中安裝高頻功率模 組時之安裝構造的剖面圖。 圖1 8是表示其他變形例的配線基板的模組安裝部的 端子圖案的部分平面圖。 圖1 9是表示在圖1 8所示之配線基板上搭載高頻功率 模組時之B— B剖面的構造剖面圖。 圖2 0是表示本發明的其他實施形t (實施形態2 ) ，亦即切去高頻功率模組構造的密封體的一部份之平面圖 -43 - (41) 1292208 圖2 1是表示本發明的其他實施形態（實施形態3 ) ’亦即切去高頻功率模組構造的密封體的一部份之平面圖 〇 圖22是表示本發明的其他實施形態（實施形態4 ) ’亦即切去高頻功率模組構造的密封體的一部份之平面圖 〇 ® 23是表示圖22所示之高頻功率模組構造的剖面圖 〇 ® 2 4是表示實施形態4之高頻功率模組的變形例的 構造剖面圖。 圖2 5是表示本發明的其他實施形態（實施形態5 ) ’亦即切去高頻功率模組構造的密封體的一部份之平面圖 〇 圖2 6是表示本發明之變形例的電子裝置的構造模式 構成圖。 【元件符號說明】 1 :高頻功率模組 2 :密封體 2 a :斜面 2 b :傾斜面 3 :半導體元件（:半導體晶片） 4 :調整片 4 a :半導體元件搭載部 -44 - (42) (42)1292208 4b :焊接線連接領域 5 :接著劑 6 :調整片吊導線 7 :導線 7a :安裝面 9 :電極端子 1 〇 :焊接線 l〇a :朝下接合焊接線 1 0 b :焊接線 1 3 :導線架Further, similarly to the second embodiment, in the case of the three LNAs 24, ground wirings having a fixed potential are disposed on both sides of the two signal wirings. As a result, in the third embodiment, as in the second embodiment, the obstacle caused by the fluctuation of the ground potential of R F V C Ο 4 4 is not caused. Therefore, the high-frequency characteristics of the wireless communication device 69 such as a cellular phone equipped with the high-frequency power module 1 can be improved. (Description 4) FIG. 2 and FIG. 2 are diagrams of a high-frequency power module according to another embodiment (Embodiment 4) of the present invention. FIG. 22 is a diagram showing the rate of cutting high-frequency power -36 - (34) 1292208. FIG. 23 is a cross-sectional view showing a high-frequency power module shown in FIG. 2 and FIG. 24 is a cross-sectional view showing a modified example of the high-frequency power module according to the fourth embodiment. . In the fourth embodiment, as shown in FIG. 22 and FIG. 23, the regulating piece 4 which is a common grounding terminal and the wire 7 which is formed to have a ground potential are electrically connected by the conductive bonding wire 1, and the wire 7 is formed. Ground the external electrode terminal. In the high-frequency power module 1 of the fourth embodiment, since the back surface of the regulating piece 4 is exposed by the back surface (mounting surface) of the sealing body 2, the sheet 4 can be adjusted to be used as an external electrode terminal for grounding, and The wire 7 connected to the tab 4 via the bonding wire 1 〇b can also be used as an external electrode terminal for grounding. Further, in the structure shown in Fig. 24 of the modification of the fourth embodiment, since the back side of the tab 4 is half-etched and thinned, the sealing resin is also wound in the single-piece sealing. The back side of the tab 4 is placed so that the back surface of the tab 4 is not exposed by the sealing body 2 and is completely buried in the sealing body 2. In such a configuration, since the tab 4 is not exposed on the back surface of the sealing body 2, the tab 4 and the tab fixing portion 8 2 of the mounting substrate 80 shown in Fig. i3 cannot be directly connected via solder. Here, in the mounting substrate 80, a plurality of through holes 84 are connected in advance to the bonding pads 8 1 connected to the wires 7 (the ground potential is supplied to the tab 4), thereby achieving low inductance of the ground potential. The wire 7 (connected to the pad 8 1 ) and the tab 4 are connected by a plurality of strips and wires 10b, and the grounding between the wires and the tabs is reduced in inductance. (35) 1292208 Alternatively, the wire 7 and the tab 4 which are grounded with low inductance are directly connected by the lead wire on the lead frame, and in the same manner as described above, the grounding of the wire-adjusting chip is reduced in inductance. As a result, even in the high-frequency power module 1 constructed by embedding the tab 4 in the sealed body, the high-frequency characteristics of the wireless communication device 69 such as a cellular phone equipped with the high-frequency power module 1 can be improved. Further, in the case of the structure shown in Fig. 24, since the tab 4 is connected to the wire 7 via the bonding wire 10b, the wire 7 can be used as an external electrode terminal for grounding. Further, in the other structure in which the tab 4 is buried in the sealing body 2, it is also possible to bend the structure into a stepped shape while adjusting the wire of the hanging wire. In the configuration of the modification shown in FIG. 24, the number of electrode terminals 9 for ground potential supply connected to the tab 4 via the bonding wire 10a is lower than that of the electrode line 9 by the bonding wire 1 〇b. Since the number of the wires 7 connected to the tabs can reduce the number of the wires 7 arranged along the circumference of the sealing body 2, the semiconductor device can be miniaturized, and since the back surface of the tab 4 is covered by the sealing body 2 Therefore, when the semiconductor device such as the high-frequency power module 1 of the fourth embodiment is mounted on the mounting substrate 80 (see FIG. 13), the area under the high-frequency power module 1 can also be mounted as a configuration. The area of the wiring on the substrate 80 is used. Therefore, in the present embodiment, there is an advantage that the mounting density on the wiring substrate such as the mounting substrate 80 can be improved together with the miniaturization of the high-frequency power module 1. (Embodiment 5) -38- (36) 1292208 FIG. 2 is a plan view showing a part of a sealing body having a structure in which a high-frequency power module according to another embodiment (Embodiment 5) of the present invention is cut out. According to another embodiment of the present invention (the embodiment, that is, a part of the sealing body of the high-frequency power module structure is cut off), the high-frequency power module 1 of the fifth embodiment is the high frequency of the first embodiment. In the power module 1, the potential of the LNA 24 (first potential) is supplied via the third electrode terminal (electrode terminal 9) of the bonding wire 4 and the bonding wire 1A. That is, in the fifth embodiment. In the high-frequency power module 1, the semiconductor wafer 3 having this has an electrode terminal 9 (third electrode terminal) that supplies a ground potential (position) to the LNA 24, and the electrode terminal 193 electrode terminal and the tab 4 are used by The conductive welding wire l〇a is connected. Therefore, in the high-frequency power module 1 of the fifth embodiment, the supply of the ground potential (first potential) of the LNA 24 is not performed via the wires 7 of the fixed potentials on both sides of the signal, but with the mounting substrate 80. The plurality of through holes 84 are connected, and the power supply wiring is formed by the adjustment piece 4 having a low inductance. Further, in the high-frequency power module 1 of the fifth embodiment, the rain side of the signal line (Signal) of the LNA 24 is provided with a fixed potential I: the line 7 and the line of the bonding line 1〇LNA24 different from the ground potential of the tab. The wiring is electromagnetically shielded from the high frequency power module of the first embodiment. 〇 ) 5) The ground connection is shown in Fig. 1 (the first connection, the connection is made to supply 4, and the same is -39- (37) 1292208. Therefore, the height of the fifth embodiment is mounted. In the wireless communication device 69 such as a cellular phone of the frequency power module 1, the high-frequency characteristics can be improved. Further, in the commercial frequency power module 1 of the fifth embodiment, the electrode terminal 9 is connected. The 3 electrode terminal) is compared with the conductive bonding wire 10a of the tab 4 and the electrode terminal 9 (first electrode terminal) for connecting the signal wiring (the first electrode terminal) and the conductive bonding wire 1 of the wire 7 (first wire). In the meantime, the length of the wiring can be made very short. Therefore, since the length of the welding line of the power supply for supplying the LNA 24 is shortened, the impedance of the wiring can be reduced, and the high-frequency power module 1 can be further improved. Therefore, in the wireless communication device 6 such as a cellular phone equipped with the high-frequency power module 1 of the fifth embodiment, the high-frequency characteristics can be improved. The invention made by the inventor of the present invention will be described, but In addition, the present invention is not limited to the above-described embodiments, and various other modifications can be made without departing from the scope of the invention. In the first to fifth embodiments, the power supply potential in common is described only for the ground potential, but The scope of application of the present invention is not limited to the ground potential and its associated constituents. As long as the present invention is applied to form an appropriate power supply potential (first potential), for example, the commonality of the electrodes is formed, thereby reducing the number of wires 7 The number of power supply potentials can also be applied to the configuration of the electrode terminal 9 or the lead wire 7 to which the power supply potential is supplied. -40 - 1292208 (38) Further, in the first to fifth embodiments, the Q FN type semiconductor is used. Although the example of the present invention is applied to the manufacture of the device, the present invention is also applicable to the manufacture of the SON-type semiconductor device, and has the same effect. The semiconductor device of the present invention or the semiconductor device mounted on the electronic device is not It is limited to a non-conducting type semiconductor device, for example, a so-called QFp (which is bent along a circumference of the sealing body 2 and bent into a gull-wing wire). The semiconductor device of Quad F1 at P ackage ) or S Ο P ( S ma 1 ] 〇u 11 ine P ackage ) can also be applied, but the wire around the sealing body 2 is used in comparison with the aforementioned QFP or SOP. In the above-described first to fifth embodiments, the wireless communication device (electronic device) such as a cellular phone equipped with a semiconductor device is mounted on the main body in advance, as in the case of the QFN type structure having a small amount of protrusion. The wireless communication device 6 9 of the antenna 20 is described as an example. However, the electronic device of the present invention may also be as shown in the modified example of FIG. 26, for example, after installing the antenna 92 of a television, a set-top box, or a car satellite navigation device. In the antenna external device 93 on each of the main bodies, the high-frequency power module 实施 described in the first to fifth embodiments can be similarly incorporated in the antenna external device 93 to improve the high-frequency characteristics. (Industrial Applicability) As described above, the electronic device and the semiconductor device of the present invention are wireless communication devices used in mobile phones, etc., especially in a portable telephone in which the communication system is a plurality of systems, in low noise. In the circuit portion where the amplifier processes the input signal as a very weak signal, the wiring of the fixed potential is disposed on both sides of the signal wiring to which the input signal is transmitted, and in the wiring substrate on which the semiconductor device is mounted. A mounting structure for supplying a low-inductance ground potential to a stator of a semiconductor device by a plurality of common wirings, whereby a communication system using one system does not exist between communication systems of other systems Crosstalk occurs, which in turn provides an electronic device and a semiconductor device with good communication. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view showing a part of a semiconductor device according to a first embodiment of the present invention, that is, a part of a sealing body of a local power module. Fig. 2 is a cross-sectional view showing the structure of the high-frequency power module shown in Fig. 1; Fig. 3 is a plan view showing the structure of the high frequency power module shown in Fig. 1; Fig. 4 is a blockar plan view showing an example of a circuit configuration of a semiconductor wafer incorporated in the high-frequency power module shown in Fig. 1. Fig. 5 is a plan view showing an example of a state in which the external electrode terminals of the high-frequency power module shown in Fig. 1 and the low-noise amplifier of the semiconductor wafer are connected. Fig. 6 is a manufacturing flow chart showing an example of an assembly procedure of the high-frequency power module shown in Fig. 1; Fig. 7 is a plan view showing a configuration of a lead frame used in the manufacture of the high-frequency power module shown in Fig. 1. Fig. 8 is a partially enlarged plan view showing an example of a unit conductor pattern of the lead frame shown by E7. Fig. 9 is a partial cross-sectional view showing a state in which the wafer connection - 42 - (40) 1292208 of the assembly of the high-frequency power module shown in Fig. 1 is combined. Fig. 10 is a partial cross-sectional view showing an example of a wire bonding state in which the high-frequency power module shown in Fig. 1 is assembled. Fig. 11 is a partial cross-sectional view showing a structural example of resin assembly after assembly of the high-frequency power module shown in Fig. 1. Fig. 12 is a block diagram showing an example of an electronic device in which the high-frequency power module shown in Fig. 1 is incorporated, that is, a cellular phone. Fig. 13 is a partial cross-sectional view showing an example of a mounting structure of a cellular phone (electronic device) of the high-frequency power module shown in Fig. 1. Fig. 14 is a partial plan view showing an example of a terminal pattern of a module mounting portion of a wiring board mounted in the electronic device of the present invention. Fig. 15 is a cross-sectional view showing an example of a cross-sectional structure of the A-A when the high-frequency power module is mounted on the wiring board and the board shown in Fig. 14. Fig. 16 is a plan view showing a part of the sealing body in which the mounting structure shown in Fig. 15 is cut away. Fig. 17 is a cross-sectional view showing a mounting structure when a high-frequency power module is mounted on a wiring board according to a modification. Fig. 18 is a partial plan view showing a terminal pattern of a module mounting portion of a wiring board according to another modification. Fig. 19 is a structural cross-sectional view showing a BB cross section when a high-frequency power module is mounted on the wiring board shown in Fig. 18. Figure 20 is a plan view showing a part of another embodiment of the present invention (Embodiment 2), that is, a part of a sealing body in which the high-frequency power module structure is cut off - 43 - (41) 1292208 Other Embodiments of the Invention (Embodiment 3) 'That is a plan view of a part of a sealing body in which a high-frequency power module structure is cut off. FIG. 22 is a view showing another embodiment of the present invention (Embodiment 4) A plan view of a portion of the sealing body of the high-frequency power module structure 〇® 23 is a cross-sectional view showing the structure of the high-frequency power module shown in Fig. 22, and the high-frequency power module of the fourth embodiment is shown in FIG. A structural sectional view of a modified example. FIG. 25 is a plan view showing a part of a sealing body in which a high-frequency power module structure is cut away, and FIG. 6 is an electronic device showing a modified example of the present invention. The structure pattern constitutes a diagram. [Explanation of component symbols] 1 : High-frequency power module 2 : Sealing body 2 a : Bevel 2 b : Inclined surface 3 : Semiconductor element (: Semiconductor wafer) 4 : Tab 4 a : Semiconductor element mounting part - 44 - (42 (42) 1292208 4b : Welding wire connection field 5 : Adhesive 6 : Adjusting piece hanging wire 7 : Wire 7a : Mounting surface 9 : Electrode terminal 1 〇 : Welding wire l〇a : Bonding welding line 1 0 b : Welding line 1 3 : lead frame

15a、 15b ' 15c * 導孑L 17 :頂桿孔 1 8 :框部 2 0 :天線 2 1 :天線開關 22 :基帶晶片 23 :帶通濾波器 24 : LNA (低雜訊放大器） 25 :可變放大器 26 :混頻器15a, 15b ' 15c * Guide L 17 : Jack hole 1 8 : Frame 2 0 : Antenna 2 1 : Antenna switch 22 : Baseband chip 23 : Bandpass filter 24 : LNA (Low noise amplifier) 25 : Available Variable amplifier 26: mixer

2 7、2 9、3 1、3 3 :低通濾波器 .28、30、32 : PGA 3 4 :解調器 35 : ADC/DAC&DC偏移用控制邏輯電路部 -45- (43) (43)1292208 3 7、3 8 :局部訊號用分頻器 40 : 90度相位轉換器 41 : RF合成器 42 : IF合成器 43 :緩衝器2 7, 2 9, 3 1 , 3 3 : Low-pass filter .28, 30, 32 : PGA 3 4 : Demodulator 35 : Control circuit part for ADC/DAC & DC offset -45- (43) (43) 1292208 3 7, 3 8 : Frequency divider for local signal 40 : 90 degree phase converter 41 : RF synthesizer 42 : IF synthesizer 43 : buffer

44 ： RF VCO 45 : IFVCO (中間波電壓控制振盪器） 4 6、4 7 :分頻器 4 8、4 9 :開關 50 : VCXO (電壓控制水晶振盪器） 6 0 :邏輯電路 6 1、6 4 :混頻器 62 : 90度相位轉換器 6 3 :加法器 65 : DPD (數位檢相器） 66 :環路濾波器 67 ： TXVCO (發送波電壓控制發送器） 6 8 : P A模組 69 :無線通訊裝置 70 :耦合器 71 :放大器 7 2 :混頻器 .--73 :分頻器 8 0 :安裝基板 -46 - (44) 1292208 8 1 :焊墊44 : RF VCO 45 : IFVCO (intermediate wave voltage controlled oscillator) 4 6 , 4 7 : frequency divider 4 8 , 4 9 : switch 50 : VCXO (voltage controlled crystal oscillator ) 6 0 : logic circuit 6 1 , 6 4 : Mixer 62 : 90 degree phase converter 6 3 : Adder 65 : DPD (Digital Phase Detector) 66 : Loop Filter 67 : TXVCO (Transmit Wave Voltage Control Transmitter ) 6 8 : PA Module 69 : Wireless communication device 70 : Coupler 71 : Amplifier 7 2 : Mixer .--73 : Frequency divider 8 0 : Mounting substrate - 46 - (44) 1292208 8 1 : Solder pad

8 2 :調整片固定部 8 3 :焊錫 8 4 ··貫遇扎 8 5 :盲孔 8 6 :第1配線層 8 7 :第2配線層 8 8 :第3配線層 8 9 :内層G N D 90 :内層Vcc 9 1 :防焊阻絕層 9 2 :天線 93 :天線外接裝置 94、 95、 96:配線8 2 : tab fixing portion 8 3 : solder 8 4 ··crossing 8 5 : blind hole 8 6 : first wiring layer 8 7 : second wiring layer 8 8 : third wiring layer 8 9 : inner layer GND 90 : Inner layer Vcc 9 1 : Solder resist layer 9 2 : Antenna 93 : Antenna external device 94, 95, 96: Wiring

-47 --47 -

Claims (1)

1292208 ⑴ 拾、申請專利範圍 1 · 一種電子裝置，係具備： 半導體裝置；該半導體裝置具有：複數 有主面及背面的調整片，及具有複數個電極 由複數個半導體元件來構成的複數個電路部 ’及連接前述複數個電極端子與前述導線之 的焊接線’及連接則述複數個電極端子與前 面，而來將第1電位供應給前述複數個電極 導電性的焊接線；及 配線基板；該配線基板安裝有前述半導 第1配線層與第2配線層，且設有共通配線 係配置在開口於前述第1配線層與第2配線 通孔，而來分別連接前述配線層的配線； 其特徵爲： 前述半導體晶片係固定於前述調整片的 前述電路部係包含：經由前述導線來輸 第1電路部，及經由前述調整片與前述導電 連接的第2電路部； 前述複數個電極端子係具有：在前述第 前述外部訊號的第1電極端子，及在前述第 固定電位的第2電極端子； 前述複數條導線係包含：傳達前述外部 線，及配置於前述第]導線兩側的第2導線 在連接前述第1導線與前述第】電極端 條導線，及具 端子及分別藉 之半導體晶片 複數個導電性 述調整片的主 端子之複數個 體裝置，具備 ，該共通配線 層的複數個貫 主面； 入外部訊號的 性的焊接線來 1電路部輸入 1電路部供給 訊號的第1導 5 子的前述導電 -48 - (2) 1292208 2導線與前述第2電 性的焊接線的兩側配置有連接前述第 極端子的前述導電性的焊接線； 前述調整片與前述配線基板的前述共通配線會被連接 ，其中與前述共 錫來與前述調整 2 ·如申請專利範圍第1項之電子裝置 通配線連接的調整片連接用端子會經由焊 片連接。 3 ·如申請專利範圍第2項之電子裝*，甘+ 其中前述複 數條共通配線會沿著前述調整片連接用端子的、 1米設釐。 4 .如申請專利範圍第M項之電子裝置， 〜 "、中刖述複 數個電極端子具有：在前述第1電路部供給前 、 弟1電位 的第3電極端子f.前述第3電極端子與前述調敕 _ &片會藉由 前述導電性的焊接線來連接。 5 ·如申請專利範圍第4項之電子裝®，其φ兔+、 一、卞連接前 述第3電極端子與前述調整片的前述導電性的焊接線係 連接前述第1電極端子與前述第1導線的前述導漆 巧电往的焊 接線來得短。 6 ·如申請專利範圍第1項之電子裝置，其φ <、、 *"、十則述複 數個電極端子係具有：在前述第1電路部供給前述第丨t 位的第3電極端子，前述第3謹極端子與前述導線會萨電 前述導電性的焊接線來連接。 曰由 7 ·如申請專利範圍第1項之電子裝釐， ，、干經4前 述第2電極端子來供給至前述第丨電路部的 &回疋電仿 爲前述第]電位。 ,49- (3) 1292208 8 ·如申請專利範圍第1項之電子裝置，其中前述第 1電路部爲放大經由前述導線而輸入的前述外部訊號之放 大電路。 9. 如申請專利範圍第1項之電子裝置，其中前述第 2電路部係具有處理藉由前述第1電路部而放大的訊號之 機能的至少一部份。 10. 如申請專利範圍第1項之電子裝置，其中前述半 導體裝置係具有由絕緣性樹脂所構成的密封體，在前述密 封體中形成有在將前述半導體裝置安裝於前述配線基板 時與前述配線基板的主面呈對向的安裝面，前述複數條導 線係露出於前述安裝面。 1 1 .如申請專利範圍第1 〇 .項之電子裝置，其中在前 述密封體的前述安裝面露出有前述調整片，且與前述配線 .基板的前述共通配線連接的調整片連接用端子會經由焊錫 來與前述調整片連接。 1 2.如申請專利範圍第1項之電子裝置，其中前述第 1電路部係供以放大無線訊號經由天線來變換的電氣訊號 之電路。 1 3 . —種半導體裝置，係具有： 密封體；該密封體係由絕緣性樹脂所構成；及 複數條導線；該複數條導線係沿著前述密封體的周圍 而配置，且橫跨前述密封體的内外3設置；及 調整片；該調整片係具有主面及背面；及 半導體晶片；該半導體晶片係具有主面及背面’在該 -50- 1292208 (4) 主面上具有複數個電極端子，及分別藉由複數個半導體元 件來構成的複數個電路部；及 複數條導電性的焊接線；該複數條導電性的焊接線係 連接前述複數個電極端子與前述導線；及 複數條導電性的焊接線；該複數條導電性的焊接線係 連接前述複數個電極端子與前述調整片的主面，而於前述 複數個電極端子供給第1電位； 其特徵爲： 則述半導體晶片係被固定於前述調整片的主面； 前述電路部係包含：經由前述導線來輸入外部訊號的 第1電路部’及經由前述調整片與前述導電性的焊接線來 連接的第2電路部； 前述複數個電極端子係具有：在前述第】電路部輸入 則述外ηβ δ?1號的桌1電極端子’及在前述第1電路部供給 固定電位的第2電極端子； 前述複數條導線係包含：傳達前述外部訊號的第1導 線，及配置於前述第1導線兩側的第2導線； 在連接目U述第1導線與則述第1電極端子的前述導電 性的焊接線的兩側配置有連接前述第2導線與前述第2電 極端子的前述導電性的焊接線。 !4·如申請專利範圍第13項之半導體裝置，其中前述 複數個電極端子具有：在前述第1電路部供給前述第丨電 位的第3電極端子，前述第3電極端子與前述調整片會藉 由前述導電性的焊接線來連接。 -51 - 1292208 (5) 15.如申請專利範圍第13項之半導體裝置，其中前述 複數個電極端子具有：在前述第1電路部供給前述第1電 位的第3電極端子，前述第3電極端子與前述導線會藉由 前述導電性的焊接線來連接。 -52 -1292208 (1) Pickup, Patent Application No. 1 - An electronic device comprising: a semiconductor device; the semiconductor device having: a plurality of tabs having a main surface and a back surface; and a plurality of circuits having a plurality of electrodes composed of a plurality of semiconductor elements And a plurality of electrode terminals and a front surface of the plurality of electrode terminals and the wire, and a plurality of electrode terminals and a front surface, wherein the first potential is supplied to the plurality of electrode conductive wires; and the wiring substrate; The wiring board is provided with the semi-conductive first wiring layer and the second wiring layer, and a common wiring is disposed in a wiring that is connected to the first wiring layer and the second wiring via, and is connected to the wiring layer; The circuit unit is characterized in that the circuit portion is fixed to the circuit portion of the adjustment sheet, and includes: a first circuit portion via the lead wire; and a second circuit portion electrically connected to the conductive via the adjusting piece; the plurality of electrode terminals The first electrode terminal of the external signal and the second electric power of the first fixed potential The plurality of wires include: the external wire is disposed, and the second wire disposed on both sides of the wire is connected to the first wire and the first electrode end wire, and has a terminal and a semiconductor The plurality of individual devices of the plurality of conductive terminals of the conductive sheet are provided with a plurality of common main surfaces of the common wiring layer; a soldering line for inputting an external signal; and a first portion of the circuit portion for inputting the first circuit portion to supply a signal. 5th of the conductive-48-(2) 1292208 2 wire and the second electrical welding line are disposed on both sides of the second conductive bonding wire, and the conductive wire connecting the first electrode; the adjusting piece and the wiring substrate The common wiring is connected, and the terminal for connection of the tab which is connected to the electronic device through wiring of the above-mentioned adjustment 2 and the electronic device is connected via the soldering piece. 3. In the case of the electronic device* of the second application patent, the above-mentioned plurality of common wirings are set to 1 m along the terminal for the connection of the above-mentioned tab. 4. The electronic device of claim M, wherein the plurality of electrode terminals have a third electrode terminal f. the third electrode terminal before the supply of the first circuit portion. And the aforementioned 敕 & 片 & 片 will be connected by the aforementioned conductive solder wire. (5) The electronic device of claim 4, wherein the φ rabbit +, one, and the third electrode terminal are connected to the conductive wire of the adjustment piece, and the first electrode terminal and the first electrode are connected The aforementioned conductive paint of the wire is short to the welding wire. (6) The electronic device of claim 1, wherein the plurality of electrode terminals are: the third electrode terminal that supplies the third bit in the first circuit portion. The third terminal is connected to the aforementioned conductive wire of the wire. According to the electronic device of the first aspect of the patent application, the second electrode terminal of the fourth aspect of the invention is supplied to the second circuit portion to be the first potential. The electronic device of claim 1, wherein the first circuit portion is an amplification circuit for amplifying the external signal input via the wire. 9. The electronic device of claim 1, wherein the second circuit portion has at least a portion of a function of processing a signal amplified by the first circuit portion. 10. The electronic device according to claim 1, wherein the semiconductor device has a sealing body made of an insulating resin, and the sealing body is formed with the wiring when the semiconductor device is mounted on the wiring substrate. The main surface of the substrate faces the mounting surface, and the plurality of wires are exposed on the mounting surface. The electronic device according to the first aspect of the invention, wherein the adjustment piece is exposed on the mounting surface of the sealing body, and the terminal for connecting the tab connected to the common wiring of the wiring substrate is via Solder is connected to the aforementioned tab. 1 2. The electronic device of claim 1, wherein the first circuit portion is a circuit for amplifying an electrical signal of a wireless signal that is converted via an antenna. A semiconductor device comprising: a sealing body; the sealing system is composed of an insulating resin; and a plurality of wires; the plurality of wires are disposed along a circumference of the sealing body and spanning the sealing body And an inner and outer 3; and a tab having a main surface and a back surface; and a semiconductor wafer having a main surface and a back surface having a plurality of electrode terminals on the main surface of the -502-1292208 (4) And a plurality of circuit portions each composed of a plurality of semiconductor elements; and a plurality of conductive solder lines; the plurality of conductive solder lines connecting the plurality of electrode terminals and the wires; and a plurality of conductive lines a plurality of conductive wires that connect the plurality of electrode terminals and the main surface of the tab, and supply a first potential to the plurality of electrode terminals; wherein: the semiconductor wafer is fixed a main surface of the adjustment piece; the circuit part includes: a first circuit part ′ that inputs an external signal via the wire; and a second circuit portion that is connected to the conductive wire, and the plurality of electrode terminals: the first electrode terminal of the first ηβ δ?1 is input to the first circuit portion, and the first electrode terminal a circuit portion that supplies a second electrode terminal having a fixed potential; the plurality of wires includes: a first wire that transmits the external signal; and a second wire that is disposed on both sides of the first wire; and the first wire is connected The conductive wire connecting the second wire and the second electrode terminal is disposed on both sides of the conductive wire having the conductivity of the first electrode terminal. The semiconductor device according to claim 13, wherein the plurality of electrode terminals have a third electrode terminal that supplies the second potential to the first circuit portion, and the third electrode terminal and the adjustment sheet are borrowed Connected by the aforementioned conductive solder wire. The semiconductor device according to claim 13, wherein the plurality of electrode terminals include a third electrode terminal that supplies the first potential to the first circuit portion, and the third electrode terminal The wires are connected to the aforementioned conductive wires by the aforementioned conductive wires. -52 -
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