TWI270047B - Display device - Google Patents

Display device Download PDF

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Publication number
TWI270047B
TWI270047B TW094105340A TW94105340A TWI270047B TW I270047 B TWI270047 B TW I270047B TW 094105340 A TW094105340 A TW 094105340A TW 94105340 A TW94105340 A TW 94105340A TW I270047 B TWI270047 B TW I270047B
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TW
Taiwan
Prior art keywords
driving
wiring
display device
voltage
power supply
Prior art date
Application number
TW094105340A
Other languages
Chinese (zh)
Other versions
TW200540787A (en
Inventor
Yutaka Sano
Satoshi Morita
Original Assignee
Sanyo Electric Co
Tokyo Sanyo Electric Co
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Publication date
Priority claimed from JP2004098901A external-priority patent/JP4543725B2/en
Priority claimed from JP2004197891A external-priority patent/JP2006018154A/en
Priority claimed from JP2004202296A external-priority patent/JP2006023589A/en
Application filed by Sanyo Electric Co, Tokyo Sanyo Electric Co filed Critical Sanyo Electric Co
Publication of TW200540787A publication Critical patent/TW200540787A/en
Application granted granted Critical
Publication of TWI270047B publication Critical patent/TWI270047B/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N19/00—Investigating materials by mechanical methods
    • G01N19/04—Measuring adhesive force between materials, e.g. of sealing tape, of coating
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N3/08—Investigating strength properties of solid materials by application of mechanical stress by applying steady tensile or compressive forces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/0014—Type of force applied
    • G01N2203/0016—Tensile or compressive
    • G01N2203/0017—Tensile
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00—Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/02—Details not specific for a particular testing method
    • G01N2203/022—Environment of the test
    • G01N2203/023—Pressure
    • G01N2203/0234—Low pressure; Vacuum

Abstract

This invention relates to a display device that prevents the error action of driving IC by preventing the voltage decreasing of the voltage source transmitted in series and improving display quality. A liquid crystal display device connected with source driving circuit ST having a plurality of driving ICSD in the edge portion of a liquid crystal display panel 2, and the voltage source from external is supplied to the source driving circuit from specified source driving circuit ST sequentially, wherein a wiring Ri for calculating the wiring impedance mainly equivalence to the signal wiring of the driving IC near the down stream of the power supply direction is formed in the driving ICSDi opposite the upstream of the power supply direction. The driving ICSDi calculates the voltage by means of the output of the other terminal of the wiring Ri used for calculating the wiring impedance to calculate the wiring impendence, then calculates the voltage decreasing value by the calculated wiring impedance, and outputs the voltage source only increasing the value of the calculated voltage decreasing value to the driving IC in the down stream side of the power source.

Description

1270047 九、發明說明： 【發明所屬之技術領域】 本發明涉及液晶顯示裝置或電漿（plasma)顯示裝置等 的顯示裝置，尤其涉及將由閘極驅動用1C以至源極驅動用 1C構成的分別承載有多個驅動用1C的驅動電路串聯連接 而安裝在顯示面板的周圍邊緣上的顯示裝置。 【先前技術】 液晶顯示裝置和電漿顯示裝置等的顯示裝置，一般地， 將顯示面板和驅動這個顯示面板的控制電路，通過將驅動 用1C安裝在帶狀基板上的多個TCP( Tape Carrier Package) 進行連接。這些TCP，分別由多個源極驅動用TCP和閘極 驅動用TCP構成，這些TCP與外部電路基板連接，從該外 部電路基板向各個TCP供給圖像資料信號、電源電壓等， 通過在各個TCP上承載的由閘極驅動用1C以至源極驅動用 1C構成的液晶驅動用1C來驅動液晶顯示面板（參見下面的 專利文獻1和2 )。 這樣的TCP方式的液晶顯示裝置的工作原理在第7圖（包 括第7A圖和第7B圖）和第8圖中表示。第7A圖是TCP 方式的液晶顯示裝置的槪略圖，第7 B圖是在第7 A圖中承 載的源極驅動用TCP (或者閘極驅動用TCP)的槪略圖， 第8圖是說明各個源極驅動用TCP中的各個資料的流動的 時間圖。 在第7圖中，TCP方式的液晶顯示裝置50具備：安裝有 TFT ( Thin Film Transistor )的主動矩陣型的液晶顯示面板 5 1的周圍邊緣上的用於向液晶顯示面板5 1的閘極信號線 1270047 • ^ 以及源極信號線供給信號的多個閘極驅動用TCP52以及源 極驅動用TCP53 ;用於向各個TCP52、53供給圖像資料信 號、時鐘信號、1C驅動用電源電壓、對置電極驅動用電源 電壓等的液晶顯示面板驅動信號的外部電路基板54。 閘極驅動用TCP52和源極驅動用TCP53，如第7Β圖所示 具備：在撓性基板56上的比如源極驅動用IC55 ;用於向該 源極驅動用IC55供給液晶顯示面板的各種驅動信號的信號 供給佈線57;用於將從源極驅動用IC55輸出的信號向液晶 φ 顯示面板5 1供給的信號輸出佈線5 8。 前述各個TCP52、53的信號供給佈線57，如第7Α圖所 示，與在液晶顯示面板5 1的附近的外部電路基板54上的 端子電連接，從設置在外部電路基板5 4上的圖像資料處理 用IC5 9 (參見第8圖）以及圖中未示出的電源電路等，將 液晶顯示面板驅動用信號導入到源極驅動用IC55。而且， 將來自沒有另外在圖中示出的PC等的圖像信號發生裝置 的圖像信號輸入到圖像資料處理用IC59。 φ 以源極驅動用TCP53的場合爲例，對該TCP方式的液晶 顯示裝置50的工作原理，用第8圖進行說明。第8圖所示 的液晶顯示裝置50，比如具備4個源極驅動用TCP53 A〜 53D，在這些源極驅動用TCP53A〜53D上分別承載有源極 驅動用IC55A〜55D。而且，液晶顯示裝置50中，還連接 有多個閘極驅動用TCP52,但在第8圖中僅僅記載了 1個。 來自PC等的圖像信號發生裝置的圖像信號，通過圖像資 料處理用IC59進行處理，在與時鐘信號同步的一個掃描期 間內，將預定的連續的圖像資料信號a〜d，通過各個信號 1270047 « / 供給佈線57 A〜57D同時供給到在各個源極驅動用TCP5 3 A 〜5 3 D上承載的源極驅動用I c 5 5 A〜5 5 D。而且，該圖像資 料信號a〜d，是對應于原來與各個源極驅動用IC55A〜55D 連接的液晶顯示面板5 1的源極信號線的條數的數目的脈 衝序列而形成的信號，但是在第8圖中爲了容易進行說 明，表示爲包含圖像資料信號a〜d的單一的脈衝。 另一方面，向各個源極驅動用IC55A〜55D分別供給與個 別的預定的時間匹配的起始脈衝，比如，在向源極驅動用 φ IC55A輸入圖像資料信號時，與圖像資料信號a匹配地將 起始脈衝供給到源極驅動用IC55A，使得源極驅動·用IC55A 對處理圖像資料信號進行處理，並向液晶顯示面板5 1的與 各個圖元連接的預定的源極信號線進行個別的輸出。綜上 所述，雖然僅對源極驅動用TCP53A〜53D進行說明，但是 對閘極驅動用TCP52也進行同樣的處理並在液晶顯示面板 5 1上進行預定的圖像顯示。 可是，設置了這樣的TCP52、53A 〜53D的液晶顯示裝 φ 置5 0的圖像資料信號以及電源電壓等，由於從外部電路基 板54向各個TCP個別地供給，所以在外部電路基板54上 需要很多佈線。因此，存在會產生外部電路基板54、TCP52、 53 A〜53D以及液晶顯示面板51的製造工序複雜化，提高 成本以及降低可靠性等的問題。 因此，近年來，爲了減少相對於這樣的TCP的佈線數量’ 開發了一種將輸入到一個TCP的信號等依次向鄰接的TCP 傳送的、採用所謂信號傳送方式的液晶顯示裝置（參見下 面的專利文獻2 )。 1270047 t β 因此，爲了便於對下面的本發明的理解，用第9圖對下 面的專利文獻2中揭示的採用信號傳送方式的液晶顯示裝 置1進行說明。而且，第9圖是在下面的專利文獻2中揭 示的液晶顯示裝置的槪略的俯視圖。 該液晶顯示裝置 1具備：安裝有 TFT ( Thin Film Transistor)的主動矩陣型的液晶顯示面板2;配置在該液 晶顯示面板2的周圍邊緣部分附近的控制電路基板3 ;與 該控制電路基板3連接的、配置在液晶顯示面板2的一個 0 周圍邊緣部分的多個、比如6個TCP上分別承載的源極驅 動電路ST1〜ST6。 而且，各個TCP上的源極驅動電路ST1〜ST6，由配置在 各個TCP上的源極驅動用ICSD1〜SD6,和配置有用於向源 極驅動用1C輸入信號的信號輸入佈線、用於將來自源極驅 動用1C的輸出信號向液晶面板2輸出的第1信號輸出線、 用於將來自源極驅動用1C的輸出信號向鄰接的TCP傳送的 第2信號輸出線、用於驅動源極驅動用1C的電源佈線等的 物體構成。 ® 而且，這些多個源極驅動電路ST1〜ST6分別通過連接線 L 1〜L6來串聯連接，最初的源極驅動電路S T 1和控制電路 基板3用設置在撓性佈線基板FPC上的信號等的供給線7 來連接。控制電路基板3由圖像資料信號控制用IC5以及 電源電路6等構成，使得從圖中未示出的PC等的圖像信號 生成裝置傳輸過來的圖像信號由IC5進行處理。 此外，在液晶顯不面板2的其他的周圍邊緣上，同樣地 設置有在多個T C P上個別地承載的閘極驅動電路G T 1(第9 1270047 圖中僅示出1個），它們也是串聯連接的，最 動電路GT 1與源極驅動電路的場合同樣地，通 出的信號等的供給線並經過撓性佈線基板與 ICGD1連接。 設置這樣的TCP的液晶顯示裝置1，比如， 基板3將圖像資料信號、電源電壓等經過供給 線L1而向第1源極驅動用ICSD1輸入，此時， 分的圖像資料信號用源極驅動用ICSD 1進行處 φ 的液晶顯示面板2的各個圖元的源電極輸出， 的部分的信號以及電源電壓等經過TCP上的佈 面板基板上的連接佈線L 2〜L 6依次向源極驅震 SD6輸出，同樣地通過各個源極驅動用IC SD 2〜 的圖像資料信號向液晶顯示面板2的各個圖元 出。 該場合，在設置於液晶顯示面板2的其他的 上的閘極驅動電路 GT1中，也同樣地通過 ICGD1對閘極控制信號進行處理，並向對應的 板2的各個圖元的柵電極輸出。 因此，根據該液晶顯示裝置1，與使用在失 基板和TCP的裝置相比較，由於能夠大幅度淘 制電路基板3向T C P供給信號等而所需的佈竊 能夠謀求製造成本的降低。 然而，使用這樣的TCP的液晶顯示裝置1 ’ 入到特定的TCP的信號等依次向鄰接的TCP fl 所以用於傳輸信號等的佈線變長’存在佈線陡 初的閘極驅 過圖中未示 閘極驅動用 從控制電路 「線7、連接 其中的一部 理並向對應 同時，其他 線以及液晶 !]用 ICSD2 〜 < SD6將對應 的源電極輸 周圍邊緣部 閘極驅動用 液晶顯示面 的控制電路 少爲了從控 數量，所以 由於是將輸 :輸的方式， 抗增高的問 -10- 1270047 r 名 題。 此外，TCP以及液晶顯示面板，由於形成多個 驅動用1C、閘極驅動用1C等的液晶驅動用1C的 用於液晶顯示面板的驅動的佈線，所以用於形成 等的佈線的空間受到限制。由此，不能增加傳輸 佈線的寬度或厚度，其結果，佈線阻抗增高。該 阻抗化，導致傳輸的信號、尤其電源電壓的電壓 成爲液晶驅動用IC的誤動作的原因。換句話說， 0 壓下降的量，隨著向傳輸方向下流側而依次增大 液晶驅動用1C輸出到液晶顯示面板的電源電壓 的串聯連接組之中的上流側和下流側之間產生 此，比如想要在液晶顯示面板的整個顯示區域上 灰度等級的顯示的場合，在上流側和下流側中產 級的偏差，也成爲顯示品質降低的原因。 而且，在該液晶顯示裝置1中，發現在使用時 常大的電磁干擾（Electro-Magnetic Interference. [EMI])。該EMI產生的原因是，由於源極驅動用 〜SD6的各個圖像資料信號用輸入端子，電並聯 供給圖像資料信號，所以存在沿著液晶顯示面板 的從一個端部的連接佈線L 1到另一個端部的源 ICSD6的範圍中延伸的長的圖像資料信號佈線， 長的圖像資料信號佈線中流動著向源極驅動用 SD6同時並列供給的圖像資料信號，其成爲EMi 因。該液晶顯示裝置1中，在液晶顯示面板2的 置有多條佈線，且該邊緣的大小的增大關係到會 用於源極 佈線以及 傳輸信號 信號等的 佈線的高 下降，而 由於該電 ，所以從 ，在 TCP 差異。因 進行同樣 生灰度等 產生在非 以下稱爲 的 ICSD1 連接周時 2的邊緣 極驅動用 由於在該 ICSD1〜 產生的原 邊緣上設 無用地增 -11- 1270047 * % 加液晶顯示面板2的圖像顯示無關的面積所以不 因此不容易採用另外設置遮罩線（shield line )等 於改善EMI的公知的手段。 另一方面，作爲解決這樣的問題的液晶顯示裝 將串聯連接的多個T C P的串聯連接組在中央部被 分，從各個分開的T C P的串聯連接組的其中一側 向供給圖像資料信號等的液晶顯示裝置。比如’ 第1 0圖的液晶顯示裝置1 ’所示，將串聯連接的 φ 的串聯連接組在中央部分每邊3個地分成2部分 由形成有源極驅動電路ST1〜ST3的TCP構成的 組，和由形成有源極驅動電路ST4〜ST6的TCP 聯連接組，將各個串聯連接組的最初的TCP的源 路ST1以及ST4通過在FPC2以及FPG上形成的 供給線7 ’和7與控制電路基板3連接，而構成爲 電路基板3向各個源極驅動電路S T 1以及S T4進 的供給。 根據採用該方法的液晶顯示裝置1 ’，由於將串 分成2部分，所以分開的2個串聯連接組的長度 可以減少直到串聯連接組的端部的電壓下降，同 給到各個串聯連接組的圖像資料信號減少了一半 能實現減少EMI的效果。 但是，在這種結構的液晶顯示裝置Γ中，在分 串聯連接組之中的端部位於液晶顯示面板的中 TCP的源極驅動電路ST3的附近，由於與源極驅動 附近相比佈線阻抗大，所以到該部分的電壓下降 能採用’ 那樣的用 置，考慮 分成2部 向同一方 考慮到如 多個TCP ，即分成 串聯連接 構成的串 極驅動電 信號等的 從該控制 行信號等 聯連接組 也變短， 時，將供 ，所以也 開的2個 央部分的 丨電路ST1 也變大。 -12- 1270047 » > 與此相對，由於在鄰接源極驅動電路ST3的另一側的源極 驅動電路S Τ4附近實際上不產生電壓降低，所以導致在最 顯眼的液晶顯示面板的顯示區域的中央部中，電源電壓下 降大的圖元區域和電源電壓下降小的圖元區域成一線連 接，會讓人擔心在這個部分產生顯示不均勻現象。此外’ 由於控制電路基板3必須與處於分離的位置上的2個串聯 連接組的最初的TCP的源極驅動電路ST1和ST4連接，所 以控制電路基板3的長度增加，而導致形成大型裝置。 φ 此外，下面的專利文獻2中揭示的液晶顯示裝置，雖然 通過在TC P上形成的信號佈線或電源佈線的配置處或形狀 上面想辦法來謀求實現信號佈線或電源佈線的低阻抗化， 但是不能說做得充分。而且，在上述的在先技術中涉及的 問題，雖然以液晶顯示裝置爲例進行了說明，但在使用電 漿顯示面板的電漿顯示裝置中也會產生同樣的問題。 [專利文獻1] 日本專利特開昭62 — 23 8 684號公報（第1頁右下欄1〜 13行，第2圖） ® [專利文獻2] 日本專利特開200 1 — 05648 1號公報（申請專利範圍，段 落[0002]〜[0013]，[0043]〜[0047]，第 1 圖） 【發明內容】 本發明是著眼於這些在先技術中的問題而成的，本發明 的第1目的是’對於將向具有驅動用1C的一個驅動電路輸 入的信號等依次向鄰接的驅動電路傳輸的、採用所謂信號 傳輸方式的顯示裝置，提供一種能夠防止依次傳輸的電源 -13- 1270047 着 $ 電壓的電壓下降，並防止驅動用1C的誤動作，而提高顯示 品質的顯示裝置。 本發明的第2目的是，對於將向具有驅動用1C的一個驅 動電路輸入的信號等依次向鄰接的驅動電路的傳輸的、採 用所謂信號傳輸方式的顯示裝置，提供一種通過將流動在 圖像資料信號佈線中的圖像資料信號自身進行處理，從而 顯著地減少EMI的產生的顯示裝置。 本發明的第3目的是，對於將向具有驅動用1C的一個驅 φ 動電路輸入的信號等依次向鄰接的驅動電路的傳輸的、採 用所謂信號傳輸方式的顯示裝置，將前述串聯連接的驅動 電路的串聯連接組分成2部分，從分開的2個驅動電路的 串聯連接組的各自一側供給圖像資料信號等的液晶顯示裝 置，提供一種減少在顯示面板中央部以及周圍邊緣部中的 顯示不均勻的顯示裝置。 本發明的上述第1目的可通過下述結構來實現。即，根 據本發明的第1方式，提供一種下述的顯示裝置，其構成 爲：在顯示面板的周圍邊緣部上連接多個具有驅動用1C的 驅動電路，鄰接的驅動電路彼此之間通過在前述顯示面板 上形成的連接用佈線連接，將驅動前述驅動用1C和前述顯 示面板所需要的電源電壓從外部控制電路供給到前述多個 驅動電路的至少一個，從該驅動電路向鄰接的驅動電路依 次供給前述電源電壓，其中：對位於電壓供給方向上流側 的驅動用1C，形成與從該驅動用1C到與電壓供給方向下流 側鄰接的驅動電路的驅動用1C的信號佈線大致等價的佈 線阻抗算出用佈線，前述上流側驅動用1C，通過向前述佈 -14- 1270047 > > 線阻抗算出用佈線的一端輸出算出用電壓並檢測另一端的 電壓來算出佈線阻抗値，基於算出的佈線阻抗値算出電壓 下降値，向下流側驅動電路輸出只提高算出的電壓下降値 的量的電壓値的電源電壓。 在所述方式中，較佳爲，前述驅動電路由將前述驅動用 1C安裝在帶狀基板上的電路構成，前述佈線阻抗算出用佈 線以從構成驅動電路的帶狀基板經由前述顯示面板再返回 到前述帶狀基板上的方式形成。此外，所述方式中，還可 g 以由將前述驅動用1C安裝在前述顯示面板的周圍邊緣部 上的電路構成。 此外，所述方式中，較佳爲，前述驅動用1C具備：電源 電壓輸入的電源電壓輸入端子；生成算出佈線阻抗値用的 算出用電壓的算出用電壓生成部；將來自該算出用電壓生 成部的算出用電壓輸出到前述佈線阻抗算出用佈線的一端 的算出用電壓輸出端子；來自前述佈線阻抗算出用佈線的 另一端的輸出電壓輸入的檢出端子；基於前述算出用電壓 和來自前述檢出端子的檢出電壓而算出佈線阻抗値的佈線 w 阻抗算出部；在供給從前述電源電壓輸入端子輸入的電源 電壓的同時，基於算出的佈線阻抗値算出電壓下降値，並 將前述電源電壓的電壓値只增加算出的電壓下降値的電源 電壓加算部；輸出來自該電源電壓加算部的電源電壓的電 源電壓輸出端子，進而較佳爲，前述電源電壓是驅動用1C 的工作用電源電壓以及向顯示面板供給的顯示用電源電 壓。 這些第1方式的顯示裝置，可以適用於液晶顯示裝置或 -15- 1270047 電漿顯示裝置。 此外，本發明的上述第2目的能夠通過下賴)的結構來實 現。即，根據本發明的第2形式，提供一種下述的顯示裝 置，其構成爲：在顯示面板的周圍邊緣部上連接多個具有 驅動用1C的驅動電路，鄰接的驅動電路彼此之間通過在前 述顯示面板上形成的連接用佈線連接，將驅動前述驅動用 IC和前述顯示面板所需要的電源電壓從外部控制電路供給 到前述多個驅動電路的至少一個，從該驅動電路向鄰接的 驅動電路依次供給前述電源電壓，其中：前述驅動用1C， 在輸入的圖像資料信號之中，將除了處理的圖像資料信號 之外的其他圖像資料信號輸出到鄰接的下一個驅動用1C。 在所述方式中，較佳爲，前述驅動電路由將前述驅動用 1C安裝在帶狀基板上的電路構成，前述佈線阻抗算出用佈 線以從構成驅動電路的帶狀基板經由前述顯示面板再返回 到前述帶狀基板上的方式形成。此外，所述方式中，還可 以由將前述驅動用1C安裝在前述顯示面板的周圍邊緣部 上的電路構成。 此外，所述方式的液晶顯示裝置中，較佳爲，前述驅動 用1C具備圖像資料輸出控制電路，前述圖像資料輸出控制 電路，將對應輸入到前述驅動用1C的初始脈衝的圖像資料 信號之外的其他圖像資料信號向鄰接的下一個驅動用1C 輸出，此外，較佳爲，前述圖像資料輸出控制電路，由在 向前述源極驅動用1C輸入起始脈衝的期間不通過圖像資 料信號，在沒有向前述源極驅動用1C輸入起始脈衝的期間 通過前述圖像資料信號的電路構成。 -16 - 1270047 示裝置 實現。 顯示裝 連接N 的驅動 佈線連 電源電 一個， 電壓， 在中央 壓分別 動用1C 阻抗算 示面板 式中， 周圍邊 路和前 液晶顯 這些第2方式的顯示裝置，也可以適用於液晶顯 或電紫顯示裝置。 本發明的上述第3目的能夠通過下琴的結構來 即，根據本發明的第3形式，提供一種下述的液晶 置’該顯示裝置構成爲：在顯示面板的周圍邊緣部 個（其中，N>2 )具有驅動用1C的驅動電路，鄰接 電路彼此之間通過在前述顯示面板上形成的連接用 接，將驅動前述驅動用IC和前述顯示面板所需要的 壓從外部控制電路供給到前述多個驅動電路的至少 從該驅動電路向鄰接的驅動電路依次供給前述電源 其中：將串聯連接前述N個驅動電路的串聯連接組 部分成2部分，將來自前述控制電路的信號以及電 供給到夾住前述分割處而鄰接的2個驅動電路。 所述方式中，較佳爲，前述驅動電路由將前述驅 安裝在帶狀基板上的電路構成，較佳爲，前述佈線 出用佈線以從構成驅動電路的帶狀基板經由前述顯 再返回到前述帶狀基板的方式形成。此外，所述方 還可以由將前述驅動用1C安裝在前述顯示面板的 緣部上的電路構成。 · 此外，所述方式中，較佳爲，將連接前述控制電 述液晶顯示面板的1條或2條撓性佈線基板配置在 示面板的周圍邊緣的中央。[Technical Field] The present invention relates to a display device such as a liquid crystal display device or a plasma display device, and more particularly to a respective load including a gate drive 1C and a source drive 1C. There are a plurality of display devices in which drive circuits of 1 C are connected in series to be mounted on the peripheral edge of the display panel. [Prior Art] A display device such as a liquid crystal display device and a plasma display device generally has a display panel and a control circuit for driving the display panel, and a plurality of TCPs (Print Carriers) for mounting the driving 1C on the strip substrate. Package) Make a connection. Each of these TCPs is composed of a plurality of source drive TCPs and gate drive TCPs, and these TCPs are connected to an external circuit board, and image data signals, power supply voltages, and the like are supplied from the external circuit boards to the respective TCPs, and are transmitted through the respective TCPs. The liquid crystal display panel 1C is driven by the liquid crystal driving 1C composed of the gate driving 1C and the source driving 1C (see Patent Documents 1 and 2 below). The operation principle of such a TCP liquid crystal display device is shown in Fig. 7 (including Fig. 7A and Fig. 7B) and Fig. 8. 7A is a schematic diagram of a TCP liquid crystal display device, and FIG. 7B is a schematic diagram of a source driving TCP (or a gate driving TCP) carried in FIG. 7A, and FIG. 8 is a diagram for explaining each The time map of the flow of each material in the TCP for the source drive. In the seventh embodiment, the TCP liquid crystal display device 50 includes a gate signal for the liquid crystal display panel 51 on the peripheral edge of the active matrix liquid crystal display panel 51 on which a TFT (Thin Film Transistor) is mounted. Line 1270047 • ^ and a plurality of gate drive TCPs 52 for source signal line supply signals and a source drive TCP 53; for supplying image data signals, clock signals, 1C drive power supply voltages, and opposites to respective TCPs 52 and 53 The external circuit board 54 that drives the signal of the liquid crystal display panel such as the power supply voltage for driving the electrodes. The gate drive TCP 52 and the source drive TCP 53 include, for example, a source drive IC 55 on the flexible substrate 56, and various drivers for supplying the liquid crystal display panel to the source drive IC 55 as shown in FIG. A signal supply wiring 57 for signal, and a signal output wiring 58 for supplying a signal output from the source driving IC 55 to the liquid crystal φ display panel 51. The signal supply wiring 57 of each of the above-described TCPs 52, 53 is electrically connected to a terminal on the external circuit substrate 54 in the vicinity of the liquid crystal display panel 51 as shown in Fig. 7 from the image provided on the external circuit substrate 54. The data processing IC 5 9 (see Fig. 8) and a power supply circuit (not shown) introduce a liquid crystal display panel driving signal to the source driving IC 55. Further, an image signal from an image signal generating device such as a PC which is not additionally shown in the drawing is input to the image data processing IC 59. The case where the φ is the source driving TCP 53 is taken as an example, and the operation principle of the TCP liquid crystal display device 50 will be described with reference to Fig. 8. The liquid crystal display device 50 shown in Fig. 8 includes, for example, four source drive TCPs 53A to 53D, and the source drive ICs 53A to 55D are respectively carried by the source drive TCPs 53A to 53D. Further, in the liquid crystal display device 50, a plurality of gate driving TCPs 52 are connected, but only one is shown in Fig. 8. The image signal from the image signal generating device of the PC or the like is processed by the image data processing IC 59, and the predetermined continuous image data signals a to d are passed through each of the scanning periods synchronized with the clock signal. Signal 1270047 « / Supply wirings 57 A to 57D are simultaneously supplied to the source driving Ic 5 5 A to 5 5 D carried on the respective source driving TCPs 5 3 A to 5 3 D. Further, the image data signals a to d are signals formed in accordance with a pulse sequence of the number of source signal lines of the liquid crystal display panel 51 connected to the respective source drive ICs 55A to 55D, but In order to facilitate the description in Fig. 8, it is shown as a single pulse including image data signals a to d. On the other hand, each of the source drive ICs 55A to 55D is supplied with a start pulse that matches an individual predetermined time, for example, when an image data signal is input to the source drive φ IC 55A, and the image data signal a The start pulse is supplied to the source driving IC 55A in a matching manner, so that the source driving IC 55A processes the processed image data signal and supplies the predetermined source signal line to the respective pixels of the liquid crystal display panel 51. Make individual outputs. As described above, only the source drive TCPs 53A to 53D are described. However, the gate drive TCP 52 performs the same processing and performs predetermined image display on the liquid crystal display panel 51. However, the image data signal, the power supply voltage, and the like of the liquid crystal display device φ 50 of the TCPs 52 and 53A to 53D are separately supplied from the external circuit board 54 to each of the TCPs, so that it is required on the external circuit board 54. A lot of wiring. Therefore, there are problems in that the manufacturing processes of the external circuit board 54, the TCPs 52, 53 A to 53D, and the liquid crystal display panel 51 are complicated, the cost is increased, and the reliability is lowered. Therefore, in recent years, in order to reduce the number of wirings with respect to such TCP, a liquid crystal display device using a so-called signal transmission method in which a signal input to a TCP or the like is sequentially transmitted to an adjacent TCP has been developed (see the following patent document). 2 ). 1270047 t β Therefore, in order to facilitate the understanding of the present invention, the liquid crystal display device 1 using the signal transmission method disclosed in Patent Document 2 below will be described with reference to FIG. Further, Fig. 9 is a schematic plan view of the liquid crystal display device disclosed in Patent Document 2 below. The liquid crystal display device 1 includes an active matrix liquid crystal display panel 2 on which a TFT (Thin Film Transistor) is mounted, a control circuit board 3 disposed in the vicinity of a peripheral edge portion of the liquid crystal display panel 2, and a control circuit board 3 connected thereto. The source drive circuits ST1 to ST6 are respectively disposed on a plurality of, for example, six TCPs of a peripheral edge portion of the liquid crystal display panel 2. Further, the source drive circuits ST1 to ST6 on the respective TCPs are provided with source drive ICSD1 to SD6 disposed on each of the TCPs, and signal input wirings for inputting signals for input to the source drive 1C for use in The first signal output line for outputting the source drive 1C output signal to the liquid crystal panel 2, and the second signal output line for transmitting the output signal from the source drive 1C to the adjacent TCP for driving the source drive It is composed of an object such as a 1C power supply wiring. Further, the plurality of source drive circuits ST1 to ST6 are connected in series by the connection lines L1 to L6, and the first source drive circuit ST1 and the control circuit board 3 are connected to signals on the flexible wiring board FPC. The supply line 7 is connected. The control circuit board 3 is composed of an image data signal control IC 5, a power supply circuit 6, and the like, so that an image signal transmitted from an image signal generating device such as a PC (not shown) is processed by the IC 5. Further, on the other peripheral edges of the liquid crystal display panel 2, the gate driving circuits GT 1 individually carried on the plurality of TCPs are similarly provided (only one is shown in the figure 9 1247047), which are also connected in series. In the same manner as in the case of the source drive circuit, the feeder circuit GT 1 is connected to the ICGD 1 via a flexible wiring board. In the liquid crystal display device 1 of the above-described TCP, for example, the substrate 3 inputs an image data signal, a power supply voltage, and the like to the first source driving ICSD1 via the supply line L1, and at this time, the source of the image data signal is divided. The drive ICSD 1 performs the source electrode output of each pixel of the liquid crystal display panel 2 at the φ, and the power supply voltage and the like are sequentially driven to the source via the connection wirings L 2 to L 6 on the panel substrate on the TCP. The SD6 output is similarly outputted to the respective elements of the liquid crystal display panel 2 by the image data signals of the respective source driving ICs SD 2 to . In this case, in the gate driving circuit GT1 provided in the other liquid crystal display panel 2, the gate control signal is processed by ICGD1 in the same manner, and is output to the gate electrode of each element of the corresponding panel 2. Therefore, according to the liquid crystal display device 1, compared with the device using the substrate and the TCP, it is possible to significantly reduce the manufacturing cost by smashing the signal required to supply the circuit board 3 with a signal or the like to the T C P . However, the liquid crystal display device 1' using such a TCP input signal to a specific TCP or the like sequentially goes to the adjacent TCP fl, so that the wiring for transmitting a signal or the like becomes long, and the gate having the wiring is steep is not shown in the figure. For the gate drive, the control circuit "line 7, connect one of them, and the other lines and the liquid crystal!" use ICSD2 to < SD6 to input the corresponding source electrode to the peripheral edge gate drive liquid crystal display surface. The control circuit is less in order to control the number, so because it is the way to lose: the way to increase the resistance -10- 1270047 r. In addition, TCP and liquid crystal display panels, due to the formation of multiple drive 1C, gate drive Since 1C of the wiring for driving the liquid crystal display panel is driven by the liquid crystal of 1C or the like, the space for forming the wiring is restricted. Therefore, the width or thickness of the transmission wiring cannot be increased, and as a result, the wiring impedance is increased. This impedance causes the transmitted signal, in particular, the voltage of the power supply voltage, to cause malfunction of the liquid crystal driving IC. In other words, the amount of 0 voltage drop follows This occurs between the upstream side and the downstream side of the series connection group in which the power supply voltage of the liquid crystal display panel 1C is sequentially outputted to the downstream side of the liquid crystal display panel, for example, it is desired to be grayed out over the entire display area of the liquid crystal display panel. In the case of the display of the degree level, the variation in the production level on the upstream side and the downstream side is also a cause of deterioration in display quality. Further, in the liquid crystal display device 1, electromagnetic interference (Electro-Magnetic Interference.) which is often large in use is found. [EMI]) This EMI is caused by the fact that the image data signals are supplied in parallel to the input terminals of the image data signals of the source drive to SD6, so there is an end portion of the liquid crystal display panel from one end. a long image data signal line extending in the range of the source ICSD6 connecting the wiring L1 to the other end, and an image data signal which is simultaneously supplied to the source driving SD6 in a long image data signal wiring, This is an EMi factor. In the liquid crystal display device 1, a plurality of wirings are disposed on the liquid crystal display panel 2, and the increase in the size of the edge is related to The wiring for the source wiring and the transmission signal signal is high, and because of this power, the difference in the TCP is caused by the same gradation, etc., which is generated at the edge of the ICSD1 connection week. The drive is used because the image displayed on the original edge of the ICSD1~ is uselessly increased by -11-1270047*% and the image display of the liquid crystal display panel 2 is irrelevant. Therefore, it is not easy to additionally set a shield line equal to In the liquid crystal display device that solves such a problem, a series connection group of a plurality of TCPs connected in series is divided in the center portion, and one side of each of the series connection groups of the separate TCPs is divided. A liquid crystal display device that supplies an image data signal or the like. For example, as shown in the liquid crystal display device 1' of the FIG. 10, a series connection group of φ connected in series is divided into two groups of three sides of the central portion by TCP forming the source driving circuits ST1 to ST3. With the TCP connection group forming the source drive circuits ST4 to ST6, the first TCP source paths ST1 and ST4 of the respective series connection groups pass through the supply lines 7' and 7 formed on the FPC 2 and the FPG and the control circuit. The substrate 3 is connected to each other, and is configured to supply the circuit board 3 to the respective source drive circuits ST 1 and ST 4 . According to the liquid crystal display device 1' adopting the method, since the string is divided into two parts, the length of the two separate series connection groups can be reduced until the voltage drop at the end of the series connection group is the same as that given to each series connection group. A halving of the data signal can reduce EMI. However, in the liquid crystal display device of such a configuration, the end portion of the sub-series connection group is located in the vicinity of the source driving circuit ST3 of the middle of the liquid crystal display panel, and the wiring impedance is larger than that in the vicinity of the source driving. Therefore, the voltage drop to this part can be used as the same, and it is considered to be divided into two parts, such as a plurality of TCPs, that is, a series-connected electric signal composed of a series connection, and the like, which are connected to the same side. When the connection group is also shortened, it will be supplied, so the 丨 circuit ST1 of the two central portions that are also turned on also becomes large. -12- 1270047 » > In contrast, since the voltage drop does not actually occur in the vicinity of the source drive circuit S Τ4 on the other side of the adjacent source drive circuit ST3, the display area of the most conspicuous liquid crystal display panel is caused. In the central part, the picture element area where the power supply voltage drops greatly and the picture element area where the power supply voltage drops are connected in a line, which causes a fear of display unevenness in this part. Further, since the control circuit board 3 must be connected to the first TCP source drive circuits ST1 and ST4 of the two series connection groups at the separated positions, the length of the control circuit board 3 is increased to cause the formation of a large-sized device. In addition, in the liquid crystal display device disclosed in the following Patent Document 2, the signal wiring or the power supply wiring is reduced in impedance by the arrangement or shape of the signal wiring or the power supply wiring formed on the TC P. Can't say that it is done adequately. Further, although the liquid crystal display device has been described as an example in the above-described prior art, the same problem occurs in the plasma display device using the plasma display panel. [Patent Document 1] Japanese Patent Laid-Open Publication No. SHO 62-23 No. 684 (page 1 of the lower right column 1 to 13 lines, Fig. 2) ® [Patent Document 2] Japanese Patent Laid-Open No. 2001-00648 No. 1 (Patent Application Scope, Paragraphs [0002] to [0013], [0043] to [0047], Fig. 1] SUMMARY OF THE INVENTION The present invention has been made in view of the problems of the prior art, and the present invention The purpose of the present invention is to provide a display device using a so-called signal transmission method for sequentially transmitting a signal or the like input to a drive circuit having a drive 1C to an adjacent drive circuit, and to provide a power supply capable of preventing sequential transmission - 13 - 1270047 The voltage of the voltage is lowered, and the display device that improves the display quality by driving the 1C malfunction is prevented. A second object of the present invention is to provide a display device using a so-called signal transmission method for sequentially transmitting a signal or the like input to a drive circuit having a drive 1C to an adjacent drive circuit, by providing a flow in an image. The image data signal in the data signal wiring itself is processed, thereby significantly reducing the display device of EMI generation. A third object of the present invention is to provide a display device using a so-called signal transmission method in which a signal input to a drive circuit having a drive 1C for driving is sequentially transmitted to an adjacent drive circuit, and the series-connected drive is used. The series connection component of the circuit is divided into two parts, and a liquid crystal display device that supplies an image data signal or the like from each side of the series connection group of the two separate drive circuits provides a display that is reduced in the central portion and the peripheral edge portion of the display panel. Uneven display device. The above first object of the present invention can be achieved by the following configuration. According to a first aspect of the present invention, there is provided a display device comprising a plurality of driving circuits having a driving 1C connected to a peripheral edge portion of a display panel, wherein adjacent driving circuits pass between each other The connection wiring formed on the display panel is connected, and a power supply voltage required to drive the driving 1C and the display panel is supplied from an external control circuit to at least one of the plurality of driving circuits, and the driving circuit is adjacent to the driving circuit. The power supply voltage is sequentially supplied to the drive 1C located on the upstream side in the voltage supply direction to form a wiring substantially equivalent to the signal wiring of the drive 1C from the drive 1C to the drive circuit adjacent to the downstream side in the voltage supply direction. In the impedance calculation wiring, the upstream side driving 1C outputs the calculation voltage to one end of the wire impedance calculation wiring and detects the voltage at the other end to calculate the wiring impedance 値. The wiring impedance 値 calculates the voltage drop 値, and the output of the downstream side drive circuit increases only the calculated voltage. The amount of voltage that drops 値 is the supply voltage of 値. In the above aspect, the drive circuit is configured by a circuit for mounting the drive 1C on a strip substrate, and the wiring impedance calculation wiring is returned from the strip substrate constituting the drive circuit via the display panel. It is formed in such a manner as to be on the above-mentioned strip substrate. Further, in the above aspect, g may be formed by a circuit in which the driving 1C is mounted on a peripheral edge portion of the display panel. Further, in the above-described aspect, the driving 1C includes a power supply voltage input terminal for inputting a power supply voltage, a calculation voltage generating unit for generating a calculation voltage for calculating a wiring impedance, and a voltage for generating the calculation voltage. a voltage for calculation of the portion is output to the calculation voltage output terminal of one end of the wiring impedance calculation wiring; a detection terminal for inputting an output voltage from the other end of the wiring impedance calculation wiring; and the calculation voltage and the detection A wiring w impedance calculating unit that calculates a wiring impedance 出 by detecting a voltage of the terminal, and supplies a power supply voltage input from the power supply voltage input terminal, and calculates a voltage drop 基于 based on the calculated wiring impedance 値, and the power supply voltage The voltage 値 increases only the calculated voltage drop 値 power supply voltage adding unit; the power supply voltage output terminal that outputs the power supply voltage from the power supply voltage adding unit, and further preferably, the power supply voltage is the operating power supply voltage for the driving 1C and the direction The display power supply voltage supplied by the display panel. The display device of the first aspect can be applied to a liquid crystal display device or a -15-1270047 plasma display device. Further, the above second object of the present invention can be achieved by the configuration of the present invention. According to a second aspect of the present invention, there is provided a display device comprising: a plurality of driving circuits having driving 1C connected to a peripheral edge portion of a display panel, wherein adjacent driving circuits pass between each other The connection wiring formed on the display panel is connected, and a power supply voltage required to drive the driving IC and the display panel is supplied from an external control circuit to at least one of the plurality of driving circuits, and the driving circuit is adjacent to the driving circuit. The power supply voltage is sequentially supplied, wherein the drive 1C outputs an image data signal other than the processed image data signal to the adjacent next drive 1C among the input image data signals. In the above aspect, the drive circuit is configured by a circuit for mounting the drive 1C on a strip substrate, and the wiring impedance calculation wiring is returned from the strip substrate constituting the drive circuit via the display panel. It is formed in such a manner as to be on the above-mentioned strip substrate. Further, in the above aspect, the driving 1C may be formed by a circuit mounted on the peripheral edge portion of the display panel. Further, in the liquid crystal display device of the above aspect, preferably, the driving 1C includes an image data output control circuit, and the image data output control circuit inputs image data corresponding to an initial pulse of the driving 1C. The image data signal other than the signal is output to the next adjacent drive 1C. Preferably, the image data output control circuit does not pass during the input of the start pulse to the source drive 1C. The image data signal is formed by a circuit that passes the image data signal while the start pulse is not input to the source driving 1C. -16 - 1270047 Display device implementation. The display driver with the connection N is connected to the power supply. The voltage is used in the 1C impedance calculation panel type in the central pressure. The peripheral side and front LCD display these 2nd display devices can also be applied to liquid crystal display or electricity. Purple display device. According to a third aspect of the present invention, in a third aspect of the present invention, according to a third aspect of the present invention, the display device is configured such that the display device is configured to have a peripheral edge portion of the display panel (where N> 2) a driving circuit having a drive 1C, and the adjacent circuits are connected to each other through a connection connection formed on the display panel, and the voltage required to drive the driving IC and the display panel is supplied from the external control circuit to the aforementioned At least from the driving circuit to the adjacent driving circuit, the power supply is sequentially supplied to the adjacent driving circuit: the series connection group connecting the N driving circuits in series is divided into two parts, and signals and electricity from the control circuit are supplied to the clamping unit. Two drive circuits adjacent to each other in the above division. In the above aspect, preferably, the driving circuit is configured by a circuit for mounting the driving on the strip substrate. Preferably, the wiring for discharging is returned from the strip substrate constituting the driving circuit via the display to the display. The strip substrate is formed in the form of the above. Further, the above-mentioned side may be constituted by a circuit in which the above-described driving 1C is mounted on the edge of the display panel. Further, in the above aspect, preferably, one or two flexible wiring boards to which the control liquid crystal display panel is connected are disposed at the center of the peripheral edge of the display panel.

進而，所述方式中，較佳爲，將從前述控制電路向夾住 前述分割處而鄰接的2個TCP供給的信號的送出順序設 爲，向一邊的TCP爲正方向的送出順序，向另一邊的TCP 1270047 t > 爲逆方向的送出順序，在該場合，較佳爲，在前述控制電 路和另一個TCP之間配置由線路記憶體和匯流排驅動器的 方向開關構成的定時控制器，通過前述定時控制器將從前 述控制電路送出的正方向的送出順序的信號轉換成逆方 向。 根據本發明的第1方式的顯示裝置，電壓供給方向上流 側的驅動用1C，向下流側驅動電路輸出電壓値上升的電源 電壓，該上升的電壓値僅爲利用佈線阻抗算出用佈線算出 I 的電壓下降値。輸出的電源電壓，通過構成驅動電路的基 板上的信號佈線或顯示面板上的連接用佈線，供給到下流 側驅動電路的驅動用1C。 供給到下流側驅動用1C的電源電壓，雖然通過佈線導致 電壓値下降，但由於在從上流側驅動用1C輸出的時刻按照 電流下降値預先提高了電壓値，所以供給到下流側驅動用 1C的電源電壓，成爲驅動用IC正常工作所需要的電壓値。 因此，在下流側驅動用1C中，由於分別供給了合適的電壓 0 値的電源電壓，所以能夠防止驅動用1C的誤動作。由此， 能夠使顯示裝置正常地工作。 該場合，驅動電路爲由將驅動用I c安裝在帶狀基板上的 電路、即TCP電路構成的場合，由於形成從該帶狀基板經 由顯示面板再返回到前述基板上的佈線阻抗算出用佈線， 所以能夠與從上流側驅動用1C到下流側驅動用1C的信號 佈線以大致等價的條件形成佈線阻抗算出用佈線。換句話 說’在上流側驅動用1C和下流側驅動用1C之間的佈線， 區分爲上流側驅動電路的基板上的佈線、顯示面板上的連 -18- 1270047 接用佈線、下流側驅動電路的基板上的佈線等3種佈線。 另一·方面，由於佈線阻抗算出用佈線’也以從構成驅動電 路的基板經由顯示面板再返回到前述基板上的方式形成’ 所以區分爲構成驅動電路的基板上的第1佈線、顯示面板 上的佈線、前述基板上的第2佈線等3種佈線。 而且，第1佈線與上流側驅動電路的基板上的佈線對 應，顯示面板上的佈線與顯示面板上的連接用佈線對應， 第2佈線與下流側驅動電路的基板上的佈線對應。因此， p 能夠與從上流側驅動用1C到下流側驅動用1C的信號佈線 以大致等價的條件形成佈線阻抗算出用佈線。由此，能夠 高精度地求出，從上流側驅動用1C到下流側驅動用1C的 信號佈線的佈線阻抗値和電壓下降値。 此外，根據第1方式的顯示裝置，電壓供給方向上流側 的驅動用1C，向下流側驅動電路輸出電壓値上升的電源電 壓’該上升的電壓値僅爲利用佈線阻抗算出用佈線算出的 電壓下降値。輸出的電源電壓，通過連接用佈線，供給到 0 下流側驅動用1C。供給到下流側驅動用1C的電源電壓，雖 然通過連接用佈線導致電壓値下降，但由於在上流側驅動 用1C輸出的時刻按照電壓下降値預先提高了電壓値，所以 供給到下流側驅動用IC的電源電壓，成爲驅動用1C正常 工作所需要的電壓値。因此，在下流側驅動用1C中，由於 分別供給了具有合適的電壓値的電源電壓，能夠防止驅動 用1C的誤動作。由此，能夠使顯示裝置正常地工作。 此外，根據所述第1方式的顯示裝置，在上流側從鄰接 的驅動用1C供給的電源電壓，通過連接用佈線從電源電壓 -19- 1270047 » > 輸入端子輸入到驅動用1C。驅動用IC，基於輸入的電源電 壓執行預定的動作，並將驅動信號輸出到顯示面板。另一 方面，驅動用1C中，將用算出用電壓生成部生成的算出用 電壓從算出用電壓輸出端子輸出到佈線阻抗算出用佈線的 一端，將來自該佈線阻抗算出用佈線的另一端的輸出電壓 從檢出端子輸入。在佈線阻抗算出部中，基於輸出的算出 用電壓和從檢出端子輸入的檢出電壓來算出佈線阻抗値， • 進而在電源電壓加算部中，基於算出的佈線阻抗値來算出 P 電壓下降値，將電源電壓的電壓値僅按照算出的電壓下降 値進行增加。來自電源電壓加算部的電源電壓，從電源電 壓輸出端子輸出，通過連接用佈線，供給到在下流側鄰接 的驅動用1C。根據這樣的結構，能夠將根據佈線阻抗導致 的電壓下降値進行了增加的電源電壓供給到下流側的驅動 用1C。 此外，根據本發明的第1方式的顯示裝置，由於以合適 的電壓値供給了各個驅動用1C工作用的電源電壓，所以能 夠防止驅動用1C的誤動作，使顯示裝置正常地工作。此 外’由於以合適的電壓値向各個驅動用1C供給了顯示用電 源電壓’所以能夠從各個驅動用1C向顯示面板分別供給合 適的驅動信號，降低灰度的等級偏差等的顯示不均勻現 象’能夠提高顯示裝置的顯示品質。 根據本發明的第2方式，由於在預定的驅動用ic中處理 的圖像資料信號對於其他驅動用1C來說是不需要的信 號’所以從驅動用1C輸出的圖像資料信號在每通過驅動用 Ϊ c時就會減少’所以即使存在沿著顯示面板的邊緣的從一 -20- 1270047 _ > 個端部的驅動電路到另一個端部的驅動電路延伸 像資料信號用佈線，也能大量減少該圖像資料信 EMI的產生。 此外，所述第2方式中，由於前述源極驅動用 與輸入的初始脈衝對應的圖像資料信號並輸出 板，所以能夠通過將除了與該初始脈衝對應的圖 號之外的其他圖像資料信號輸出到鄰接的下一 1C，來容易地將需要的圖像資料信號輸出到鄰接 g 1C，而且，能夠通過簡單的開關電路就可以僅選 需要的圖像資料信號。 此外，根據本發明的第3方式，由於將串聯連 動電路的串聯連接組在中央部分成2部分，所以 開的各個串聯連接組的長度，而且，由於來自前 路的信號等分別供給到夾住分開處而鄰接的2 路，所以在減小了直到分開的各個串聯連接組的 壓下降的同時使各自的電壓下降量實際上相同， 作爲最顯眼的處所的液晶顯示面板的中央部中的 ^ 勻現象的同時減少了在周圍邊緣部的顯示不均勻 生。此外，由於與控制電路連接的2個驅動電路 處而鄰接，所以能夠用1條FPC至2條短的FPC 路連接的同時’—得佈線的連接容易進行。 進而，所述方式中，控制電路，由於與在分割虔 個驅動電路連接’所以不必將佈，線一直延伸到、液 板的端部’就能夠^吏？空制1 s @ s _ /J、°而1 ’ 連接多個驅動電g各的串聯連接組在中央部被分成 的長的圖 號引起的 ic，處理 到顯示面 像資料信 個驅動用 的驅動用 擇並輸出 接多個驅 縮短了分 述控制電 個驅動電 端部的電 所以消除 顯示不均 現象的產 夾住分開 與控制電 I鄰接的2 晶顯示面 由於串聯 2部分， -21- 1270047 ' > 所以分別供給到2個串聯連接組的圖像資料信號減少了一 半，所以EMI也減少。 該場合，如果將串聯連接驅動電路的串聯連接組在中央 部被分成2部分，將來自控制電路的信號分別按原樣供給 到夾住前述分開處而鄰接的2個驅動電路上的驅動用1C的 話，由於供給到一個驅動電路的信號爲正方向的送出順序 而在另一個方向中爲逆方向的送出順序，所以在另一方向 中不能進行正常的圖像顯示，但可以通過將供給到前述另 g —個的驅動電路的信號的送出順序轉換成逆方向’就能夠 進行正常的圖像顯示。而且，通過使用由線路記憶體和匯 流排驅動用的雙方向開關携成的定時控制器，能夠用簡單 的結構，將向前述另一個驅動電路供給的信號的送出順序 設成逆方向。 【實施方式】 下面，對與本發明相關的液晶顯示裝置的實施形式參照 附圖進行詳細說明。但是，下面所示的實施形式，僅僅是 示出作爲用於將本發明的技術思想具體化的顯示裝置的液 晶顯示裝置的一個例子，並不是將本發明特定於該液晶顯 示裝置的，還可以同樣地適用於使用電漿顯示面板的電漿 顯示裝置等中的。而且，下面的說明中，與第9圖〜第10 圖所示的在先的例子的液晶顯示裝置同樣的構成元件賦予 相同的附圖標記而進行說明。 [實施例1] 由於實施例1的液晶顯示裝置1 A的槪略的構成與第9圖 所示的在先的例子的液晶顯示裝置1大部分相同，所以對 -22· 1270047 其進行採用，進而參照第1圖和第2圖對本實施例1的液 晶顯示裝置1 A進行說明。而且，第1圖是表示構成實施例 1的液晶顯示裝置1 A的液晶顯示面板和源極驅動電路之間 的連接關係的俯視圖，第2圖是表示具備源極驅動電路的 驅動用I C的構成的方塊圖。 如第9圖所示，本實施例1的液晶顯示裝置1 A，具備液 晶顯示面板2、在液晶顯示面板2的周圍邊緣部上配置的 控制電路3和多個驅動電路S T 1〜S T6、GT 1而構成。 g 液晶顯示面板2是比如使用TFT的主動矩陣型的液晶顯 示面板。使用TFT的主動矩陣型液晶顯示面板，在主動矩 陣基板和對置基板之間插設液晶層而構成，該主動矩陣基 板中，與在玻璃等的透明基板上行列狀地排列的多個圖元 電極分別對應地設置有作爲開關元件的TFT ;該對置基板 中，在透明基板的基本整個表面上形成有一片公共電極。 主動矩陣基板，在透明基板上，形成相互平行的多個閘 極信號線、和與閘極信號線正交的同時相互平行的多個源 極信號線，在閘極信號線和源極信號線所劃分的矩形區域 ^ 內形成圖元電極和TFT。TFT的汲極與圖元電極連接，閘 極與閘極信號線連接，源極與源極信號線連接。一方面， 閘極信號線形成爲它的一端延伸到透明基板的一邊側的周 圍邊緣部，該一端部成爲輸入端子。此外，源極信號線也 有一端延伸到透明基板的一邊側的周圍邊緣部，該端部成 爲輸入端子。而且，由於閘極信號線和源極信號線’如上 所述在相互正交的方向上形成’所以閘極信號線的輸入端 子形成的一邊側周圍邊緣部’和源極信號線的輸入端子形 -23- 1270047 r 成的一邊側周圍邊緣部，如第9圖所示，成爲在透明基板 上鄰接的位置關係。 在源極信號線的輸入端子上連接源極驅動電路S T 1〜 ST6 (在統稱時，使用附圖標記“ ST” ）。源極驅動電路 ST，用TCP構成。例如，源極驅動電路ST1在撓性基板SB 1 上安裝驅動用ICSD1的同時，形成大量的信號佈線而構 成。該信號佈線之中，包含用於將從驅動用IC SD1輸出的 源極信號（施加在圖元上的顯示電壓）供給到前述源極信 號線的輸入端子的多個源極信號輸出用佈線。通過夾設各 ¥ 向異性導電膜並進行熱壓接’來連接源極驅動電路ST 1和 液晶顯示面板2，使得源極信號輸出用佈線和源極信號線 的輸入端子電連接。對於其他的源極驅動電路ST2〜ST6， 其結構以及與液晶顯示面板2之間的連接關係，與源極驅 動電路ST1相同。 此外，在閘極信號線的輸入端子上連接閘極驅動電路 GT1。第9圖中，僅示出1個閘極驅動電路GT 1，但實際上 連接有多個閘極驅動電路。閘極驅動電路GT1用TCP構 ^ 成，具體而言，在撓性基板GB1上安裝驅動用ICGD1的同 時，形成大量的信號佈線而構成。在該信號佈線之中，包 含用於將從驅動用ICGD1輸出的閘極信號（TFT的導通/ 截止電壓）供給到前述閘極信號線的輸入端子的多個閘極 信號輸出用佈線。通過夾設各向異性導電膜並進行熱壓 接，來連接閘極驅動電路GT 1和液晶顯示面板2，使得閘 極信號輸出用佈線和閘極信號的輸入端子電連接。對於圖 中未示出的其他閘極驅動電路，其結構以及與液晶顯示面 -24- 1270047 t » 板2之間的連接關係，與閘極驅動電路GT 1相同。 這樣地，在液晶顯示面板2的周圍邊緣部上，連接有多 個驅動電路ST1〜ST6、GT卜這些驅動電路ST1〜ST6、GT1 根據從控制電路3供給的各種電源電壓、圖像資料以及控 制信號而進行工作。控制電路3通過在基板4上形成控制 用IC5、電源電路6和大量的信號佈線而構成。控制電路3 經由信號供給用FPC ( Flexible Printed Circuit :撓性佈線 基板）7與液晶顯示面板2連接。控制用IC5輸出在液晶顯 示面板2上顯示的圖像資料、或控制驅動電路ST1〜ST6、 ® GT 1的控制信號等。此外，電源電路6，生成並輸出構成驅 動用ICSD1〜SD7、GDI的工作電源的類比電源電壓或用於 進行液晶顯示面板2的灰度顯示的灰度電源電壓等的各種 電源電壓。 包含從控制電路3輸出的圖像資料、控制信號、各種電 源電壓的各種信號，經由信號供給用FPC7供給到液晶顯示 面板2。在液晶顯示面板2的周圍邊緣部上，形成有用於 連接信號供給用FPC7和源極驅動電路ST 1以及閘極驅動電 ® 路GT 1的連接用佈線，同時形成有用於連接相互鄰接的驅 動電路彼此的連接用佈線。這樣，從控制電路3所供給的 各種信號，如第9圖所示，從源極驅動電路ST 1到鄰接的 源極驅動電路ST2〜ST6依次傳輸。此外，雖然在第9圖中 沒有記載，但對於閘極驅動電路也與源極驅動電路ST相同 地，從控制電路3所供給的各種信號，從閘極驅動電路GT 1 到鄰接的閘極驅動電路依次傳輸。 在本實施例1中，對於這樣的結構的液晶顯示裝置1 A， -25- 1270047 f * 相對於位於電源電壓供給方向的上流側的源極驅動電路 STi( i=l〜6 )的驅動用ICSDi，形成佈線阻抗算出用佈線， 該佈線基本等價於從該驅動用ICSDi直到鄰接於電源電壓 供給方向的下流側的驅動電路STi+Ι的驅動用ICSDi+1 的信號佈線。等價表示形成狀態相同’具體而言，用同樣 的材料，而且長度、寬度、厚度都基本相同，或者不限定 於用同樣的材料或長度、寬度、厚度’表示佈線阻抗値爲 近似値的意思。 B 而且，上述電流側驅動用ICSDi構成爲：通過在前述佈 線阻抗算出用佈線的一端上施加算出用電壓並檢出另一端 的電壓，來算出佈線阻抗値，基於算出的佈線阻抗値來算 出電壓下降値，將根據算出的電壓下降値進行相應的電壓 値上升的電源電壓向下流側驅動電路STi + 1輸出。下面， 對佈線阻抗算出用佈線和驅動用ICSDi進行說明。 第1圖是用於說明本實施例1的液晶顯示裝置1A中的液 晶顯示面板2和源極驅動電路STi之間的連接關係的俯視 0 圖。源極驅動電路STi具有這樣的結構，在將驅動用IC SDi 安裝在矩形狀的撓性基板SBi上的同時，形成大量的信號 佈線組Ai、Bi、Ci、Di、Ei和信號佈線Rai、Rci。而且， 信號佈線組和信號佈線，雖然撓性基板SBi形成在與液晶 顯示面板2對置的表面側（內側）上，但爲了容易理解第2 圖中在與液晶顯示面板2對置的表面相反側（表面側）上 記載了信號佈線，將驅動用IC SDi的安裝位置用雙點劃線 表示。 在撓性基板SBi上，形成有電源電壓輸入用佈線組Ai、 -26- 1270047 . r 控制信號輸入用佈線組Bi、源極信號輸出用佈線組Ci、控 制信號輸出用佈線組Di、電源電壓輸出用佈線組Ei。而且， 在撓性基板SBi上，還形成有構成佈線阻抗算出用佈線Ri 的算出用電壓輸出側佈線Rai和檢測電壓輸入側佈線Rci。 在撓性基板SBi中，兩個長邊之中的一邊側成爲與液晶 顯示面板2連接用的連接部。電源電壓輸入用佈線組Ai， 形成爲從前述連接部到驅動用ICSDi的電源電壓輸入端 子。控制信號輸入用佈線組Bi，形成爲從前述連接部到驅 B 動用ICSDi的控制信號輸入端子。源極信號輸出用佈線組 Ci，形成爲從驅動用ICSDi的源極信號輸出端子到前述連 接部。控制信號輸出用佈線組Di，形成爲從驅動用ICSDi 的控制信號輸出端子到前述連接部。電源電壓輸出用佈線 組Ei，形成爲從驅動用ICSDi的電源電壓輸出端子到前述 連接部。此外，算出用電壓輸出側佈線Rai，形成爲從驅動 用ICSDi的算出用電壓輸出端子到前述連接部。檢測電壓 輸入側佈轉Rci，形成爲從前述連接部到驅動用ICSDi的檢 0 出端子。 一方面，在液晶顯不面板2的周圍邊緣部分上，如上所 述地，配置有以將源極信號線延伸到端部的方式形成的源 極信號輸入端子組Hi，與液晶顯示面板2的周圍邊緣部上 連接源極驅動電路STi，使得撓性基板SBi的源極信號輸出 用佈線組Ci和源極信號輸入端子組Hi重疊並連接。 此外，在液晶顯示面板2的周圍邊緣部上，在形成用於 將源極驅動電路S Ti和與信號的傳輸方向上流側鄰接的源 極驅動電路STi — 1連接的連接佈線組Fi、Gi的同時，形 -27- 1270047 成有用於將源極驅動電路STi和與信號的傳輸方向下流側 鄰接的源極驅動電路STi + 1連接的連接佈線組Fi + 1、Gi + 1 〇 連接佈線組Fi是控制信號用的連接佈線組，形成爲從上 流側源極驅動電路STi - 1的連接處到源極驅動電路STi的 連接處。具體而言，控制信號用連接佈線組Fi，從與上流 側源極驅動電路STi - 1的控制信號輸出用佈線組Di - 1重 合的位置，到與源極驅動電路STi的控制信號輸入用佈線 _ 組Bi重合的位置，大致形成爲U字狀。 連接佈線組Gi是電源電壓用的連接佈線組，形成爲從上 流側源極驅動電路STi - 1的連接處到源極驅動電路STi的 連接處。具體而言，電源電壓用連接佈線組Gi，從與上流 側源極驅動電路STi — 1的電源電壓輸出用佈線組Ei - 1重 合的位置，到與源極驅動電路STi的電源電壓輸入用佈線 組Ai重合的位置，大致形成爲U字狀。 此外，連接佈線組F i + 1是控制信號用的連接佈線組， 形成爲從源極驅動電路S Ti的連接處到下流側源極驅動電 ® 路STi + 1的連接處。具體而言，控制信號用連接佈線組Fi + 1，從與源極驅動電路STi的控制信號輸出用佈線組Di 重合的位置，到與下流側源極驅動電路S Ti + 1的控制信號 輸入用佈線組Bi + 1重合的位置，大致形成爲U字狀。 連接佈線組G i + 1是電源電壓用的連接佈線組，形成爲 從源極驅動電路STi的連接處到下流側源極驅動電路STi + 1的連接處。具體而言，電源電壓用連接佈線組Gi + 1， 從與源極驅動電路STi的電源電壓輸出用佈線組Ei重合的 -28- 1270047 • » 位置，到與下流側源極驅動電路STi + 1的電源電壓輸入用 佈線組Ai + 1重合的位置，大致形成爲u字狀。 而且，在液晶顯示面板2的周圍邊緣部上，形成有構成 佈線阻抗算出用佈線Ri的面板側佈線Rbi。面板側佈線Rbi 在從與源極驅動電路STi的算出用電壓輸出側佈線Rai重 合的位置到與源極驅動電路STi的檢出電壓輸入側佈線Rci 重合的位置，圍繞液晶顯示面板2的周圍邊緣部而形成。 佈線阻抗算出用佈線Ri由算出用電壓輸出側佈線Rai、 g 面板側佈線Rbi、檢出電壓輸入側佈線Rci構成。佈線阻抗 算出用佈線Ri，與從驅動用ICSDi到與電源電壓供給方向 的下流側鄰接的驅動電路STi + 1的驅動用ICSDi + 1的信 號佈線，用同樣的材料，且長度、寬度、厚度也大致相同 的方式形成。 通過形成上述那樣的佈線組和佈線，將源極驅動電路STi 與液晶顯示面板2的周圍邊緣部連接，此時，從上流側源 極驅動電路STi - 1輸出的控制信號和電源電壓，經由控制 信號用連接佈線組F i和電源電壓用連接佈線組g i，供給到 ® 源極驅動電路S T i。此外，從源極驅動電路s T i輸出的控制 信號和電源電壓，經由控制信號用連接佈線組F i + 1和電 源電壓用連接佈線組G i + 1，供給到下流側源極驅動電路 STi+ 1。 這樣的依次傳輸的控制信號中，包含有驅動用IC SDi的 工作時鐘信號或圖像資料。此外，在依次傳輸的電源電壓 中，包含有成爲驅動用ICSDi內部的類比電路的工作電源 的類比電源電壓，或相互電壓値不同的多個灰度電源電 -29- 1270047 壓。多個灰度電源電壓，在液晶顯示面板2中進行灰度顯 示時，基於圖像資料選擇任何1個或2個電壓，根據驅動 用IC SDi內部的階梯（ladder )阻抗，預定的電壓作爲源極 信號供給到液晶顯示面板2。 源極驅動電路STi的驅動用ICSDi，將供給的類比電源電 壓作爲工作電壓而工作，基於時鐘信號或顯示資料等的控 制信號執行預定的控制處理’將源極信號輸出到液晶顯示 面板2。 此外，驅動用ICSDi，通過向佈線阻抗算出用佈線Ri的 B —端輸出算出用電壓並檢出另一端的電壓，來算出佈線阻 抗値，基於算出的佈線阻抗値算出電壓下降値，將根據算 出的電壓下降値進行相應的電壓値上升的電源電壓向下流 側源極驅動電路STi + 1輸出。輸出的電源電壓，通過撓性 基板S Bi上的電源電壓輸出用佈線組Ei和液晶顯示面板2 上的電源電壓用連接佈線組Gi + 1，供給到下流側源極驅動 電路STi + 1的驅動用1C。 接下來，說明驅動用IC SDi的結構例子。第2圖是表示 β 驅動用IC SDi的結構的方塊圖。而且，第2圖中表示用於 佈線阻抗値的算出的結構、和用於電源電壓的電壓値的加 算的結構，省略了驅動用ICSDi本來進行的用於液晶顯示 面板2的顯示控制的結構。 來自控制電路3的電源電路6或上流側驅動用ICSDi - 1 的類比電源電壓，輸入到類比電源電壓輸入端子1 1，灰度 電源電壓輸入到灰度電源電壓輸入端子1 2。類比電源電 壓，作爲1C內部的類比電路的工作電源，在分別向包含生 -30- 1270047 成源極信號的信號生成電路的多個模組供給的同時，還供 給到類比電源電壓加算部1 3和佈線阻抗算出用電壓生成 部1 4。此外，灰度電源電壓，在供給到生成源極信號的信 號生成電路的同時，還供給到灰度電源電壓加算部1 5。 佈線阻抗算出用電壓生成部1 4，生成用於算出佈線阻抗 的算出用電壓，並供給到算出用電壓輸出端子16。在算出 用電壓輸出端子1 6上，連接有佈線阻抗算出用佈線Ri的 一端，正確地說連接有算出用電壓輸出側佈線Rai的端部， 算出用電壓供給到佈線阻抗算出用佈線Ri。佈線阻抗算出 ® 甩佈線Ri的另一端，正確地說檢出電壓輸入側佈線Rci的 端部，與檢出端子17連接，從佈線阻抗算出用佈線Ri的 另一端輸出的檢出電壓，輸入到檢出端子1 7。 輸入到檢出端子1 7的檢出電壓，供給到佈線阻抗算出部 1 8。此外，供給到算出用電壓輸出端子1 6的算出用電壓還 向佈線阻抗算出部1 8供給。佈線阻抗算出部1 8，求出算出 用電壓的電壓値和檢出電壓的電壓値之間的差，基於求出 的差來算出佈線阻抗値。算出的佈線阻抗値，供給到類比 ® 電源電壓加算部1 3和灰度電源電壓加算部1 5。 類比電源電壓加算部1 3，基於供給的佈線阻抗値，算出 佈線阻抗導致的電壓下降的電壓値（電壓下降値），在從 類比電源電壓輸入端子1 1供給的類比電源電壓的電壓値 上，只加上算出的電壓下降値（提高電壓値），將電壓値 加算了的（被提高的）類比電源電壓，供給到類比電源電 壓輸出端子1 9。供給到類比電源電壓輸出端子1 9的類比電 源電壓’供給到下流側的源極驅動電路STi + 1的驅動用 -31· 1270047 ICSDi + 1。 此外，灰度電源電壓加算部1 5，基於供給的佈線阻抗値， 算出佈線阻抗導致的電壓下降的電壓値（電壓下降値）， 在從灰度電源電壓輸入端子1 2供給的灰度電源電壓的電 壓値上，只加上算出的電壓下降値（提高電壓値），將電 壓値加算了的（被提高的）灰度電源電壓，供給到灰度電 源電壓輸出端子20。供給到灰度電源電壓輸出端子20的灰 度電源電壓，供給到下流側的源極驅動電路STi + 1的驅動 _ 用 ICSDi+ 1 。 而且，第3圖中，雖然僅分別示出了 1個灰度電源電壓 輸入端子12、灰度電源電壓加算部15和灰度電源電壓輸出 端子20，但由於如上所述的驅動用ICSDi上供給電壓値互 不同的多個灰度電源電壓，所以對應於各個灰度電源電 壓，設置有灰度電源電壓輸入端子12、灰度電源電壓加算 部1 5和灰度電源電壓輸出端子20。 如上所述，在液晶顯示裝置1A中，源極驅動電路STi I 的驅動用ICSDi，將按照使用佈線阻抗算出用佈線Ri算出 的電壓下降値進行了電壓値上升的電源電壓，朝向下流側 源極驅動電路STi + 1輸出。輸出的電源電壓，通過構成源 極驅動電路STi的撓性基板SBi上的電源電壓輸出用佈線 組Ei、液晶顯示面板2的電源電壓用連接佈線組Gi + 1、 下流側驅動電路STi + 1的電源電壓輸入用佈線組Ai + 1， 而供給到下流側驅動電路STi + 1的驅動用ICSDi + 1。 供給到下流側的驅動用ICSDi + 1的電源電壓，雖然由於 經過佈線使電壓値下降，但是由於在從上流側驅動用ICSDi -32- 1270047 » « 輸出的時刻預先將電壓値僅提高電壓下降値，所以供給到 下流側驅動用IC S D i + 1的電源電壓，成爲使得驅動用JC 正常工作所需的電壓値。從而，由於分別將合適的電壓値 的電源電壓供給到下流側驅動用ICSDi + 1，所以能夠防止 驅動用IC SD的誤動作。這樣，能夠使液晶顯示裝置ία正 常工作。 此外’液晶顯示裝置1 A中，由於按照從構成源極驅動電 路STi的撓性基板SBi經由液晶顯示面板2再回到撓性基 φ 板SBi的方式形成有佈線阻抗算出用佈線Ri，所以能夠形 成與從驅動用ICSDi到下流側源極驅動用ICSDi + 1的信號 佈線基本等價的條件的佈線阻抗算出用佈線Ri。 換句話說，驅動用ICSDi和下流側驅動用IC SDi + 1之間 的電源電壓用佈線分爲，源極驅動電路STi的撓性基板SBi 上的電源電壓輸出用佈線組Ei、液晶顯示面板2上的電源 電壓用連接佈線組Gi + 1、和下流側源極驅動電路STi + 1 的撓性基板SBi + 1上的電源電壓輸入用佈線組Ai + 1的3 種佈線。另一方面，佈線阻抗算出用佈線Ri，由於按照從 ^ 構成源極驅動電路STi的撓性基板SBi經由液晶顯示面板2 再回到撓性基板SBi的方式形成，所以也分爲，撓性基板 SBi上的作爲第1佈線的算出用電壓輸出側佈線Rai、和液 晶顯示面板2上的面板側佈線Rbi、以及撓性基板S Bi上的 作爲第2佈線的檢測電壓輸入側佈線Rci的3種佈線。 而且，算出用電壓輸出側佈線Rai對應於源極驅動電路 S Ti的撓性基板S B i上的電源電壓輸出用佈線Ei ’液晶顯 示面板2上的面板側佈線Rbi對應於液晶顯示面板2上的 -33- 1270047 電源電壓用連接佈線組Gi + 1，檢出電壓輸入側佈線Rci 對應於下流側源極驅動電路STi + 1的撓性基板SBi上的電 源電壓輸入用佈線組Ai + 1。從而，能夠形成與從驅動用 ICSDi到下流側驅動用ICSDi + 1的信號佈線基本等價的條 件的佈線阻抗算出用佈線Ri。這樣，能夠高精度地求出從 驅動用IC SDi到下流側驅動用IC SDi + 1的信號佈線的佈線 阻抗値和電壓下降値。 可是’驅動用ICSDi和下流側驅動用ICSDi + i之間的信 號佈線的材料、長度、寬度、厚度是在液晶顯示裝置1 A的 _ 設計階段中預先決定的。從而，可以採用如下方式，即另 外製成在設計階段中所決定的材料、長度、寬度、厚度的 信號佈線並測量佈線阻抗値，將得到的佈線阻抗値存儲在 記憶體中，利用存儲的佈線阻抗値來算出電壓下降値，對 類比電源電壓和灰度電源電壓僅加算算出的電壓下降値。 然而’這樣的方式容易產生下列的問題所以不是優選的。 首先第1，由於液晶顯示面板2和源極驅動電路ST，通 過夾設各向異性導電膜並熱壓接來進行連接，所以在連接 • 部分上產生壓接阻抗。因此，另外製成的信號佈線中，難 於考慮到壓接阻抗的影響，存在不能正確地測量佈線阻抗 値的問題。Furthermore, in the above-described aspect, it is preferable that the order in which the signals are supplied from the control circuit to the two TCPs adjacent to the divided portion is the forward direction of the TCP in the forward direction, and the other is One side of the TCP 1270047 t > is a reverse direction of the delivery sequence. In this case, it is preferable that a timing controller including a direction switch of the line memory and the bus driver is disposed between the control circuit and the other TCP. The signal in the forward direction of the forward direction sent from the control circuit is converted into the reverse direction by the timing controller. According to the display device of the first aspect of the present invention, the driving 1C for the upstream side in the voltage supply direction outputs the power supply voltage at which the voltage 値 rises to the downstream driving circuit, and the rising voltage 値 is calculated only by the wiring impedance calculation wiring I. The voltage drops 値. The output power supply voltage is supplied to the drive 1C of the downstream side drive circuit through the signal wiring on the substrate constituting the drive circuit or the connection wiring on the display panel. The power supply voltage supplied to the downstream side drive 1C is supplied to the downstream side drive 1C because the voltage 値 is increased in accordance with the current drop at the time of output from the upstream side drive 1C. The power supply voltage becomes the voltage required for the driver IC to operate normally. Therefore, in the downstream side drive 1C, since the power supply voltage of the appropriate voltage 0 分别 is supplied, it is possible to prevent the malfunction of the drive 1C. Thereby, the display device can be operated normally. In this case, when the drive circuit is configured by a TCP circuit that mounts the drive Ic on the strip substrate, the wiring impedance calculation wiring that is returned from the strip substrate to the substrate via the display panel is formed. Therefore, the wiring impedance calculation wiring can be formed under substantially equal conditions with the signal wiring from the upstream side driving 1C to the downstream side driving 1C. In other words, the wiring between the upstream side driving 1C and the downstream side driving 1C is divided into the wiring on the substrate of the upstream side driving circuit, the connection -18-1270047 wiring on the display panel, and the downstream side driving circuit. Three types of wiring such as wiring on the substrate. On the other hand, the wiring impedance calculation wiring 'is also formed so as to return from the substrate constituting the drive circuit to the substrate via the display panel. Therefore, it is divided into the first wiring and the display panel on the substrate constituting the drive circuit. Three types of wiring such as wiring and second wiring on the substrate. Further, the first wiring corresponds to the wiring on the substrate of the upstream-side driving circuit, the wiring on the display panel corresponds to the wiring for connection on the display panel, and the second wiring corresponds to the wiring on the substrate of the downstream-side driving circuit. Therefore, p can form a wiring impedance calculation wiring with a signal wiring from the upstream side driving 1C to the downstream side driving 1C under substantially equivalent conditions. Thereby, the wiring impedance 値 and the voltage drop 从 of the signal wiring from the upstream side driving 1C to the downstream side driving 1C can be obtained with high precision. Further, according to the display device of the first aspect, the driving 1C for the upstream side in the voltage supply direction and the power supply voltage for the lower-side driving circuit output voltage ' 'the rising voltage 値 are only the voltage drop calculated by the wiring impedance calculating wiring. value. The output power supply voltage is supplied to the 0 downstream side drive 1C through the connection wiring. The power supply voltage supplied to the downstream side drive 1C is reduced in voltage 値 by the connection wiring. However, since the voltage 値 is increased in advance at the time when the upstream side drive 1C is output, the voltage is supplied to the downstream side drive IC. The power supply voltage becomes the voltage required to drive the 1C to operate normally. Therefore, in the downstream side driving 1C, since the power supply voltage having an appropriate voltage 分别 is supplied, it is possible to prevent the malfunction of the driving 1C. Thereby, the display device can be operated normally. Further, according to the display device of the first aspect, the power supply voltage supplied from the adjacent driving 1C on the upstream side is input from the power supply voltage -19-1270047 » > input terminal to the driving 1C through the connection wiring. The driving IC performs a predetermined action based on the input power source voltage and outputs the driving signal to the display panel. On the other hand, in the drive 1C, the calculation voltage generated by the calculation voltage generation unit is output from the calculation voltage output terminal to one end of the wiring impedance calculation wiring, and the output from the other end of the wiring impedance calculation wiring is output. The voltage is input from the detection terminal. The wiring impedance calculation unit calculates the wiring impedance 基于 based on the calculated calculation voltage and the detection voltage input from the detection terminal. • Further, the power supply voltage addition unit calculates the P voltage drop based on the calculated wiring impedance 値. The voltage 値 of the power supply voltage is increased only in accordance with the calculated voltage drop 値. The power supply voltage from the power supply voltage addition unit is output from the power supply voltage output terminal, and is supplied to the drive 1C adjacent to the downstream side via the connection wiring. According to such a configuration, it is possible to supply the power supply voltage that has been increased by the voltage drop due to the wiring impedance to the drive 1C on the downstream side. Further, according to the display device of the first aspect of the present invention, the power supply voltage for the respective driving 1C operation is supplied at an appropriate voltage ,, so that the malfunction of the driving 1C can be prevented and the display device can be normally operated. In addition, since the display power supply voltage is supplied to each of the driving 1Cs with an appropriate voltage, it is possible to supply an appropriate driving signal to each of the driving panels 1C to the display panel, thereby reducing display unevenness such as gradation deviation of the gradation. The display quality of the display device can be improved. According to the second aspect of the present invention, since the image data signal processed in the predetermined driving ic is an unnecessary signal for the other driving 1C, the image data signal output from the driving 1C is driven every time. When Ϊ c is used, it is reduced. Therefore, even if there is a wiring circuit from the drive circuit of one -20- 1270047 _ > at the edge of the display panel to the other end, the data signal wiring can be A large reduction in the generation of EMI of the image data. Further, in the second aspect, since the source driving is performed by the image data signal corresponding to the input initial pulse and is output to the panel, it is possible to pass image data other than the pattern number corresponding to the initial pulse. The signal is output to the next adjacent 1C to easily output the desired image data signal to the adjacent g 1C, and only a desired image data signal can be selected by a simple switching circuit. Further, according to the third aspect of the present invention, since the series connection group of the series-connected circuits is formed in two in the central portion, the length of each of the series-connected groups is opened, and the signals from the front path are respectively supplied to the clamps. The two channels that are adjacent to each other are separated, so that the voltage drop amounts of the respective series connection groups until the separation are reduced, and the respective voltage drop amounts are substantially the same, as in the central portion of the liquid crystal display panel which is the most conspicuous place. The uniform phenomenon reduces the display unevenness at the peripheral edge portion. Further, since the two drive circuits connected to the control circuit are adjacent to each other, it is possible to easily connect the wiring by one FPC to two short FPC paths. Further, in the above-described method, since the control circuit is connected to the divided drive circuits, it is not necessary to extend the cloth and the wire to the end portion of the liquid plate. Empty 1 s @ s _ /J, ° and 1 'The ic caused by the long picture number divided in the center part of the series connection group of each of the plurality of drive powers g is processed to the display surface image information drive The drive selection and output are connected to a plurality of drives to shorten the electric power of the control electric drive end portions, so that the display unevenness is eliminated, and the 2-sided display surface adjacent to the control electric I is separated by the two-part series, -21 - 1270047 ' > Therefore, the image data signals supplied to the two series connection groups are reduced by half, so EMI is also reduced. In this case, if the series connection group in which the drive circuit is connected in series is divided into two in the center portion, and the signals from the control circuit are supplied as they are to the drive 1C on the two drive circuits adjacent to each other. Since the signal supplied to one drive circuit is in the forward direction and the other direction is the reverse direction, the normal image display cannot be performed in the other direction, but can be supplied to the aforementioned A normal image display can be performed by converting the order of the signals of the drive circuits into the reverse direction. Further, by using the timing controller carried by the line memory and the bidirectional switch for driving the bus, it is possible to set the order of the signals supplied to the other drive circuit to the reverse direction with a simple configuration. [Embodiment] Hereinafter, embodiments of a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings. However, the embodiment shown below is merely an example of a liquid crystal display device as a display device for embodying the technical idea of the present invention, and the present invention is not limited to the liquid crystal display device. The same applies to a plasma display device or the like using a plasma display panel. In the following description, the same components as those of the liquid crystal display device of the prior art shown in Figs. 9 to 10 are denoted by the same reference numerals. [Embodiment 1] Since the schematic configuration of the liquid crystal display device 1A of the first embodiment is mostly the same as that of the liquid crystal display device 1 of the prior example shown in Fig. 9, it is adopted for -22·1270047, Further, the liquid crystal display device 1A of the first embodiment will be described with reference to Figs. 1 and 2 . 1 is a plan view showing a connection relationship between a liquid crystal display panel and a source driving circuit of the liquid crystal display device 1A of the first embodiment, and FIG. 2 is a view showing a configuration of a driving IC including a source driving circuit. Block diagram. As shown in FIG. 9, the liquid crystal display device 1A of the first embodiment includes a liquid crystal display panel 2, a control circuit 3 disposed on a peripheral edge portion of the liquid crystal display panel 2, and a plurality of drive circuits ST1 to ST6. It is composed of GT 1. g The liquid crystal display panel 2 is, for example, an active matrix type liquid crystal display panel using TFTs. A liquid crystal layer is interposed between an active matrix substrate and a counter substrate by using an active matrix liquid crystal display panel of a TFT, and a plurality of primitives arranged in a row on a transparent substrate such as glass The electrodes are respectively provided with TFTs as switching elements; in the opposite substrate, one common electrode is formed on substantially the entire surface of the transparent substrate. An active matrix substrate on which a plurality of gate signal lines parallel to each other and a plurality of source signal lines parallel to each other while being orthogonal to the gate signal line are formed on the transparent substrate, at the gate signal line and the source signal line A primitive electrode and a TFT are formed in the divided rectangular region ^. The drain of the TFT is connected to the electrode of the primitive, the gate is connected to the gate signal line, and the source is connected to the source signal line. On the other hand, the gate signal line is formed such that one end thereof extends to the peripheral edge portion on one side of the transparent substrate, and the one end portion serves as an input terminal. Further, the source signal line also has a peripheral edge portion extending to one side of the transparent substrate at one end, and the end portion serves as an input terminal. Further, since the gate signal line and the source signal line ' are formed in mutually orthogonal directions as described above, the input terminal of the gate signal line is formed with the input side terminal portion of the gate signal line and the input terminal shape of the source signal line. -23- 1270047 r The peripheral edge portion of the one side is a positional relationship adjacent to the transparent substrate as shown in Fig. 9. The source drive circuits S T 1 to ST6 are connected to the input terminals of the source signal lines (in the collective sense, the reference numeral "ST" is used). The source drive circuit ST is constructed using TCP. For example, the source driving circuit ST1 is formed by mounting a large number of signal wirings while mounting the driving ICSD1 on the flexible substrate SB1. The signal wiring includes a plurality of source signal output wirings for supplying a source signal (a display voltage applied to the primitive) output from the driving IC SD1 to an input terminal of the source signal line. The source driving circuit ST1 and the liquid crystal display panel 2 are connected by interposing each of the undative conductive films and thermocompression bonding, so that the source signal output wiring and the input terminal of the source signal line are electrically connected. The configuration of the other source drive circuits ST2 to ST6 and the connection relationship with the liquid crystal display panel 2 are the same as those of the source drive circuit ST1. Further, a gate driving circuit GT1 is connected to an input terminal of the gate signal line. In Fig. 9, only one gate drive circuit GT1 is shown, but actually a plurality of gate drive circuits are connected. The gate driving circuit GT1 is constructed by TCP. Specifically, the driving ICGD1 is mounted on the flexible substrate GB1, and a large number of signal wirings are formed. The signal wiring includes a plurality of gate signal output wirings for supplying a gate signal (on/off voltage of the TFT) output from the driving ICGD1 to an input terminal of the gate signal line. The gate drive circuit GT 1 and the liquid crystal display panel 2 are connected by interposing an anisotropic conductive film and thermocompression bonding, so that the gate signal output wiring and the input terminal of the gate signal are electrically connected. For the other gate driving circuits not shown in the drawing, the structure and the connection relationship with the liquid crystal display surface -24-1270047 t » board 2 are the same as those of the gate driving circuit GT1. As described above, a plurality of drive circuits ST1 to ST6 and GT are connected to the peripheral edge portion of the liquid crystal display panel 2. These drive circuits ST1 to ST6 and GT1 are based on various power supply voltages, image data, and control supplied from the control circuit 3. Work with the signal. The control circuit 3 is constructed by forming a control IC 5, a power supply circuit 6, and a large number of signal wirings on the substrate 4. The control circuit 3 is connected to the liquid crystal display panel 2 via a signal supply FPC (Flexible Printed Circuit) 7. The control IC 5 outputs image data displayed on the liquid crystal display panel 2, or control signals for controlling the drive circuits ST1 to ST6, ® GT 1, and the like. Further, the power supply circuit 6 generates and outputs various power supply voltages such as an analog power supply voltage for operating power supplies for driving ICSD1 to SD7 and GDI, and a gradation power supply voltage for performing gradation display of the liquid crystal display panel 2. Various signals including image data, control signals, and various power source voltages output from the control circuit 3 are supplied to the liquid crystal display panel 2 via the signal supply FPC 7. On the peripheral edge portion of the liquid crystal display panel 2, a connection wiring for connecting the signal supply FPC7, the source drive circuit ST1, and the gate drive circuit GT1 is formed, and a drive circuit for connecting adjacent ones is formed. Wiring for connection to each other. Thus, the various signals supplied from the control circuit 3 are sequentially transmitted from the source drive circuit ST 1 to the adjacent source drive circuits ST2 to ST6 as shown in Fig. 9. Further, although not shown in FIG. 9, the gate drive circuit also drives the various signals supplied from the control circuit 3 from the gate drive circuit GT 1 to the adjacent gate drive, similarly to the source drive circuit ST. The circuits are transmitted in sequence. In the first embodiment, the liquid crystal display device 1 A, -25-1270047 f* having such a configuration is driven for the source drive circuit STi (i = 1 to 6) on the upstream side in the power supply voltage supply direction. ICSDi forms a wiring for calculating the wiring impedance, and the wiring is substantially equivalent to the signal wiring of the driving ICSi+1 for driving circuit STi+Ι from the driving ICSDi to the downstream side in the power supply voltage supply direction. Equivalent means that the formation state is the same 'specifically, the same material is used, and the length, width, and thickness are substantially the same, or is not limited to the same material or length, width, and thickness 'meaning that the wiring impedance 値 is approximately 値. B. The current-side drive ICSDi is configured to calculate a wiring impedance 施加 by applying a voltage for calculation to one end of the wiring impedance calculation wiring and detecting the voltage at the other end, and calculate the voltage based on the calculated wiring impedance 値After falling, the power supply voltage that has risen by the corresponding voltage 根据 according to the calculated voltage drop 输出 is output to the downstream side drive circuit STi + 1 . Next, the wiring impedance calculation wiring and the driving ICSDi will be described. Fig. 1 is a plan view showing a connection relationship between the liquid crystal display panel 2 and the source drive circuit STi in the liquid crystal display device 1A of the first embodiment. The source driving circuit STi has a structure in which a large number of signal wiring groups Ai, Bi, Ci, Di, Ei and signal wirings Rai, Rci are formed while mounting the driving IC SDi on the rectangular flexible substrate SBi. . Further, in the signal wiring group and the signal wiring, the flexible substrate SBi is formed on the surface side (inner side) opposed to the liquid crystal display panel 2, but in order to easily understand the surface opposite to the liquid crystal display panel 2 in FIG. 2 Signal wiring is described on the side (surface side), and the mounting position of the driving IC SDi is indicated by a chain double-dashed line. The power supply voltage input wiring group Ai, -26-1270047 is formed on the flexible substrate SBi. The control signal input wiring group Bi, the source signal output wiring group Ci, the control signal output wiring group Di, and the power supply voltage are formed. Output wiring group Ei. Further, on the flexible substrate SBi, the calculation voltage output side wiring Rai and the detection voltage input side wiring Rci which constitute the wiring impedance calculation wiring Ri are formed. In the flexible substrate SBi, one of the two long sides is a connection portion for connection to the liquid crystal display panel 2. The power supply voltage input wiring group Ai is formed as a power supply voltage input terminal from the connection portion to the driving ICSDi. The control signal input wiring group Bi is formed as a control signal input terminal for driving the ICSDi from the connection portion. The source signal output wiring group Ci is formed from the source signal output terminal of the driving ICSDi to the connection portion. The control signal output wiring group Di is formed from the control signal output terminal of the driving ICSDi to the connection portion. The power supply voltage output wiring group Ei is formed from the power supply voltage output terminal of the driving ICSDi to the connection portion. Further, the calculation voltage output side wiring Rai is formed from the calculation voltage output terminal of the drive ICSDi to the connection portion. Detection voltage The input side is rotated by Rci, and is formed as a detection terminal from the connection portion to the driving ICSDi. On the other hand, on the peripheral edge portion of the liquid crystal display panel 2, as described above, the source signal input terminal group Hi formed to extend the source signal line to the end portion is disposed, and the liquid crystal display panel 2 The source drive circuit STi is connected to the peripheral edge portion such that the source signal output wiring group Ci and the source signal input terminal group Hi of the flexible substrate SBi are overlapped and connected. Further, on the peripheral edge portion of the liquid crystal display panel 2, a connection wiring group Fi, Gi for connecting the source drive circuit S Ti and the source drive circuit STi-1 adjacent to the upstream side in the transmission direction of the signal is formed. At the same time, the shape -27-1270047 is provided with a connection wiring group Fi + 1 , Gi + 1 for connecting the source drive circuit STi and the source drive circuit STi + 1 adjacent to the downstream side of the signal transmission direction. It is a connection wiring group for control signals, and is formed from the connection of the upstream-side source drive circuit STi-1 to the connection of the source drive circuit STi. Specifically, the control signal connection wiring group Fi is connected to the control signal input wiring from the source drive circuit STi at a position overlapping the control signal output wiring group Di-1 of the upstream-side source drive circuit STi-1. _ The position where the group Bi overlaps is formed substantially in a U shape. The connection wiring group Gi is a connection wiring group for the power supply voltage, and is formed at a connection from the connection of the upstream-side source drive circuit STi-1 to the source drive circuit STi. Specifically, the power supply voltage connection wiring group Gi is connected from the power supply voltage output wiring group Ei-1 of the upstream-side source drive circuit STi-1 to the power supply voltage input wiring to the source drive circuit STi. The position where the group Ai overlaps is formed substantially in a U shape. Further, the connection wiring group F i + 1 is a connection wiring group for the control signal, and is formed from the connection of the source drive circuit S Ti to the connection of the downstream side source drive electric circuit STi + 1. Specifically, the control signal connection wiring group Fi + 1, is connected from the position overlapping the control signal output wiring group Di of the source drive circuit STi to the control signal input to the downstream side source drive circuit S Ti + 1 The position where the wiring group Bi + 1 overlaps is formed substantially in a U shape. The connection wiring group G i + 1 is a connection wiring group for the power supply voltage, and is formed at a junction from the connection of the source drive circuit STi to the downstream side source drive circuit STi + 1. Specifically, the power supply voltage is connected to the downstream side source drive circuit STi + 1 from the -28-1270047 • » position of the power supply voltage output wiring group Ei of the source drive circuit STi to the downstream side source drive circuit STi + 1 The position where the power supply voltage input wiring group Ai + 1 overlaps is formed substantially in a U shape. Further, on the peripheral edge portion of the liquid crystal display panel 2, a panel side wiring Rbi constituting the wiring impedance calculation wiring Ri is formed. The panel side wiring Rbi surrounds the peripheral edge of the liquid crystal display panel 2 at a position overlapping with the detection voltage output side wiring Rai of the source drive circuit STi at a position overlapping the detection voltage input side wiring Rci of the source drive circuit STi. Formed by the Ministry. The wiring impedance calculation wiring Ri is composed of the calculation voltage output side wiring Rai, the g panel side wiring Rbi, and the detection voltage input side wiring Rci. The wiring impedance calculation wiring Ri is the same as the signal wiring of the driving ICSDi + 1 of the driving circuit STi + 1 adjacent to the downstream side of the power supply voltage supply direction from the driving ICSDi, and the length, the width, and the thickness are also used. Formed in much the same way. By forming the wiring group and the wiring as described above, the source drive circuit STi is connected to the peripheral edge portion of the liquid crystal display panel 2. At this time, the control signal and the power supply voltage output from the upstream-side source drive circuit STi-1 are controlled. The signal connection wiring group F i and the power supply voltage connection wiring group gi are supplied to the ® source drive circuit ST i . Further, the control signal and the power supply voltage outputted from the source drive circuit s T i are supplied to the downstream side source drive circuit STi+ via the control signal connection wiring group F i + 1 and the power supply voltage connection wiring group G i + 1. 1. Such a sequentially transmitted control signal includes an operation clock signal or image data of the driving IC SDi. Further, the power supply voltage sequentially transmitted includes an analog power supply voltage of an operating power supply that is an analog circuit inside the driving ICSDi, or a plurality of gray power supply voltages -29-1247047 that are different from each other. When a plurality of gradation power supply voltages are displayed in the gradation display in the liquid crystal display panel 2, any one or two voltages are selected based on the image data, and a predetermined voltage is used as a source according to a ladder impedance inside the driving IC SDi. The pole signal is supplied to the liquid crystal display panel 2. The ICSDi for driving the source drive circuit STi operates by supplying the analog power supply voltage as an operation voltage, and performs predetermined control processing based on a clock signal or a control signal such as display data, and outputs the source signal to the liquid crystal display panel 2. In addition, the ICSDi is used to calculate the voltage for the calculation at the B-terminal of the wiring impedance calculation wiring Ri and detect the voltage at the other end, thereby calculating the wiring impedance 値, and calculating the voltage drop 基于 based on the calculated wiring impedance 値. The voltage drops 値 the corresponding voltage 値 rises the power supply voltage to the downstream side source drive circuit STi + 1 output. The output power supply voltage is supplied to the downstream side source drive circuit STi + 1 through the power supply voltage output wiring group Ei on the flexible substrate S Bi and the power supply voltage connection wiring group Gi + 1 on the liquid crystal display panel 2. Use 1C. Next, a configuration example of the driving IC SDi will be described. Fig. 2 is a block diagram showing the configuration of the β driving IC SDi. Further, Fig. 2 shows a configuration for calculating the wiring impedance 値 and a configuration for adding the voltage 値 of the power supply voltage, and omitting the display control for the liquid crystal display panel 2 originally performed by the driving ICSDi. The analog power supply voltage from the power supply circuit 6 of the control circuit 3 or the upstream side drive ICSDi-1 is input to the analog power supply voltage input terminal 1:1, and the gradation power supply voltage is input to the gradation power supply voltage input terminal 12. The analog power supply voltage is supplied to the plurality of modules including the signal generation circuit of the source signal of -30-1270047, and is supplied to the analog power supply voltage adding unit 1 3 as the operating power supply of the analog circuit inside the 1C. And the wiring impedance calculation voltage generating unit 14 . Further, the gradation power supply voltage is supplied to the gradation power supply voltage adding unit 15 while being supplied to the signal generating circuit that generates the source signal. The wiring impedance calculation voltage generating unit 14 generates a calculation voltage for calculating the wiring impedance, and supplies it to the calculation voltage output terminal 16. The calculation voltage supply terminal 16 is connected to one end of the wiring impedance calculation wiring Ri, and the end portion of the calculation voltage output side wiring Rai is connected to the calculation voltage, and the calculation voltage is supplied to the wiring impedance calculation wiring Ri. The other end of the wiring impedance calculation 甩 甩 wiring Ri is correctly detected, and the end of the voltage input side wiring Rci is detected, and is connected to the detection terminal 17, and the detection voltage output from the other end of the wiring impedance calculation wiring Ri is input to Terminal 17 is detected. The detected voltage input to the detection terminal 17 is supplied to the wiring impedance calculation unit 18. Further, the calculation voltage supplied to the calculation voltage output terminal 16 is also supplied to the wiring impedance calculation unit 18. The wiring impedance calculating unit 18 obtains a difference between the voltage 値 of the calculated voltage and the voltage 値 of the detected voltage, and calculates the wiring impedance 基于 based on the obtained difference. The calculated wiring impedance 値 is supplied to the analog ® power supply voltage adding unit 13 and the gradation power supply voltage adding unit 15 . The analog power supply voltage adding unit 13 calculates a voltage 値 (voltage drop 电压) of the voltage drop due to the wiring impedance based on the supplied wiring impedance ,, and the voltage 类 of the analog power supply voltage supplied from the analog power supply voltage input terminal 1 1 Only the calculated voltage drop 提高 (increased voltage 値) is added, and the analog power supply voltage (the boosted) is added to the analog power supply voltage output terminal 19. The analog power supply voltage supplied to the analog power supply voltage output terminal 19 is supplied to the source drive circuit STi + 1 on the downstream side for driving -31· 1270047 ICSDi + 1 . Further, the gradation power supply voltage adding unit 15 calculates a voltage 値 (voltage drop 値) of the voltage drop due to the wiring impedance based on the supplied wiring impedance ,, and the gradation power supply voltage supplied from the gradation power supply voltage input terminal 12. On the voltage 値, only the calculated voltage drop 提高 (increased voltage 値) is added, and the (increased) gradation power supply voltage of the voltage 値 is added to the gradation power supply voltage output terminal 20. The gray power supply voltage supplied to the gradation power supply voltage output terminal 20 is supplied to the drive signal _Di_ 1 of the source drive circuit STi + 1 on the downstream side. Further, in Fig. 3, only one gradation power supply voltage input terminal 12, gradation power supply voltage addition unit 15 and gradation power supply voltage output terminal 20 are shown, but the ICSDi for driving is supplied as described above. Since the voltages are different from each other in the plurality of gradation power supply voltages, the gradation power supply voltage input terminal 12, the gradation power supply voltage addition unit 15 and the gradation power supply voltage output terminal 20 are provided corresponding to the respective gradation power supply voltages. As described above, in the liquid crystal display device 1A, the driving ICSDi of the source driving circuit STi I drops the voltage calculated by the voltage calculated using the wiring impedance calculating wiring Ri, and the power supply voltage is increased toward the downstream side. The drive circuit STi + 1 outputs. The output power supply voltage passes through the power supply voltage output wiring group Ei on the flexible substrate SBi constituting the source drive circuit STi, the power supply voltage connection wiring group Gi + 1 of the liquid crystal display panel 2, and the downstream side drive circuit STi + 1 The power supply voltage is input to the drive group ICSDi + 1 by the wiring group Ai + 1 and supplied to the downstream side drive circuit STi + 1 . The power supply voltage of the ICSDi + 1 for driving to the downstream side is lower than the voltage due to the ICSDi -32-1270047 »« at the time of the output. Therefore, the power supply voltage supplied to the downstream side drive IC SD i + 1 becomes the voltage required for the drive JC to operate normally. Therefore, since the power supply voltage of the appropriate voltage 分别 is supplied to the downstream side driving ICSDi + 1, respectively, malfunction of the driving IC SD can be prevented. Thus, the liquid crystal display device ία can be normally operated. In the liquid crystal display device 1A, the wiring impedance calculation wiring Ri is formed so as to return to the flexible substrate φ plate SBi via the liquid crystal display panel 2 from the flexible substrate SBi constituting the source drive circuit STi. The wiring impedance calculation wiring Ri which is basically equivalent to the signal wiring from the driving ICSDi to the downstream side source driving ICSDi + 1 is formed. In other words, the power supply voltage between the driving ICSDi and the downstream side driving IC SDi + 1 is divided into the power supply voltage output wiring group Ei and the liquid crystal display panel 2 on the flexible substrate SBi of the source driving circuit STi. The power supply voltage is connected to three types of wirings of the power supply voltage input wiring group Ai + 1 on the flexible substrate SBi + 1 of the wiring group Gi + 1 and the downstream side source driving circuit STi + 1 . On the other hand, the wiring impedance calculation wiring Ri is formed so as to return to the flexible substrate SBi via the liquid crystal display panel 2 from the flexible substrate SBi constituting the source drive circuit STi. Three kinds of calculation voltage output side wirings Rai as the first wiring and the panel side wiring Rbi on the liquid crystal display panel 2 and the detection voltage input side wiring Rci as the second wiring on the flexible substrate S Bi on the SBi wiring. The power supply voltage output wiring Ei on the flexible substrate SB i corresponding to the source voltage output side wiring Rai corresponding to the source drive circuit S Ti ' corresponds to the panel side wiring Rbi on the liquid crystal display panel 2 -33- 1270047 The power supply voltage connection wiring group Gi + 1, the detection voltage input side wiring Rci corresponds to the power supply voltage input wiring group Ai + 1 on the flexible substrate SBi of the downstream side source drive circuit STi + 1. Therefore, the wiring impedance calculation wiring Ri which is substantially equivalent to the signal wiring from the driving ICSDi to the downstream side driving ICSDi + 1 can be formed. Thus, the wiring impedance 値 and the voltage drop 信号 of the signal wiring from the driving IC SDi to the downstream side driving IC SDi + 1 can be accurately obtained. However, the material, length, width, and thickness of the signal wiring between the ICSDi for driving and the ICSDi + i for driving the downstream side are predetermined in the design stage of the liquid crystal display device 1A. Therefore, it is possible to additionally form the signal wiring of the material, the length, the width, and the thickness determined in the design stage and measure the wiring impedance 値, and store the obtained wiring impedance 记忆 in the memory, using the stored wiring. The impedance 値 is used to calculate the voltage drop 値, and only the calculated voltage drop 値 is added to the analog power supply voltage and the gradation power supply voltage. However, such a method is liable to cause the following problems, so it is not preferable. First, since the liquid crystal display panel 2 and the source drive circuit ST are connected by thermocompression bonding by interposing an anisotropic conductive film, a crimping resistance is generated in the connection portion. Therefore, in the separately formed signal wiring, it is difficult to take into consideration the influence of the crimping resistance, and there is a problem that the wiring impedance 不能 cannot be accurately measured.

第2，雖然信號佈線的材料、長度、寬度、厚度是在液 晶顯示裝置1 A的設計階段中預先決定的，但在實際製造液 晶顯示面板2或源極驅動電路S T時，信號佈線的長度、寬 度、厚度分別存在公差，而產生製造上的偏差。從而，由 於另外製成的信號佈線和實際上製造的液晶顯示裝置1 A -34 ~ 1270047 中的信號佈線之間的長度、寬度、厚度並不可能變得完全 相同的，所以另外製成的信號佈線中，存在不能測量正確 的佈線阻抗値的問題。 第3，記憶體中存儲有預先測量的佈線阻抗値的場合， 記憶體的配置處成爲一個問題。首先，將記憶體設置在驅 動用1C的外部的情況中，由於需要增加新的部件，而成爲 提高成本的要因。此外，將記憶體設置在驅動用1C的內部 的情況中，也是由於增加了新的部件，而成爲提高成本的 _ 要因。而且，如果利用驅動用1C內的已有的記憶體的話， 雖然不會因增加新的部件而導致成本提高，但是由於若液 晶顯示裝置1 A的規格發生變化則其佈線阻抗値的値也發 生變化，所以驅動用1C失去了汎用性，在每一次液晶顯示 裝置1 A的規格發生變化時，不得不製作新的驅動用1C， 同樣成爲提高成本的要因。 根據上述原因，如本實施方式那樣，使用實際在液晶顯 示裝置1 A上製成佈線阻抗算出用佈線Ri來測量佈線阻抗 値的方式，能夠得到正確的佈線阻抗値，能夠對信號佈線 ^ 導致的電源電壓的電壓下降進行合適的補償。 此外，在液晶顯示裝置1 A中，驅動用IC SDi的工作用類 比電源電壓和供給到液晶顯示面板2的灰度電源電壓，其 分別只加上由佈線阻抗導致的電壓下降値並供給到驅動用 ICS Di。因此，由於向各個驅動用IC SDi上供給了合適的電 壓値的工作用電源電壓，所以可防止驅動用ICSDi的誤動 作。此外，由於灰度電源電壓以合適的電壓値供給到各個 驅動用ICSDi，所以能夠從各個驅動用ICSDi向液晶顯示面 -35- 1270047 Λ 板2分別供給合適的源極信號，能夠降低灰度偏差等的顯 示不均勻現象，提高液晶顯示裝置1Α的顯示品質。 而且，上述的說明中，雖然僅僅對源極驅動電路STi進 行了說明，但對閘極驅動電路GT，也可以以同樣方式實 施。此外，並不限定於液晶顯示裝置1 A，如果是具有在顯 示面板的周圍邊緣部分上並行的連接有多個驅動電路的結 構的顯示裝置，就可以以同樣方式實施。而且，對在液晶 顯示裝置的周圍邊緣部（玻璃基板）上直接安裝驅動用1C 的所謂COG ( Chip On Glass )方式的液晶顯示裝置，也能 0 夠以同樣方式實施。 此外，對控制電路3，與源極驅動電路STi同樣地，也可 以形成佈線阻抗算出用佈線，在從電源電路6輸出電源電 壓的時候，輸出按照電壓下降値的電壓値進行了提高的電 源電壓。 此外，在第1圖所示的結構例子中，雖然將一個信號供 給用FPC與液晶顯示面板2的角部連接，但還可以將另一 | 個信號供給用FPC與液晶顯示面板2的中間附近處連接。 此外，第2圖中，雖然存在類比電源電壓加算部1 3，但 可以考慮不採用類比電源電壓加算部1 3的結構。該場合， 最好使類比電源電壓具有足夠高的値，使得即使佈線阻抗 中產生電壓下降也不會發生誤動作。 [實施例2] 第3圖是說明本發明的實施例2的液晶顯示裝置1 B的各 個源極驅動用T C P中的各個資料流程動的時間圖。該液晶 顯示裝置1 B具有與如第9圖所示的在先例子的液晶顯示裝 -36- 1270047 為 置1 A大部分相同的結構，在此爲了使說明簡單，示出了僅 使用4個源極驅動用1C的例子。該液晶顯示裝置與第9圖 所示的在先例子的液晶顯示裝置1 A不同的地方在於， (1 )各個源極驅動用TCP上的源極驅動用1C的圖像資 料信號用輸入端子，相互不是並聯連接的，在前段的源極 驅動用1C中處理之後的圖像資料信號傳送到鄰接的源極 驅動用1C的圖像資料信號用輸入端子中，以及 (2 )各個源極驅動用1C，對於輸入的圖像資料信號進行 | 與在先例子相同的信號處理，並個別地輸出到與液晶顯示 面板的各個圖元連接的預定的源級信號線的同時，僅將在 輸入的圖像資料信號中沒有處理的圖像資料信號傳送到鄰 接的源極驅動用1C中。 而且，對應於這些圖像資料的脈衝信號，本來，是由與 源極驅動用ICSD1〜SD4分別連接的液晶面板的源極線的 條數對應的數目的脈衝序列構成的，但在第3圖中爲了說 明的容易，將每個對應於各個資料a〜d的脈衝信號用單獨 的脈衝表示。換句話說，從外部電路基板3的控制用IC5 得到的一個掃描期間中的連續的圖像資料信號a〜d，經由 信號供給佈線7、撓性佈線基板FPC以及連接佈線q輸入 到設置在最初的TCP上的源極驅動用ICSD1。然後，源極 驅動用ICSD 1，相應於輸入到其中的初始脈衝而對圖像資 料信號a進行處理，將圖像資料信號輸出到與液晶顯示面 板2的各個圖元連接的預定的源極信號線，同時，該圖像 資料信號a是其他的源極驅動用1C中不需要的信號，因此 將該源極驅動用ICSD 1中沒有被處理的剩下的圖像信號b -37- 1270047 t 〜d傳送到鄰接的源極驅動用ICSD2中。 源極驅動用ICSD2中，相應於輸入到其中的初始脈衝而 以同樣方式對圖像資料信號b進行處理，將圖像資料信號 輸出到液晶顯示面板2的源極信號線，同時，由於該圖像 資料信號b也是其他的源極驅動用1C中不需要的信號，所 以將該源極驅動用ICSD2中沒有被處理的剩下的圖像信號 c和d傳送到鄰接的源極驅動用ICSD3，然後，對源極驅動 用ICSD 3和SD4也依次以同樣方式進行處理。 _ 根據這樣的結構的技術方案，使得成爲連接佈線流過 圖像資料信號a〜d，而連接佈線L2流過圖像資料信號b〜 d，連接佈線L3流過圖像資料信號c和d，進而連接佈線L4 僅流過圖像資料信號d的狀態。因此，採用第9圖所示的 在先的信號傳送方式的液晶顯示裝置1 A的連接佈線h〜 L6中全部流過圖像資料信號，但由於流過本實施例的連接 佈線h〜L4的圖像資料信號依次減少，所以連接佈線從h 〜L4產生的EMI大量減少。 這裏，對本實施例中使用的源極驅動用1C的具體例子用 ^ 第4圖進行說明。而且，第4圖是用於說明本發明中使用 的源極驅動用1C的內部電路結構的方塊圖。該源極驅動用 1C與在先的源極驅動用1C相同，具備移位寄存器63、資 料鎖存器64、資料寄存器65、鎖存器66、電平轉換器67、 灰度電壓產生電路68、D/A轉換器69、輸出電路70之外， 作爲獨自的結構，還具備從輸入的圖像資料選擇預定的圖 像資料輸出到下一階段的圖像資料輸出控制電路7 1。 移位寄存器63與時鐘信號同步進行移位元工作，選擇基 -38- 1270047 • · 於輸入的預定的初始脈衝對圖像資料進行採樣的位元， 料鎖存器64將輸入的圖像資料暫時地儲存並送出到資 寄存器65。資料寄存器65，根據來自移位寄存器63的 示，在從資料鎖存器64時間上分割的輸入的圖像資料中 對預定的圖像資料進行採樣並送出到鎖存器66。鎖存器 中相應於選通輸入將資料寄存器65的資料打包鎖存，並 出到電平轉換器67。電平轉換器67中，將鎖存的資料轉 成類比電路部電源電平並送出到D/A轉換器69。灰度電 I 產生電路68將從外部輸入的標準電壓根據內部階梯阻 進行阻抗分配，產生T校正的電壓，送出到D/A轉換器69 D/A轉換器69，基於來自灰度電壓產生電路68的r校正 壓將從電平轉換器67輸入的數位圖像信號轉換成類比 號，送出到輸出電路70。輸出電路70，是由OP放大器 輸出緩存構成的電壓跟隨電路（voltage follow)，向液 驅動用輸出端子輸出類比信號。 一方面，圖像資料輸出控制電路7 1，在根據移位寄存 63所指示的時間，在資料鎖存器64鎖存的圖像資料中， ^ 沒有存儲在資料寄存器65中的圖像資料信號向鄰接的 極驅動用1C輸出。該場合，前述圖像資料輸出控制電 7 1 ’可以用在向前述源極驅動用1C輸入初始脈衝的期間 通過圖像資料信號，在沒有向前述源極驅動用1C輸入的 始脈衝的期間通過前述圖像資料信號的開關電路這樣的 單電路構成。 因此，本實施例中使用的源極驅動用1C，由於通過在 入的圖像資料信號之中，將除了處理的圖像資料信號之 資 料 指 66 送 換 壓 抗 〇 電 信 和 晶 器 將 源 路 不 初 簡 輸 外 -39- 1270047 籲 的其他圖像資料信號送出到鄰接的下一個源極驅動用Ic 的方式，向多段地串聯連接的源極驅動用1C中送出的是依 次減少了資料量的圖像資料信號，所以即使圖像資料信號 佈線很長也由於隨著遠離圖像資料信號的輸入端部圖像資 料信號量依次減少，因此EMI的產生大幅度地減少。 〔實施例3〕 第5圖是表示本發明的實施例3的液晶顯示裝置1 c的槪 略的俯視圖’第6圖是表示第5圖的信號DATA1〜DAT A 3 g 之間的時間的時間圖。該液晶顯示裝置1，與第9圖所示 的在先例子的液晶顯示裝置1具有大部分相同的結構，不 同之處在於， (1 )將串聯連接的多數N個（N〉2。這裏N = 6 )的TCP 的串聯連接組在中央部分分割成2部分，換句話說分成由 源極驅動電路ST1〜ST3形成的3個TCP構成的串聯連接 組，和由源極驅動電路ST4〜ST6形成的3個TCP構成的 串聯連接組，在分開處鄰接的各個驅動電路ST3和ST4分 別通過在FPCi和FPC2上形成的信號等的供給線7以及7’ ®與控制電路基板3連接，以及， (2)設置在控制電路基板3上的控制用IC5具備介面 5 i、由匯流排驅動器的方向開關構成的定時控制器52和線 路記憶體53。 換句話說，在第9圖所示的在先例子的液晶顯示裝置1 中，從PC等的圖像資料信號產生裝置送出的圖像信號，如 第6圖的DATA1所示，分別作爲對應源極驅動用ICSD1〜 S D 6的對應資料1〜6的脈衝信號而傳送過來。然後，對應 -40- 1270047 1 « 這些資料1〜6的脈衝信號，通過並未另外在圖中表示的時 間脈衝進行控制’比如，對應資料1的脈衝信號向源極驅 動用ICSD1、對應資料2的脈衝信號向源極驅動用ICSD2 這樣地依次供給，向對應各個源極驅動用ICSm〜SD6的液 晶顯示面板2的各個圖元的源極線路依次供給。而且，對 應這些資料1〜資料6的脈衝信號，本來，應該是由對應 各個源極驅動用ICSD1〜SD6連接的液晶面板的源極線路 的條數的數量的脈衝序列構成的信號，但爲了在第6圖中 g 容易進行說明，將對應各個資料1〜6的每個脈衝信號都用 單獨的脈衝表示。 當將這樣的第6圖的DATA1所示的信號原樣輸入到本實 施例的液晶顯示裝置1 C的時候，相對源極驅動用IC SD4〜 SD6是以正確的順序傳送過來的，但相對源極驅動用ICSD1 〜SD3是以相反的順序傳送過來的。即，對於源極驅動用 ICSD4〜SD6來說，對應資料4的脈衝信號向源極驅動用 ICSD4 ’對應資料5的脈衝信號向源極驅動用ICSD5，對應 資料6的脈衝信號向源極驅動用IC SD6，這樣依次按照正 W 確的順序供給，因此液晶顯示裝置的左右任意一半能夠正 常地顯示。然而，對於源極驅動用ICSD1〜SD3來說，對應 資料1的脈衝信號向源極驅動用IC S D 3，對應資料2的脈 衝信號向源極驅動用ICSD2，對應資料3的脈衝信號向源 極驅動用ICSD 1，這樣以相反的順序供給，使得液晶顯示 裝置至少左右的任意一半不能夠正常地顯示。 在此，本實施例中，作爲設置在控制電路基板3上的控 制用IC5 ’使用具有介面、由匯流排驅動器的方向開關 -41- 1270047 ♦ 構成的定時控制器52和線路記憶體53的控制用IC，一旦 從PC等的圖像資料信號產生裝置8傳送過來的圖像資料信 號DATA1通過定時控制器52讀取到線路記憶體53,然後， 通過定時控制器52，相對源極驅動用ICSD4〜SD6，如第6 圖的DATA2所示，以正確的順序，即以資料4、資料5、 資料6的順序經由FPC!的信號等的供給線7輸出到源極驅 動用ICSD4，此外，相對源極驅動用ICSD1〜SD3，如第6 圖的DAT A3所示，以相反的順序，即以資料3、資料2、 _ 資料1的順序經由FPC2的信號等的供給線7 ’送出到源極驅 動用ICSD3。 這樣，由於相對源極驅動用ICSD1〜SD3，對應資料1的 脈衝信號向源極驅動用ICSD1，對應資料2的脈衝信號向 源極驅動用ICSD2，對應資料3的脈衝信號向源極驅動用 ICSD3正確地供給，所以能夠在液晶顯示面板2的整個畫 面範圍內正常地顯示。 而且，對於由匯流排驅動器的方向開關構成的定時控制 $ 器52，相對源極驅動用ICSD4〜SD6以正確的順序送出資 料的電路，是作爲順序電路（queue )(稱爲先進先出/first in first out ( FIFO ))而公知的電路，此外，相對源極驅動 用ICSD1〜SD3以相反的順序送出資料的電路，也是作爲堆 疊電路（stack)(稱爲先進後出/first in last out (FIL0)) 在本領域的人員中所公知的電路。 另外，本實施例中，由於液晶顯示面板2的串聯連接多 個TCP的串聯連接組在中央部分被分成2個部分，所以縮 短了分成的各個串聯連接組的長度，而且，來自前述控制 -42- 1270047 用IC5的信號等分別供給到夾持分開處而鄰接的2個源極 驅動用ICSD3和SD4，因此減少了直到分開的各個串聯連 接組的端部的源極驅動用ICSD1和SD6的電壓下降的同時 其電壓下降量實際上變得相等，由此避免了在最顯眼的處 所的液晶顯示面板2的中央部中產生顯示不均勻的現象而 且減少了周圍邊緣部中產生顯示不均勻的現象。 尤其，由於控制用IC5與在分開處鄰接的2個源極驅動 用ICSD3和SD4連接，所以不需要用將佈線延伸到液晶顯 0 示面板2的端部，因此能夠使電路基板3變小。另外，由 於串聯連接的多個TCP的串聯連接組在中央部分被分成2 部分，所以向2個串聯連接組供給的資料信號，如第6圖 的資料2和資料3所示，減少了一半，而且，該減少了一 半的資料信號，最晚也要在下一個掃描期間內傳送即可， 所以能夠放大脈衝的振幅，同樣大幅度地減少了 EMI。 而且，本實施例3中，雖然示出了如下裝置，即作爲液 晶顯示裝置1 C的控制電路基板3上配置的控制用IC5，使 用具有介面5 i、由匯流排驅動器的方向開關構成的定時控 ^ 制器52和線路記憶體53的控制用1C，相對驅動用ICSD4 〜SD6以正確的順序送出，此外相對驅動用ICSD1〜SD3以 相反的順序送出，但是，如果在PC等的圖像資料信號產生 裝置中使用預先將相對驅動用ICSD1〜SD3的信號向相反 方向產生的裝置，那麼也可以使用不特意變化相對驅動用 ICSD1〜SD3的順序而原樣送出的裝置。此外，本實施例中 示出的是作爲連接液晶顯示面板2和控制電路3的FPC使 用了分成FPC!和FPC2這樣的2個的FPC，但爲了縮短兩個 -43- 1270047 » * FPC之間的距離也可以合成1個FPC。 【圖式簡單說明】 第1圖是表示構成賓施例1的液晶顯示裝置的液晶顯示 面板和源極驅動電路的連接關係的俯視圖。 第2圖是表示具備源極驅動電路的驅動用ic的結構的方 塊圖。 第3圖是說明實施例2的液晶顯示裝置中的各個源極驅 動用TCP上的源極驅動用1C中的各個資料的流動的時間 圖。 第4圖是用於說明第3圖的源極驅動用1C的內部電路結 構的方塊圖。 第5圖是表示實施例3的液晶顯示裝置的槪略的部分俯 視圖。 第6圖是表示第5圖的信號DATA1〜DATA3之間的時間 的時間圖。 第7A圖是TCP方式的液晶顯示裝置的槪略圖，第7B圖 是第7A圖中承載的源極驅動用TCP(或者閘極驅動用TCP) β的槪略圖。 第8圖是說明第7圖的液晶顯示裝置的各個源極驅動用 TCP上的源極驅動用1C中的各個資料的流動的時間圖。 第9圖是採用信號傳輸方式的在先的液晶顯示裝置的槪 略圖。 第1 0圖是改良了第9圖中示出的信號傳輸方式的液晶顯 示裝置的槪略圖。 -44- 1270047 主要元件符號說明】 1，1， ，ΙΑ— 1C 液 晶 2 液 晶 3 控 制 4 基 板 5 控 制 6 電 源 7 信 號 11 類 比 12 灰 度 13 類 比 14 佈 線 15 灰 度 16 算 出 17 檢 出 18 佈 線 19 類 比 20 灰 度 ST1 — ST6 源 極 SB1 - -SB7 撓 性 SD1 - -SD7 驅 動 GT1 閘 極 GB1 撓 性 GDI 驅 動 Ai 電 源Second, although the material, length, width, and thickness of the signal wiring are determined in advance in the design stage of the liquid crystal display device 1 A, the length of the signal wiring, when the liquid crystal display panel 2 or the source driving circuit ST is actually manufactured, There are tolerances in width and thickness, respectively, and manufacturing variations occur. Therefore, since the length, width, and thickness between the separately formed signal wiring and the signal wiring in the actually manufactured liquid crystal display device 1 A -34 ~ 1270047 are not likely to be completely the same, an additionally prepared signal In the wiring, there is a problem that the correct wiring impedance 不能 cannot be measured. Third, when the wiring impedance 値 measured in advance is stored in the memory, the arrangement of the memory becomes a problem. First, in the case where the memory is placed outside the driving 1C, it is necessary to add new components, which is a factor for increasing the cost. Further, in the case where the memory is placed inside the driving 1C, it is also a factor that increases the cost due to the addition of new components. In addition, if the existing memory in the drive 1C is used, the cost is not increased by adding a new component. However, if the specification of the liquid crystal display device 1 A is changed, the wiring impedance 値 occurs. Since the drive 1C loses the versatility, it is necessary to create a new drive 1C every time the specification of the liquid crystal display device 1A changes, which is also a factor for increasing the cost. According to the above-mentioned reason, as in the present embodiment, the wiring impedance 値 is measured by forming the wiring impedance calculation wiring Ri on the liquid crystal display device 1 A, and the wiring impedance 値 can be obtained, and the signal wiring can be caused. The voltage drop of the power supply voltage is appropriately compensated. Further, in the liquid crystal display device 1 A, the driving IC SDi operates with the analog power supply voltage and the gradation power supply voltage supplied to the liquid crystal display panel 2, respectively, and only the voltage drop caused by the wiring impedance is added and supplied to the driving. Use ICS Di. Therefore, since the operating power supply voltage of the appropriate voltage 供给 is supplied to each of the driving ICs SDi, it is possible to prevent malfunction of the driving ICSDi. Further, since the gradation power supply voltage is supplied to the respective driving ICSDis at an appropriate voltage ,, an appropriate source signal can be supplied from the respective driving ICSDi to the liquid crystal display surface -35-1270047 Λ2, and the gradation deviation can be reduced. The display unevenness is improved, and the display quality of the liquid crystal display device 1 is improved. Further, in the above description, only the source drive circuit STi has been described, but the gate drive circuit GT can be implemented in the same manner. Further, the present invention is not limited to the liquid crystal display device 1 A, and can be implemented in the same manner if it is a display device having a structure in which a plurality of driving circuits are connected in parallel on the peripheral edge portion of the display panel. In addition, a so-called COG (Chip On Glass) liquid crystal display device in which the driving 1C is directly mounted on the peripheral edge portion (glass substrate) of the liquid crystal display device can be implemented in the same manner. Further, similarly to the source drive circuit STi, the control circuit 3 may be formed with a wiring impedance calculation wiring, and when the power supply voltage is output from the power supply circuit 6, the power supply voltage that is increased in accordance with the voltage 値 voltage 値 is output. . Further, in the configuration example shown in Fig. 1, although one signal supply FPC is connected to the corner of the liquid crystal display panel 2, another intermediate signal supply FPC and the liquid crystal display panel 2 may be provided in the vicinity of the middle. Connected. Further, in Fig. 2, although the analog power supply voltage adding unit 13 is present, it is conceivable that the analog power supply voltage adding unit 13 is not employed. In this case, it is preferable to make the analog supply voltage sufficiently high so that no malfunction occurs even if a voltage drop occurs in the wiring impedance. [Embodiment 2] Fig. 3 is a timing chart for explaining the flow of each data in each source driving T C P of the liquid crystal display device 1 B according to the second embodiment of the present invention. The liquid crystal display device 1 B has the same configuration as that of the first embodiment of the liquid crystal display device - 36-1270047 shown in Fig. 9, and is used for the sake of simplicity of explanation. An example of 1C for source driving. The liquid crystal display device differs from the liquid crystal display device 1 A of the prior art shown in FIG. 9 in that (1) the image data signal input terminal for the source driving 1C on each source driving TCP. The image data signals processed in the source drive 1C in the previous stage are transmitted to the image data signal input terminals of the adjacent source drive 1C, and (2) the respective source drivers are used. 1C, for the input image data signal | the same signal processing as the previous example, and individually output to a predetermined source-level signal line connected to each primitive of the liquid crystal display panel, only the input image The image data signal that is not processed in the image signal is transmitted to the adjacent source driving 1C. Further, the pulse signal corresponding to the image data is originally composed of a pulse sequence corresponding to the number of source lines of the liquid crystal panels respectively connected to the source driving ICSD1 to SD4, but in FIG. For the sake of explanation, each pulse signal corresponding to each of the data a to d is represented by a separate pulse. In other words, the continuous image data signals a to d in one scanning period obtained from the control IC 5 of the external circuit board 3 are input to the initial stage via the signal supply wiring 7, the flexible wiring board FPC, and the connection wiring q. The source driver on TCP is ICSD1. Then, the source driving ICSD 1 processes the image data signal a corresponding to the initial pulse input thereto, and outputs the image data signal to a predetermined source signal connected to each primitive of the liquid crystal display panel 2. At the same time, the image data signal a is an unnecessary signal in the other source driving 1C, so the remaining image signals b - 37 - 1270047 t which are not processed in the source driving ICSD 1 are ~d is transferred to the adjacent source drive ICSD2. In the source driving ICSD2, the image data signal b is processed in the same manner corresponding to the initial pulse input thereto, and the image data signal is output to the source signal line of the liquid crystal display panel 2, and at the same time, due to the figure The image data signal b is also an unnecessary signal for the other source driving 1C. Therefore, the remaining image signals c and d that have not been processed in the source driving ICSD2 are transmitted to the adjacent source driving ICSD3. Then, the source drive ICSD 3 and SD4 are also processed in the same manner in order. According to the technical solution of such a configuration, the connection wiring flows through the image data signals a to d, the connection wiring L2 flows through the image data signals b to d, and the connection wiring L3 flows through the image data signals c and d. Further, the connection wiring L4 flows only through the state of the image data signal d. Therefore, the image data signals are all passed through the connection wirings h to L6 of the liquid crystal display device 1A of the prior signal transmission method shown in Fig. 9, but flow through the connection wirings h to L4 of the present embodiment. The image data signals are sequentially reduced, so the EMI generated by the connection wiring from h to L4 is greatly reduced. Here, a specific example of the source driving 1C used in the present embodiment will be described with reference to Fig. 4 . Further, Fig. 4 is a block diagram for explaining the internal circuit configuration of the source driving 1C used in the present invention. The source driving 1C is the same as the previous source driving 1C, and includes a shift register 63, a data latch 64, a data register 65, a latch 66, a level shifter 67, and a gray voltage generating circuit 68. In addition to the D/A converter 69 and the output circuit 70, as an independent configuration, an image data output control circuit 71 that selects a predetermined image data from the input image data and outputs it to the next stage is provided. The shift register 63 performs shift bit operation in synchronization with the clock signal, and selects the base -38-1270047. • The bit that samples the image data at the input predetermined initial pulse, and the material latch 64 inputs the image data. Temporarily stored and sent to the resource register 65. The data register 65 samples predetermined image data from the input image data temporally divided from the material latch 64 in accordance with the indication from the shift register 63, and sends it to the latch 66. The data of the data register 65 is packed and latched in the latch corresponding to the strobe input and output to the level shifter 67. In the level shifter 67, the latched data is converted to the analog circuit portion power supply level and sent to the D/A converter 69. The gradation electric I generating circuit 68 performs impedance distribution from the externally input standard voltage according to the internal step resistance, generates a T-corrected voltage, and sends it to the D/A converter 69 D/A converter 69 based on the gradation voltage generating circuit. The r correction voltage of 68 converts the digital image signal input from the level shifter 67 into an analog number, and sends it to the output circuit 70. The output circuit 70 is a voltage follower composed of an OP amplifier output buffer, and outputs an analog signal to the liquid drive output terminal. On the one hand, the image material output control circuit 171, in the image data latched by the material latch 64, based on the time indicated by the shift register 63, ^ is not stored in the data register signal in the material register 65. It is output to 1C for the adjacent pole drive. In this case, the image data output control circuit 7 1 ' can pass through the image data signal while the initial pulse is being input to the source driving 1C, and can pass through the initial pulse input to the source driving 1C. The single circuit of the switching circuit of the image data signal is configured. Therefore, the source driving 1C used in the present embodiment transmits the data index finger 66 of the processed image data signal to the voltage source and the crystal source by the input image data signal. The other image data signals that are not sent to the original -39- 1270047 are sent to the adjacent source driving Ic, and are sent to the source driving 1C connected in series in multiple stages, which sequentially reduces the amount of data. Since the image data signal is long, even if the image data amount of the input end portion away from the image data signal is sequentially decreased, the generation of EMI is greatly reduced. [Embodiment 3] Fig. 5 is a schematic plan view showing a liquid crystal display device 1c according to a third embodiment of the present invention. Fig. 6 is a view showing time between signals DATA1 to DAT A 3g in Fig. 5 Figure. The liquid crystal display device 1 has most of the same configuration as the liquid crystal display device 1 of the prior art shown in Fig. 9, except that (1) a plurality of N connected in series (N>2. Here N The serial connection group of TCP of 6 = 6 is divided into two parts in the central portion, in other words, a series connection group composed of three TCPs formed by the source drive circuits ST1 to ST3, and formed by the source drive circuits ST4 to ST6. The series connection group of three TCPs is connected to the control circuit board 3 via the supply lines 7 and 7' of the signals formed on the FPCi and the FPC 2, respectively, by the respective drive circuits ST3 and ST4 adjacent to each other at the separation, and ( 2) The control IC 5 provided on the control circuit board 3 includes an interface 5i, a timing controller 52 composed of a direction switch of the bus bar driver, and a line memory 53. In other words, in the liquid crystal display device 1 of the prior example shown in Fig. 9, the image signals sent from the image data signal generating means such as the PC are respectively shown as corresponding sources as shown by DATA1 in Fig. 6. The pole drive is transmitted by the pulse signals of the corresponding data 1 to 6 of ICSD1 to SD6. Then, corresponding to -40-1270047 1 «The pulse signals of these data 1 to 6 are controlled by the time pulse not shown in the figure. For example, the pulse signal corresponding to the data 1 is driven to the source ICSD1, the corresponding data 2 The pulse signals are sequentially supplied to the source drive ICSD 2 in this order, and are sequentially supplied to the source lines of the respective elements of the liquid crystal display panel 2 corresponding to the respective source drive ICSm to SD6. Further, the pulse signals corresponding to the data 1 to 6 are originally composed of a pulse sequence of the number of the source lines of the liquid crystal panels connected to the respective source drive ICSD1 to SD6, but in order to In Fig. 6, g is easily explained, and each pulse signal corresponding to each of the data 1 to 6 is represented by a separate pulse. When the signal indicated by DATA1 of the sixth drawing is input as it is to the liquid crystal display device 1 C of the present embodiment, the relative source driving ICs SD4 to SD6 are transferred in the correct order, but the relative source is The driver ICSD1 to SD3 are transmitted in reverse order. In other words, for the source drive ICSD4 to SD6, the pulse signal corresponding to the data 4 is supplied to the source drive ICSD5 for the source drive ICSD4' corresponding signal 5, and the pulse signal of the corresponding data 6 is driven to the source. Since the IC SD6 is sequentially supplied in the order of the positive order, the right and left half of the liquid crystal display device can be normally displayed. However, for the source drive ICSD1 to SD3, the pulse signal corresponding to the data 1 is supplied to the source drive IC SD 3, the pulse signal corresponding to the data 2 is directed to the source drive ICSD2, and the pulse signal corresponding to the data 3 is directed to the source. The driving ICSD 1 is supplied in the reverse order so that at least any half of the left and right of the liquid crystal display device cannot be normally displayed. Here, in the present embodiment, the control IC 5' provided on the control circuit board 3 is controlled by the timing controller 52 having the interface, the direction switch -41-1270047 ♦ by the busbar driver, and the line memory 53. With the IC, once the image data signal DATA1 transmitted from the image data signal generating means 8 of the PC or the like is read to the line memory 53 via the timing controller 52, the timing controller 52 is used to control the source drive ICSD4. ~SD6, as shown by DATA2 in Fig. 6, is output to the source drive ICSD4 via the supply line 7 such as the signal of FPC! in the order of data 4, data 5, and data 6 in the correct order. The source drive ICSD1 to SD3 are sent to the source in the reverse order, that is, in the reverse order, that is, in the order of data 3, data 2, and data 1, via the supply line 7' of the signal of the FPC2. Drive with ICSD3. In this way, the relative source driving ICSD1 to SD3, the pulse signal corresponding to the data 1 to the source driving ICSD1, the corresponding data 2 pulse signal to the source driving ICSD2, and the corresponding data 3 pulse signal to the source driving ICSD3 Since it is supplied correctly, it can be normally displayed in the entire screen range of the liquid crystal display panel 2. Further, with respect to the timing controller 52 constituted by the direction switch of the busbar driver, the circuit for sending data in the correct order with respect to the source driving ICSD4 to SD6 is used as a sequence circuit (called FIFO/first). A well-known circuit in addition to the first out (FIFO), and a circuit for sending data in the reverse order with respect to the source driving ICSD1 to SD3, also as a stacking circuit (referred to as advanced first/last in last out ( FIL0)) A circuit known to those skilled in the art. In addition, in the present embodiment, since the series connection group of the liquid crystal display panel 2 in which a plurality of TCPs are connected in series is divided into two portions in the central portion, the length of each of the divided series connection groups is shortened, and, from the aforementioned control -42 - 1270047 The signals of IC5 are supplied to the two source drive ICSD3s and SD4s that are adjacent to each other at the clamp separation, thereby reducing the voltages of the source drive ICSD1 and SD6 up to the ends of the separate series connection groups. When the voltage drops, the amount of voltage drop actually becomes equal, thereby avoiding occurrence of display unevenness in the central portion of the liquid crystal display panel 2 in the most conspicuous place and reducing display unevenness in the peripheral edge portion. . In particular, since the control IC 5 is connected to the two source driving ICSDs 3 and SD4 adjacent to each other, it is not necessary to extend the wiring to the end of the liquid crystal display panel 2, so that the circuit board 3 can be made small. In addition, since the series connection group of a plurality of TCPs connected in series is divided into two parts in the central portion, the data signals supplied to the two series connection groups are reduced by half as shown in the data 2 and the data 3 of FIG. Moreover, the data signal, which is reduced by half, can be transmitted at the latest in the next scanning period, so that the amplitude of the pulse can be amplified, and EMI is also greatly reduced. Further, in the third embodiment, the control IC 5 disposed on the control circuit board 3 of the liquid crystal display device 1 C is used as the timing of the interface switch having the interface 5 i and the bus bar driver. The control controller 52 and the control 1C for the line memory 53 are sent in the correct order with respect to the drive ICSDs 4 to SD6, and are also sent in the reverse order with respect to the drive ICSD1 to SD3. However, if the image data is on the PC or the like. In the signal generating device, a device that generates signals in the opposite directions to the driving ICSD1 to SD3 is used in advance, and a device that is not intentionally changed in the order of the driving ICSD1 to SD3 may be used as it is. Further, in the present embodiment, it is shown that two FPCs, which are divided into FPC! and FPC2, are used as the FPCs that connect the liquid crystal display panel 2 and the control circuit 3, but in order to shorten the two -43-1270047 » * FPCs The distance can also be combined into one FPC. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view showing a connection relationship between a liquid crystal display panel and a source driving circuit of a liquid crystal display device of the first embodiment. Fig. 2 is a block diagram showing a configuration of a driving ic including a source driving circuit. Fig. 3 is a timing chart for explaining the flow of each material in the source driving 1C on each of the source driving TCPs in the liquid crystal display device of the second embodiment. Fig. 4 is a block diagram for explaining the internal circuit configuration of the source driving 1C of Fig. 3. Fig. 5 is a schematic partial plan view showing the liquid crystal display device of the third embodiment. Fig. 6 is a timing chart showing the time between the signals DATA1 to DATA3 of Fig. 5. Fig. 7A is a schematic diagram of a TCP liquid crystal display device, and Fig. 7B is a schematic diagram of a source driving TCP (or gate driving TCP) β carried in Fig. 7A. Fig. 8 is a timing chart for explaining the flow of each material in the source driving 1C on each of the source driving TCPs of the liquid crystal display device of Fig. 7. Fig. 9 is a schematic diagram of a prior liquid crystal display device employing a signal transmission method. Fig. 10 is a schematic diagram of a liquid crystal display device in which the signal transmission method shown in Fig. 9 is improved. -44- 1270047 Main component symbol description] 1,1, ,ΙΑ—1C Liquid crystal 2 Liquid crystal 3 Control 4 Substrate 5 Control 6 Power supply 7 Signal 11 Analog 12 Gray scale 13 Analog 14 Wiring 15 Gray scale 16 Calculation 17 Detection 18 Wiring 19 Analog 20 Grayscale ST1 — ST6 Source SB1 - -SB7 Flexible SD1 - -SD7 Drive GT1 Gate GB1 Flexible GDI Drive Ai Power Supply

顯示裝置 顯示面板 電路 用1C 電路 供給用FPC 電源電壓輸入端子 電源電壓輸入端子 電源電壓加算部 阻抗算出用電壓生成部 電源電壓加算部 用電壓輸出端子 端子 阻抗算出部 電源電壓輸出端子 電源電壓輸出端子 驅動電路· 基板 用1C 驅動電路 基板 'Display device display panel circuit 1C circuit supply FPC power supply voltage input terminal power supply voltage input terminal power supply voltage addition unit impedance calculation voltage generation unit power supply voltage supply unit voltage output terminal terminal impedance calculation unit power supply voltage output terminal power supply voltage output terminal drive 1C drive circuit board for circuit and substrate '

用1C 電壓輸入用佈線組 -45- 1270047 X * Bi 控制信號輸入用佈線組 Ci 源極信號輸出用佈線組 Di 控制信號輸出用佈線組 Ei 電源電壓輸出用佈線組 Fi 控制信號用連接佈線組 Gi 電源電壓用連接佈線組 Hi 源極信號輸入端子組 Ri 佈線阻抗算出用佈線 Rai 算出用電壓輸出側佈線 Rbi 面板側佈線 Rci 檢出電壓輸入側佈線For the 1C voltage input wiring group -45-1270047 X * Bi control signal input wiring group Ci source signal output wiring group Di control signal output wiring group Ei power supply voltage output wiring group Fi control signal connection wiring group Gi Power supply voltage connection wiring group Hi source signal input terminal group Ri wiring impedance calculation wiring Rai calculation voltage output side wiring Rbi panel side wiring Rci detection voltage input side wiring

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Claims (1)

1270047 十、申請專利範圍： 1 . 一種顯示裝置，其構成爲：在顯示面板的周圍邊緣部上 連接多個具有驅動用IC的驅動電路，鄰接的驅動電路彼 此之間通過在前述顯示面板上形成的連接用佈線連接， 將驅動前述驅動用1C和前述顯示面板所需要的電源電壓 從外部控制電路供給到前述多個驅動電路的至少一個， 從該驅動電路向鄰接的驅動電路依次供給前述電源電 壓， 其特徵在於：對位於，電壓供給方向上流側的驅動用 1C，形成與從該驅動用1C到與電壓供給方向下流側鄰接 的驅動電路的驅動用1C的信號佈線大致等價的佈線阻抗 算出用佈線，前述上流側驅動用1C，通過向前述佈線阻 抗算出用佈線的一端輸出算出用電壓並檢測另一端的電 壓來算出佈線阻抗値，基於算出的佈線阻抗値算出電壓 下降値’向下流側驅動電路輸出只提高算出的電壓下降 値的量的電壓値的電源電壓。 2.如申請專利範圍第1項之顯示裝置，其中，前述驅動電 路係由將前述驅動用1C安裝在帶狀基板上的電路所構 成。 3 ·如申請專利範圍第2項之顯示裝置，其中，前述佈線阻 抗算出用佈線，係以從構成前述驅動電路的帶狀基板經 由前述顯示面板而再返回到前述帶狀基板上的方式形 成。 4 ·如申請專利範圍第1項之顯示裝置，其中，前述驅動電 路係由將前述驅動用1C安裝在前述顯示面板的周圍邊緣 -47- 1270047 部上的電路所構成。 5.如申請專利範圍第1項之顯示裝置，其中，前述驅動用 1C具備：電源電壓輸入的電源電壓輸入端子；生成算出 佈線阻抗値用的算出用電壓的算出用電壓生成部；將來 自該算出用電壓生成部的算出用電壓輸出到前述佈線阻 抗算出用佈線的一端的算出用電壓輸出端子；來自前述 佈線阻抗算出用佈線的另一端的輸出電壓輸入的檢出端 子；基於前述算出用電壓和來自前述檢出端子的檢出電 壓而算出佈線阻抗値的佈線阻抗算出部；在供給從前述 ® 電源電壓輸入端子輸入的電源電壓的同時，基於算出的 佈線阻抗値算出電壓下降値，並將前述電源電壓的電壓 値只增加算出的電壓下降値的電源電壓加算部；輸出來 自該電源電壓加算部的電源電壓的電源電壓輸出端子。 6 ·如申請專利範圍第5項之顯示裝置，其中，前述電源電 壓是驅動用1C的工作用電源電壓以及向顯示面板供給的 顯示用電源電壓。 7.如申請專利範圍第丨〜6項中任一項之顯示裝置，其中， ® 前述顯示裝置是液晶顯示裝置或者電漿顯示裝置。 8 · —種顯示裝置，其構成爲：在顯示面板的周圍邊緣部上 連接多個具有驅動用1C的驅動電路，鄰接的驅動電路彼 此之間通過在前述顯示面板上形成的連接用佈線連接， 將驅動前述驅動用1C和前述顯示面板所需要的電源電壓 從外部控制電路供給到前述多個驅動電路的至少一個， 從該驅動電路向鄰接的驅動電路依次供給前述電源電 壓， -48- 1270047 其特徵在於：前述驅動用IC，在輸入的圖像資料信 將除了處理的鼢像資料信號之外的其他圖像資 出到鄰接的下一個驅動用1C。 9.如申請專利範圍第8項之顯示裝置，其中，前 路係由將前述驅動用1C安裝在帶狀基板上的 成。 10·如申請專利範圍第9項之顯示裝置，其中，前 抗算出用佈線，以從構成前述驅動電路的帶狀 前述顯示面板再返回到前述帶狀基板上的方式 1 1 ·如申請專利範圍第8項之顯示裝置，其中，前 路由將前述驅動用1C安裝在前述顯示面板的 部上的電路構成。 12.如申請專利範圍第8項之顯示裝置，其中，前 1C具備圖像資料輸出控制電路，前述圖像資料 電路’將對應輸入到前述驅動用1C的初始脈衝 料信號之外的其他圖像資料信號向鄰接的下 用1C輸出。 ® 1 3 ·如申請專利範圍第1 2項之顯示裝置，其中， 資料輸出控制電路，係由在對前述源極驅動用 始脈衝的期間不使圖像資料信號通過，而在未 極驅動用1C輸入起始脈衝的期間使前述圖像 通過這樣的電路所構成。 1 4 ·如申g靑專利範圍第8〜1 3項中任一項之顯示 中’則述顯不裝置是液晶顯示裝置或電漿顯示 15·—種顯示裝置，該顯示裝置搆成爲：在顯示面 號之中， 料信號輸 述驅動電 電路所構 述佈線阻 基板經由 形成。 述驅動電 周圍邊緣 述驅動用 輸[出控制 的圖像資 一個驅動 前述圖像 1C輸入起 對前述源 資料信號 裝置，其 裝置。 板的周圍 -49- 1270047 邊緣部連接N個（其中，N>2 )具有驅動用1C的驅動 路，鄰接的驅動電路彼此之間通過在前述顯示面板上 成的連接用佈線連接，將驅動前述驅動用1C和前述顯 面板所需要的電源電壓從外部控制電路供給到前述 個驅動電路的至少一個，從該驅動電路向鄰接的驅動 路依次供給前述電源電壓， 其特徵在於：將串聯連接前述N個驅動電路的串聯 接組在中央部分成2部分，將來自前述控制電路的信 _ 以及電壓分別供給到夾住前述分割處而鄰接的2個驅 電路。 1 6 .如申請專利範圍第1 5項之顯示裝置，其中，前述驅 電路係由將前述驅動用1C安裝在帶狀基板上的電路 構成。 1 7 ·如申請專利範圍第1 6項之顯示裝置，其中，前述佈 阻抗算出用佈線，以從構成前述驅動電路的帶狀基板 由前述顯示面板再返回到前述帶狀基板上的方式 單 18.如申請專利範圍第15項之顯示裝置，其中，前述驅 電路係由將前述驅動用1C安裝在前述顯示面板的周 邊緣部上的電路所構成。 1 9 ·如申請專利範圍第1 5項之顯示裝置，其中，將連接 述控制電路和前述液晶顯不面板的1條或2條撓性佈 基板配置在液晶顯示面板的周圍邊緣的中央。 20.如申請專利範圍第15項之顯示裝置，其中，將從前 控制電路向夾住前述分割處而鄰接的2個TCP供給的 電 形 示 多 電 連 號 動 動 所 線 經 形 動 圍 -W·· 刖 線 述 信 -50- 1270047 J < 號的送出順序設爲，向一邊的TCP爲正方向的送出順 序，而向另一邊的TCP爲逆方向的送出順序。 2 1.如申請專利範圍第20項之顯示裝置，其中，在前述控 制電路和另一個TCP之間配置由線路記憶體和匯流排驅 動器的方向開關構成的定時控制器，藉由前述定時控制 器將從前述控制電路送出的正方向的送出順序的信號 轉換成逆方向。 22.如申請專利範圍第15〜21項中任一項之顯示裝置，其 _ 中，前述顯示裝置是液晶顯示裝置或電漿顯示裝置。1270047 X. Patent Application Range: 1. A display device configured to connect a plurality of driving circuits having driving ICs on peripheral edge portions of a display panel, and adjacent driving circuits are formed on the display panel by The connection is connected by wiring, and the power supply voltage required to drive the driving 1C and the display panel is supplied from an external control circuit to at least one of the plurality of driving circuits, and the power supply voltage is sequentially supplied from the driving circuit to the adjacent driving circuit. In the drive 1C located on the upstream side in the voltage supply direction, the wiring impedance is substantially equivalent to the signal line of the drive 1C from the drive 1C to the drive circuit adjacent to the downstream side in the voltage supply direction. In the upstream side driving 1C, the calculation voltage is outputted to one end of the wiring impedance calculation wiring, and the voltage at the other end is detected to calculate the wiring impedance 値, and the voltage drop 値 'downflow side is calculated based on the calculated wiring impedance 値The drive circuit output only increases the amount of the calculated voltage drop 値Zhi pressure supply voltage. 2. The display device according to claim 1, wherein the driving circuit is constituted by a circuit for mounting the driving 1C on a strip substrate. The display device according to the second aspect of the invention, wherein the wiring impedance calculation wiring is formed by returning the strip substrate constituting the drive circuit to the strip substrate via the display panel. The display device according to claim 1, wherein the driving circuit is constituted by a circuit for mounting the driving 1C on a peripheral edge -47-1270047 of the display panel. 5. The display device according to the first aspect of the invention, wherein the driving 1C includes a power supply voltage input terminal for inputting a power supply voltage, and a calculation voltage generating unit for generating a calculation voltage for calculating a wiring impedance; a calculation voltage output terminal for outputting the calculation voltage of the voltage generation unit to one end of the wiring impedance calculation wiring; a detection terminal for inputting an output voltage from the other end of the wiring impedance calculation wiring; and the calculation voltage based on the calculation voltage And a wiring impedance calculating unit that calculates a wiring impedance 和 from the detection voltage of the detection terminal; and supplies a power supply voltage input from the power supply voltage input terminal, and calculates a voltage drop 基于 based on the calculated wiring impedance 値The voltage 値 of the power supply voltage increases only the calculated voltage drop 値 power supply voltage adding unit; and the power supply voltage output terminal of the power supply voltage from the power supply voltage adding unit is output. The display device according to claim 5, wherein the power supply voltage is a working power supply voltage for driving 1C and a display power supply voltage supplied to the display panel. 7. The display device according to any one of the preceding claims, wherein the display device is a liquid crystal display device or a plasma display device. A display device is configured such that a plurality of drive circuits having a drive 1C are connected to a peripheral edge portion of the display panel, and adjacent drive circuits are connected to each other by a connection wiring formed on the display panel. Supplying the power supply voltage required for driving the driving 1C and the display panel from an external control circuit to at least one of the plurality of driving circuits, and sequentially supplying the power supply voltage from the driving circuit to an adjacent driving circuit, -48-1270047 The above-described driving IC is configured to supply an image other than the processed image data signal to the next adjacent driving 1C in the input image data. 9. The display device of claim 8, wherein the front path is formed by mounting the driving 1C on the strip substrate. 10. The display device according to claim 9, wherein the front anti-calculation wiring is returned from the strip-shaped display panel constituting the drive circuit to the strip substrate. The display device of the eighth aspect, wherein the front route is configured by a circuit in which the driving 1C is mounted on a portion of the display panel. 12. The display device of claim 8, wherein the front 1C is provided with an image data output control circuit, and the image data circuit 'corresponds to an image other than the initial pulse material signal of the driving 1C. The data signal is output to the adjacent lower 1C. The display device of claim 12, wherein the data output control circuit is not driven by the image data signal during the period of the source driving start pulse. The period in which 1C inputs the start pulse causes the aforementioned image to be formed by such a circuit. In the display of any one of the items 8 to 13 of the patent application, the display device is a liquid crystal display device or a plasma display device, and the display device is configured to: Among the display surface numbers, the material signal output driving circuit forms a wiring resistance substrate. The driving power is around the edge. The drive is output. [Image of the output control. One drive. The image 1C is input to the source data signal device. The periphery of the board -49 - 1270047 is connected to the edge portion N (where N > 2) has a driving path for driving 1C, and the adjacent driving circuits are connected to each other through a connection wiring formed on the display panel, and the foregoing will be driven. The power supply voltage required for the driving 1C and the display panel is supplied from the external control circuit to at least one of the aforementioned driving circuits, and the power supply voltage is sequentially supplied from the driving circuit to the adjacent driving circuit, and the N is connected in series. The series connection of the drive circuits is divided into two in the central portion, and the signal _ and the voltage from the control circuit are respectively supplied to the two drive circuits adjacent to each other to sandwich the division. The display device according to claim 15 wherein the drive circuit is constituted by a circuit for mounting the drive 1C on a strip substrate. The display device according to the first aspect of the invention, wherein the wiring impedance calculation wiring is returned from the display panel to the strip substrate from the strip substrate constituting the drive circuit. The display device according to claim 15, wherein the drive circuit is constituted by a circuit that mounts the drive 1C on a peripheral edge portion of the display panel. The display device of claim 15, wherein one or two flexible cloth substrates connecting the control circuit and the liquid crystal display panel are disposed at the center of a peripheral edge of the liquid crystal display panel. [20] The display device of claim 15, wherein the electric power supplied from the front control circuit to the two TCPs adjacent to the splitting portion is electrically connected to the electric multi-connected moving line. · 刖 Line Description - 50 - 1270047 The J < number is sent in the order in which the forward TCP is in the forward direction and the other TCP is in the reverse direction. [2] The display device of claim 20, wherein a timing controller composed of a direction switch of the line memory and the bus driver is disposed between the control circuit and another TCP, by using the timing controller The signal in the forward direction of the transmission direction sent from the control circuit is converted into the reverse direction. The display device according to any one of claims 15 to 21, wherein the display device is a liquid crystal display device or a plasma display device.
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