KR20060044908A - Display apparatus - Google Patents

Abstract

Provided is a display device capable of preventing a voltage drop of a sequentially transmitted power supply voltage, preventing malfunction of a driving IC, and improving display quality.

A plurality of source driving circuits ST having driving ICSDs are connected to the peripheral portion of the liquid crystal display panel 2, and a power supply voltage from the outside is sequentially supplied from a specific source driving circuit ST to adjacent source driving circuits. In the liquid crystal display device, the wiring resistance calculation wiring Ri which is almost equivalent to the signal wiring from the driving ICSDi to the driving IC adjacent to the downstream side of the voltage supply direction with respect to the driving ICSDi located upstream of the voltage supply direction. Form. The driving ICSDi outputs a calculation voltage at one end of the wiring resistance calculation line Ri and detects the voltage at the other end, thereby calculating the wiring resistance value and calculating the voltage drop value based on the calculated wiring resistance value. The power supply voltage which raises the voltage value by the calculated voltage drop value is output to the downstream driver IC.

Description

Display device {DISPLAY APPARATUS}

BRIEF DESCRIPTION OF THE DRAWINGS The top view which shows the connection relationship between the liquid crystal display panel and the source drive circuit which comprise the liquid crystal display device of Example 1;

2 is a block diagram showing a configuration of a driving IC included in a source driving circuit.

Fig. 3 is a timing chart illustrating the flow of data in source driving ICs on each source driving TCP in the liquid crystal display of Example 2;

FIG. 4 is a block diagram for explaining an internal circuit configuration of the source driving IC of FIG. 3. FIG.

Fig. 5 is a schematic partial plan view showing a liquid crystal display of Example 3;

6 is a timing chart showing timing between signals DATA1 to DATA3 of FIG.

Fig. 7A is a schematic diagram of a liquid crystal display device of a TCP system, and Fig. 7B is a schematic diagram of source driving TCP (or gate driving TCP) mounted on Fig. 7A.

FIG. 8 is a timing chart illustrating the flow of data in source driving ICs on respective source driving TCPs of the liquid crystal display of FIG. 7; FIG.

9 is a schematic diagram of a conventional liquid crystal display device employing a signal transmission method.

10 is a schematic diagram of a liquid crystal display device in which the signal transmission method shown in FIG. 9 is improved.

<Explanation of symbols for the main parts of the drawings>

1, 1 ', 1A-1C: liquid crystal display device 2: liquid crystal display panel

3: control circuit 4: board

5: control IC 6: power supply circuit

7: FPC for signal supply 11: analog power supply voltage input terminal

12: gradation power supply voltage input terminal 13: analog power supply voltage adding unit

14: Voltage preparing unit for calculating wiring resistance 15: Gray power supply voltage adding unit

16: output voltage output terminal 17: detection terminal

18: wiring resistance calculation unit 19: analog power supply voltage output terminal

2O: Gray power supply voltage output terminal ST1 to ST6: source driving circuit

SB1 to SB7: Flexible Board SD1 to SD7: Driving IC

GT1: gate drive circuit GB1: flexible substrate

GD1: Driver IC Ai: Wiring group for power supply voltage input

Bi: Wiring group for control signal input Ci: Wiring group for source signal output

Di: Wiring group for control signal output Ei: Wiring group for power voltage output

Fi: Connection wiring group for control signals Gi: Connection wiring group for power supply voltages

Hi: Source signal input terminal group Ri: Wiring resistance calculation wiring

Rai: Voltage output side wiring RBi: Panel side wiring

Rci: Detection Voltage Input Side Wiring

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device such as a liquid crystal display device or a plasma display device. In particular, a drive circuit having a plurality of drive ICs each including a gate drive IC or a source drive IC is connected in series, and the peripheral edge of the display panel is provided. The present invention relates to a display device mounted on a head.

A display device such as a liquid crystal display device or a plasma display device is generally connected to a display panel and a control circuit for driving the display panel by a plurality of tape carrier packages (TCPs) in which a driving IC is mounted on a tape-shaped substrate. have. Each of these TCPs is composed of a plurality of source driving TCPs and a gate driving TCP, each of which is connected to an external circuit board, from which the image data signal, a power supply voltage, and the like are supplied to each TCP. The liquid crystal display panel is driven by a liquid crystal drive IC comprising a gate driver IC and a source driver IC placed therein (see Patent Documents 1 and 2 below).

The operation principle of such a TCP type liquid crystal display device is shown in Figs. 7 and 8. Fig. 7A is a schematic diagram of a TCP type liquid crystal display device, and Fig. 7B is a source driving TCP (or gate driving TCP) mounted in Fig. 7A. Fig. 8 is a timing chart for explaining the flow of data in each source driving TCP.

In Fig. 7, the TCP type liquid crystal display device 50 is connected to a gate signal line or a source signal line of the liquid crystal display panel 51 at the periphery of an active matrix liquid crystal display panel 51 having a TFT (Thin Film Transistor). A plurality of gate driving TCPs 52 and source driving TCPs 53 for supplying the?, Image data signals, clock signals, IC driving power supply voltages, and counter electrode driving power supply voltages to the respective TCPs 52 and 53; The external circuit board 54 for supplying a liquid crystal display panel drive signal, such as these, is provided.

The gate driving TCP 52 or the source driving TCP 53 is, for example, a source driving IC 55 and a source driving IC 55 on the flexible substrate 56 as shown in Fig. 7B. A signal supply wiring 57 for supplying various driving signals of the liquid crystal display panel to the liquid crystal display device, and a signal output wiring 58 for supplying the signal output from the source driving IC 55 to the liquid crystal display panel 51. Doing.

The signal supply wirings 57 of the TCPs 52 and 53 are electrically connected to terminals on an external circuit board 54 in the vicinity of the liquid crystal display panel 51, for example, as shown in Fig. 7A. The liquid crystal display panel driving signal is introduced into the source driving IC 55 or the like from the image data processing IC 59 (see FIG. 8) provided on the external circuit board 54 and a power supply circuit not shown. In addition, the image data processing IC 59 is inputted with an image signal from an image signal generator such as a personal computer (not shown).

The operation principle of the TCP type liquid crystal display device 50 will be described with reference to FIG. 8, for example, in the case of the source driving TCP 53. The liquid crystal display device 50 shown in FIG. 8 includes four source driving TCPs 53A to 53D, for example, and each of the source driving TCPs 53A to 53D includes a source driving IC 55A. 55D) is mounted. Further, a plurality of gate driving TCPs 52 are also connected to the liquid crystal display device 50, but only one of them is described in FIG.

An image signal from an image signal generator such as a PC is processed by the image data processing IC 59, and a predetermined series of image data signals a to d are respectively supplied in the scanning period in synchronism with a clock signal to supply the signal supply wiring 57A. Through ~ 57D are simultaneously supplied to the source driving ICs 55A to 55D mounted on the respective source driving TCPs 53A to 53D. Note that the image data signals a to d originally consist of pulse trains corresponding to the number of source signal lines of the liquid crystal display panel 51 to which the source driving ICs 55A to 55D are connected, respectively. In order to facilitate explanation, the display is shown as a single pulse including the image data signals a to d.

On the other hand, each of the source driving ICs 55A to 55D is individually supplied with a start pulse at a predetermined timing. For example, an image data signal when an image data signal is input to the source driving IC 55A. A predetermined source signal line connected to each pixel of the liquid crystal display panel 51 by supplying a start pulse to the source driver IC 55A in accordance with a, and processing the image data signal a by the source driver IC 55A. To be printed separately. The above is the description of the source driving TCPs 53A to 53D, but the same processing is performed on the gate driving TCP 52 so that a predetermined image display is performed on the liquid crystal display panel 51.

By the way, the image data signal, power supply voltage, and the like of the liquid crystal display device 50 provided with such TCPs 52, 53A to 53D are separately supplied to the respective TCPs from the external circuit board 54, so that the external circuit board 54 is provided. A large number of wirings are required on the phase. For this reason, the manufacturing process of the external circuit board 54, TCP 52, 53A-53D, and the liquid crystal display panel 51 becomes complicated, and there exists a problem that a cost rise and reliability fall.

Therefore, in recent years, in order to reduce the number of wirings for such a TCP, a liquid crystal display device adopting a so-called signal transmission method has been developed in which signals input to one TCP and the like are sequentially transmitted to adjacent TCP (Patent Document 2 below). Reference).

So, in order to understand this invention below, the liquid crystal display device 1 which employ | adopted the signal transmission system disclosed by following patent document 2 is demonstrated using FIG. 9 is a schematic plan view of the liquid crystal display device disclosed in Patent Document 2 below.

The liquid crystal display device 1 includes an active matrix liquid crystal display panel 2 having a TFT (Thin Film Transistor), a control circuit board 3 disposed near the periphery of the liquid crystal display panel 2, Source drive circuits STi to ST6, which are connected to the control circuit board 3 and individually placed in one peripheral portion of the liquid crystal display panel 2, for example, six TCP, are provided.

The source drive circuits STi to ST6 on each TCP are source drive ICSD1 to SD6 disposed on each TCP, signal input wiring for inputting signals to the source drive IC, and output from the source drive IC. A first signal output line for outputting a signal to the liquid crystal panel 2, a second signal output line for sending an output signal from the source driving IC to an adjacent TCP, a power supply wiring for driving the source driving IC, and the like. The array consists of installed ones.

The plurality of source driving circuits STi to ST6 are connected in series by connection lines L1 to L6, respectively, and the first source driving circuit STi and the control circuit board 3 are provided with supply lines such as signals provided on the flexible wiring board FPC ( 7) is connected. The control circuit board 3 is composed of an image data signal control IC 5 and a power supply circuit 6 and the like, and the image signal transmitted from an image signal generation device such as a PC (not shown) is processed by the IC 5. It is supposed to be.

In addition, at the other peripheral edge of the liquid crystal display panel 2, the gate driving circuit GT1 (only one is shown in Fig. 9), which is separately placed in a plurality of TCPs, is also provided, and these are also connected in series and the first gate driving circuit GT1 is provided. In the same manner as in the case of the source driving circuit, it is connected to the gate driving IC GDl via a flexible wiring board through a supply line such as a signal (not shown).

In the liquid crystal display device 1 provided with such TCP, for example, when an image data signal, a power supply voltage, or the like is input from the control circuit board 3 to the first source driving ICSDl via the supply line 7 and the connection line L1, And a part of the image data signal is processed by the source driving ICSDl and output to the source electrode of each pixel of the corresponding liquid crystal display panel 2, while other signals, power supply voltages, etc. The image data signals are sequentially output to the source driving ICSD2 to SD6 via the connection wirings L2 to L6, and the corresponding image data signals are applied to the source electrodes of the respective pixels of the liquid crystal display panel 2 by the respective source driving ICSD2 to SD6. It is supposed to be output.

In this case, the gate control signal is similarly processed by the gate driving ICGDl in the gate driving circuit GTl provided at the other periphery of the liquid crystal display panel 2 and output to the gate electrode of each pixel of the corresponding liquid crystal display panel 2. It is supposed to be.

Therefore, according to this liquid crystal display device 1, since the number of wirings required for supplying a signal or the like from the control circuit board 3 to the TCP can be greatly reduced, compared with the conventional control circuit board and TCP. It becomes possible to reduce manufacturing cost.

However, since the liquid crystal display device 1 using TCP is a system of sequentially transmitting signals input to a specific TCP to adjacent TCPs, wiring for transmitting signals and the like is long, and wiring resistance is increased. There is a problem.

In addition, since TCP and liquid crystal display panels are formed with a plurality of wirings for liquid crystal driving ICs such as a source driving IC and a gate driving IC, and a plurality of wirings for driving the liquid crystal display panel, the wirings for transmitting signals and the like are formed. Space is limited. Therefore, the width and thickness of the wiring for transmitting signals and the like cannot be increased, and as a result, the wiring resistance is increased. Higher resistance of the wiring leads to a voltage drop in the signal to be transmitted, especially the power supply voltage, which causes malfunction of the liquid crystal drive IC. That is, since the voltage drop amount is sequentially increased toward the downstream side in the transfer direction, the power supply voltage output from the liquid crystal drive IC to the liquid crystal display panel differs between the upstream side and the downstream side in the series connection group of TCP. Therefore, for example, when the display of the same gradation is to be performed over the entire display area of the liquid crystal display panel, deviation may occur in the gradation on the upstream side and the downstream side, which may be a cause of lowering the display quality.

Moreover, in this liquid crystal display device 1, it was discovered that considerable electromagnetic interference noise ("EMI") is generated at the time of use. The reason for the occurrence of EMI is that each of the image data signal input terminals of the source driving ICSD1 to SD6 is electrically connected in parallel and simultaneously supplies the image data signals, so that one end portion is located along the edge of the liquid crystal display panel 2. There is a long image data signal wire extending from the connection wiring L1 to the source driving ICSD6 at the other end, and parallel to the source driving ICSDl to SD6 simultaneously. Since the image data signal supplied to the current flows, this causes the occurrence of EMI. In this liquid crystal display device 1, a large number of wires are provided at the edge of the liquid crystal display panel 2, and it is useless not to be involved in the image display of the liquid crystal display panel 2 to increase the size of this edge. Since it cannot be adopted because it is connected by increasing the area, it is not easy to adopt well-known means for improving EMI, which sets separate shield lines and the like.

On the other hand, as a liquid crystal display device that eliminates such irrationality, the serial connection group of a plurality of serially connected TCPs is divided into two at the center portion, and image data signals and the like are supplied from one side of each divided TCP serial connection group in the same direction. A liquid crystal display device is considered. For example, as shown in the liquid crystal display device 1 'of FIG. 10, a serial connection group of a plurality of TCPs connected in series is divided into two at three in the center, that is, TCP in which the source driving circuits STi to ST3 are formed. The serial connection group composed of the serial connection group and the serial connection group consisting of TCP in which the source driving circuits ST4 to ST6 are formed, and the signals formed on the FPC₂ and FPC \ of the first TCP source driving circuits STi and ST4 of each serial connection group. It is also conceivable to connect the control circuit board 3 via the supply lines 7 'and 7 to supply a signal or the like from the control circuit board 3 to the respective source driving circuits STi and ST4.

According to the liquid crystal display device 1 'employing this method, since the series connection group is divided into two, the length of the divided two series connection groups is also shortened, and the voltage drop to the end of the series connection group is reduced. At the same time, the image data signals supplied to the serial connection groups are halved, and the EMI is also reduced.

However, also in the liquid crystal display device 1 'of such a structure, in the vicinity of the source drive circuit ST3 of the TCP where the end is located in the center part of the liquid crystal display panel among the two serial connection groups divided, the wiring is compared with the source drive circuit STi vicinity. Since the resistance is large, the voltage drop up to this portion also increases. On the other hand, since the voltage drop does not occur substantially in the vicinity of the source drive circuit ST4 on the other side adjacent to the source drive circuit ST3, the large pixel area and the power source of the power supply voltage drop in the center of the display area of the liquid crystal display panel most noticeable Small pixel areas of voltage drop are connected in a line, and there is a fear that display unevenness may occur in this portion. In addition, since the control circuit board 3 must be connected to the first TCP source drive circuits STi and ST4 of the two series connection groups which exist in a distant position, the length of the control circuit board 3 becomes large and large. do.

In addition, the liquid crystal display device disclosed in Patent Document 2 below attempts to reduce the resistance of the signal wiring and the power wiring by studying the arrangement position and the shape of the signal wiring and the power wiring formed in TCP. Couldn't say In addition, although the above-mentioned problem with the prior art has been described with the liquid crystal display as an example, the same problem occurs with the plasma display device using the plasma spray panel.

[Patent Document 1]

Japanese Patent Laid-Open No. 62-238684 (1 page Uharan 1-13 lines, Fig. 2)

[Patent Document 2]

Japanese Patent Application Laid-Open No. 20O1-056481 (claims, paragraphs [OOO2] to [0013], [O043] to [OO47], FIG. 1)

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems in the prior art, and a first object of the present invention is a so-called signal that sequentially transmits a signal or the like input to one drive circuit having a drive IC to adjacent drive circuits. In a display device employing a transmission method, it is possible to provide a display device which can prevent a voltage drop of a power source voltage sequentially transmitted, prevent a malfunction of a driving IC, and improve display quality.

A second object of the present invention is to provide an image data signal wiring in a display device employing a so-called signal transmission method, which sequentially transmits signals input to one driving circuit having a driving IC to adjacent driving circuits. By electrically processing the flowing image data signal itself, it is possible to provide a display device that dramatically reduces EMI generation.

In addition, the third object of the present invention is the drive connected in series in the display device employing a so-called signal transmission method, which sequentially transmits signals input to one drive circuit having a drive IC to adjacent drive circuits. In the liquid crystal display device which divides the series connection group of a circuit into 2 and supplies image data signals etc. from each one side of the series connection group of two divided drive circuits, the display unevenness in the display panel center part and the peripheral part was reduced. It is to provide a display device.

The said 1st objective of this invention can be achieved by the following structures. That is, according to the first aspect of the present invention, a plurality of drive circuits having drive ICs are connected to the periphery of the display panel, and adjacent drive circuits are connected by connection wirings formed in the display panel, and an external control circuit is provided. The display device is configured to supply a power supply voltage required for driving the driving IC and the display panel to at least one of the plurality of driving circuits, and sequentially supply the power supply voltage to the adjacent driving circuit from the driving circuit. A wiring resistance calculation wiring is substantially equivalent to the signal wiring from the driving IC to the driving IC of the driving circuit adjacent to the voltage supply direction downstream, with respect to the driving IC located on the upstream side of the voltage supply direction, The upstream side driving IC outputs a voltage for calculation to one end of the wiring resistance calculation wiring, The wiring resistance value is calculated by detecting the voltage, the voltage drop value is calculated based on the calculated wiring resistance value, and the power supply voltage which raises the voltage value by the calculated voltage drop value is outputted to the downstream driving circuit. A display device is provided.

In this aspect, the drive circuit preferably comprises a circuit in which the driving IC is mounted on a tape-shaped substrate, and the wiring resistance calculation wiring is formed from the tape-shaped substrate constituting the driving circuit via the display panel. It is preferable that it is formed so that it may return to the said tape-shaped board | substrate again. In this embodiment, the driver IC may be a circuit mounted on the periphery of the display panel.

In this embodiment, the driving IC includes a power supply voltage input terminal to which a power supply voltage is input, a calculation voltage preparation unit for preparing a calculation voltage used to calculate wiring resistance values, and a calculation voltage preparation unit. A voltage output terminal for outputting a voltage for calculating the voltage to one end of the wiring resistance calculation wiring; a detection terminal to which an output voltage from another end of the wiring resistance calculation wiring is input; A wiring resistance calculating section that calculates a wiring resistance value based on the detected voltage from the detection terminal, and calculates a voltage drop value based on the calculated wiring resistance value while being supplied with the power supply voltage input from the power supply voltage input terminal. A power supply voltage adder that adds the voltage value of the voltage by the voltage drop value, and the power supply voltage adder Preferably provided with a power supply voltage output terminal for outputting a voltage source, and also the power supply voltage, preferably a display for the power supply voltage to be supplied to the same power supply voltage operation and a display panel according to the IC for the driving.

The first type of display device is applicable to a liquid crystal display device or a plasma display device.

Moreover, the said 2nd objective of this invention can be achieved by the following structures. That is, according to the second aspect of the present invention, a plurality of drive circuits having drive ICs are connected to the periphery of the display panel, and adjacent drive circuits are connected to each other by connection wirings formed in the display panel. The display device is configured to supply a power supply voltage required for driving the driving IC and the display panel to at least one of the plurality of driving circuits, and sequentially supply the power supply voltage to the adjacent driving circuit from the driving circuit. A display device is provided in which the driving IC outputs an image data signal other than an image data signal processed in an input image data signal to an adjacent next driving IC.

In this aspect, the drive circuit preferably comprises a circuit in which the driving IC is mounted on a tape-shaped substrate, and the wiring resistance calculation wiring is again passed from the tape-shaped substrate constituting the driving circuit via the display panel. It is preferable that it is formed so that it may return to the said tape-shaped board | substrate. In this embodiment, the driver IC may be a circuit mounted on the periphery of the display panel.

In the liquid crystal display device of the related aspect, the driving IC includes an image data output control circuit, and the image data output control circuit is other than an image data signal corresponding to the start pulse input to the driving IC. It is preferable to output an image data signal to an adjacent next driver IC, and the image data output control circuit does not pass the image data signal while the start pulse is input to the source driver IC. It is preferable that the circuit is configured to pass the image data signal while the start pulse is not input to the source driving IC.

The second type of display device can also be applied to a liquid crystal display device or a plasma display device.

The said 3rd objective of this invention can be achieved by the following structures. That is, according to the third aspect of the present invention, a plurality of N driving circuits having drive ICs (where N> 2) are connected to the periphery of the display panel, and adjacent wirings are connected to each other in the display panel. A power supply voltage required for driving the driving IC and the display panel from an external control circuit, is supplied to at least one of the plurality of driving circuits, and the power supply voltage is supplied to an adjacent driving circuit from the driving circuit. In a display device configured to be supplied sequentially, two serially connected series connection groups in which the N driving circuits are connected in series are divided at a central portion, and two adjacent driving circuits are arranged with the signal and voltage from the control circuit interposed therebetween. There is provided a liquid crystal display device which is individually supplied to the.

In this aspect, the drive circuit preferably comprises a circuit in which the driving IC is mounted on a tape-shaped substrate, and the wiring resistance calculation wiring is again routed from the tape-shaped substrate constituting the driving circuit via the display panel. It is preferable that it is formed so that it may return to the said tape-shaped board | substrate. In this embodiment, the driver IC may be a circuit mounted on the periphery of the display panel.

Moreover, in this form, it is preferable to arrange | position one or two flexible wiring boards which connect the said control circuit and the said liquid crystal display panel in the center of the periphery of a liquid crystal display panel.

In this embodiment, the order in which signals to be supplied from the control circuit to two adjacent driving circuits are divided between the control circuits in a forward direction in one of the driving circuits and in a reverse direction in the other driving circuits. In this case, a timing controller including a line memory and a direction switch for driving a bus is disposed between the control circuit and one driving circuit, and is sent out from the control circuit by the timing controller. It is preferable to convert the signal of the forward order to be reversed.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of the liquid crystal display device which concerns on this invention is described in detail with reference to attached drawing. However, embodiment shown below shows an example of the liquid crystal display device as a display device for incorporating the technical idea of this invention, and does not intend to specify this invention to this liquid crystal display device, The same applies to the used plasma display device. In addition, in the following description, the same code | symbol is attached | subjected and demonstrated to the same component as the liquid crystal display device of the conventional example shown to FIGS. 9-10.

Example 1

The schematic configuration of the liquid crystal display device 1A according to the first embodiment is the same as most of the liquid crystal display device 1 of the conventional example shown in FIG. The liquid crystal display device 1A of Example 1 will be described. 1 is a plan view showing a connection relationship between a liquid crystal display panel constituting the liquid crystal display device 1A of Example 1 and a source driving circuit, and FIG. 2 shows a configuration of a driving IC included in the source driving circuit. It is a block diagram.

As shown in FIG. 9, the liquid crystal display device 1A according to the first embodiment includes a liquid crystal display panel 2, a control circuit 3 disposed at the periphery of the liquid crystal display panel 2, and a plurality of driving circuits ST1 ˜. It is comprised with ST6 and GT1.

The liquid crystal display panel 2 is an active matrix liquid crystal display panel using TFT, for example. An active matrix type liquid crystal display panel using TFTs corresponds to a plurality of pixel electrodes arranged in a row on a transparent substrate such as glass, and has an active matrix substrate on which TFTs as switching elements are provided, and almost the entire surface of the transparent substrate. It is comprised through the liquid crystal layer between the opposing board | substrates with which one common electrode is formed in it.

The active matrix substrate forms a plurality of gate signal lines parallel to each other and a plurality of source signal lines perpendicular to and parallel to the gate signal line on the transparent substrate, and the pixel electrode and the TFT are formed in a rectangular region partitioned by the gate signal line and the source signal line. It is formed. The pixel electrode is connected to the drain of the TFT, the gate signal line is connected to the gate, and the source signal line is connected to the source. On the other hand, the gate signal line is formed so that one end thereof extends to one side peripheral portion of the transparent substrate, and one end thereof becomes an input terminal. In addition, one end of the source signal line extends to one side peripheral portion of the transparent substrate, and the one end becomes an input terminal. In addition, since the gate signal line and the source signal line are formed in the direction orthogonal to each other as described above, the side edge portion where the input terminal of the gate signal line is formed and the side edge portion where the input terminal of the source signal line are formed are shown in FIG. As described above, the positional relationship is adjacent to each other on the transparent substrate.

Source driving circuits STi to ST6 (generally, reference numeral "ST" is used) are connected to the input terminal of the source signal line. The source drive circuit ST is configured by TCP. For example, the source drive circuit STi is configured by mounting the driving ICSD1 on the flexible substrate SB1 and forming a plurality of signal wires. The signal wirings include a plurality of source signal output wirings for supplying a source signal (display voltage applied to the pixel) output from the driving ICSD1 to an input terminal of the source signal line. The source drive circuit STi and the liquid crystal display panel 2 are connected by thermocompression bonding via an anisotropic conductive film so that the source signal output wiring and the input terminal of the source signal line are electrically connected. Also about other source drive circuits ST2-ST6, a structure and the connection relationship with the liquid crystal display panel 2 are equivalent to the source drive circuit STi.

The gate driving circuit GT1 is connected to the input terminal of the gate signal line. In Fig. 9, only one gate driving circuit GT1 is shown, but a plurality of gate driving circuits are actually connected. Gate drive circuit GT1 is comprised by TCP, Specifically, it is comprised by mounting drive ICGD1 on flexible board | substrate GB1, and forming many signal wiring. The signal wirings include a plurality of gate signal output wirings for supplying a gate signal (on / off voltage of the TFT) output from the driving ICGD1 to an input terminal of the gate signal line. The gate drive circuit GT1 and the liquid crystal display panel 2 are connected by thermocompression bonding via an anisotropic conductive film so that the gate signal output wiring and the gate signal input terminal are electrically connected. Also for other gate drive circuits not shown, the configuration and the connection relationship with the liquid crystal display panel 2 are the same as those of the gate drive circuit GT1.

In this manner, a plurality of drive circuits ST1 to ST6 and GT1 are connected to the peripheral portion of the liquid crystal display panel 2. These drive circuits ST1 to ST6 and GT1 operate by various power supply voltages, image data and control signals supplied from the control circuit 3. The control circuit 3 is formed by forming the control IC 5, the power supply circuit 6, and a plurality of signal wires on the substrate 4. The control circuit 3 is connected to the liquid crystal display panel 2 via a flexible printed circuit (FPC) 7 for signal supply. The control IC 5 outputs image data displayed on the liquid crystal display panel 2, control signals for controlling the driving circuits ST1 to ST6, and GTI. The power supply circuit 6 generates and outputs various power supply voltages such as an analog power supply voltage for driving ICSD1 to SD7 and a GD1, a gray power supply voltage for performing grayscale display of the liquid crystal display panel 2, and the like. .

Various signals including image data, control signals, and various power supply voltages output from the control circuit 3 are supplied to the liquid crystal display panel 2 through the signal supply FPC 7. In the peripheral portion of the liquid crystal display panel 2, connection wirings for connecting adjacent drive circuits are formed, as well as connection wirings for connecting the signal supply FPC 7 and the source driving circuit STi and the gate driving circuit GT1. It is. For this reason, various signals supplied from the control circuit 3 are sequentially transmitted from the source drive circuit STi to the adjacent source drive circuits ST2 to ST6 as shown in FIG. Although not shown in FIG. 9, similarly to the source driving circuit ST, the various signals supplied from the control circuit 3 are sequentially transmitted from the gate driving circuit GT1 to the adjacent gate driving circuit in the gate driving circuit. .

In the first embodiment, in the liquid crystal display device 1A having such a configuration, the driving ICSDi for the driving ICSDi of the source driving circuit STi (i = 1 to 6) located on the upstream side of the power supply voltage supply direction is obtained from the driving ICSDi. The wiring resistance calculation wiring which is substantially equivalent to the signal wiring to the driving ICSDi + 1 of the driving circuit STi + 1 adjacent to the downstream side in the power supply voltage supply direction is formed. Equivalent means that the state of formation is the same, and specifically, that the width and the thickness are almost the same with the same material, or the wiring resistance value is not limited to the same material, the length, and the thickness.

The upstream driving ICSDi calculates a wiring resistance value by applying a calculation voltage to one end of the wiring resistance calculation wiring and detecting a voltage at the other end, and calculates a voltage drop value based on the calculated wiring resistance value. And outputs the power supply voltage which raised the voltage value by the calculated voltage drop value toward the downstream drive circuit STi + 1. Hereinafter, the wiring resistance calculation wiring and the driving ICSDi will be described.

1 is a plan view for explaining a connection relationship between the liquid crystal display panel 2 and the source driving circuit STi in the liquid crystal display device 1A of the first embodiment. The source drive circuit STi is configured by mounting the driving ICSDi on a rectangular flexible substrate SBi and forming a plurality of signal wiring groups Ai, Bi, Ci, Di, Ei and signal wirings Rai and Rci. In addition, although the signal wiring group and the signal wiring are formed in the surface side (back side) in which the flexible board | substrate SBi opposes the liquid crystal display panel 2, in order to make it easy to understand, the surface which opposes the liquid crystal display panel 2 in FIG. The signal wiring is described on the opposite side (surface side), and the driving ICSDi indicates the mounting position by a two-dot chain line.

In the flexible substrate SBi, the power supply voltage input wiring group Ai, the control signal input wiring group Bi, the source signal output wiring group Ci, the control signal output wiring group Di, and the power supply voltage output wiring group Ei are formed. In addition, the calculation voltage output side wiring Rai and the detection voltage input side wiring Rci constituting the wiring resistance calculation wiring Ri are formed in the flexible substrate SBi.

In flexible board | substrate SBi, one side of two long sides is a connection part for connecting with the liquid crystal display panel 2. The power supply voltage input wiring group Ai is formed from the connection portion to the power supply voltage input terminal of the driving ICSDi. The control signal input wiring group Bi is formed from the connection portion to the control signal input terminal of the driving ICSDi. The source signal output wiring group Ci is formed from the source signal output terminal of the driving ICSDi to the connection portion. The control signal output wiring group Di is formed from the control signal output terminal of the driving ICSDi to the connection portion. The power supply voltage output wiring group Ei is formed from the power supply voltage output terminal of the driving ICSDi to the connection portion. The calculation voltage output side wiring Rai is formed from the calculation voltage output terminal of the driving ICSDi to the connection portion. The detection voltage input side wiring Rci is formed from the connection portion to the detection terminal of the driving ICSDi.

On the other hand, the source signal input terminal group Hi formed by extending a source signal line to the edge part as mentioned above is arrange | positioned at the peripheral part of the liquid crystal display panel 2, and the source drive circuit STi is the source signal output wiring group of the flexible board SBi. It is connected to the periphery of the liquid crystal display panel 2 so that Ci and the source signal input terminal group Hi may overlap each other.

In the peripheral portion of the liquid crystal display panel 2, a connection wiring group Fi and Gi for connecting the source driving circuit STi and the source driving circuit STi-1 adjacent to the signal transmission direction upstream side are formed, and the source driving circuit STi And connection wiring groups Fi + 1 and Gi + 1 for connecting the source drive circuit STi + 1 adjacent to the downstream side of the signal transmission direction are formed.

The connection wiring group Fi is a connection wiring group for control signals, and is formed from the connection place of the upstream source drive circuit STi-1 to the connection place of the source drive circuit STi. Specifically, the control signal connection wiring group Fi is overlapped with the control signal output wiring group Di-1 of the upstream source driving circuit STi-1 to the position overlapping with the control signal input wiring group Bi of the source driving circuit STi. It is formed in substantially U shape.

The connection wiring group Gi is a connection wiring group for power supply voltages, and is formed from the connection place of the upstream source drive circuit STi-1 to the connection place of the source drive circuit STi. Specifically, the connection voltage group Gi for the power supply voltage overlaps the power supply voltage input wiring group Ai of the source driving circuit STi from the position overlapping the power supply voltage output wiring group Ei-1 of the upstream source driving circuit STi-1. It is formed in a substantially U shape.

In addition, the connection wiring group Fi + 1 is a connection wiring group for a control signal, and is formed from the connection place of the source drive circuit STi to the connection place of the downstream source drive circuit STi + 1. Specifically, the connection wiring group Fi for a control signal +1 is formed in a substantially U shape from a position overlapping the control signal output wiring group Di of the source driving circuit STi to a position overlapping the control signal input wiring group Bi + 1 of the downstream source driving circuit STi + 1. have.

The connection wiring group Gi + 1 is a connection wiring group for a power supply voltage, and is formed from the connection place of the source drive circuit STi to the connection place of the downstream source drive circuit STi + 1. Specifically, the power supply voltage connection wiring group Gi + 1 overlaps the power supply voltage input wiring group Ai + 1 of the downstream source drive circuit STi + 1 from a position overlapping the power supply voltage output wiring group Ei of the source driving circuit STi. It is formed in substantially U shape to a position.

Moreover, the panel side wiring Rbi which comprises the wiring resistance calculation wiring Ri is formed in the peripheral part of the liquid crystal display panel 2. The panel side wiring Rbi is formed by dragging the periphery of the liquid crystal display panel 2 from the position overlapping the calculation voltage output side wiring Rai of the source driving circuit STi to the position overlapping the detection voltage input side wiring Rci of the source driving circuit STi. have.

The wiring resistance calculation wiring Ri is composed of the calculation voltage output side wiring Rai, the panel side wiring Rbi, and the detection voltage input side wiring Rci. The wiring resistance calculation wiring Ri is formed of the same material as the signal wiring from the driving ICSDi to the driving ICSDi + 1 of the driving circuit STi + 1 adjacent to the downstream side in the supply voltage supply direction, so that the length and width are almost the same. .

When the source drive circuit STi is connected to the periphery of the liquid crystal display panel 2 by forming the wiring group and wiring as described above, the control signal and the power supply voltage output from the upstream source drive circuit STi-1 are for the control signal. It is supplied to the source drive circuit STi via the connection wiring group Fi and the connection wiring group Gi for power supply voltages. The control signal and the power supply voltage output from the source drive circuit STi are supplied to the downstream source drive circuit STi + 1 through the control signal connection wiring group Fi + 1 and the power supply voltage connection wiring group Gi + 1.

In this way, the control signal transmitted sequentially includes the operation clock signal and the image data of the driving ICSDi. Incidentally, the power supply voltage transmitted sequentially includes an analog power supply voltage serving as an operation power supply of an analog circuit inside the driving ICSDi, and a plurality of gray scale power supply voltages having different voltage values. When the gradation display is performed with the liquid crystal display panel 2, one or two voltages are selected based on the image data, and a plurality of gradation power supply voltages are determined by the rudder-resistance inside the driving ICSDi. It is supplied to the liquid crystal display panel 2 as a source signal.

The driving ICSDi of the source driving circuit STi operates the supplied analog power supply voltage as the operating power supply, executes predetermined control processing based on a control signal such as a clock signal or display data, and supplies the source signal to the liquid crystal display panel 2. Output to.

The driving ICSDi calculates the wiring resistance value by outputting the calculation voltage at one end of the wiring resistance calculation line Ri and detecting the voltage at the other end, and calculating the voltage drop value at the calculated wiring resistance value. The power supply voltage which raises the voltage value by one voltage drop value is output toward the downstream source driving circuit STi + 1. The output power supply voltage passes through the power supply voltage output wiring group Ei on the flexible substrate SBi and the power supply voltage connection wiring Gi + 1 on the liquid crystal display panel 2, and is supplied to the driving IC of the downstream source driving circuit STi + 1.

Subsequently, a configuration example of the driving ICSDi will be described. Fig. 2 is a block diagram showing the configuration of driving ICSDi. In addition, in FIG. 2, the structure for calculation of wiring resistance value and the structure for the addition of the voltage value of a power supply voltage are shown, and the structure for display control of the liquid crystal display panel 2 originally performed by driving ICSDi is abbreviate | omitted.

The analog power supply voltage from the power supply circuit 6 of the control circuit 3 or the upstream driving ICSDi-1 is input to the analog power supply voltage input terminal 11, and the gray power supply voltage is supplied to the gray power supply voltage input terminal 12. Is entered. The analog power supply voltage is supplied to each of a plurality of blocks including a signal generation circuit for creating a source signal as an operating power supply of an analog circuit inside the IC, and at the same time, the analog power supply voltage adding unit 13 and the wiring resistance calculation voltage generator ( 14). The gradation power supply voltage is supplied to the signal generation circuit for generating the source signal, and also to the gradation power supply voltage adding unit 15.

The wiring resistance calculation voltage generator 14 prepares a calculation voltage used to calculate the wiring resistance and supplies it to the calculation voltage output terminal 16. One end of the wiring resistance calculation wiring Ri is connected to the voltage output terminal 16 for calculation, and exactly the edge part of the wiring voltage output side Rai for calculation is connected, and the calculation voltage is supplied to the wiring resistance calculation wiring Ri. The other end of the wiring resistance calculation wiring Ri, exactly, the end of the detection voltage input wiring Rci is connected to the detection terminal 17, and the detection voltage output from the other end of the wiring resistance calculation wiring Ri is detected by the detection terminal 17. Is entered.

The detection voltage input to the detection terminal 17 is supplied to the wiring resistance calculator 18. The wiring resistance calculator 18 is also supplied with a calculation voltage supplied to the calculation voltage output terminal 16. The wiring resistance calculation unit 18 requests the difference between the voltage value of the calculation voltage and the voltage value of the detection voltage, and calculates the wiring resistance value based on the requested difference. The calculated wiring resistance command, the analog power supply voltage adding section 13, and the gradation power supply voltage adding section 15 are supplied.

The analog power supply voltage adding section 13 calculates the voltage value (voltage drop value) of the voltage drop by the wiring resistance based on the supplied wiring resistance value, and the analog power supply voltage supplied from the analog power supply voltage input terminal 11. The voltage is added as much as the voltage drop value calculated (raising the voltage value), and the analog power supply voltage to which the voltage value is added (increased) is supplied to the analog power supply voltage output terminal 19. The analog power supply voltage supplied to the analog power supply voltage output terminal 19 is supplied to the driving ICSDi + 1 of the source driving circuit STi + 1 on the downstream side.

The gradation power supply voltage adding unit 15 calculates the voltage value (voltage drop value) of the voltage drop to the wiring resistance based on the supplied wiring resistance value, and the gradation power supply supplied from the gradation power supply voltage input terminal 12. The voltage is added by the voltage drop calculated by the voltage value, and the gradation power supply voltage to which the voltage value is added is supplied to the gradation power supply voltage output terminal 20. The gradation power supply voltage supplied to the gradation power supply voltage output terminal 20 is supplied to the driving ICSDi + 1 of the downstream source driving circuit STi + 1.

In addition, in FIG. 3, only one gray power supply voltage input terminal 12, the gray power supply voltage adding unit 15, and one gray power supply voltage output terminal 20 are shown. However, as described above, voltage values are different from each other in the driving ICSDi. Since a plurality of different gradation power supply voltages are supplied, the gradation power supply voltage input terminal 12, the gradation power supply voltage adding unit 15, and the gradation power supply voltage output terminal 20 are provided corresponding to each gradation power supply voltage.

As described above, in the liquid crystal display device 1A, the driving ICSDi of the source driving circuit STi uses the power source voltage which raises the voltage value by the voltage drop value calculated using the wiring resistance calculating wiring Ri, and the downstream source driving circuit STi + l. Output toward. The output power supply voltage is the power supply voltage output wiring group Ei on the flexible substrate SBi constituting the source driving circuit STi, the connection wiring group Gi + 1 for the power supply voltage of the liquid crystal display panel 2, and the power supply voltage of the downstream driving circuit STi + l. It passes through the input wiring group Ai + 1, and is supplied to the drive ICSDi + 1 of the downstream drive circuit STi + 1.

The power supply voltage supplied to the downstream driving ICSDi + 1 passes through the wiring, but the voltage value drops, but since the voltage value is increased in advance by the voltage drop value at the time of output from the upstream driving ICSDi, the downstream driving voltage The power supply voltage supplied to ICSDi + 1 becomes a voltage value necessary for the driving IC to operate normally. Therefore, since the downstream driving ICSDi + 1 is supplied with a power supply voltage having an appropriate voltage value, the malfunction of the driving ICSD can be prevented. For this reason, the liquid crystal display device 1A can be operated normally.

In the liquid crystal display device 1A, the wiring resistance calculation wiring Ri is formed from the flexible substrate SBi constituting the source driving circuit STi to return to the flexible substrate SBi via the liquid crystal display panel 2. The wiring resistance calculation wiring Ri can be formed under conditions almost equivalent to the signal wiring up to the downstream source driving ICSDi + 1.

That is, the power supply voltage wiring between the driving ICSDi and the downstream driving ICSDi + 1 is connected to the power supply voltage output wiring group Ei on the flexible substrate SBi of the source driving circuit STi and the power supply voltage connection on the liquid crystal display panel 2. It is divided into three wirings of the wiring group Gi + 1 and the wiring group Ai + 1 for power supply voltage input on the flexible substrate SBi + 1 of the downstream source drive circuit STi + 1. On the other hand, the wiring resistance calculation wiring Ri is also formed so as to return to the flexible substrate SBi from the flexible substrate SBi constituting the source driving circuit STi via the liquid crystal display panel 2 again, which is the first wiring on the flexible substrate SBi. It is divided into three wirings of the voltage output side wiring Rai, the panel side wiring Rbi on the liquid crystal display panel 2, and the detection voltage input side wiring Rci which is the second wiring on the flexible substrate SBi.

And the voltage output side wiring Rai for calculation corresponds to the power supply voltage output wiring Ei on the flexible board | substrate SBi of the source drive circuit STi, and the panel side wiring Rbi on the liquid crystal display panel 2 connects for the power supply voltage on the liquid crystal display panel 2 Corresponding to the wiring group Gi + 1, the detection voltage input side wiring Rci corresponds to the power supply voltage input wiring group Ai + 1 on the flexible substrate SBi of the downstream source driving circuit STi + 1. Therefore, the wiring resistance calculation wiring Ri can be formed on the conditions substantially equivalent to the signal wiring from the driving ICSDi to the downstream driving ICSDi + 1. For this reason, the wiring resistance value and voltage drop value of the signal wiring from the drive ICSDi to the downstream drive ICSDi + 1 can be requested with good accuracy.

By the way, the material, length, width, and thickness of the signal wiring between the driving ICSDi and the downstream driving ICSDi + 1 are predetermined in the design stage of the liquid crystal display device 1A. Thus, the material determined in the design stage, The signal wiring of length width and thickness is prepared separately, the wiring resistance value is measured, and the obtained wiring resistance value is stored in the memory, the voltage drop value is calculated using the stored wiring resistance value, and the calculated voltage drop value is calculated. It is also possible to adopt a method of adding an analog power supply voltage and a gray power supply voltage. However, this system is not preferable because of the following problems.

First, since the liquid crystal display panel 2 and the source drive circuit ST are connected by thermocompression bonding through an anisotropic conductive film, a crimping resistance is generated in the connection portion. Therefore, it is difficult to consider the influence of crimp resistance in the signal wiring prepared separately, and there exists a problem that an accurate wiring resistance value cannot be measured.

Secondly, the material, length width, and thickness of the signal wiring are predetermined in the design stage of the liquid crystal display device 1A, but when the liquid crystal display panel 2 or the source drive circuit ST are actually manufactured, the length width of the signal wiring is There is a tolerance in thickness, and a manufacturing deviation occurs. Therefore, the signal wires of the separately prepared signal wires and the signal wires of the liquid crystal display device 1A actually manufactured cannot be exactly the same in length and thickness, so that the accurate wire resistance values can be measured in the separately prepared signal wires. There is a problem that there is no.

Third, when the wiring resistance value measured in advance is stored in the memory, the location of the memory becomes a problem. First of all, installing a memory outside the driving IC adds new parts, which increases the cost.

In addition, if the existing memory in the driver IC is used, there is no cost increase due to the addition of new components. However, when the standard of the liquid crystal display device 1A is changed, the value of the wiring resistance value is also changed. This eliminates the need for creating a new driver IC every time the standard of the liquid crystal display device 1A changes, which is a factor in the cost increase.

From the above, the method of actually creating the wiring resistance calculation wiring Ri in the liquid crystal display device 1A and measuring and using the wiring resistance value as in the present embodiment can obtain an accurate wiring resistance value. The voltage drop can be properly compensated for.

In addition, in the liquid crystal display device 1A, the analog power supply voltage for the operation of the driving ICSDi and the gradation power supply voltage supplied to the liquid crystal display panel 2 are respectively added by the voltage drop value due to the wiring resistance to be supplied to the driving ICSDi. Doing. Therefore, since the operating power supply voltage is supplied to each driving ICSDi at an appropriate voltage value, malfunction of the driving ICSDi is prevented. In addition, since the gray scale power supply voltage is supplied to the respective driving ICSDi at an appropriate voltage value, an appropriate source signal can be supplied from the respective driving ICSDi to the liquid crystal display panel 2, thereby reducing display irregularities such as gradation variation, and thus the liquid crystal display device. The display quality of (1A) can be improved.

In the above description, the source driving circuit STi has been described, but the gate driving circuit GT can be similarly implemented. Moreover, it is also possible to implement similarly not only the 1 A of liquid crystal display devices, but a display device which has a structure in which several drive circuits are connected in a line at the periphery of a display panel. In addition, the so-called COG (Chip On Glass) type liquid crystal display device which directly mounts a driving IC in the periphery part (glass substrate) of a liquid crystal display panel can be implemented similarly.

In the control circuit 3, the wiring resistance calculation wiring is formed in the same manner as the source driving circuit STi, and when the power supply voltage is output from the power supply circuit 6, the voltage value corresponding to the voltage drop value is raised to increase the power supply voltage. May be output.

In addition, although the signal supply FPC is connected to each part of the liquid crystal display panel 2 in the structural example shown in FIG. 1, even if one signal supply FPC is connected to the center of the liquid crystal display panel 2, it is good. do.

In addition, although the analog power supply voltage adding part 13 exists in FIG. 2, the structure which takes the analog power supply voltage adding part 13 can also be considered. In this case, the analog power supply voltage may be set to a sufficiently high value so as not to malfunction even if a voltage drop occurs due to the wiring resistance.

Example 2

Fig. 3 is a timing chart illustrating the flow of data in each source driving TCP of the liquid crystal display device 1B according to the second embodiment of the present invention. This liquid crystal display device 1B has a structure in common with the liquid crystal display device 1A of the conventional example shown in FIG. 9, and here, for the sake of simplicity, an example in which only four source driving ICs are used is shown. This liquid crystal display device differs from the conventional liquid crystal display device 1A shown in FIG.

(1) The image data signal input terminals of the source driving ICs on the respective source driving TCPs are not connected in parallel to each other, and the image data of the source driving ICs adjacent to the image data signals after being processed by the source driving IC in the preceding stage Pointed to be fed to an input terminal for a signal, and

(2) Each source driving IC performs the same signal processing on the input image data signal as in the prior art, individually outputs it to a predetermined source signal line connected to the pixels of the liquid crystal display panel, and among the input image data signals. Only image data signals that have not been processed are sent out to adjacent source driver ICs.

In addition, although the pulse signal corresponding to this image data originally consists of the pulse train of the number corresponding to the number of the source lines of the liquid crystal panel to which the source drive ICSD1 to SD4 are connected, respectively, in order to facilitate description in FIG. Each pulse signal corresponding to each of data a to d is represented by a single pulse. That is, the series of image data signals a to d during the scanning period obtained from the control IC 5 of the external circuit board 3 are formed on the first TCP via the signal supply wiring 7, the flexible wiring board FPC, and the connection wiring L '. Input to the installed source drive ICSD1. The source driving ICSD1 processes the image data signal a in accordance with the start pulse input thereto, and outputs the image data signal to a predetermined source signal line connected to each pixel of the liquid crystal display panel 2, and simultaneously Since the data signal a is a signal that is not necessary in other source driving ICs, the remaining image signals b to d which have not been processed by this source driving ICSDi are sent to the adjacent source driving ICSD2.

In the source driving ICSD2, the image data signal b is processed in accordance with the start pulse input thereto, and the image data signal is output to the source signal line of the liquid crystal display panel 2, and the image data signal b is also a different source. Since it is unnecessary in the driver IC, the remaining image signals c and d which have not been processed by the source driver ICSD2 are sent to the adjacent source driver ICSD3, and the same processing is sequentially performed in the source driver SD3 and SD4. It is to be done.

With this configuration, the image data signals a to d flow through the connection wiring L ', but the image data signals b to d are connected to the connection wiring L2 and the image data signals c and d to the connection wiring L3 and the image data signal d to the connection wiring L3 again. Is in a flowing state. Therefore, even in the liquid crystal display device (1A) employing a conventional signal transmission system shown in Figure 9 the connecting wiring L₁ ~ L ₆ include, but all the image data signal flows, the image data flows in the present embodiment, the connection wire L₁ ~ L₄ Since the signal decreases sequentially, the EMI generated from the connection wirings L 'through L' decreases dramatically.

Here, a specific example of the source driving IC used in this embodiment will be described with reference to FIG. 4 is a block diagram for explaining an internal circuit configuration of a source driving IC used in the present invention. This source driving IC is a shift register 63, a data latch 64, a data register 65, a latch 66, a level shifter 67, and a gradation voltage generating circuit similarly to the conventional source driving IC. 68) An image data output control circuit 71 for selectively outputting predetermined image data to the next stage from image data input as an independent configuration, in addition to having a D / A converter 69 and an output circuit 70. Equipped with.

The shift register 63 performs a shift operation in synchronization with a clock signal to select a bit for sampling image data based on a predetermined start pulse input, and the data latch 64 temporarily stores the input image data to It sends to the register 65. The data register 65 samples predetermined image data among the image data inputted by time division from the data latch 64 by the instruction from the shift register 63, and sends the predetermined image data to the latch 66. In the latch 66, the data in the data register 65 is collectively latched in accordance with the strobe input and sent to the level shifter 67. The level shifter 67 shifts the data latched in the latch 66 to the analog circuit power supply level and sends it to the D / A converter 69. The gradation voltage generating circuit 68 divides the reference voltage input from the outside by the internal rudder-resistance, generates γ-corrected voltage, and sends it to the D / A converter 69. The D / A converter 69 converts the digital image signal input from the level shifter 67 into an analog signal and sends it to the output circuit 70 based on the γ-corrected voltage from the gradation voltage generating circuit 68. The output circuit 70 is a voltage follower composed of an OP amplifier and an output buffer, and outputs an analog signal to the liquid crystal drive output terminal.

On the other hand, the image data output control circuit 71 is a source adjacent to the image data signal not stored in the data register 65 among the image data latched in the data latch 64 at the timing indicated by the shift register 63. It outputs to a drive IC. In this case, the image data output control circuit 71 does not pass the image data signal while the start pulse is input to the source driver IC, and while the start pulse is not input to the source driver IC. It can be configured with a simple circuit such as a switch circuit for passing the image data signal.

Therefore, since the source driving IC used in the present embodiment sends out other image data signals other than the processed image data signals among the input image data signals to the next source driving IC adjacent to each other, the series driving is performed in series. Since the image data signal whose data amount is sequentially reduced is sent out to the connected source driving IC, even if the image data signal wiring is long, the amount of the image data signal is sequentially reduced as it is separated from the input end of the image data signal. The occurrence of is dramatically reduced.

Example 3

FIG. 5 is a schematic plan view showing a liquid crystal display IC of Embodiment 3 of the present invention, and FIG. 6 is a timing chart showing timing between signals DATA1 to DATA3 of FIG. The liquid crystal display device 1 has a configuration in common with the liquid crystal display device 1 of the conventional example shown in FIG.

(1) A series of N serial serial connection groups of multiple N (N> 2, where N = 6) is divided into two at the center, that is, three TCPs having source driving circuits STi to ST3 formed therein. The serial connection group is divided into a serial connection group consisting of three TCPs in which the source driving circuits ST4 to ST6 are formed, and each of the driving circuits ST3 and ST4 adjacent to each other at the divided position is formed on the FPC 'and FPC₂, respectively. A point connected to the control circuit board 3 by the supply lines 7 and 7 ', and

(2) The control IC 5 provided on the control circuit board 3 has an interface 5 ₁ , a timing controller 5 ₂ composed of a direction switch of a bus driver, and a line memory 5 ₃ . Is in.

That is, in the liquid crystal display device 1 of the conventional example shown in FIG. 9, the image signals transmitted from the image data signal generating device such as a PC are respectively corresponding to the source driving ICSD1 to SD6 as shown in DATA1 of FIG. It is sent out sequentially as a pulse signal corresponding to 1 to 6. The pulse signals corresponding to the data 1 to 6 are controlled by timing pulses not shown separately. For example, the pulse signal corresponding to the data 1 is the source driving ICSD1, and the pulse signal corresponding to the data 2 is the source. It is supplied sequentially to the driving ICSD2, and is sequentially supplied to the source line of each pixel of the liquid crystal display panel 2 corresponding to each of the source driving ICSD1 to SD6. In addition, although the pulse signals corresponding to the data 1 to the data 6 originally consist of the number of pulse trains corresponding to the number of source lines of the liquid crystal panel to which the source driving ICSD 1 to SD 6 are connected, respectively, the description of FIG. For simplicity, a single pulse is shown for each pulse signal corresponding to each of data 1 to 6.

If such a signal shown in DATA1 of Fig. 6 is directly input to the liquid crystal display device 1C of this embodiment, the signals are sent in the correct order in the source driving ICSD4 to SD6, but in the reverse order in the source driving ICSD1 to SD3. It is to send. That is, in the source driving ICSD4 to SD6, the pulse signal corresponding to the data 4 is the source driving ICSD4, the pulse signal corresponding to the data 5 is the source driving ICSD5, and the pulse signal corresponding to the data 6 is the source driving ICSD6. In order to be sequentially supplied in the correct order, either or both halves of the liquid crystal display are normally displayed.

However, in the source driving ICSD1 to SD3, the pulse signal corresponding to data 1 corresponds to the source driving ICSD3 to data 2, the corresponding pulse signal to the source driving ICSD2, and the pulse signal corresponding to the data 3 corresponds to the source driving ICSD1. Since it is supplied to, it is supplied in reverse order, and at least one of the left and right halves of the liquid crystal display is not normally displayed.

Therefore, in this embodiment, the control IC 5 provided in the control circuit board 3 has an interface 5 ₁ , a timing controller 5 ₂ composed of a direction switch of a bus driver, and a line memory 5 ₃ . Image data signal DATA1 transmitted from the image data signal generation device 8 such as a PC to the write memory 5 ₃ through the timing controller 5 ₂ , and then the timing controller 5 _2. In the ICSD4 to SD6 for driving the source, the ICSD4 for driving the source via the supply line 7 such as the signal of FPC 'in the correct order, that is, data 4, data 5, and data 6, as shown in DATA2 of FIG. And the source driving ICSD1 to SD3 through the supply line 7 'such as the signal of FPC2 in the reverse order, that is, the data 3, data 2, and data 1, as shown in DATA3 of FIG. Driving ICSD3 It shall be sent.

Then, in the source driving ICSD1 to SD3, the pulse signal corresponding to the data 1 is the source driving ICSD1, the pulse signal corresponding to the data 2 is the source driving ICSD2, and the pulse signal corresponding to the data 3 is the source driving Since it is correctly supplied to ICSD3, it is normally displayed over the full screen range of the liquid crystal display panel 2.

In the timing controller 5 ₂ which is a direction switch of the bus driver, a circuit for transmitting data in the correct order with respect to the source driving ICSD4 to SD6 is referred to as a queue (also called a first in-out) (FIFO). In addition, a circuit diagram for transmitting data in reverse order with respect to the source driving ICSD1 to SD3 is also known to a person skilled in the art as a stack (also called a first in-last out (FILO)).

In the present embodiment, since the serial connection group in which the plurality of TCPs of the liquid crystal display panel 2 are connected in series is divided in two at the center, the length of each divided serial connection group is shortened, and the division points are divided between the serial connection groups. Since the signals and the like from the control IC 5 are separately supplied to two adjacent source driving ICSD3 and SD4 adjacent to each other, the voltages up to the source driving ICSD1 and SD6 at the ends of the divided series connection groups are separately supplied. Since the drop is small and the voltage drop is substantially the same, display spots are not generated at the center of the liquid crystal display panel 2, which is the most prominent place, and display spots are reduced at the periphery.

In addition, since the control IC 5 is connected to the two source driving ICSD3 and SD4 which adjoin in the division part, since it is not necessary to extend wiring to the edge part of the liquid crystal display panel 2, the circuit board 3 Can be made small. In addition, since the serial connection group in which a plurality of TCPs are connected in series is divided in two at the center, the data signals supplied to the two serial connection groups are halved as shown in DATA2 and DATA3 in FIG. Since it is only necessary to send the signal within the next one scan period, EMI can be greatly reduced because the width of the pulse can be widened.

In the third embodiment, the control IC 5 disposed on the control circuit board 3 of the liquid crystal display device 1C includes a timing controller 5 ₂ composed of an interface 5 ₁ and a direction switch of a bus driver. Although the device having line memory 5 ₃ is used to transmit in the correct order in the driving ICSD 4 to SD 6 and in the reverse order in the driving ICSD 1 to SD 3, the image data signal generating apparatus such as a PC ( In the case of 8), if a signal capable of generating the signals for the driving ICSD1 to SD3 in the reverse direction is used in advance, it is also possible to use the ones which are output as it is, without changing the order, in particular for the driving ICSD1 to SD3. In the present embodiment, an example in which the FPC connecting the liquid crystal display panel 2 and the control circuit 3 is divided into two of FPC 'and FPC2 is shown. However, since the distance between the two FPCs is short, even one FPC may be arranged. do.

According to the display device of the first aspect of the present invention, the driving IC on the upstream side of the voltage supply direction is configured such that the power supply voltage in which the voltage value is increased by the voltage drop value calculated using the wiring resistance calculation wiring is directed toward the downstream driving circuit. Output The output power supply voltage is supplied to the driving IC of the downstream driving circuit through the signal wiring on the substrate constituting the driving circuit and the connection wiring on the display panel.

Although the power supply voltage supplied to the downstream driving IC passes through the wiring, the voltage value drops, but since the voltage value is raised in advance by the voltage drop value at the time of output from the upstream driving IC, the downstream driving IC is applied to the downstream driving IC. The power supply voltage supplied becomes a voltage value necessary for the driving IC to operate normally. Therefore, since the downstream driving IC is supplied with a power supply voltage having an appropriate voltage value, it is possible to prevent malfunction of the driving IC. As a result, the display device can be normally operated.

In this case, when the driving circuit is formed of a circuit in which the driving IC is mounted on a tape-shaped substrate, that is, a TCP circuit, the wiring resistance calculation wiring is formed so as to return from the tape-shaped substrate back to the substrate via the display panel. The wiring resistance calculation wiring can be formed under conditions almost equivalent to the signal wiring from the upstream driving IC to the downstream driving IC. That is, the wiring between the upstream driving IC and the downstream driving IC is composed of three wirings: the wiring on the substrate of the upstream driving circuit, the wiring for connection on the display panel, and the wiring on the substrate of the downstream driving circuit. Are distinguished. On the other hand, the wiring resistance calculation wiring is formed so as to return to the substrate again via the display panel from the substrate constituting the driving circuit, so that the first wiring on the substrate constituting the driving circuit, the wiring on the display panel, and the substrate It is divided into three wirings with a 2nd wiring.

The first wiring corresponds to the wiring on the substrate of the upstream driving circuit, the wiring on the display panel corresponds to the wiring for connection on the display panel, and the second wiring corresponds to the wiring on the substrate of the downstream driving circuit. Therefore, the wiring resistance calculation wiring can be formed under conditions almost equivalent to the signal wiring from the upstream driving IC to the downstream driving IC. For this reason, the wiring resistance value and voltage drop value of the signal wiring from an upstream drive IC to a downstream drive IC can be requested | required with favorable precision.

In addition, according to the display device of the first aspect, the driving IC on the upstream side of the voltage supply direction uses a power supply voltage in which the downstream voltage is increased by a voltage drop value calculated by the wiring resistance calculation wiring. To the output. The output power supply voltage passes through the connection wiring and is supplied to the downstream driving IC. Although the voltage value of the power supply voltage supplied to the downstream driving IC passes through the connection wiring, the voltage value is increased in advance by the voltage drop value at the time of output from the upstream driving IC. The power supply voltage supplied becomes a voltage value necessary for the driving IC to operate normally. Therefore, since the power supply voltage of the appropriate voltage value is respectively supplied to the downstream driver IC, it is possible to prevent malfunction of the driver IC. As a result, the display device can be normally operated.

In addition, according to the display device of the first aspect, the power supply voltage supplied from the driving IC adjacent to the upstream side is input to the driving IC from the power supply voltage input terminal through the connection wiring.

The driving IC performs a predetermined operation based on the input power supply voltage and outputs a driving signal to the display panel. On the other hand, in the driving IC, the calculation voltage generated by the calculation voltage generator is output from the voltage output terminal to the one end of the wiring resistance calculation wiring, and the output voltage from the other end of the wiring resistance calculation wiring is detected. Input from the terminal. In the wiring resistance calculation section, the wiring resistance value is calculated based on the output voltage for calculation and the detection voltage input from the detection terminal, and in the power supply voltage adding section, the voltage drop value is calculated based on the calculated wiring resistance value. The voltage value of the power supply voltage is added by the calculated voltage drop value. The power supply voltage from the power supply voltage adding unit is output from the power supply voltage output terminal and supplied to the driving IC adjacent to the downstream side through the connection wiring. With such a configuration, the power supply voltage added by the voltage drop value by the wiring resistance can be supplied to the downstream driver IC.

According to the display device of the first aspect of the present invention, since the power supply voltage for operation is supplied to the respective driving ICs at an appropriate voltage value, malfunction of the driving IC is prevented and the display device can be operated normally. In addition, since the display power supply voltage is supplied to the respective driving ICs at an appropriate voltage value, appropriate driving signals can be supplied from the respective driving ICs to the display panel, and display irregularities such as gradation variations are reduced, and the display of the display device Can improve the quality.

According to the second aspect of the present invention, since the image data signal processed by the predetermined driver IC is an unnecessary signal in other driver ICs, the image data signal output from the driver IC decreases each time it passes the driver IC. Therefore, even if there is a long image data signal wiring extending from the drive circuit at one end to the drive circuit at the other end along the edge of the display panel, the generation of EMI due to the image data signal is dramatically reduced. .

In this second aspect, since the source driving IC processes the image data signal corresponding to the input start pulse and outputs it to the display panel, other image data except for the image data signal corresponding to the start pulse is output. By outputting the signal to the adjacent next driving IC, it is possible to easily output the necessary image data signal to the adjacent driving IC, and also to select and output only the necessary image data signal by a simple switch circuit.

According to the third aspect of the present invention, since the serial connection group in which a plurality of driving circuits are connected in series is divided in two at the center, the length of each divided series connection group is shortened and the division point is interposed therebetween. Since signals from the control circuit and the like are separately supplied to two adjacent driving circuits, the voltage drop to the ends of the divided series connection groups becomes smaller, and the respective voltage drop amounts become substantially the same. Display spots at the center of the liquid crystal display panel, which is the most prominent place, are not generated, and display spots at the periphery are reduced. In addition, since the two driving circuits connected to the control circuit are adjacent to each other with divided points therebetween, the control circuit can be connected with one FPC to two short FPCs, and the wiring can be easily connected. .

In this embodiment, since the control circuit is connected to two adjacent driving circuits at the divided points, it is not necessary to extend the wiring to the end of the liquid crystal display panel, so that the control circuit board can be made small. In addition, since the serial connection group in which the plurality of drive circuits are connected in series is divided in two at the center, the image data signals supplied to the two series connection groups are halved, so that EMI is also reduced.

In this case, if the series connection group which connected the drive circuit in series was divided into 2 in the center part, and the signal from a control circuit will be put in the said division part as it is, and it will supply separately to the drive IC on two adjacent drive circuits, The signals supplied to one of the driving circuits are in the forward sending order, while the other are in the reverse sending order, so that normal image display cannot be performed on the other side. By making the sending order in the reverse direction, normal image display can be performed. In addition, by using a timing controller composed of a line memory and a bidirectional switch for driving a bus, it is possible to reverse the order in which signals to be supplied to the other driving circuit can be reversed with a simple configuration.

Claims (22)

A plurality of drive circuits having drive ICs are connected to the periphery of the display panel, and adjacent drive circuits are connected by connection wires formed in the display panel, and the drive ICs and the A display device configured to supply a power supply voltage required for driving a display panel to at least one of the plurality of driving circuits, and to sequentially supply the power supply voltage from the driving circuit to an adjacent driving circuit. A wiring resistance calculation wiring is substantially equivalent to the signal wiring from the driving IC to the driving IC of the driving circuit adjacent to the voltage supply direction downstream, with respect to the driving IC located on the upstream side of the voltage supply direction, The upstream driving IC outputs a calculation voltage at one end of the wiring resistance calculation wiring and detects a voltage at the other end to calculate the wiring resistance value, and calculates a voltage drop value based on the calculated wiring resistance value. And outputting a power supply voltage in which the voltage value is increased by the calculated voltage drop value toward the downstream driving circuit. The method of claim 1, And the drive circuit comprises a circuit in which the drive IC is mounted on a tape-shaped substrate. The method of claim 2, And said wiring resistance calculation wiring is formed so as to return to said tape-shaped board | substrate again via said display panel from the tape-shaped board | substrate which comprises the said drive circuit. The method of claim 1, And the driving circuit is a circuit in which the driving IC is mounted on the periphery of the display panel. The method of claim 1, The driving IC A power supply voltage input terminal to which a power supply voltage is input; A calculation voltage generator for preparing a calculation voltage used to calculate the wiring resistance value; A calculation voltage output terminal for outputting a calculation voltage from the calculation voltage generator to one end of the wiring resistance calculation wiring; A detection terminal to which an output voltage from the other end of the wiring resistance calculation wire is input, a wiring resistance calculation unit for calculating a wiring resistance value based on the calculation voltage and the detection voltage from the detection terminal; A power supply voltage adder which is supplied with a power supply voltage input from the power supply voltage input terminal and calculates a voltage drop value based on the calculated wiring resistance value and adds the voltage value of the power supply voltage by the calculated voltage drop value; And a power supply voltage output terminal for outputting a power supply voltage from the power supply voltage adder. The method of claim 5, And the power supply voltage is an operation power supply voltage of a driving IC and a display power supply voltage supplied to the display panel. The method according to any one of claims 1 to 6, And the display device is a liquid crystal display device or a plasma display device. A plurality of drive circuits having drive ICs are connected to the periphery of the display panel, and adjacent drive circuits are connected by connection wirings formed in the display panel, and the drive IC and the display panel are driven from an external control circuit. A display device configured to supply a power supply voltage required for the power supply to at least one of the plurality of driving circuits, and to sequentially supply the power supply voltage to the adjacent driving circuit from the driving circuit. And said driving IC outputs an image data signal other than the processed image data signal among the input image data signals to an adjacent next driving IC. The method of claim 8, And the drive circuit comprises a circuit in which the drive IC is mounted on a tape-shaped substrate. The method of claim 9, And said wiring resistance calculation wiring is formed so as to return to said tape-shaped board | substrate again via said display panel from the tape-shaped board | substrate which comprises the said drive circuit. The method of claim 8, And the driving circuit is a circuit in which the driving IC is mounted on the periphery of the display panel. The method of claim 8, The driving IC includes an image data output control circuit, and the image data output control circuit is configured to drive next image data signals adjacent to other image data signals corresponding to start pulses input to the driving IC. A liquid crystal display device, characterized by outputting to an IC. The method of claim 12, The image data output control circuit does not pass an image data signal while a start pulse is input to the driver IC, and a circuit which passes the image data signal while a start pulse is not input to the driver IC. The liquid crystal display device characterized by the above-mentioned. The method according to any one of claims 8 to 13, And the display device is a liquid crystal display device or a plasma display device. A plurality of N driving circuits having driving ICs (where N> 2) are connected to the periphery of the display panel, and adjacent driving circuits are connected by connection wirings formed in the display panel. A display device configured to supply a driving IC and a power supply voltage required for driving the display panel to at least one of the plurality of driving circuits, and sequentially supply the power supply voltage to the adjacent driving circuit from the driving circuit. The series connection group which connected the said N drive circuits in series was divided into 2 parts by the center part, and the signal and voltage from the said control circuit are separately supplied to two adjacent drive circuits through the said division part, It is characterized by the above-mentioned. Liquid crystal display. The method of claim 15, And the drive circuit comprises a circuit in which the drive IC is mounted on a tape-shaped substrate. The method of claim 16, And said wiring resistance calculation wiring is formed so as to return to said tape-shaped board | substrate again via said display panel from the tape-shaped board | substrate which comprises the said drive circuit. The method of claim 15, And the driving circuit is a circuit in which the driving IC is mounted on the periphery of the display panel. The method of claim 15, A liquid crystal display device comprising one or two flexible wiring boards connecting the control circuit and the liquid crystal display panel to the center of the periphery of the liquid crystal display panel. The method of claim 15, The transmission order of the signals supplied to two adjacent TCPs from the said control circuit across the said divided part was made into the forward sending order to one TCP, and the backward sending order to the other TCP. It is characterized by the above-mentioned. Liquid crystal display. The method of claim 20, A timing controller comprising a line memory and a direction switch of a bus driver is disposed between the control circuit and the other TCP, and the signal of the forward transmission order sent from the control circuit by the timing controller is converted in the reverse direction. A liquid crystal display device characterized by the above-mentioned. The method according to any one of claims 15 to 21, And the display device is a liquid crystal display device or a plasma display device.

Images