1269421 187wtwf.doc/g 九、發明說明： 【發明所屬之技術領域】 本發明是有關於—種⑸封裝結構，且制是有關於 一種彈性複合凸塊的改良結構及應用此改良結構將晶片接 合於基板上的晶片封裂體。 【先前技術】 目刚晶片封裝技術中，以晶粒軟膜封裝（Chip 〇nFilm， • C〇F )以及晶粒與玻璃基板接合封裝（Chip on Glass，COG ) 為主流，而COF的封裝方式有利用異方性導電膠 (Anisotropic Conductive Film，ACF)垂直導通接合以及利 用非導電膠（Non_Conductive Polymer, NCP/NCF )熱壓固 化後產生的故縮接合等。常見以金凸塊連接於晶片與基板 之間，由於金不易氧化，可得到良好的連接，且金的低硬 度特性更易於適應接合過程所產生的接觸應力，使接合品 質得以確保。 、、為了降低金凸塊的生產成本及簡化在積體電路上形 f連接用之凸塊製程，近年來以高分子凸塊為核心層之複 合凸塊（compliant bump)結構陸續被研究及發表出來。 圖1繪示習知利用複合凸塊結構接合晶片於基板上之封妒 ，構的示意圖。請參考圖丨，複合凸塊結構1〇2内具有= π分子凸塊104，而高分子凸塊1〇4之表面霜蓋一導帝公 屬材料106,用以連接晶月11〇於基板12〇上、其中 合凸塊結構102可藉由異方性導電膠13〇内的導電= 132垂直導通於上、下接點122、112，或直接以非^電膠 5 I2694^twfdoc/g (未、％示）產生收縮接合而導通於上、下接點122、112。 然而，請麥考圖2,其繪示圖1之晶片11〇與基板12〇 X熱4，因膠體熱/張現象及受熱不均而使晶片HQ或基板 120發生翹曲變形的示意圖。很明顯地，當整個晶片封裝 體100的變形量超過預定的接合強度時，將使得基板12〇 的外侧接點124無法接觸晶片11〇上的複合凸塊結構 102,而造成訊號斷路或接觸阻抗增加等問題，降低接合的 _ 可靠度。 【發明内容】 本电明的目的是提供一種可形變之複合凸塊結構，以 增加晶片或基板發生翹曲變形時之接合可靠度。 本發明的另一目的是提供一種應用可形變之複合凸 塊結構將晶片接合於基板上的晶片封裝體，以增加其接合 可靠度。 本發明提出一種可形變之複合凸塊結構，適於接合晶 片於一基板上’該可形變之複合凸塊結構包括一凸塊底金 屬層、配置於該凸塊底金屬層上之高分子凸塊以及覆蓋高 分子凸塊亚電性連接凸塊底金屬層之一表面金屬層。其 中，凸塊底金屬層形成於晶片之銲墊上，而高分子凸塊自 頂面向其中〜挖空部分區域而形成一可形變之凹頂凸塊。 依知、本％明—實施例所述，上述可形變之凹頂凸塊為 一環狀凹頂凸塊。 依照本發明一實施例所述，上述可形變之凹頂凸塊為 一雙脊凹頂凸塊。 6 12694¾ twf.doc/g 依照本發明一實施例所述，上述可形變之凹頂凸塊為 一單脊凹頂凸塊。 本發明另提出一種晶片封裝體，包括一晶片、一基板 以及多數個可形變之複合凸塊結構。晶片具有多數個銲 墊，而基板具有多數個對應連接晶片之接點。此外，可形 變之複合凸塊結構分別電性連接於該些銲墊之一以及該些 接點之一，其包括一凸塊底金屬層、配置於該凸塊底金屬 ^ 層上之高分子凸塊以及覆蓋高分子凸塊以電性連接凸塊底 金屬層之一表面金屬層，且該表面金屬層電性連接基板之 接點。其中，凸塊底金屬層形成於晶片之銲墊上，而高分 子凸塊自頂面向其中心挖空部分區域而形成一可形變之凹 頂凸塊。 依照本發明一實施例所述，上述可形變之凹頂凸塊為 一環狀凹頂凸塊。 依照本發明一實施例所述，上述可形變之凹頂凸塊為 一雙脊凹頂凸塊。 • 依照本發明一實施例所述，上述可形變之凹頂凸塊為 一單脊凹頂凸塊。 依照本發明一實施例所述，晶片封裝體更包括一異方 性導電膠，配置於晶片與基板之間，且該異方性導電膠之 導電粒子分別電性連接於該些接點之一與該些可形變之複 合凸塊結構之一。 依照本發明一實施例所述，晶片封裝體更包括一非導 電膠，配置於晶片與基板之間，並包覆與基板之接點電性 7 I269421twfd〇c/g 連接之該些可形變之複合凸塊結構。 依照本發明一實施例所述，上述基板之接點與可形變 之凹頂凸塊的挖空區域上的表面金屬層直接接觸，或基板 之接點與可形變之凹頂凸塊的項端上的表面金屬層直接接 觸。此外，表面金屬層例如僅覆蓋可形變之凹頂凸塊的部 分外壁。 本發明因採用具有彈性變形的高分子凸塊（即凹頂凸 •塊）作為改良結合可靠度之複合凸塊結構，因此當晶片或 ^板受熱而翹曲變形或承受一反覆彎曲變形時，複合凸塊 能產生適當的變形量來避免接觸不良的現象，進而提高接 合的可靠度。 ▲為讓本叙明之上述和其他目的、特徵和優點能更明顯 易It，下文特舉較佳實施例，並配合所附圖式，作田 明如下。 " 【實施方式】 , -，3繪示本發明一實施例之可形變複合凸塊結構的剖 面不意圖。此可形變之複合凸塊結構200可配置於晶片21〇 或其他積體電路元件上，其包括一凸塊底金屬層2〇2、配 凸塊底金屬層202上之一高分子凸塊204以及覆蓋高 分子凸塊204並電性連接凸塊底金屬層2〇2之一表 … 。一中’晶片210的銲墊212顯露於一圖案化録罩 β 214 cb * r 曰 甲，而凸塊底金屬層202例如以濺鍍、蒸鍍或無電 電鍍的方式形成於銲墊212上，接著將高分子材料塗佈在 凸塊底金屬層202上。再進行曝光、顯影製程，以使高分 I2694l。,1269421 187wtwf.doc/g IX. Description of the Invention: [Technical Field] The present invention relates to a (5) package structure, and is an improved structure for an elastic composite bump and the use of the improved structure to bond the wafer A wafer seal on the substrate. [Prior Art] In the chip packaging technology, the chip soft film package (Chip 〇nFilm, • C〇F) and the chip and glass substrate (Chip on Glass, COG) are the mainstream, and the COF package method is Anisotropic Conductive Film (ACF) is used for vertical conduction bonding and shrinkage bonding by hot pressing of non-conductive adhesive (Non/Conductive Polymer, NCP/NCF). Gold bumps are often connected between the wafer and the substrate. Since gold is not easily oxidized, a good connection can be obtained, and the low-hardness characteristics of gold are more easily adapted to the contact stress generated during the bonding process, so that the bonding quality is ensured. In order to reduce the production cost of gold bumps and simplify the bump process for forming f-connections on integrated circuits, in recent years, the structure of compliant bumps with polymer bumps as the core layer has been researched and published. come out. FIG. 1 is a schematic view showing a conventional structure in which a composite bump structure is used to bond a wafer to a substrate. Referring to FIG. 丨, the composite bump structure 1〇2 has a π molecular bump 104, and the surface of the polymer bump 1〇4 is covered with a conductive material 106 for connecting the crystal moon 11 to the substrate. 12〇, wherein the bump structure 102 can be vertically connected to the upper and lower contacts 122, 112 by the conductive=132 in the anisotropic conductive adhesive 13〇, or directly to the non-electrolytic glue 5 I2694^twfdoc/g (Not shown in %) is contracted and joined to the upper and lower contacts 122, 112. However, please take a picture of the wafer HQ or the substrate 120 due to the colloidal heat/tension phenomenon and the uneven heating due to the wafer 11 图 and the substrate 12 〇 X heat 4 of FIG. 1 . Obviously, when the deformation amount of the entire chip package 100 exceeds a predetermined bonding strength, the outer contact 124 of the substrate 12〇 is prevented from contacting the composite bump structure 102 on the wafer 11 , causing signal breaking or contact resistance. Increase the number of problems and reduce the _ reliability of the joint. SUMMARY OF THE INVENTION The purpose of the present invention is to provide a deformable composite bump structure for increasing the bonding reliability when a wafer or substrate undergoes warpage. Another object of the present invention is to provide a chip package for bonding a wafer to a substrate using a deformable composite bump structure to increase bonding reliability. The invention provides a deformable composite bump structure suitable for bonding a wafer on a substrate. The deformable composite bump structure comprises a bump bottom metal layer and a polymer bump disposed on the bump bottom metal layer. The block and the surface metal layer covering one of the bottom metal layers of the bump of the polymer bump are electrically connected. The bump bottom metal layer is formed on the pad of the wafer, and the polymer bump forms a deformable concave top bump from the top surface facing the hollowed-out portion. According to the above, in the embodiment, the deformable concave top bump is an annular concave top bump. According to an embodiment of the invention, the deformable concave top bump is a double ridge concave top bump. In accordance with an embodiment of the invention, the deformable concave top bump is a single ridge concave top bump. The invention further provides a chip package comprising a wafer, a substrate and a plurality of deformable composite bump structures. The wafer has a plurality of pads, and the substrate has a plurality of contacts corresponding to the connected wafers. In addition, the deformable composite bump structure is electrically connected to one of the pads and one of the contacts, and includes a bump bottom metal layer and a polymer disposed on the bump metal layer The bump and the covering polymer bump are electrically connected to one surface metal layer of the bump bottom metal layer, and the surface metal layer is electrically connected to the joint of the substrate. Wherein, the bump bottom metal layer is formed on the pad of the wafer, and the high molecular bump forms a deformable concave top bump from the top surface toward the central hollowed-out portion. According to an embodiment of the invention, the deformable concave top bump is an annular concave top bump. According to an embodiment of the invention, the deformable concave top bump is a double ridge concave top bump. • According to an embodiment of the invention, the deformable concave top bump is a single ridge concave top bump. According to an embodiment of the present invention, the chip package further includes an anisotropic conductive paste disposed between the wafer and the substrate, and the conductive particles of the anisotropic conductive paste are electrically connected to one of the contacts. And one of the deformable composite bump structures. According to an embodiment of the invention, the chip package further includes a non-conductive paste disposed between the wafer and the substrate, and covering the contact points of the substrate with the electrical connection 7 I269421twfd〇c/g Composite bump structure. According to an embodiment of the invention, the contact of the substrate is in direct contact with the surface metal layer on the hollowed out region of the deformable concave top bump, or the contact of the substrate and the terminating end of the deformable concave top bump The upper surface metal layer is in direct contact. Furthermore, the surface metal layer covers, for example, only a portion of the outer wall of the deformable concave top bump. The present invention adopts a polymer bump having elastic deformation (ie, a concave top bump) as a composite bump structure for improving the bonding reliability, so when the wafer or the board is heated to be warped or subjected to a reverse bending deformation, The composite bumps can generate an appropriate amount of deformation to avoid poor contact, thereby improving the reliability of the joint. The above and other objects, features and advantages of the present invention will become more apparent from the description of the preferred embodiments. <Embodiment> -, 3 illustrates a cross-sectional view of a deformable composite bump structure according to an embodiment of the present invention. The deformable composite bump structure 200 can be disposed on the wafer 21 〇 or other integrated circuit components, and includes a bump bottom metal layer 2 〇 2 and a bump bump metal layer 202 on the polymer bump 204. And covering the polymer bump 204 and electrically connecting one of the bump bottom metal layers 2〇2... The solder pad 212 of the wafer 210 is exposed to a patterned mask β 214 cb * r armor, and the bump bottom metal layer 202 is formed on the pad 212 by sputtering, evaporation or electroless plating, for example. The polymer material is then coated on the under bump metal layer 202. Then expose and develop the process to make the high score I2694l. ,
子凸塊204自頂面向其中心挖空部分區域而形成一凹頂凸 塊。當然，高分子凸塊204亦可在成形之後，進行光蝕刻 或乾餘刻製程，以使高分子凸塊204自頂面向其中心局部 挖空而形成一凹頂凸塊。之後，可選擇一種或多種組合的 電鑛材料並將其電鍍於成形後之凹頂凸塊204上或利用濺 錢孟屬方式’以形成一表面金屬層206。由於表面金屬層 2〇6與凸塊底金屬層2〇2電性連接，因此可使晶片21〇對 外連接至下一層封裝基板。 圖4〜圖5繪示本發明之可形變複合凸塊結構接合晶 片於一基板上的二示意圖。請先參考圖4，承載晶片21〇 用之基板220可以為玻璃基板，其具有多數個電極接點222 (僅繪示其一），而晶片210之銲墊212藉由凹頂凸塊204 的一凸脊204a、204b上的表面金屬層2〇6與基板22〇之接 點222直接接觸而電性連接。此外，晶片21〇與基板 =間配置可收縮接合之一非導電膠23〇 (或異方性導電 =)，而非導電膠230包覆於與基板22〇之接點奶電性 接變複合凸塊結構綱，以構成晶粒與玻璃基板 接合（COG)之封裝結構。 接著，請參考圖5，基板22 具有多數個接點222 (僅•示1 7 =:人“路板’其 叮一丄 、值、曰不其一），而晶片210之銲墊 猎由凹頂凸塊204的挖空區204c上的人 ，與基板220之接點224亩姓上的表面金屬層 其板220P16A « 直接接觸，或藉由晶片210與 i ί，的導電粒子234來電性 連接以構成曰曰粒軟膜接合（C0F)之封裝結構。當以導 9The sub-bumps 204 form a recessed top bump from the top toward the center of the hollowed out portion thereof. Of course, the polymer bumps 204 may also be photoetched or dry-finished after the formation, so that the polymer bumps 204 are partially hollowed out from the top toward the center to form a concave top bump. Thereafter, one or more combinations of electromine materials can be selected and electroplated onto the formed recessed top bumps 204 or by sputtering to form a surface metal layer 206. Since the surface metal layer 2〇6 is electrically connected to the bump bottom metal layer 2〇2, the wafer 21 can be externally connected to the next package substrate. 4 to FIG. 5 are schematic diagrams showing the second embodiment of the deformable composite bump structure bonding wafer of the present invention on a substrate. Referring to FIG. 4, the substrate 220 for carrying the wafer 21 may be a glass substrate having a plurality of electrode contacts 222 (only one of which is shown), and the pads 212 of the wafer 210 are covered by the concave top bumps 204. The surface metal layer 2〇6 on one of the ridges 204a and 204b is in direct contact with the contact 222 of the substrate 22, and is electrically connected. In addition, one of the non-conductive adhesives 23 (or anisotropic conductive=) is contracted and bonded to the substrate 21〇 and the substrate=, and the non-conductive adhesive 230 is coated on the joint with the substrate 22 to be electrically coupled. The bump structure is structured to form a package structure in which a die is bonded to a glass substrate (COG). Next, referring to FIG. 5, the substrate 22 has a plurality of contacts 222 (only • 1 7 =: human "road plate" is one, one value, one different), and the pad 210 of the wafer 210 is recessed. The person on the hollowed out area 204c of the top bump 204, the contact with the substrate 220, the surface metal layer of the 224-mu name is directly contacted by the board 220P16A « or electrically connected by the conductive particles 234 of the wafer 210 and the ui, To form a package structure of the soft film bonding (C0F).
电粒子234垂直導通時，為防止相鄰凸塊200間的導電粒 子236橋接短路，表面金屬層208最好僅形成於凹頂凸塊 204的部分外壁上，也就是盡量避開可能與導電粒子236 發生橋接短路的區域，如圖5所示採用單側導通之表面金 屬層208即為一範例。 明參考圖6A〜圖6D ’其分別、纟會示四種凹頂凸塊的立 體不意圖。圖6A所繪示之第一種凹頂凸塊是中央區域 • 302a被挖空所形成一環狀凹頂凸塊302，圖όβ所繪示之 弟一種凹頂凸塊是沿著長邊將中央區域挖成一溝槽而保留 長邊兩侧的凸脊3〇4a、304b所形成之一雙脊凹頂凸塊 3〇4,而圖6C所繪示之第四種凹頂凸塊則是將周圍區域及 口P刀中央區域挖空後形成二凸脊3〇6a、306b，且二凸脊 3〇6a、306b間的間距縮小之另一種雙脊凹頂凸塊3〇6，圖 6D所繪示之第三種凹頂凸塊則是僅保留單_側的凸脊 3〇8a所形成之一單脊凹頂凸塊3〇8。當然，凹頂凸塊的種 類不限定上述四個實施例，以其他方式來製作或改良凹頂 馨凸塊均在本發明所欲保護的範圍中。 、When the electric particles 234 are vertically turned on, in order to prevent the conductive particles 236 between the adjacent bumps 200 from bridging short circuit, the surface metal layer 208 is preferably formed only on a part of the outer wall of the concave top bump 204, that is, it is possible to avoid possible conductive particles. 236 A region where a bridge short circuit occurs, as shown in FIG. 5, is a case where a single-sided conductive surface metal layer 208 is used. Referring to Figures 6A to 6D', respectively, the vertical outline of the four concave-top bumps is not shown. The first recessed top bump shown in FIG. 6A is a central region 302a is hollowed out to form an annular concave top bump 302, and a concave top bump is shown along the long side. The central region is dug into a groove to retain a double ridge concave top bump 3〇4 formed by the ridges 3〇4a, 304b on both sides of the long side, and the fourth concave top bump shown in FIG. 6C is After the hollow area of the surrounding area and the central portion of the P-knife is hollowed out, two ridges 3〇, 6a, 306b are formed, and the distance between the two ridges 〇6a, 306b is reduced by another double-ridged concave top bump 3〇6, FIG. 6D The third recessed top bump shown is a single-ridged recessed top bump 3〇8 formed by only the ridges 3〇8a of the single-side. Of course, the type of recessed top bumps does not limit the four embodiments described above, and other ways to make or modify the recessed top bumps are within the scope of the present invention. ,
分子凸塊能藉由厚度之改變而達到彈性變形所需之鹿ς量 即可。值得注意的是’當晶片的厚度或基板的厚度U 化發展時三晶片與基板受熱而趣曲變形的現象將更嚴重厂 故本發明藉由可形變之複合凸塊結構來克服之 圖7繪示 7繪不圖4之晶片與基板受熱時因膠體熱 ’詳述如下。 熱張現象及 10 1269421 . 18763twf.doc/g 文熱不均而使晶片或基板發生翹曲變形的示意圖。與習知 技術不同的是，本發明改良之可形變複合凸塊結構2〇〇具 有較大的彈性變形量，以使複合凸塊結構2〇〇可與基板22〇 之，點222電性接觸，即當凹頂凸塊2〇4能產生較大的變 幵y i日守即使曰曰片封裝體300之晶片210或基板220發生 較大的翹曲變形時，也不易產生接觸不良甚至發生斷路的 現象，進而提高接合的可靠度。 士綜上所述，本發明以多種改良結構來具體實現可 凹：Γί ’可廣泛應用在薄形化之晶片及基板接合 :，度僅有100微米以下時，導致 ：： 變形量過大時，其效果更為顯著。 Θ封杨的 限定Γΐί發Λ已以較佳實施例揭露如上，然其並非用以 明，任何熟習此技藝者，在不脫離本發明之精神 和範圍内，當可作此与^ 槓砷 範圍當視後附之申：;利與潤飾，因此本發明之保護 【圖式簡單說明】專利耗圍所界定者為準。 封裝:構::二利用複合凸塊結構接合晶片於基板上之 受執片隸板受熱時因膠體熱漲現象* ..，圖’：使：片或基板發生趣曲變形的示意圖。 面示意圖 圖4 意圖^不翻一實施例之可形變複合凸塊結構的剖 圖 緣示本發明之可機複合凸聽構接合, 1269似 twf.doc/g 片於一基板上的二示意圖。 圖6A〜圖6D分別繪示四種凹頂凸塊的立體示意圖。 圖7繪示圖4之晶片與基板受熱時因膠體熱漲現象及 受熱不均而使晶片或基板發生翹曲變形的示意圖。 【主要元件符號說明】 100 :晶片封裝體 102 :複合凸塊結構 A 104 :高分子凸塊 106 :導電金屬材料 110 :晶片 112、122 :上、下接點 120 :基板 124 :外侧接點 130 :異方性導電膠 132 :導電粒子 200 :可形變之複合凸塊結構 Φ 202 ··凸塊底金屬層 204 :高分子凸塊 204a、204b :凸脊 204c :挖空區 206、208 :表面金屬層 210 :晶片 212 :銲墊 214 :圖案化銲罩層 12 丨 twf.doc/g 基板 224 :接點 非導電膠 異方性導電膠 236 :導電粒子 晶片封裝體 環狀凹頂凸塊 :中央區域 雙脊凹頂凸塊 、304b :凸脊 雙脊凹頂凸塊 、306b ··凸脊 :凸脊 單脊凹頂凸塊 13Molecular bumps can be used to achieve the amount of deer required for elastic deformation by varying the thickness. It is worth noting that the phenomenon that the three wafers and the substrate are heated and the distortion of the substrate will be more serious when the thickness of the wafer or the thickness of the substrate is developed. The present invention is overcome by the deformable composite bump structure. 7 shows that the wafer and the substrate are heated by the heat of the substrate as detailed below. Hot-strain phenomenon and 10 1269421 . 18763twf.doc/g Schematic diagram of the warpage of the wafer or substrate caused by uneven heat. Different from the prior art, the modified deformable composite bump structure 2 of the present invention has a large elastic deformation amount, so that the composite bump structure 2 can be electrically connected to the substrate 22 and the point 222 is electrically contacted. That is, when the concave top bump 2〇4 can generate a large change, even if the wafer 210 or the substrate 220 of the chip package 300 undergoes large warpage deformation, it is not easy to cause contact failure or even open circuit. The phenomenon, which in turn improves the reliability of the joint. As described above, the present invention can be embodied in a variety of improved structures: Γί ' can be widely used in thin wafers and substrate bonding: when the degree is only 100 microns or less, resulting in: When the amount of deformation is too large, The effect is more significant. The disclosure of the present invention has been disclosed in the above preferred embodiments, and it is not intended to be exhaustive, and it is intended to be within the spirit and scope of the invention. The following is a description of the protection of the present invention [the simple description of the drawing] is defined by the patented cost. Package: structure: 2: The composite bump structure is used to bond the wafer on the substrate. The heat of the colloid is caused by the colloidal heat rise phenomenon. Figure: Figure: Schematic diagram of the distortion of the sheet or substrate. FIG. 4 is a cross-sectional view showing a deformable composite bump structure of an embodiment. The edge of the organic composite convex structure of the present invention, 1269 is a schematic diagram of a twf.doc/g sheet on a substrate. 6A to 6D are schematic perspective views showing four kinds of concave top bumps, respectively. FIG. 7 is a schematic view showing warping deformation of a wafer or a substrate due to a thermal rise phenomenon of the colloid and uneven heating when the wafer and the substrate of FIG. 4 are heated. [Major component symbol description] 100 : Chip package 102 : Composite bump structure A 104 : Polymer bump 106 : Conductive metal material 110 : Wafer 112 , 122 : Upper and lower contacts 120 : Substrate 124 : Outer contact 130 : anisotropic conductive adhesive 132 : conductive particles 200 : deformable composite bump structure Φ 202 · bump base metal layer 204: polymer bumps 204a, 204b: ridge 204c: hollowed out regions 206, 208: surface Metal layer 210: wafer 212: pad 214: patterned solder mask layer 12 丨twf.doc/g substrate 224: contact non-conductive rubber anisotropic conductive paste 236: conductive particle chip package annular concave top bump: Central region double ridge concave top bump, 304b: ridge double ridge concave top bump, 306b · ridge: ridge single ridge concave top bump 13