TWI267193B - Schottky barrier diode and process therefor - Google Patents

Abstract

This invention solves the problem with a conventional process having a difficulty in controlling the etching of a schottky connection of a schottky barrier diode which contains a thick layer of polyimide and a part where a mesa etching is performed and a miniaturization of the chip is hindered. This invention proposes a new schottky barrier diode of a chemical semiconductor, planar type by providing an n type and an n+ type ion implant region on the surface of the substrate to become an active region, whereby the mesa and the polyimide layer can be eliminated. As a result the cost of the wafer is reduced and size of the chip can also be reduced as the distance between electrodes can be reduced. The high frequency characteristics can be improved. The GaAs layer is not etched when the schottky electrodes are formed, and a schottky barrier diode with excellent repetitivity can be obtained.

Description

1267193

[Explanation of the Invention] Q) [Technical Field to Be Invented by the Invention] The special-based barrier is used to realize the action of a compound semiconductor using a high-frequency circuit, and the action 2 is particularly related to the formation of a planar structure. Polar body and compound semiconductor Schottky screen [Prior technology] With the expansion of the global mobile phone market, the satellite transmission and delivery machine +, Kadangu ^ 4 secret::: and in response to the digital female service Use / without k questioning. Due to the high frequency of the components, the electric field effect transistor of GaN is used, and the monolithic micro-integration (MMIC) and local oscillation of the switching circuit itself are introduced. Use FET. The integrated circuit is long. Further, the GaAs Schottky barrier diode is also increased by the base station, etc., and Fig. 9 is a cross-sectional view showing the conventional Schottky barrier diode operating region. '^ ^ Above the Π+-type GaAs substrate, 21, Π+-type epitaxial layer 22 (5x 1〇lfcm, layered approximately 6/zm, further as the n-type epitaxial layer of the action layer 2 3x 1 0 Am _3 For example, stacking about 355 A. · Form an ohmic electrode (仏1!1 616 (^1*0(16)28 of the first layer of metal sound in the n+ type stray layer 22 ohmically bonded AuGe/Ni/Au. The second layer of metal layer 曰 is Ti /Pt/Au, the pattern of the second metal layer is the anode side and the second side of the metal layer, and the Schottky junction is formed on the anode side and the n-type doped layer 23. The following will be a Schottky junction. The second metal layer on the anode side of the region 31a is referred to as a Schottky electrode 31. The Schottky electrode 31 is also used as a base electrode for forming a third layer of the anodized electrode, and the patterns on both sides are completely overlapped. 2nd layer of gold ^

Case No. 91116690 1267193 Revision 5. V. Inventive Note (2) The layer is in contact with the ohmic electrode, and is further used as the base electrode of the Au layer of the third layer of the cathode pad. As with the anode side, the pattern of the square is completely overlapped. . Schottky electricity = 31 = the position of the pattern end must be disposed on the polyimine layer. Here, a pattern overlapping the 16" m cathode side is formed around the Schottky junction region 3U. The substrate other than the Schottky junction is a cathode potential, and the anode electrode 34 and the cathode potential (10) are further provided with a polyimide layer 30 for insulation. The area of the parent fork portion is formed to be approximately i3 〇〇 #..., due to the large parasitic capacity 'the distance must be formed to a thickness of about 6 to 7 // m to alleviate the parasitic capacity. Polyimine is used as an interlayer insulating film due to the low dielectric constant and the property of being thickly formed. The Schottky junction region 3 1 a is provided with a withstand voltage of about 1 〇 v and a good Schottky property for a disk of about 1 · 3 x 1 〇 _ epitaxial layer 2 3 . On the other hand, in order to reduce the output resistance, the ohmic electrode 28 is provided on the surface of the n + -type epitaxial layer 22 exposed by mesa etching. Further, the lower layer of the n + -type stray layer 22 is a high-concentration GaAs substrate 2 1, and A u G e / N i / A u having an ohmic electrode μ is used as a back electrode, and may also correspond to a model output from the inside of the substrate. Fig. 10 shows a plan view of a conventional compound semiconductor Schottky barrier diode. At about the center of the wafer, a Schottky junction region 31a is formed over the n-type epitaxial layer 23. This region is a circle having a diameter of about 丨m, and Ti/Pt/Au of the second metal layer is sequentially deposited and formed in the Schottky contact hole 29 of the exposed epitaxial layer 23. The ohmic electrode 28 of the first metal layer is provided so as to surround the outer circumference of the circular Schottky junction region 3a. The ohmic electrode 28 is a member in which AuGe/N 1 /Au is sequentially deposited, and is disposed in a region approximately half of the wafer. And, in order

313892.ptc Page 11 _ Case No. 91116690 1267193

V. INSTRUCTIONS (3) The electrode is turned out to make the second layer of the metal layer bottom electrode. The human hair electrode is contacted by 2 8 and is installed as a base electrode on the anode side and the cathode side. The anode side is located in the minimum range area required for the Au layer plating with the Schottky junction, and the cathode side is 22 1 a. Sickle:): The pattern of the shape of the perimeter of the field when dry. And, it has been upgraded into a two-ring Wright base joint. The parts must be formed into a knife, and a plurality of weld lines must be fixed. Therefore, the area where the sense of sensation is half is regarded as the welded area. '日日片约— " : 1 Diwax is equipped with a plating field in such a way as to overlap with the base electrode. This production is fixed by a stitch-type bonding wire and output electrodes. ^, 4 Ox 6 0// m2, cathode The pad portion is 2 〇7 〇2 ^ The dry pad P is -Γ | △υχ 'm2. By connecting the pin to the day, the welding line can be connected by one welding, even if the welding surface is constructed: It is also possible to reduce the sense of high-frequency characteristic parameters. High-frequency characteristics. β 刀 钕歼 钕歼 二 i i i i i ' ' ' ' ' ' ' ' 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第An n+ type epitaxial layer 22 is attached with a first metal layer to form an ohmic electrode 28. That is, 'the n + type epitaxial layer 22 is deposited on the n + GaAs substrate 21 (5 x HPfcm -3⁄4 is accumulated by about 6 // m, in the The epitaxial layer 23 (ΐ 3χ 1〇^ _3) is stacked on the upper side to be about 350 0 A. Then, the oxide film 25 is covered, and the anti-contact layer above the predetermined ohmic electrode 28 is selectively fenestrated. Then, using the anti-button layer as a mask, the oxide film of the predetermined portion of the ohmic electrode portion 28 is left for further, and the platform of the n-type epitaxial layer 23 is further advanced. Engraved exposed n + type polycrystalline layer 22 stupid.

313892.ptc Page 12 1267193, ar _ Case No. 91Π6690_ September S曰 Amendment _ V. Invention Description (4) Then, the first layer of metal layer A u G e / N i / A u three-layer order The vacuum is accumulated and layered. Then, the resist layer is removed, leaving a metal layer in a portion of the predetermined ohmic electrode 28. Next, an ohmic electrode 28 is formed in the η + -type epitaxial layer 2 2 by alloying heat treatment. In Fig. 22, a Schottky contact hole 29 is formed. A photolithography method of selective windowing is performed by completely forming a new resist layer and a predetermined portion of the Schottky junction region 31a. The exposed oxide film 25 is etched, and the resist is removed to form a Schottky contact hole 29 which exposes the n-type epitaxial layer 23 of the predetermined Schottky junction region 31a. In Fig. 13, a polyimine layer 30 for insulation is formed. The polyimide was coated several times in a comprehensive manner, and a thick polyimine layer was set at 30. A new resist layer is formed in its entirety, and a selective windowing photolithography is performed to leave a predetermined portion of the polyimide layer 30. The exposed polyimine is then removed by wet etching. The resist layer is then removed to harden the polyimide layer 30 to a thickness of 6 to 7/z m. In the figure 14, the 'n-type stray layer 2 which is exposed inside the contact hole 29 is formed, and the Schottky electrode 3 having the Schottky junction region 3 1 a is formed to use the Schottky contact. The oxide film 25 around the hole 2 9 is used as a mask, and the n-type stray layer 2 3 is engraved. As described above, after the contact hole 29 is formed, the polyimine layer 30 is formed in a state where the surface of the n-type doped layer 23 is exposed. The Schottky junction must be formed on a clean GaAs surface, so the surface of the n-type epitaxial layer 23 must be etched before the Schottky electrode is formed. In addition, in order to ensure the optimum thickness of the action layer of 2,500 A, the temperature and time must be precisely controlled to be wet etched to a thickness of about 3 5 Ο 0 A to 2 5 Ο Ο A.

313892.ptc Page 13 1267193

After the predetermined anode electrode 34 and the base electrode of the cathode electrode 35 portion are covered with the second resist layer, electrolytic gold plating is performed. At this time, the resist layer: only the portion where the base electrode is exposed is adhered to the plating, the boring is milled, and the pattern of the shape of the base electrode of the Au portion of the ore and the electrode electrodes 34 and 35 is not removed. At this time, the pottery title "曰 is removed, but because there is a thickness of about km, π will cause the back of the servant 2 servant 2 to polish the back, and sequentially accumulate AuGe/Ni/Au, apply B ... , forming the ohmic electrode 2 8 inside. The thorns 2 ί Γ S body * special barrier diodes complete the previous step, that is, the steps of the 丨彳 丨彳 nw Μ ί ΐ 2. Cutting the circular semiconductor wafer, Advise J's individual semiconductor wafers, a fixed #士, 储- VA pe ^ film to fix the δ海丰蜍 body wafer in the frame (not 々 ar ar 闰 、 、 、 、 、 、 、 、 、 、 、 、 The pad is connected to the predetermined wire (not shown). It is connected by a pin-and-pin type: the second wire is used as a welding wire, and the resin is wrapped by a transfer molding method. The method of the conventional Schottky barrier-to-ship type of the invention is formed, and the structure of the cathode electrode is outputted in accordance with the busy _JJ 面 surface.

313892.ptc Page 14 1267193 _ Case No. 91116690 V. Announcement (6) Year? The 爹曰 + type G a A s substrate is provided with an η + type stray layer. The upper layer is formed with a structure of an n type epitaxial layer of about 1.3 Å 1 0 Am _ to ensure a predetermined characteristic. Since the Schottky electrode must ensure a predetermined characteristic, the clean surface of the n-type epitaxial layer is exposed and metal is deposited to form a Schottky junction. The ohmic power extremely reduces the output resistance, and the η+ type epitaxial layer forms an ohmic junction 0. Here, the conventional structure has the following problems. First, in order to form the ohmic electrode 2 8, it is necessary to form a land and expose the n + -type epitaxial layer 2 2 . The n-type epitaxial layer 23 has a thickness of about 3,500 people, and it is necessary to mesa etching in order to expose the underlying η + -type epitaxial layer 2 2 . An oxide film 25 for protecting the substrate is provided on the surface of the substrate. The etching of the substrate is performed by masking the photoresist on the surface, but unevenness of photoresist adhesion occurs on the surface of the oxide film 25. In the case of wet etching in this case, the etching may be laterally expanded to more than necessary, and the necessary oxide film 25 may be etched, and if GaAs is exposed, the shape of the stage may be unstable. Therefore, the photoresist which is formed when the ohmic electrode 28 of the opening portion of the stage is formed, the shape of the peripheral end portion is also deformed, etc., and as a result, the shape of the ohmic electrode 28 may be deteriorated due to peeling, or the GaAs is left to Schottky junction. Nearby, there is a problem that adversely affects the characteristics. Most of the second 'anode electrode 3 4 is provided above the GaAs forming the anode potential, and there is a problem that the parasitic capacitance here becomes large. Since the cross-sectional area is 1 300 / m 2 , the parasitic capacitance must be reduced by a thick interlayer insulating film. In order to embed the platform as a thick interlayer insulating film, a 6 to 7//in polyimine layer 30 must be provided. An opening is provided in the polyimide layer 30 for outputting the electrode of the Schottky junction region 3 1 a, but because of the etching of the thick polyimide layer 30, and considering the polyimine layer 30 The stage coverage of the electrode is the purpose,

313892.ptc Page 15 Case No. 91116690 1267193

V. INSTRUCTION OF THE INVENTION (7) _ : Pushing is formed in the opening. However, since the film quality of the polyimide layer 30 and the imide layer 30 of the photoresist does not form a serious unevenness of 30 to 45 degrees = unevenness, the push angle is combined with the region 31a and the ohmic The spacing of the electrodes 28 from the Schottky junction of the 'action zone is ensured to be approximately 7 // m. However, since the respective contacts are required to have resistance in consideration of pushing, the large separation distance hinders the distance between the two to contribute to the fact that the series is not progressing in miniaturization of the wafer. The improvement of the characteristics of the 鬲^ member is also the third. Since the Schottky junction and thus the action of the Schottky barrier diode s are pushed and pulled, the sniffering degree of the squeak also becomes The cause of interlayer insulation. The fourth increase is due to the use of polyimine as the acoustic Au as the wiring and electrode output of the 曰0, ,,, or the plating. However, it is a high cost that cannot be reduced. Therefore, the wafers of the AS substrate and the Ω+ type stray layer and the η type stupid layer are inherited, and thus there is a problem that the cost is hindered. Moreover, according to the conventional manufacturing method, there are the following problems. 23 Shaw #特基接接接接介基基在第一上层_ Epitaxial layer (四)仁 In order to ensure the most appropriate thickness of the operating layer withstand voltage and resistance ^ (4) =, and = about 3 5 0 0 into the η Type, the crystal layer 2 is engraved into the etched wet etching of 25 〇〇, so in addition to time and temperature, and the wafer vibrating amplitude in the etching liquid [vibration speed and other controls are very difficult Outside' and require the surname to be used for the specified freshness retention time. Because of the inconsistency of the Γ 从 from the vast ,, it is very difficult to seek the reproducibility of the action area and the high frequency characteristics.

Page 16 III·· 1267193, Q ( _ Case No. 91116690? Month 5曰 Amendment _ V. Invention Description (8) No. 2, according to the platform construction method, it is necessary to use a lot of steps for the platform, because The adhesion between the photoresist and the oxide film is uneven and a problem occurs. Moreover, it is necessary to simultaneously have a polyimine layer forming step as an interlayer insulating film, and a Au plating having an output of an electrode above the polyimide layer. In the formation step, etc., there is a problem that the manufacturing process is complicated and the time efficiency is not good. Since the price of the compound semiconductor itself is high, in order to rationalize, it is necessary to reduce the size of the wafer to suppress the cost. That is, reducing the wafer size is unavoidable, and it is desired to reduce it. The cost of the material itself is also required to further improve the high-frequency characteristics. In addition, the simplification and efficiency of the manufacturing process are also important issues. [Invention] The present invention has been made in view of the related problems, and is characterized in that it has a compound semiconductor substrate. a conductive ion implantation region disposed above the substrate, and a conductive type high concentration adjacent to the ion implantation region The first ion-implanted region and the high-concentration ion implantation region form an ohmic junction first electrode, and the ion implantation region forms a Schottky-bonded second electrode and a metal layer serving as an output of the first and second electrodes. By providing an ohmic electrode on the surface of the high-concentration ion implantation region provided on the surface of the substrate, a planar Schottky barrier diode of the compound semiconductor can be realized, and the area of the action portion can also be reduced. Since all the operating regions can greatly reduce the cost of the wafer itself, the cost of the Schottky barrier diode can be reduced, and the high frequency characteristics can be improved by reducing the parasitic capacitance and the resistance. Moreover, the present invention provides a method of manufacturing a Schottky barrier diode,

3]3892.ptc Page 17 1267193

Department view 3111b(10)U

V. Description of the invention (9) The manufacturing steps to achieve simplification and efficiency, and the ancient levy, with a flat compound half-characteristic characteristic, its special ion implantation zone, and forming a neighbor::; surface formation - Step of the conductive high-concentration ion implantation region, the conductive surface forming the ohmic junction of the second electrode, and the step of forming the Schottky-bonded second electrode on the surface of the ion implantation region, the step of forming the electrode and the second electrode The metal layer of the cow is 7% and the first embodiment [Embodiment] The factory, according to the first to eighth figures, shows the Schottky barrier of the present invention in detail. Handyman ^ t _ early - polar limb 1 'has compound semi-conducting 俨 1, gong 桎 1 1 ΐ 3, south concentration ion implanted area 7, first electrode 8, second private pole 11 and metal layer 1 4, 1 5 . 0 ^ 2 Fig. 1 shows a cross-sectional view of the portion of the action region. 'The plateau is not formed. The compound semiconductor is a non-doped GaAS substrate and has a flat substrate structure. - The two sub-implantation zone ' or 3 is a sub-implantation zone or the semiconductor substrate 1 disposed under the circular Schottme package pole 11 is an action region of the corner group. The surface field serves as a special barrier diode. The ion implantation region 7 is adjacent to the ion implantation region 3 on the surface of the substrate below the ohmic electrode 8. It is disposed so as to substantially overlap the ohmic electrode 8 along the circular Schottky electrode circumference, at least surrounding the Schottky electrode +. The enthalpy is set to exceed the ohmic electrode 8. The Schottky electrode 1 1 and the high concentration are: the implantation distance of the implanted region 7 is 1 " m. That is, the structure in which the high-concentration ion implantation region 7 is formed on the surface is formed in such a manner as to maintain the plane, and instead of the conventional platform structure, the ohmic connection without the platform can be realized.

Page 18 Case No. 1267193 Amendment, invention description (ίο) Wuhe. The ion i electrode 8 is the first metal layer that is contacted at a high concentration of ions or at a pH of 7. The AuGe/Ni/Au is sequentially deposited, and the Schott x is joined to form a hollow shape into a circular shape & t R amp. $ % # and the distance between the joints of the A and the base is Μ and the adjacent Schottky electrode ♦ ♦ the surface of the base electrode of the galvanic electrode film is the second metal layer, which is covered by the surface of the Us surface. The special base contacts the hole, and forms a diameter of 10 / / _ circle to map 0 ^ ^ kg unpredictable Ti / Pt / Au, some access. I ^ pattern, and the formation and ion implantation area 3 Schott storm interface field to do the action area; start λ p a. Set, for obtaining the pressure resistance, etc.:: Planting field 3 is set to the most suitable condition. The band is 1 1 opening 彡 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 High-quality, high-precision Schottky 15ΐ layered anode with anode electrode 14 and cathode electrical contact, extending to the anode soldering field / '14 and Schottky electrode 11 bonding film 5 and ohmic electrode 8 = 20% anodized 塾 "a. And through the nitrogen P + into the " / Ge Yin electric t ^ ion implantation area 3 and high concentration ion implantation area 7 insulation. Yangshuo Chen

GaAs substrate! For the semi-insulating, ί, the pad 14f is fixed to the substrate 1. The handle is not fixed. / This allows the wire soldering portion to be directly attached to the substrate without the polyimine and nitride film. The 缩-negative H-pole 15 is disposed opposite to the anode electrode 14 and to the ohmic electrode. Fig. 3 shows the compound semiconductor Schottky barrier 2 of the present invention. -胄图. Figure 2 is a schematic diagram of a wafer pattern, and Figure 3 is a motion;

313892.ptc Page 19 The high concentration of ions in the contact of the pole 8 is a cathode. The ohmic electrode pad field 7 forms a cathode potential _. The yin jin is placed on the 绝缘5 and on the + insulating substrate 1.

1267193 曰 ~ Amendment 5, invention description (12) ^ Less high-frequency characteristic parameters of the sensing component, help to connect the second, as shown in Figure 3, anode + erection y, 铋 juice south frequency characteristics. The taste electrode and the portion forming the cathode fork, only the area indicated by the oblique line, the intersection of the GaAs of the position, the conventional ηηπ ^ knife area is about 100 / / m. Its car 乂白夫1 1 0 0 "when it is reduced to about work / j 3, m film 5 replaces the interlayer insulating film of polyimine. This can be used for emulsification of this hairy special 彳 为 for the high concentration ion implant Into the region 7, and the Schottky electrode 11 and the ohmic electrode 8 are arranged on the surface of the GaAs, and the planar structure of the early second pole body of the P-type screen P is not required to be considered as a flat opening. The deviation of the Schottky pole 8 can be greatly reduced, and the anode electrode 14 and the cathode bud are electrically divided, and the underlying electrode is divided into a semi-insulating GaAs substrate 1. That is, The area of the parent yoke portion of the GaAs and anode electrode 14 forming the cathode ar λ 1 _ _ ι is about 100 / / and conventional

Into the area of 1 / 1 3 . By increasing the thickness of the polyimine (intermediate 乂' I type, because there is no need to suppress the parasitic capacity, the distance of 1 by +) can be increased, and the partial vaporization of the polyimine is not considered. The film replaces the brewing. Thus, in particular, the Schottky junction area distance can be reduced from λ to 2#m. In addition, the distance between the gaps of the it&m electrodes is 1 // m. At this time, the high concentration is implanted in the region moving path earlier, and has substantially the same effect as the ohmic electrode 8, so that the distance between the sub-electrodes can be Reduce to 丨/7. The Schottky electrode n and the ohmic separation distance contribute to the series resistance. Therefore, if the package is 8 white, 丄, + right, this small spacing distance is used to reduce the resistance, which is very helpful for improving the high frequency characteristics. Then more 3, therefore, help the chip to crack small, wafer ruler; 0. 31_ lack of size, but can be reduced to 〇. 25x 〇 25mra 3 need to be equipped with solder pads, and can be manipulated when assembled _ 4 The size of the daily film is limited, 1267193 Ati, f η c Case number 91116690 _ year 7 _ I------- V. Invention description (13) Therefore 0 · 2 5mm angle is the limit of the status quo 'But because of the action area It can be as small as about 1 / 1 0. Therefore, as will be described later, the I ^ ground reduction degree in which the operation region is disposed becomes extremely large. According to the present invention, since the operation region is provided by ion implantation on the non-doped GaAs substrate, the wafer cost can be reduced by the wafers of the conventional structure in which the epitaxial layer is mounted. Fig. 4 is a view showing a second embodiment of the present invention, showing a plurality of Schottky junction regions in which a Schottky electrode is formed. In the structure of the present invention, a plurality of Schottky electrodes 11 may be mounted. For example, according to the arrangement in the figure, the 宵-based electrodes 11 are connected in parallel to help reduce the electric resistance. If the Schottky contact aperture is reduced and a plurality of holes are provided, the spacing between the center of the Schottky contact hole and the high-concentration ion implantation region 7 can be further reduced when the total area of the same Schottky contact hole is set to one. Distance, high concentration ion into zone 7 carrier trapping will be more effective. Therefore, having a cathode resistance value can further improve the advantages of high frequency characteristics. The fifth to eighth drawings show in detail the method of making the Schottky barrier diode of the present invention. The long Schottky barrier diode has a conductive ion implantation region formed on the flat surface of the undoped compound semiconductor 2, and the substrate surface adjacent to the ion implantation region at a predetermined first electric region Forming a step of depositing a concentration ion implantation region; forming a first electrode of the ohmic junction in the high concentration ion implantation region; forming a surface surrounded by the first electrode; and forming a surface with the ion implantation region The second electrode step 't jointed with the second base and the metal layer formed to be in contact with the first electrode and the second electrode, respectively, 1267193 _____________________________________________________________________________________________________________________________________________________________ As shown in Fig. 5, in the first step of the present invention, a conductive type ion implantation region 3 is formed on the surface of the flat non-doped compound semiconductor substrate 1, and is formed on the substrate surface 1 adjacent to the ion implantation region 3. A conductive high concentration ion implantation region 7. This step is a step of the feature of the present invention, forming an n-type ion implantation region 3' as an action region and forming a high concentration ion implantation region 7 on the surface of the substrate below the region where the predetermined ohmic electrode 8 is formed. In other words, the non-doped GaAs substrate 1 is covered with the nitride film 5, and the resist layer is formed over the region formed by the predetermined n-type ion implantation region 3 in which the resist layer is provided as the operation region. A photolithography method for selective windowing is performed. Then, the resist layer is used as a mask, and an n-type impurity (S i +, about 1.3 χ 1 0 Am _3) is ion-implanted to form an n-type on the surface of the substrate 1 under the predetermined Schottky electrode. Ion implantation region 3. At this time, since the n-type ion implantation region 3 becomes an operation region of the Schottky barrier diode, conditional ion implantation in the concentration state of the most appropriate characteristics can be obtained in the operation region. After the resist is removed, a resist layer over a region of a predetermined high concentration ion implantation region 7 is further formed, and a photo-etching method of selective windowing is performed. Then, using the resist layer as a mask, a high concentration of n-type impurity (S i +, about 1.3 μm, implanted, ion implanted on the surface of the substrate 1 below the predetermined ohmic electrode 8 to form a high concentration The ion implantation region 7. Moreover, a portion overlaps the adjacent region, and the n-type ion implantation region 3 is formed without a spacer portion 0, and then the resist layer is removed, and the nitride film 5 is deposited again for annealing, and the n-type ion implantation is performed. Activation of Zone 3 and High Concentration Ion Implantation Zone 7

313892.ptc Page 23 1267193 Case No. 91116690 Amendment V. Description of invention (15) Annealing. Therefore, under the predetermined Schottky electrode 1 1 as the action region, the n-type ion implantation region 3 is formed, and below the predetermined ohmic electrode 8, a high concentration ion implantation region 7 is formed. In the subsequent step, by providing the Schottky electrode 11 on the surface of the n-type ion implantation region 3, the ohmic electrode 8 is disposed on the surface of the high-concentration ion implantation region 7, thereby realizing the Schottky barrier of the planar structure. Diode. Therefore, the distance between the Schottky junction region and the high-concentration ion implantation region that performs the same operation as the ohmic electrode can be greatly reduced, and a Schottky which can reduce the series resistance and contribute to the improvement of the high-frequency characteristics can be formed. Barrier diode. As shown in Fig. 6, the second step of the present invention forms the first electrode 8 which is ohmically bonded to the surface of the high-concentration ion implantation region 7. A resist layer is formed in its entirety, and a predetermined portion of the ohmic electrode 8 is formed, and a photo-etching method of selective windowing is performed. The nitride film 5 exposed from the resist layer is removed, and the AuGe/Ni/Au three layers of the first metal layer are sequentially stacked and laminated. Then, the resist layer is removed by lift-off, and the first metal layer is left in the predetermined ohmic electrode portion 8. Then, an ohmic electrode 8 is formed on the surface of the high concentration ion implantation region 7 by alloying heat treatment. As shown in Fig. 7, in the third step of the present invention, the second electrode 11 is formed, the outer periphery of the first electrode 8 is surrounded, and the Schottky junction is formed on the surface of the ion implantation region 3. This step is a step of the features of the present invention. First, in FIG. 7(A), the resist layer PR is formed in a comprehensive manner, and a predetermined portion of the Schottky electrode 11 is selectively fenestrated by photolithography. . The exposed nitride film 5 is dry etched to form a Schottky contact hole 9 exposing the ion implantation region 3.

313892.ptc Page 24 1267193 Month 9111RR〇n Amendment 5, Invention Description (16) However, as shown in Figure 8 (8), the second layer of metal layer : - : f ' is actually deposited and laminated in a comprehensive manner, then By removing the Ϊ : = ί ion implantation region 3 surface to form a Schottky junction, as a soil-based electrode n. The surface of GaAs is covered with a nitride film to form "Temple Foundation. It can form a Schottky junction in a good state on the surface of the GaAs. 土 Ϊ Ϊ Ϊ Ϊ ' ' ' ' ' ' ' 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了 除了It is very difficult to control the inside of the liquid: ί 速度 等 等 等 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : The type ρ ^ ιιs p can omit the necessary engraving steps for controlling the thickness of the action sound, so that a reproducible Shaw can be formed: the stable (four) base barrier diode = 15' is in contact with the i-th electrode 8 and the second electrode n, respectively. The formation of the layer 14 and the film ί ί : 1 is a step of the feature of the present invention. First, the nitride film 5 as a layer and a layer is again deposited in a comprehensive manner. Formation resistance: Part 15a of the soldering iron, selective light-emitting window Γ, film 5 for more than a moment. After the resist is removed, a new γ layer is further provided, and the desired anode electrode 14 and the open window are etched. Twist τ · / pattern, select to form the anode electricity 35i 4 and the dangerous pole. The second order is accumulated in the whole 'by stripping: the pole electrode' and the cathode electrode 15 are based on the general peeling method In addition, the interlayer insulating film of the anode electrode U and the cathode electrode 15 is a mouse film 5, and the soldering portion can be directly fixed on the substrate, and the door is in the case of jjll6690^j1___month^ Ά. Amendment 1267193 V. DESCRIPTION OF THE INVENTION (17) The polyimine layer can be omitted. Therefore, the Au plating step of wiring and pad formation for absorbing the defects of polyimine is known. If the polyimine layer formation step and the key Au step for performing several coatings can be omitted, the manufacturing process can be simplified, and the Schottky barrier diode can be efficiently fabricated. The compound semiconductor Schottky barrier diode completes the front stage. In the step, the process is transferred to the subsequent step of assembling. The wafer-shaped semiconductor wafer is cut and divided into individual semiconductor wafers, and after the semiconductor wafer is fixed on a frame (not shown), the semiconductor wafer is soldered. Solder pads 1 4a, 15a and A wire (not shown) is connected. A metal wire is used as a bonding wire, and a well-known stitch bonding connection is used. Then, a resin molding of transfer molding is performed. [Effect of the invention] According to the configuration of the present invention, the following various effects can be obtained. First, by providing a high-concentration ion implantation region 7 on the surface of the GaA s and providing the Schottky electrode 11 and the ohmic electrode 8 on the GaAs surface, The planar structure of the Schottky barrier diode can be realized. Since the unevenness of the ohmic electrode shape and the deterioration of the characteristics can be suppressed by suppressing the unevenness of the platform, the Schottky electrode 11 and the ohmic electrode can be greatly reduced. The separation distance of 8 and the spacing distance between the Schottky electrode 11 and the ohmic electrode 8 contribute to the series resistance, so that the smaller the separation distance, the more the resistance can be reduced. Second, the cathode potential GaAs and the anode electrode 14 intersection portion The area is about 10 // m 2 , and the parasitic capacitance is greatly reduced. This is the region where most of the anode electrode 14 is provided with an insulating region 6, so that the intersection of parasitic capacitance occurs. Area, compared with conventional, only the Schottky junction portion can be reduced to

111^· 3]3892.ptc Page 26 _SS_91116690

1267193 V. Description of invention (18) 1/13. Further, since the anode pad 14a can be directly fixed to a portion without parasitic capacitance, GaAs can be greatly reduced, and therefore, a low dielectric constant polyimine is used to provide a thick parasitic capacity. , Parasitic capacity, but can be replaced by a thin nitride film. ^ = Insulating film for high dielectric constant, but according to the configuration of the present invention, & 祺 醯 醯 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 仍 。 。 。 。 。 。 。 。 About 5〇〇〇a! 1 No. 3, since the thick polyimine is not used, the distance of the push-out part of the opening of the polyimine in the gas-average region does not need to be considered, and the angle of pushing is not as described above. Base electrode and ohm ♦ simply consider the withstand voltage and mask overlay accuracy. The spacing between the two poles can be separated from the base joint region and the ohmic electrode. Specifically, in addition, the interval between the high concentration ion implantation region 7 and The formation of the 7/Z岐2/extra-concentration ion implantation region 7 is a moving path of the carrier, although k „, this electrode 8 has the same effect, so it can be separated from the conventional ohms and ohms ^ As a result, the resistance is greatly reduced, the parasitic capacitance is greatly reduced, and the 丨/匕 is reduced, which can greatly improve the high-frequency characteristics. The fourth and the parasitic capacity are fourth, which contributes to the miniaturization of the wafer, and the wafer size is not included. 1 mm is small, but it can be reduced to 〇. 2 & 〇-习知〇· 2 Consider the necessity of arranging the mattress, and it can be operated during assembly. The size is therefore limited by the current angle of 0·25mm. Stretching Λ ^The size limit of the film is reduced to about 1/1 inch, so the action area is set. Large L No. 5, because it can be implanted into the GaAs substrate by ion implantation of the H-shaped part, without having to install an epitaxial layer, which helps to reduce the cost. _ plate mounted ^ type epitaxial layer = than 1267193 case number 91 Π 6690 January 曰 "曰 五 、, invention description (19) layer, can achieve wafers without GaAs, so the wafer price can be greatly reduced 1 / 4 to 1 / 5. In the sixth aspect, by installing a plurality of Schottky junctions forming Schottky electrodes, the resistance can be further reduced. If the contact diameter of the Schottky junction is reduced, a large number of contacts are provided. When the Schottky electrode having the same total area of contact with one Schottky contact is installed, the electric resistance can be further reduced, and the carrier collection in the high-concentration ion implantation region can be efficiently performed, so that the high-frequency characteristics are further improved. In the seventh aspect, since the polyimine layer and the gold plating are not used, in addition to the reduction in the material cost, the wafer can be reduced and the cost can be reduced. According to the manufacturing method of the present invention, the following effects can be obtained. Forming a stable Schottky junction that inhibits high frequency circuits The characteristics of the often important problem are not uniform. If the n-type ion implantation region is covered with a nitride film until the Schottky junction is formed, the nitride film is etched and deposited with T i /P t / Au, which is complete. Non-polluting crystal face Schottky bonding for high-quality, high-accuracy Schottky bonding. Moreover, the n-type ion implantation region forms the most appropriate concentration state as the action region, and is not as complex as conventional GaAs. Incision control, that is, a Schottky barrier diode having improved yield, reproducibility, and stability characteristics can be manufactured. Second, the Schottky barrier diode described above is efficient in manufacturing and can be simplified. The manufacturing step, specifically, the stage etching step, the n-type epitaxial layer etching step before the Schottky junction formation, the polyimide layer forming step, the plating step, and the like. In order to form the polyimide layer to a thickness of 6 to 7 #m, it is necessary to form a coating several times. The coating of the polyimide layer several times is time consuming and complicated in the manufacturing process. Also, do not plate the electrode of the Au layer if it is not polyimide. In order to prevent heat during soldering and soldering during soldering

313892.ptc Page 28 1267193 _ Case No. 91116690 V. INSTRUCTIONS (20) The corrected pressure causes the electrode to be interrupted and deformed, and the strength of the electrode must be ensured. The anode electrode and the cathode electrode are formed by thick Au plating. However, if you do not want to concentrate on the imide layer, you do not have to consider this effect. That is, do not plate the gold electrode, and only the metal deposited by T i / P t / A u can form the anode electrode and the cathode electrode, and improve reliability. In addition, the above factors, which cause the low yield of the conventional products, will also increase the yield.

That is, the present invention has an advantage that, on the one hand, it is a Schottky barrier diode, which can greatly reduce parasitic capacitance, further reduce resistance and greatly improve high-frequency characteristics, and on the other hand, can provide simplification and efficiency in manufacturing steps. Manufacturing method.

313892.ptc Page 29 1267193 _ Case No. 91116690 Brief description of the drawings Correction [Simple description of the drawing] Fig. 1 is a cross-sectional view showing the semiconductor device of the present invention. Fig. 2 is a plan view showing the semiconductor device of the present invention. Fig. 3 is a plan view showing the semiconductor device of the present invention. Fig. 4 is a plan view showing the semiconductor device of the present invention. Fig. 5 is a cross-sectional view showing a method of manufacturing a semiconductor device of the present invention. Figure 6 is a cross-sectional view showing a method of manufacturing a semiconductor device of the present invention. Fig. 7 (A) and (B) are cross-sectional views showing the method of manufacturing the semiconductor device of the present invention. Figure 8 is a cross-sectional view showing a method of manufacturing a semiconductor device of the present invention. Fig. 9 is a cross-sectional view showing a conventional semiconductor device. Fig. 10 is a plan view showing a conventional semiconductor device. Fig. 1 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. Fig. 2 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. Fig. 1 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. Fig. 14 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. Fig. 15 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device. Compound semiconductor substrate 3 η-type ion implantation region

Nitride film 7 High concentration ion implantation region 8 First electrode, ohmic electrode 11 Second electrode, Schottky electrode 1 4 a Anode pad 1 5 a Cathode pad 2 2 η + type stray layer 9, 29 Special contact hole 14 metal layer, anode electrode 15 metal layer, cathode electrode 21 n+ GaAs substrate 23 n-type stray layer

313892.ptc Page 30 1267193 _ Case No. 91116690 Brief description of the diagram 2 5 Oxide film 31 Schottky electrode 34 Anode electrode P R Anti-surname layer Correction 30 Polyimine layer 3 1 a Schottky junction region 3 5 Cathode electrode

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Claims (1)

1267193 VI. Patent application scope 1 · A Schottky compound is provided in the identifiable ion implantation and the foregoing pole; and the aforementioned and the first 2 Schottky compound are located in the domain; In the foregoing pole; the aforementioned Schottky connection is considered as the first 3 · as claimed in the patent, wherein the aforementioned 4 · as claimed in the patent number 91116690 Type ion implantation region; a conductive high-concentration barrier of the domain, characterized by a semiconductor substrate; a conductive layer above the substrate is connected to the ion implantation region; and a surface concentration ion implantation region is formed in the ion implantation region The first and second electrode wheel barrier diodes are characterized by a semiconductor substrate; a conductive high-concentration south-concentration ion implantation region on the upper surface of the substrate and a first electrode surrounding the periphery and The second electrode; and the compound semiconductor substrate of the first or second aspect of the wheel range of the first and second electrodes are the second electrode of the first or second term of the ohmic junction Electrode; metal layer. The conductive ion implantation region is provided to be ruptured into a metal layer formed by the seventh ion implantation region of the seventh ion implantation region than the ion implantation region; Schottky barrier diode, no para-doped GaAs substrate. Schottky barrier diode, 1267193 Case No. 9Π16690 This month (曰Amendment VI, the scope of application for patents where the distance between the aforementioned second electrode and the aforementioned south-concentration ion implantation region is 5//m or less. 5. If the patent application is the first or second a Schottky barrier diode of the present invention, wherein a Schottky junction region formed by a plurality of the second electrodes is provided. 6. A Schottky barrier diode according to claim 1 or 2, wherein The high-concentration ion implantation region is set to be beyond the first electric power, but a manufacturing method of the Schottky barrier diode, wherein: a conductive ion implantation is formed on the surface of the flat compound semiconductor substrate a step of forming a conductive high-concentration ion implantation region adjacent to the ion implantation region; forming a first electrode ohmically bonded to the surface of the high-concentration ion implantation region; forming and the aforementioned ion implantation region a step of forming a Schottky-bonded second electrode and a step of forming a metal layer in contact with the first electrode and the second electrode, respectively. A method of manufacturing a diode, comprising: forming a conductive ion implantation region on a surface of a flat non-doped compound semiconductor substrate, and under the predetermined first electrode, on a surface of the substrate adjacent to the ion implantation region Forming a conductive high concentration ion implantation region; forming a first electrode ohmically bonded to the surface of the high concentration ion implantation region; 313892.ptc Page 33 1267193 Case No. 91116690 Amendment VIII. Patent application scope forming a second electrode surrounded by the first electrode and forming a Schottky junction with the surface of the ion implantation region; and forming respectively and The step of contacting the metal layer of the first electrode and the second electrode. 9. The method of producing a Schottky barrier diode according to claim 7 or 8, wherein the second electrode is formed by sequentially depositing a plurality of metal layers of T i /P t / Au. 313892.ptc第34页