TW554542B - Schottky barrier diode and method for manufacturing the same - Google Patents

Abstract

Conventional Schottky barrier diode has problems that its chip size can't be shrunken due to the mesa and the thick polyimide layer therein, and its property can't be improved due to the large distance between electrodes, while conventional method for manufacturing the same has a problem that it is difficult to control the etching for a Schottky junction portion. This invention provides a Schottky barrier diode and a method for manufacturing the same, wherein an n-type and an n+ type ion implantation region are formed on the surface of a substrate, so there's no need to form a mesa and a polyimide layer and a planar type Schottky barrier diode becomes possible. Also, the cost of the wafer can be reduced, and the chip size can be shrunken and the high frequency property can be improved due to the distance between electrodes can be shortened. Moreover, there's no need to etch GaAs while forming a Schottky junction portion, therefore a good-reproducibility Schottky barrier diode can be manufactured.

Description

554542 V. Description of the invention (1) [Detailed description of the invention] [Technical field to which the invention belongs] The present invention relates to a Schottky barrier diode of a compound semiconductor used in a high-frequency circuit and a method for manufacturing the same, and particularly to borrowing Schottky barrier diodes of compound semiconductors that achieve planar structure to achieve miniaturization of the field of operation and wafer size, and methods of manufacturing the same. [Leading technology] With the expansion of mobile phone markets in various countries around the world, the demand for digital satellite transmitters and receivers has also increased, leading to a rapid increase in demand for high-frequency devices. In terms of high-frequency device components, based on high-frequency processing, many field-effect transistors using Su and Kun (GaAs) are used. Therefore, the monolithic microwave integrated circuit (MM IC) that integrates the aforementioned switching circuits, The development of oscillation FETs is also booming. In addition, the use of GaAs Schottky barrier diodes in base stations has also increased significantly. Fig. 9 shows a cross-sectional view of a portion of the action area of a conventional Schottky barrier diode. After the η + -type G a A s substrate 2 1 is laminated with an η + -type stupid crystal layer 2 2 (5χ 1 0 18cm- 3) of about 6 // m, another layer of about 3 5 0 0Α is laminated as an action layer. N-type epitaxial layer 23 (1.3x1017cm-3). The first metal layer forming the ohmic electrode 28 is gold germanium / nickel / gold (person 1 ^ 6 / to / ^ 11) which is ohmically connected to the n + type stupid crystal layer 22. The metal layer of the second layer is titanium / platinum / gold (T i / P t / Au). The pattern of the metal layer of the second layer includes two types of anode side and cathode side. The second metal layer is on the anode side with the n-type

313890.ptd Page 9 554542 V. Description of the invention (2) The stupid crystal layer 2 3 forms the Schottky distant area on the anode side of the mth or less, and the Schottky connection collar with the Teky electrode 31 can also be A ^ Metal layer% is the Schottky electrode 3 and the dealer Dadk 筮 w wind horses form an anodic bonding an (ancde bonding Π A: the bottom of the electroplating layer ... the metal layer of the second layer with the complete pattern of the two and The ohmic electrode contacts and becomes the bottom electrode for the formation of the cathode bonding pad. ^ Π 2 ~ The bottom electrode of the emerald green Au plating layer, which completely overlaps the pattern of the anode side :: gang :. The Schottky electrode 31 has a necessary edge Is placed on top of the polyimide layer, so the substrates outside the Schottky connection portion are mapped to the cathode potential at the periphery of the soil connection area 3 1 & and the cathode side is overlapped 16 6 m. A polyimide layer 30 for insulation is provided at the intersection of the anode electrode 34 and the GaAs which becomes the cathode potential. The area of the intersection is 1 3 0 0 // m and has a large parasitic capacitance. Therefore, it is necessary to set the separation distance to a thickness of about 6 to 7 # m to ease Parasitic capacitance. The polyimide layer is used because it has a low dielectric constant and can form a thick layer. In order to ensure a withstand voltage of about 10 V and good Schottky characteristics, the Schottky The connection area 3 1 a is provided on the η-type epitaxial layer 2 3 of 1 · 3x 1 0 17cm-轾. On the other hand, in order to reduce the extraction resistance, the ohmic electrode 28 is provided on the η exposed by mesa etching. The surface of the + -type epitaxial layer 22. In addition, the lower layer of the η + -type epitaxial layer 22 is a high-concentration GaAs substrate 21, and AuGe / Ni / Au, which is also an ohmic electrode 28, is set as a back electrode, which can correspond to the system. Models for taking out the back of the substrate. Figure 10 shows a plan view of a conventional Schottky barrier diode of a compound semiconductor.

313890.ptd Page 10 554542 V. Description of the invention (3) " A Schottky read field 31a is formed on the n-type epitaxial layer 23 at about the center of the wafer. The area is a circle with a diameter of about 10 // m, and Ti / Pt / Au is formed on the Schottky contact hole 29, which exposes the marriage layer 23, as a mesh layer of the second layer in order. An ohmic electrode 28 is provided as a first metal layer so as to surround the circular Schottky connection area 31a. The ohmic f-pole 28 is formed by sequentially vapor-depositing AuGe / Ni / Au. The ohmic f-pole 28 is arranged in a region of approximately one-half of Γ ^. In order to take out the electrode, the second metal layer is brought into contact with the ohmic electrode 28 to form a bottom electrode. The bottom electrodes on the anode side and the cathode side are provided to form a third electroplated layer. On the anode side, it is provided in the minimum area required for joining with the Schottky connection area 31a, and on the cathode side, it is patterned to form a Schottky connection area that can surround a circle. The shape of the periphery of 3 丨 3. In addition, in order to reduce inductance as a factor of high-frequency characteristics, bonding wires must be used as bonding wires. Therefore, a region that occupies approximately half the area of the wafer is used as a bonding region. In addition, an Au plating layer is provided so as to overlap the bottom electrode. Here, the bonding wires are fixed by stitch bonding, and the electrodes are taken out. The anodic bonding pad portion is 4 Ox 6 0 // m 2, and the cathodic bonding pad portion is 24 0 X 7 〇 // m 2. When connecting by pin-type bonding, two bonding wires can be connected at one time. Therefore, even if the bonding area is small, the inductance component, which is a parameter of the south frequency characteristic, can be reduced, and the high frequency characteristic can be improved. Figures 11 to 15 show the traditional method of manufacturing Schottky barrier diodes. In FIG. 11 ′, n + is exposed by meSa etching

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V. Description of the invention (4) The stupid crystal layer 2 2 and pay $ in exchange for the payer. The ohmic electrode 28 is formed by the metal layer of the first layer. Shi Yuekun, 0 0, and Γ are stacked on the n + type GaAs substrate 21 with an n + type of about 6 // m > 々 Gong 丨 Shi Yue 10 cm-3), and then stacked on top of about 35 0 0A Fees for labor. U (1.3 × 1017cm—3). Afterwards, the entire surface is covered with an oxide film 25, and the progress is made; 9 Q I * recognizes the Tungsten b T photolithography process to selectively smell the non-resistive layer on the predetermined ohmic electrode Z 8 ^ ^ ^. After that, the photoresist layer is used as a mask to etch the oxide film 2 5 of the ^ 9 ^ a electrode 2 8 portion. In addition, η-type lithography is also used to etch the surface to expose η + -type lithography. Crystal layer 22 〇οϊ3 The AuGe / Ni / Au 2 layer of the first metal layer is sequentially vapor-deposited: the photoresist layer is removed to leave the metal layer on the predetermined ohmic electrode 2 8 P knife and then the alloy is passed The heat treatment forms an ohmic electrode 28 on the n + -type epitaxial layer 22. Figure 12 shows the formation of Schottky contact holes 29. A new photoresist layer 'is fully formed and a photolithography process is performed to selectively open a window in a predetermined Schottky connection area 3 1 a. After the exposed oxide film 25 is etched, the photoresist is removed to form a Schottky contact hole 29 that exposes the n-type epitaxial layer 23 of the predetermined Schottky connection area 3a-a. A polyimide layer 30 for insulation is formed in FIG. 13. The polyimide coating of the number-person was performed over the entire surface to provide a thick polyimide layer 30. A completely new photoresist layer is formed on the whole, and a light lithography process for selectively opening a window is performed to leave a predetermined 30 part of the polyimide layer. The exposed polyimide is then removed by wet etching. The photoresist layer is then removed and the polyimide layer 30 is hardened to a thickness of 6 to 7 // m. Figure 14 shows the η-type epitaxial layer exposed in the Schottky contact hole 29.

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554542 V. Description of the invention (5) '23, and forming a Schottky electrode with a 3U in the field of Schottky connection. The oxidized film 2 5 around the lithographic contact hole 2 9 is used as a mask to etch the n-type cat positive layer 2 3. As described above, after the contact holes 29 are formed, the polyimide layer 30 is formed directly with the surface of the n-type worm crystal layer 23 exposed. The Schottky connection must be formed on a clean GaAs surface, so the Schottky electrode must not touch the surface of the stupid crystal layer 23 at all after forming the Schottky electrode. In addition, in terms of the action layer, in order to determine, the optimal thickness of 2500A must be wet-etched under a precisely controlled temperature and time to change the thickness of about 3500A to a thickness of 2500A . After t, Ti / Pt / AU is sequentially vapor-deposited to form a base electrode 3 1 and a cathode electrode 3 having a tertiary connection area 3 1 a with an n + type epitaxial layer and also serving as a bottom electrode of the anode electrode. 5 for the bottom electrode. FIG. 15 shows the formation of the anode electrode 34 and the cathode electrode 35, and the bottom of the predetermined anode electrode 34 and the cathode electrode 35 is exposed. After the other parts are covered, fine gold is applied. At this time, the cathode electrode 35 is attached to the Au electrode Wθ 1 34 only at the portion where the bottom electrode is exposed. At this time, the bottom electrode is completely (. · 1 1; · 疋, after removing the photoresist, an argon (Ar) plasma ion milling (10 n mi lng) is performed to remove the bottom electrode without the All plating part. , Patterned into the shape of the anode and cathode electrode 34,35 Au plated part will be more or less subject to the cutting part df, so there is no any; i cut but because of the thickness of about 6 ", then the back surface is polished ( back lapping), followed by u-plating AuGe / 1 / Au 'and then applying alloying heat treatment to form a back European

Page 13 554542 V. Description of the invention (6) < The compound semiconductor Schottky barrier diode is moved to the post-assembly step after completing the pre-step. After cutting a wafer-shaped semiconductor wafer, dividing it into individual semiconductor wafers, and then fixing the semiconductor wafer to a frame (not shown), the anode and cathode bonding pads of the semiconductor wafer are connected by bonding wires and a predetermined Lead (not shown). The bonding wire is a thin gold wire, and is connected by a commonly known pin-type bonding. After that, transfer molding is performed for resin encapsulation. [Problems to be Solved by the Invention] The substrate structure of the conventional Schottky barrier diode is formed so that the cathode electrode can be taken out from the back surface in order to support multi-purpose models, and n + is provided on the n + type GaAs substrate. A type epitaxial layer, and in order to ensure a predetermined characteristic, a structure of an n-type stupid crystal layer of about 1.3 × 1 0 17c m −3 is provided on the upper layer. The Schottky electrode exposes the clean surface of the n-type stupid crystal layer and vaporizes the metal to form a Schottky connection based on the need to ensure predetermined characteristics. The ohmic electrode forms an ohmic connection with the η + epitaxial layer below it in order to reduce the extraction resistance. Here, the conventional structure has the following problems. First, in order to form the ohmic electrode 28, a mesa must be formed and the n + -type epitaxial layer 22 is exposed. The n-type epitaxial layer 23 has a thickness of about 350 0A. In order to expose the n + -type stupid crystal layer 22 below it, a mesa engraving must be performed. An oxide film 25 is provided on the substrate surface to protect the substrate. Mesa etching is provided on the surface of the oxide film by a photoresist.

313890.pid Page 14 554542 V. Description of Invention (7) The mask formed by (7) is etched, but unevenness occurs in the adhesion between the surface of the oxide film 25 and the photoresist. When wet etching is performed under such a condition, the etching will be excessively expanded in the lateral direction, and the necessary oxide film 25 will be etched. Once the GaAs is exposed, the shape of the mesa will be unstable. Therefore, the photoresist when the ohmic electrode 28 provided in the opening portion of the mesa is formed will also cause a relaxation phenomenon on the shape of the peripheral end portion, which will result in the removal of the photoresist by the lift method (丨 if 〇ff). The shape of the ohmic electrode 28 is deteriorated, and GaAs is etched near the Schottky connection, causing a problem that adversely affects characteristics. Most of the second 'anode electrode 34 is provided on GaAs which has a cathode potential, and a problem arises in that the parasitic capacitance increases here. Because the area of the intersection is 1 300 / z m, the parasitic capacitance must be reduced with a thicker interlayer insulating film. In order to cover the mesa and form a thicker interlayer insulating film, a polyimide layer 30 of 6 to 7 // m must be provided. In order to take out the Schottky connection area, an opening is provided in the polyimide layer 30, but because of the thick polyimide etch, and the step coverage of the electrodes on the polyimide layer 30 is considered The purpose is, in this opening, because the film of the polyimide layer 30 is temporarily + Ding a a and again, and the 1 is poor in adhesion with the photoresist, the two are equal, or the polyimide The layer is greatly deviated. Therefore, considering the angle of the oblique plane of the oblique plane, a factor of 30 to 45 degrees in the combined field 3 1 a and the ohmic electrode 28 is taken into consideration. However, since the separation distance between the eight wires must be ensured at the M m resistance, if the separation distance exceeds two minutes, the distance is a factor that contributes to the miniaturization of the series electric development chip. ; Hinder the surface frequency characteristics, and then become impossible. Third, ohmic connection

554542 V. Description of the invention (8) Therefore, the thickness of the km of the limbal membrane during the operation of the Schottky barrier diode becomes parasitic. Qijia Qijia, and No. 4 of the deterioration of characteristics, the interlayer insulation film uses the joint of the polyelectrode extraction part, and the main reason is to form the wiring and the base. In addition, it cannot be reduced to the fifth level, and the installation of n + wafers on the GaAs substrate will increase the cost, but there is a problem of preventing the formation of the sun-thin layer and the n-type epitaxial layer, and the cost reduction. In addition, the traditional manufacturing method has the first, Schottky connection, and the trend is at f μM. Putting it aside, the primary soap is 7 A. You are taking the upper η-type epitaxial layer 2 3 for the Xiao version storm bonding, but in order to capture the old and viscous θ ^ m ^ ^ ο, 〇ηΛ, consider the pressure resistance of the action layer. And the best thickness after resistance is 2500A, and from 3500A to 2500A. At this time, the bismuth is performed. Yan, θ The main cat is increasing zeta and adding insects to the main reason ^ ^ ^ The money is engraved for the wetness of the moment. In time and temperature, it must be difficult. It ’s very difficult to control ^ ^. ”, And the remaining liquid is used within the sheep's maintenance time. Because of #: 之 ： 性 1 ： Manufacture of each day: There will be a difference between the circles, which will cause the dynamic and quotient; The improvement of high-frequency characteristics is extremely difficult to ask. 7¾ ° Second, due to the combination of __, .._., The structure has to cause a number of steps to be performed, and at the same time, the photoresist is discontinued b ^ ^ ^ The unevenness of the adhesion between the films causes a bad phenomenon. In addition, due to the fact that Imada * takes four or more members at the same time, the process of forming a polyimide layer for use as an interlayer insulating film is performed simultaneously. — Au plating on the electrode take-out part has no effect on the imine layer and the time efficiency is not good; the manufacturing process is complicated, and the manufacturing process is complicated.

313890.ptcl Page 16 554542 V. Description of the invention (9) Since the price of the substrate of the compound semiconductor itself is expensive, it is a price. To rationalize it, the size of the chip must be reduced to control costs. That is, the reduction of the t-inch of the wafer is inevitable, and the cost of the material itself needs to be reduced. With the need to further improve high-frequency characteristics. In addition, the simplification and efficiency of manufacturing steps have also become important issues. [Means to solve the problem] The present invention: The invention was created in view of the above-mentioned problems, and the invention is: a semiconductor substrate of a compound compound; a conductive type provided on the substrate: an ionization ion, and a master test. A ^ 郯A conductive type high-concentration 1 electrode and a second electrode of the 5th ion-extracting area of the ion implantation area are connected as the second electrode of the ohmic connection, and an ohmic electrode is provided on the surface of the Schottky junction as an electrode entry area 5,5 can also be implanted on the surface of the substrate with a high concentration of ion implanted Schottky barrier diodes: the planar type of the existing compound semiconductor can be formed by ion implantation with all movements = minutes, area ... Bu 'due to the cost of the body, Xiao Special I :: Ling & so can greatly reduce the wafer cost can be reduced by reducing parasitic capacitance and-body. In addition, the present invention provides two golds: it helps to improve high-frequency characteristics. The simplification and method of realizing the manufacturing steps for improving the efficiency and improving the high-frequency characteristics are characterized in that it has a B-composite semiconductor substrate in the field of ion implantation of a conductive type, which is a manufacturing method of a Teflon barrier diode. A conductive ion implantation field is formed on the surface; = forming an ohmic connection with the surface of the field adjacent to the ion implantation field; ^ forming a step of forming a Schottky connection electrode with the surface of the radon concentration ion implantation field; Metal layer and extend the metal layer

313890.ptd 554542 V. Description of the Invention (ίο) The step of forming a second electrode as an electrode extraction portion and forming a first electrode with a metal layer at the same time. [Embodiments of the Invention] FIGS. 1 to 8 illustrate the embodiments of the present invention in detail. The Schottky barrier diode of the present invention is composed of a compound semi-body plate III ion implantation field 3; a high-concentration ion implantation field 7; a first electrode soil 8; and a second electrode 11. Figure 1 shows a cross-sectional view of the action area. The compound semiconductor substrate is an undoped GaAs substrate and has a flat substrate structure without a mesa. The ion implantation field 3 is an ion implantation field provided on the surface of the semiconductor substrate 1 including the circular Schottky connection field 1 1 a to form a Schottky barrier diode. The intermediate / interval ion implantation region 7 is provided on the substrate surface below the ohmic electrode 8 and is provided adjacent to the ion implantation region 3. It is arranged along the periphery of the circular Schottky connection area 1 1 a, and substantially overlaps with the ohmic electrode 8, and at least a portion surrounding the Schottky connection area 1 a is disposed beyond the ohmic electrode 8. The separation distance between Schottky connection area 11a and high-concentration ion implantation area 7 is 1 // m. In other words, instead of the traditional mesa structure, a structure that maintains a planar structure and sets a high-concentration ion implantation field 7 on the surface is used directly, and an ohmic connection can be achieved without the need for a mesa. The ohmic electrode 8 acting as the first electrode is a metal layer in contact with the first layer of the high-concentration ion implantation region 7. AuGe / Ni / Au was sequentially vapor-deposited, and the vicinity of the Schottky connection was patterned to form a circular shape with a middle cut out. Adjoining

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Page 18 554542 V. Description of the invention (11) ~ ^ ~-The separation distance of Schottky connection area 11 a is 2 # m. wL2, 'is the Schottky connection area & to the anodic bonding, although it is "pole 11. It is set on the nitride film 5 on the surface of the GaAs. Tl / Pt / Au was sequentially plated to form a special connection with the η-type stone. In addition, the metal layer was extended to serve as a fixed area for the cat's day and the sun to set the anode connection: = change. The contact layer 3 forms a Schottky metal layer connected with the Schottky and the metal layer of the G: two-crystal wiring and the anode bonding pad 11b, which are: the same vapor-deposited metal f. In order to achieve predetermined characteristics such as withstand voltage, the n-type separation electrode U that forms the action field is formed under the best form: the main entry field 3 system. Since ☆ does not need to go through the traditional complex narrative step = ^ knife cloth strip special connection, it can be obtained with good reproducibility and: P 忐 forms a Schottky connection. & In addition, it is a η-type ion implantation field 3 and a very high-concentration ion implantation core using the nitride film 5 and the European Schott position. It is a cathode electric anode bonding pad 1 lb, which is directly fixed on the substrate 7 members. Domain 7 is insulated. 1 is semi-insulating, so polyimide can be omitted. Ga The wire bonding part is fixed to the substrate due to GaAs substrate connection. And the nitride film and the straight cathode electrode 15 are in contact with Ti / pt / Au of the second layer, and are arranged so as to be opposite to the anode electrode n and extend from the ohmic electrode 8 to the cathode joint collar 4 'to form a cathode access pad The high-concentration ion-implanted field 7 of the metal layer 7 becomes the cathode ohmic electrode 8 and the cathode bonding pad 15b is directly fixed to the semi-insulating J (electrode). Figures 2 and 3 show the surface of the substrate 1 of the present invention. Schottky screen of dry conductor

Page 19 554542 V. Description of the invention (12) '~' — 2 Plan view of your great body. Figure 2 is a schematic diagram of the wafer pattern, and Figure 3 is an enlarged view of the second field. This figure is the first embodiment of the present invention, and it is a case where "I" and Schottky connection are one. The second layer of the metal layer i / P t / Au is plated in order to set the anode voltage. " The depolarizing electrode 11 'has a Schottky connection area which forms a Schottky connection with the n-type ion domain 3 in the approximate center of the wafer. This area = a circle of 圆形 about 1 〇 # m, Only this circular portion is in direct contact with G's. The metal layer is extended to provide an anodic bonding pad 丨 b for taking out the electrode. Below the pole joint 塾 1 lb is a semi-insulating GaA_ board. Because of the anode bonding pad 1 1 b, the insulation film can be omitted and fixed directly on the substrate f, which can reduce the defects generated during joining. Phenomenon, and eliminate the parasitic capacitance of the a pad. The part shown by the dotted line is the ohmic electrode 8. It surrounds the outer circle of the Schottky connection area 1 1 a and makes resistance contact with the high-concentration ion implantation area 7 (not shown). The ohmic electrode 8 is a first layer and a metal layer formed by sequentially vapor-depositing AuGe / Ni / Au. It is provided in a state substantially similar to the high-concentration ion implantation field 7. In addition, a cathode electrode 15 composed of a second-layer vapor-deposited metal layer is provided to take out the electrode, and extended to provide a cathode junction. Pad 1, 5 =. The removal of the cathode electrode is because a large number of bonding wires must be fixed in order to reduce the inductance component of the high-frequency characteristic factor. Therefore, the area occupying half of the wafer is used as the bonding area. The anode and cathode bonding pads nb, 15b are bonded and fixed to the bonding wires' by pins to take out the electrodes. The area of the anodic bonding pad 丨 丨 b is 6 〇χ 7 〇

313890.Ptd Page 20 554542 V. Description of the invention (13) ^ ---- // m2, the area of the 15b part of the cathode bonding pad is 18〇χ 7〇 // can be connected to connect 2 bonding wires at a time, Because the chip with a smaller area of a can also reduce the inductance component of the high-frequency characteristics, and contribute to the improvement of high-frequency characteristics. > As shown in FIG. 3, the sixth part of the anode electrode and the cathode potential is only limited to the area shown by the oblique line, and the area of the part is 10, which is larger than that of the conventional 1 3 0 0 // m2 , Can be reduced to about 1/13, so ▼ with a thinner nitride film 5 instead of polycrystalline silicon | The present invention is characterized in that the planar structure of the Schottky barrier diode is realized by setting a high-concentration ion implantation field 7 and setting a Schottky connection field Ua and an ohmic electrode 8 ′ on the GaAS surface. Because there is no need to worry about the joint deviation caused by the irregular shape of the mesa, the separation distance between the ohmic electrode 8 and the ohmic electrode 8 can be greatly reduced. A semi-insulating GaAs substrate 1 is provided below most of the anode electrode 11 '. In other words, the area of the intersection of GaAs that becomes the cathode potential and the anode electrode 11 is about 1 0 0 // m2, which is reduced to 1/13 compared with the conventional area. Therefore, it is not necessary to suppress the parasitic capacitance by increasing the thickness (separation distance) of the polyimide. Therefore, a thinner nitride film 5 can be used instead of the polyimide layer, and the oblique portion of the polyimide need not be considered. In this way, specifically, the separation distance between the Schottky junction area and the ohmic electrode can be reduced from 7 // m to 2 // m. In addition, the separation distance from the high-concentration ion-implanted field 7 is 1 # m. At this time, the high-concentration ion-implanted field 7 is a moving path of the carrier, and has approximately the same effect as the ohmic electrode 8, so it is compared with the previous one. Its separation distance can be reduced to 1/7. Thanks Schottky

3] 3890.ptd Page 21 554542 V. Description of the invention (14) The separation distance between the connection area 1 1 a and the ohmic electrode 8 is helpful for the series resistance, so if the separation distance can be reduced, the resistance can be reduced, and the high-frequency characteristics The promotion will greatly help. This can contribute to the miniaturization of the wafer. In the size of the wafer, a wafer that was 0.27 parent 0.31111111 watts in the past can be reduced to 0.225 parent 0.25111111. In terms of size, based on the necessity of configuring bonding pads and the limit of the size of the wafers that can be processed during combination, the 0. 25 mm square is the maximum under the current situation, and in the field of operation, it can be greatly reduced to 丨The degree of / 丨 〇 'therefore, as will be described later, the degree of freedom in the field of disposition will increase substantially. In addition, the invention is also characterized in that the anode electrode is an electrode structure that extends to form Schott II and is connected to a metal layer. Since a thinner nitride film can be used instead of the imine's electrode and wiring can be realized by vapor-deposited metal layers, which contributes to cost reduction. In addition, since the conventional structure of the stupid crystal layer is provided on the undoped GaAs substrate by ion implantation, and the operation area is set, the cost of the wafer can be greatly reduced compared to the round shape. The thunder map shows a situation in which the second embodiment of the present invention is provided with a plurality of Schottky connection areas 1 1 a formed by anodes. According to the structure of the present invention, a plurality of Schottky connection areas can be set. For example, if it is configured as shown in Figure 4, the Schottky connection or 1a can be connected in parallel, which helps reduce the resistance. Compared with the case where 将 2 ′ reduces the pore size of the Schottky contact hole and arranges several phases, the phase of the Schottky contact hole is the same and one is arranged.

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It can reduce the separation distance between the centers of the Schottky contact holes, making it more effective at high concentration sets. This will increase the cathode's south frequency characteristics. Compared with the high-concentration ion implantation field 7, the carrier trapping value of the ion implantation field 7 becomes smaller, and the manufacturing method is further shown in Figs. 5 to 5. FIG. 8 shows in detail the Schottky barrier diode according to the present invention. The Schottky barrier diode is composed of the following steps: a conductive ion implantation field is laminated on a flat compound semiconductor substrate surface, and formation and ion implantation are performed. A step of a conductive high-concentration ion implantation domain adjacent to the field; a step of forming an ohmic connection Z 1 electrode with the surface of the high-concentration ion implantation area; a metal layer forming a Schottky connection to the surface of the ion implantation area is provided and extended The metal layer is used to form the second electrode as the electrode extraction portion, and the metal layer is used to form the first electrode for extraction. + ... The first step of the present invention is shown in FIG. 5 on a flat compound semiconductor substrate 1 A conductive type ion implantation field 3 is laminated on the surface, and a surface of the substrate 1 adjacent to the ion implantation field 3 forms a conductive type high-curvature implantation field 7. ° 'This step' is a characteristic step of the present invention, forming an n-type ion implantation field 3 as an operation field, and forming a high-concentration ion implantation field 7 on the surface of the substrate under the region where the ohmic electrode 8 is to be formed. 7 In other words, it is on the undoped GaAs substrate 1, covered with a nitride film $, a photoresist layer is set, and a photolithography process is performed to selectively form an n-type ion implantation field in the operation field. Photoresist layer on the field of 3

313890.ptd

554542 V. Description of the invention (16) Open the window. Next, an n-type ion implantation region 3 is formed on the surface of the substrate 1 under the pre-impurity Ha using the photoresist layer as a mask (doped with Si + and L3X). Temple: ^ two-member domain ion implantation domain 3 to form a Schottky barrier diode's movement 'because of the η-type, so it is formed to obtain the most suitable action area. The second or the reason, ion implantation. In other words, after the photoresist is removed, a photolithography process is performed after the photoresist is removed to selectively form the photoresist layer in the field of the south concentration ion implantation field 7 and then use the photoresist layer as a mask. , Ion implantation of high concentration of impurities ^. (S! +, L × 10 × 8cm- 轾), and a high-concentration ion implantation area 7 is formed on the surface of the US plate 1 under a predetermined ohmic electrode 8. In addition, it is formed in such a manner that adjacent areas / overlaps are formed so that there is no separate part of the n-type ion implantation area 3. Thereafter, the photoresist layer is removed, and a nitride film 5 is deposited again for the purpose of annealing, and activation annealing is performed in n-type ion implantation field 3 and high-concentration ion implantation field 7. / In this way, an n-type ion implantation region 3 is formed under a predetermined Schottky connection region n a forming an operation region, and a high-concentration ion implantation region 7 is formed under a predetermined ohmic electrode 8. In the following steps, a Schottky connection area 11 a is provided on the surface of the n-type ion implantation area 3, and an ohmic electrode 8 is provided on the surface of the high-concentration ion implantation area 7 to realize a Schottky in a planar structure. Barrier diode. This can greatly reduce the separation distance between the Chertky connection field and the high-concentration ion implantation field that performs the same function as the ohmic electrode, thereby forming a series resistance that can reduce and contribute to the improvement of high-frequency characteristics.

313890.ptd Page 24 554542 V. Schottky Barrier Diode of Invention Description (17). In the second step of the present invention, as shown in FIG. 6, the surface of the implanted field 7 is ohmically connected, and the formation and high concentration are separated from the formation of a comprehensive photoresistive layer. The light micro-planning will open the part of the ohmic electrode 8 + ~ % Order 'in order to selectively in the nitride film 5, sequentially vacuum steam money and two = two. Remove the three layers of AuGe / Ni / Au exposed from the photoresist layer. In fact, a part of the ohmic electrode 8 of the first metal layer leaves the first photoresist removing layer, and the pre-treatment is performed at a high concentration by ion implantation to the metal layer. Then, by the third step of the present invention, the ohmic electrode 8 is formed. The outer periphery is surrounded by the first electrode and is connected to _; as shown in the figure below, a metal layer connected with a special base is set and extended to form a full surface = ^ the surface forms a second electrode η. / ， 成 J 5 as the electrode extraction portion. First, the step of forming the first electrode 8 for taking out the metal layer. This step is a characteristic step of the present invention. First, FIG. 7 shows the nitrogen used as an interlayer insulating film in Wang Mianfengfeng about 5 〇 〇 Ο Α. Chemical film. after that! ! The photoresist layer is fully formed, and a photolithography process is performed to selectively open a window in the pre-Schottky connection area 1 丨 3, the anode bonding pad 1 丨 b, and the cathode electrode 15 partially. The exposed nitride film 5 is dry-etched, and the photoresist layer is removed to form a contact hole 9 exposing the n-type ion implantation region 3. After that, as shown in FIG. 8, the photoresist layer is completely set again, and a photolithography process is performed to selectively open the windows to form the patterns of the anode electrode 丨 and the cathode electrode 15. Three layers of Ti / Pt / Au of the second metal layer were stacked in order by vacuum evaporation in a comprehensive manner, and the photoresist layer was removed by lifting. borrow

313890.pid Page 25 554542 V. Description of the invention (18) ^ 'Shape // metal layer formed on the surface with thoron ion implantation surface r lla metal layer extended to anodic bonding collar 11b anode, cathode Electrode 15. The electrode 8 contacts and is extended to the cathode bonding pad 15b. In the method, the thickness of the action layer must be controlled, and the precision of the wafer's amplitude and vibration speed in addition to time and temperature is difficult in the 1-step step of the remaining liquid. Carved fluid. However, it is necessary to use the best etch that can be obtained within a predetermined freshness retention time! In the manufacture of the present invention, as long as the pre- “action layer is used to control the operation conditions to form the n-type ion implantation field 3, the saving is good. Xiao Shao II: The etching step of the degree • 'Therefore, it has the advantage of forming a reproducible polar body. De-base bonding ... Manufacturing characteristics are stable. Shao Ji K 2 In addition, the filament 11 and cathode formed by the positive method The electrode 15 is interlayer insulation by the same method: In addition, the anode electrode 11 and the ohmic electrode 8 are on the plate, so the joint / combination part can also be directly fixed to the base polyimide layer polyimide layer. Amine layer. In this case, the thick layer of wiring formed by the past and the formation of bonding pads can be omitted. The polyimide < shape u power step is omitted, and the number-less-private 'is omitted. / 骒, it is possible to interstitially produce the stream compound car broadcast 1k as a teky barrier diode. Go to 纟 and nest = Schottky: the polar body is divided into individual "chip-like" semiconductor wafers after completing the previous steps , The axe ® Japanese-Japanese film 'the semi-conducted discriminator Η dry conductor Japanese-Japanese film solid In frame

313890.ptd Page 26 554542 5. After the description of the invention (19) (not shown), the bonding pads 11 b, 1 5b and predetermined leads (not shown) of the semiconductor wafer are connected by bonding wires. For the bonding wire, a thin gold wire is used, and the connection is made by a commonly known pin-type bonding. After that, transfer molding is performed for resin encapsulation. [Effects of the Invention] According to the structure of the present invention, the following various effects can be obtained. First, by setting a high-concentration ion implantation area 7 on the GaAs surface, and setting a Schottky connection area 1 1 a and an ohmic electrode 8 on the GaAs surface, the plane of the Schottky barrier diode can be realized. structure. Due to the unevenness of the shape of the ohmic electrode and the deterioration of the characteristics due to the unevenness of the surface shape of the controllable surface, and no need to consider the deviation of the joint, the separation distance between the Schottky connection area u a and the ohmic electrode 8 can be greatly reduced. Since the separation distance of the Schottky connection area n a and the ohmic electrode 8 contributes to the series resistance, if the separation distance can be reduced, the resistance can be further reduced. Second, the area between Ga As, which becomes the cathode potential, and the anode electrode 11 is about 100 # m 2, which can significantly reduce parasitic capacitance. Most areas under the Yangcai electrode 11 are semi-insulating GaAs substrates, so the area of the cross section where parasitic capacitance is generated, compared with the past, the Schottky connection alone can be reduced to 1/13. In addition, because the anodic bonding pads i 丨 b can be directly fixed to GaAs, parasitic capacitance will not be generated in this part, and the overall parasitic capacitance can be greatly reduced. In the past, in order to control the parasitic capacitance, polyimide having a low electrical conductivity was used to provide a thick interlayer insulating film, but the present invention can be replaced by a thin nitride film. Compared with polyimide, the dielectric constant of the nitride film is relatively high, but if the structure according to the present invention is used, even a 500 A process is used.

313890.ptd Page 27 554542 ___ 5. Description of the invention ^ ~-Degree of nitride film, compared with the previous, can still reduce parasitic capacitance. = 3, because the thick polyimide is not used, there is no need to consider the distance between the sloped part of the polyimide opening in the action field or the unevenness of the 47 angle. Based on the above description, the Schottky connection area is separated from the ohmic electrode. For large distances, it is only necessary to consider its pressure resistance and the precision of mask overlap, which is y. Specifically, the Chertky connection area and the open distance I of the ohmic electrode are reduced from 7 // m to 2 // m. In addition, the separation distance from the high-concentration implantation region 7 is 1 / zm. In this case, since the high-concentration ion-implantation region 7 is a carrier moving path and has approximately the same effect as the ohmic electrode 8, it is compared with In the past, the separation distance can be reduced to 1/7. And by greatly reducing the resistance, greatly reducing the parasitic capacitance and reducing the unevenness of the parasitic capacitance 'can greatly contribute to the improvement of high-frequency characteristics. Fourth, it is conducive to the miniaturization of the wafer, and the size of the wafer can be reduced from the previous size of 0. 27x 0. 31 mm to 0. 25x 0. 25 mm. In terms of size, based on the necessity of arranging the bonding pads and the limitation of the size of the wafer that can be processed during assembly, the current status limit is 0.25 mm square, and the area of operation can be greatly reduced to 1/1 〇 The degree of freedom can be greatly increased. In the 5th stage, since the operation region can be formed on the GaAs substrate by ion implantation, the arrangement of the epitaxial layer can be omitted, which is advantageous for cost reduction. Specifically, compared with a conventional wafer in which an η + type epitaxial layer and an n type epitaxial layer are provided on an undoped GaAs substrate, it can be realized by an undoped GaAs wafer. Significantly reduce wafer prices to 1/4 to 1/5.

313890.ptd Page 28 554542 V. Description of the invention (21) Section 6 ′ The resistance can be further reduced by setting several Schottky connection areas. The contact hole diameter of the Schottky connection portion is reduced and a plurality is provided. Compared with a Schott 接触 Ϊ ί collar 4 with a uniform Schottky contact hole area, the resistance can be reduced, and the concentration can be increased at a high concentration. The trap of ion implantation collar is more…, so it has a high-frequency special pole that can be further improved, so in addition to reducing the metal layer to achieve anode anode cost reduction. In addition to the low material cost, the chip size can be reduced, and the chip size can be significantly increased. In addition, according to the first aspect of the present invention, the following effects can be obtained.

The S-band circuit has a special Teckey connection for major issues, so it can be controlled to have a high degree of unevenness suitable for the field of operation. The n-type ion implantation field forms the most striking control. In other words: = '... requires the previous precise GaA and stable characteristics of the Schottky screen to increase the yield rate' and to produce it with good reproducibility. Second, the above-mentioned / special diode. Rate, and can simplify the manufacturing steps of the base barrier two, the manufacturing ’will be more efficient. Specifically, the mesa etching step, the layer forming step, the & Au electric = type 2 telecrystalline layer button step, the polyimide to a thickness of ~ m, and the like can be simplified. In order to form a polyamidoimine layer, the amine layer takes a considerable amount of time to be applied several times. Applying polyfluorene several times. Omitting the polyfluorine layer is two, and complicates the manufacturing process. In addition, if it is removed, the electrode formed by the AU electric ore layer is prevented from being soldered. The heat generated when passing over women's clothing, and when wire bonding

313890.ptd Page 29 554542 V. Description of the invention (22) Due to the fracture and deformation of the electrode caused by pressure, the strength of the electrode must be ensured, and the anode electrode and cathode electrode are formed by a thick Au bond layer. However, since the polyimide layer can be omitted, there is no need to consider its influence. In other words, gold plating is not required, and only the Ti / Pt / Au vapor-deposited metal can form Schottky connection areas, anode electrodes, and cathode electrodes, and improve reliability. In addition, it is possible to improve the yield because the above-mentioned reasons for the decrease in yield have been eliminated in the past. In other words, the present invention is a Schottky barrier diode that can greatly reduce parasitic capacitance and resistance, and at the same time can greatly improve high-frequency characteristics, and has the advantage of providing a manufacturing method that simplifies and improves manufacturing steps. .

313890.ptd Page 30 554542 Brief description of drawings [Simplified description of drawings] Fig. 1 is a cross-sectional view for explaining a semiconductor device of the present invention. Fig. 2 is a top view for explaining a semiconductor device of the present invention. Fig. 3 is a top view for explaining a semiconductor device of the present invention. Fig. 4 is a top view for explaining a semiconductor device of the present invention. Fig. 5 is a sectional view for explaining a method for manufacturing a semiconductor device of the present invention. Fig. 6 is a sectional view for explaining a method of manufacturing a semiconductor device of the present invention. Fig. 7 is a sectional view for explaining a method for manufacturing a semiconductor device according to the present invention. Fig. 8 is a sectional view for explaining a method for manufacturing a semiconductor device according to the present invention. FIG. 9 is a cross-sectional view for explaining a conventional semiconductor device. FIG. 10 is a top view for explaining a conventional semiconductor device. FIG. 11 is a cross-sectional view for explaining a conventional method of manufacturing a semiconductor device. Fig. 12 is a sectional view for explaining a conventional method of manufacturing a semiconductor device. Fig. 13 is a sectional view for explaining a conventional method of manufacturing a semiconductor device. Fig. 14 is a sectional view for explaining a conventional method of manufacturing a semiconductor device. FIG. 15 is a cross-section for explaining a conventional method of manufacturing a semiconductor device.

313890.ptd Page 31 554542 Schematic diagrams 0 [Explanation of component symbols] 1 Semiconductor substrate 3 Ion implantation field 7 High-concentration ion implantation field 8 Ohm electrode (first electrode) 9 Contact hole 11 Anode electrode (second (Electrode) 11a Schottky connection area lib anode bonding pad 15 cathode electrode (removing electrode) 丨 15b cathode bonding pad 18 insulation box 21 n + type GaAs substrate 22 η + type stupid layer 23 η type stupid layer 25 oxide film 28 Ohm electrode 29 Schottky contact hole 30 Polyimide layer 31 Schottky electrode 31a Schottky connection area 34 Anode electrode 35 Cathode electrode

313890.ptd Page 32

Claims (1)

554542 6. Scope of patent application 1. A diode with a special barrier, comprising: a compound semiconductor substrate; a conductive ion implantation field provided on the substrate; a conductive type adjacent to the foregoing ion implantation field A high-concentration ion implantation field; a first electrode that is ohmically connected to the high-concentration ion implantation field; and a second electrode that forms a Schottky connection to the ion implantation field and serves as an electrode extraction portion. 2. —A Schottky barrier diode, comprising: a compound semiconductor substrate; a flat one-conductivity ion implantation field disposed on the substrate; adjacent to the aforementioned ion implantation field, and set to a depth deeper than the aforementioned ion implantation The field is one of the deep conductive high-concentration ion implantation fields; the first electrode is ohmically connected to the surface of the high-concentration ion implantation field; and the Schottky connection is formed with the ion implantation field surrounded by the first electrode. It also serves as the second electrode of the electrode extraction portion. 3. For the Schottky barrier diode of item 1 or item 2 of the scope of the patent application, the metal electrode layer forming the second electrode is used to provide the electrode for taking out the first electrode. 4. If the Schottky barrier diode of item 1 or item 2 of the patent application scope, wherein the aforementioned compound semiconductor substrate is an undoped GaAs substrate. 313890.ptd Page 33 554542 6. Application for patent scope 5. For example, the Schottky barrier diode of item 1 or 2 of the patent application scope, wherein the area between the second electrode and the aforementioned high-concentration ion implantation field The separation distance is less than 5 // m. 6. If the Schottky barrier diode of item 1 or 2 of the scope of patent application is applied, a Schottky connection area formed by a plurality of the aforementioned second electrodes is provided. 7. The Schottky barrier diode according to item 1 or item 2 of the scope of patent application, wherein the aforementioned high-concentration ion implantation field is provided beyond the aforementioned first electrode. 8. —A method for manufacturing a Schottky barrier diode, comprising: forming a conductive ion implantation field on a flat compound semiconductor substrate surface, and forming a conductive high-concentration ion adjacent to the aforementioned ion implantation field A step of implanting the field; a step of forming a first electrode that is ohmically connected to the surface of the high-concentration ion-implanted field; and a metal layer for forming a noble-tick connection to the surface of the ion-implanted field and extending the metal layer to form an electrode The step of taking out the second electrode in the extraction portion and forming the first electrode using the metal layer at the same time. 9. A method for manufacturing a Schottky barrier diode, comprising: forming a conductive ion implantation field on a flat undoped compound semiconductor substrate, and under a predetermined first electrode, the ion implantation field and the aforementioned ion implantation field A step of forming a conductive high-concentration ion implantation field on the adjacent substrate surface; 313890.ptd page 34 554542 VI. Patent application step of forming a first electrode that is ohmically connected to the surface of the aforementioned high-concentration ion implantation field; and. Setting the outer periphery to be surrounded by the aforementioned first electrode and forming with the surface of the aforementioned ion implantation field Schottky-connected metal layer, extending the metal layer to form a second electrode as an electrode extraction portion, and simultaneously forming the first electrode as an extraction electrode with the aforementioned metal layer. 10. The method for manufacturing a Schottky barrier diode according to item 8 or item 9 of the scope of patent application, wherein the aforementioned second electrode is sequentially vapor-deposited titanium / turn / gold (Ti / Pt / Au). Formed by a plurality of metal layers. 1 1 · The method for manufacturing a Schottky barrier diode according to item 8 or item 9 of the patent application, wherein the aforementioned metal layers are used to form the bonding pads of the first and second electrodes, respectively. 313890.ptd Page 35