1266343 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種積層陶瓷電容器之製程技術，特別 是指一種利用金屬低溫固化而形成外電極之積層陶瓷電容 器之製程技術。 【先前技術】 近年來，陶瓷電容器在不知不覺中已被廣泛而大量地 運用於各種電路，成為電機電子工業中不可或缺之重要零 件。然而，綜觀習用之陶瓷電容器製作技術，多半皆必須 倚賴稀有貴金屬材料或是高耗能性設備方可完成陶瓷電容 之製作，因此往往必須耗費較大之製作成本。於此，吾人 特別列舉兩種習知之陶瓷電容製作技術加以說明。 請參閱第一圖，其係顯示依據第一習知技術所製成之 陶瓷電容器成品結構示意圖。如圖所示，運用該第一習知 技術所製作之一陶瓷電容器1包含有一積層陶瓷堆疊體 II、 一外電極12、一電極保護層13與一焊接層14。該積 層陶瓷堆疊體11包含有一陶瓷基板111與複數層由銀 (Ag)鈀（Pd)合金所組成之内電極板112，其中，該陶 瓷基板111具備有一第一陶瓷端面113與一第二陶瓷端面 114，在該第一陶瓷端面113與該第二陶瓷端114面之間， 各内電極板112係依序交錯而相間地嵌設於該陶瓷基板 III。 5 1266343 各内電極板112具備有一固定端112a與一自由端 112b，各内電極板112之固定端112a係與該第一陶瓷端面 113及該第二陶瓷端面114中之一者齊平，且各内電極板112 之自由端112b則與該第一陶瓷端面113與該第二陶瓷端面 114中之另一者保有預定之間距，以免各内電極板112發 生短路。 該外電極12係利用將銀高溫燒結之方式而包覆在該 第一陶瓷端面113與該第二陶瓷端面114，藉以連結各内 電極板112並且構成該陶瓷電容器1之二端極。該電極保 護層13係利用電鍍鎳（Ni)之方式而包覆於該外電極12 之外表面，藉以保護該外電極12。該焊接層14係利用電 鍍錫（Sn)之方式而包覆於該電極保護層13之外表面，藉 以供焊接接合之用。 舉凡熟習相關技藝之人士皆能理解：在此製程中，由 於該内電極板112必須採用價格昂貴之碰（Ag)鈀（Pd) 為原料’所以必須耗費較大的原料成本。同時5在將銀南 ^ 丨........ 溫燒結成該外電極12之過程中，除了必須耗費價格昂貴的 銀作為材料之外，尚且需要在溫環境下才可完成，所以 還必須負擔較高之能源消耗成本。緣此，在此一製程進行 該陶瓷電容器1之量產作業時，較缺乏市場上之製JUL本 競爭一優券兑 請參閱第二圖，其係顯示依據第二習知技術所製成之 陶瓷電容器成品結構示意圖。如圖所示，運用該第二習知 技術所製作之一陶瓷電容器2包含有一積層陶瓷堆疊體 Γ266343 2卜-外電極22、-電極保護層23與―焊接層24。其中， 該積層陶£堆疊體21具備有—陶究基板211與複數層内電 極板212’該陶莞基板211具備有一第一陶究端面213與 一第二陶究端面214,該内電極板212具備有-固定端212a 與-自由端212b ’且该積層陶究堆疊體2i之整體配置方 式與該積層陶竞堆疊體11相似。該電極保護層23與該焊 接層24,料論在材料選w製造方式等各方面 ，皆分別 相似於该電極保護層13與該焊接層14。 肖㈣㈣堆疊體21與該積層喊堆疊體 11之不同 處在於劾電極板212係由鎳合金或銅合金所構成。此外， A外電極22—係利用鎳合金或鋼合金在湖。◦至9〇〇。〇之環 ' ^了湘氮氣為催化劑，而燒結成形於該第-陶究端面 213與该第一陶甍端面214。 舉凡熟習相關技藝之人士皆能理解：在此製程中，將 錄合金或銅合f高溫蜂結成該外電極22之過程中，仍舊需 • 要在在〔8〇〇(^_ 900它之環境下，並且利甩氮氣為催化劑才 可完成，所以還必須負擔較高^能源與耗材之消耗成本qV 緣此’在此一製程進行該陶瓷電容器2之董置作-藥時，亦 缺乏市場上之製造成本競爭優勢。 此外，在該外電極12之製作過程中，係利用高溫燒 結銀之方式而成形；在該外電極22之製作過程中，係利用 兩溫（ 800C至900°C環境下，利用氮氣為催化劑）燒結鎳 或銅之方式而成开|。囊其在室溫（約25〇c )下冷卻結晶後， 其所形成之結，致使該外電極12與各内電極板 1266343 112之連結性較羑，該外電極12與各内電極板112之連結 性亦較差 【發明内容】 本發明所欲解決之技術問題： 不 綜整以上所述，在習知之陶瓷電容器製作技術中 論是在材料成本或是能參成未、< 控制上，仍有極大之改善 ________一一 .一 y. 空間，此外，内電極與外電極之連結性將直接影響到陶瓷 電容器端極之導電性，在利用習知陶瓷電容器製作毯術所 製作之積層陶瓷電容器中，其过、黨極與外電極 < 連結性不佳/ 之問題亦會造成部分導電性之減損，又是另一個值得積極 改善之問題。 因此，鑑於習知製程技術之缺失，本發明之主要目的 係提供一種積層陶瓷電容器之低成本量產製程，藉以製作 一積層陶瓷電容器，該積層陶瓷電容器包含有一積層陶瓷 結構、一金屬化端面、一固化導電材料層、一電極保護層 與一焊接層。該積層陶瓷堆疊體内部具備有一陶瓷基板與 複數個嵌設於其内之内電極板。其中，該固化導電材料層 係用以作為該積層陶瓷堆疊體之外電極，其係利用銅或錫 在較習用技術製程低之環境中完成製作，並可添加環氧基 類之高分子材料以增加固化附著性。 本發明之另一目的係提供一種積層陶瓷電容器之低成 本量產製程，藉以製作該積層陶瓷電容器，在該積層陶瓷 1266343 電容器之積層陶瓷堆疊體之兩端，係以特定比例與微小尺 寸之奈米銀材料附著包覆而形成一金屬化端面，藉以間接 提升該内電極板與外電極之間接連接性。 本發明解決問題之技術手段： 本發明為解決習知技術之問題所採用之技術手段係提 供一種積層陶瓷電容器之低成本量產製程，藉以降低積層 陶瓷電容器在量產時之製作成本，並且為内電極板與外電 極板提供較佳之連結密合性。該製程係預先製備一陶瓷基 板，並在該陶瓷基板之兩陶瓷端面，依序交錯而相間地形 成複數層由鎳合金與錫合金之其中一者所組成之内電極 板’藉以形成一積層陶蜜*結構。接著，以一奈米銀粒子溶 液沾附於該陶瓷端面，以形成一金屬化端面，並且在一固 化環境中，於該金屬化端面之外表面形成一固化導電材料 層以作為外電極。最後，於該外電極之外表面電鍍一電極 保護層，並在該電極保護層之外表面電鍍一焊接層。 同時，本發明為解決習知技術之問題所採用之另一技 術手段係提供一種積層陶瓷電容器，其係依據上述製程而 製作，並且包含有該積層陶瓷結構、該金屬化端面、該固 化導電材料層、該電極保護層與該烊接層。其中，該該積 層陶瓷結構包含有該陶瓷基板與複數個内電極板，該固化 導電材料層係形成該積層陶瓷電容器結構之外電極，並且 和該金屬化端面與各内電極板形成該積層陶瓷電容器之兩 端極。該金屬化端面係利用奈米銀粒子溶液沾附而成形， 9 1266343 猎以間接提升各内電極板與外電極之連結性。 本發明對照先前技術之功效： 相較於現有之_電容轉作技術，本發明所提供之 ^陶tf容I之低成本4產製程與結構，不僅★效節省 ，二成本與施源消择成本，更能間接提升各内電核板與外 =極之連結性，進而提升積層陶£電容器兩端極之導電 本發明所採用的具體實施例，將藉由以下之實施例及 附呈圖式作進—步之說明。 【實施方式】 明參閱第二圖，其係顯示依據本發明實施例所製成之 積層陶瓷電容器成品示意圖。如圖所示，一積層陶瓷電容 态3包含有一積層陶瓷堆疊體31、一金屬化端面32、一 _ 固化導電材料層33、一電極保護層34與一焊接層35。該 積層陶瓷堆疊體31包含有一陶瓷基板311與複數層由鎳合 金或銅合金所組成之内電極板312，其中，該陶瓷基板311 具備有一第一陶瓷端面313與一第二陶瓷端面314,在該 第一陶瓷端面313與該第二陶瓷端面314之間，各内電極 板312係依序交錯而相間地嵌設於該陶瓷基板311。 各内電極板312具備有一固定端312a與一自由端 312b，各内電極板312之固定端312a係與該第一陶瓷端面 1266343 313及該第二陶瓷端面314中之一者齊平，且各内電極板 312之自由端312b則與該第一陶瓷端面313與該第二陶瓷 端面314中之另一者保有預定之間距，以免各内電極板312 發生短路現象。 該金屬化端面32係利用奈米銀粒子溶液包覆於該第 一陶瓷端面313與該第二陶瓷端面314所組成，且其厚度 極薄。該固化導電材料層33係利用包含有鎳或銅之粉末 顆粒固化於該金屬化端面32之外表面，藉以形成一外電 極，並且透過該金屬化端面32而連結各内電極板312，據 以構成該積層陶瓷電容器3之二端極。 該電極保護層34係由鎳所組成，並且包覆於該固化 導電材料層33之外表面以保護該固化導電材料層33 (亦 可視為保護該積層陶瓷電容器3之二端極）。該焊接層35 由錫所組成，並且包覆於該電極保護層34之外表面，藉 以供該積層陶瓷電容器3焊接接合於特定之電路。 請參閱第四圖至第七圖，其係顯示本發明之製作流 程。其中，第四圖係顯示本發明完成積層陶瓷堆疊體製作 後之結構示意圖，第五圖係顯示本發明完成金屬化端面製 作後之結構示意圖，第六圖係顯示本發明完成固化導電材 料層製作後之結構示意圖，第七圖係顯示本發明完成電極 保護層製作後之結構示意圖。同時，請一併參考第三圖顯 示依據本發明實施例所製成之陶瓷電容器成品示意圖，亦 即完成焊接層製作後之結構示意圖。 如第四圖所示，本發明所建議之積層陶瓷電容器之低 11 1266343 成本量產製程（在以下之實施方式内容中，簡稱為本製 程），係先製備該陶瓷基板31，並在該陶瓷基板31之第一 陶瓷端面313與第二陶瓷端面314之間，依序交錯而相間 地向該陶瓷基板311内部形成複數層由鎳合金與銅合金之 其中一者所組成之内電極板312，藉以與該陶瓷基板311 形成該積層陶瓷堆疊體31，至此，完成了該積層陶瓷電容 器半成品3a之製作。 如第五圖所示，本製程之次一步驟係利用特定比例與 微小尺寸之奈米銀粒子溶液（在此係建議採用35%之20 奈米銀粒子溶液），在該第一陶瓷端面313與該第二陶瓷 端面314形成極薄之該金屬化端面32，至此，完成了該積 層陶瓷電容器半成品3b之製作。 如第六圖所示，本製程之次一步驟係在一固化環境（在 此係建議為在O.OOltorr之壓力條件與250°C至280°C之溫 度條件下，維持30分鐘）中，於該金屬化端面32之外表 面形成一包含鎳合金或銅合金之固化導電材料層33以作 為外電極，並且透過該金屬化端面32而連結各内電極板 312，據以構成該積層陶瓷電容器3之二端極，至此，完 成了該積層陶瓷電容器半成品3c之製作。 如第七圖所示，本製程之次一步驟係利用電鍍鎳之方 式而將該電極保護層34包覆於該固化導電材料層33之外 表面，藉以保護該固化導電材料層33，至此，完成了該積 層陶瓷電容器半成品3d之製作。 最後，請在回到第三圖。如圖所示，本製程之最後一 12 1266343 步驟係利用電鍍錫之方式而將該焊接層35包覆於該電極 保護層34之外表面，藉以供該積層陶瓷電容器3焊接接 合於特定之電路，至此，完成了該積層陶瓷電容器3之製 作。 舉凡熟習相關技藝之人士皆能理解··在此製程中，由 於該金屬化端面32之厚度極薄，故所消耗之材料成本十分 有限。同時，在進行該固化導電材料層33之製作過程中， 為了增加包含有鎳或銅之粉末顆粒之固化附著能力，可在 粉末顆粒中添加特定之南分子材料（如環氧基類高分子材 料，即俗稱之Epoxy)。此外，在進行該固化導電材料層33 之製作時，僅需在O.OOltorr之壓力條件與250°C至280°C 之溫度條件下，維持30分鐘即可完成，可有效降低製作流 程中所必須消耗之能源成本。 請參閱第八圖，其係顯示本發明之積層陶瓷電容器之 低成本量產製程流程圖。如圖所示，並參照上述說明，本 發明之製程係預先製備一陶瓷基板（步驟110)，並在該陶 瓷基板之兩陶瓷端面，依序交錯而相間地形成複數層由鎳 合金與錫合金之其中一者所組成之内電極板（步驟120)， 藉以形成一積層陶瓷結構。接著，利用一奈米銀粒子溶液 沾附於該陶瓷端面，藉以形成一金屬化端面（步驟130)， 並且在一固化環境中，於該金屬化端面之外表面形成一固 化導電材料層以作為外電極（步驟140)。最後，於該外電 極之外表面電鍍一電極保護層（步驟150)，並在該電極保 護層之外表面電鍍一焊接層（步驟160)。 13 Ϊ266343 請參閱第九圖至第十一圖，其係顯示兩種習用技術與 本發明在内外電極連結關係方面之比較。第九圖係第一圖 圈A所示區域之局部微觀結構示意圖，第十圖係第二圖圈 B所示區域之局部微觀結構示意圖，第十一圖係第三圖圈 C所示區域之局部微觀結構示意圖。 如第九圖所示，在運用該第一習知技術所製作之該陶 瓷電容器1中，由於該外電極12係利用將銀高溫燒結之方 式而包覆在該第一陶瓷端面113與該第二陶瓷端面114, 藉以連結各内電極板112並且構成該陶瓷電容器1之二端 極，因此，在微觀的環境中觀之，當銀被高溫燒結而在室 溫（約25°C )下冷卻結晶後，其所形成之結晶顆粒較大， 致使該外電極12與各内電極板112之連結性較差（亦即結 晶間隙較大、有效接觸面積較小）。 如第十圖所示，在運用該第二習知技術所製作之該陶 瓷電容器2中，由於該外電極22係利用將鎳或銅高溫燒結 之方式而包覆在該第一陶瓷端面213與該第二陶瓷端面 214，藉以連結各内電極板112並且構成該陶瓷電容器1之 二端極，因此，在微觀的環境中觀之，當鎳或銅被高溫燒 結（在80(TC至900°C之環境下，利用氮氣為催化劑而燒 結），並在室溫（約25°C )下冷卻結晶後，其所形成之結 晶顆粒較大，致使該外電極12與各内電極板112之連結性 較差（亦即結晶間隙較大、有效接觸面積較小）。 請繼續參閱第十一圖，並相較於第八圖與第九圖，在 運用本製程所製作之該積層陶瓷電容器3中，在内電極板 1266343 312與利用該固化導電材料層33所形成之外電極之間，係 利用特定比例與微小尺寸之奈米銀粒子溶液（在此係建議 採用35%之20奈米銀粒子溶液）形成之該金屬化端面32 來加以連結。由於該奈米銀粒子之尺寸微小到僅約20奈米 之緣故，故可藉由該金屬化端面32而有效提升該内電極板 312與外電極間之連結性（提升有效接觸面積）。 綜觀本製程相較於該第一習知技術所提供之製程，不 但在材料成本與能源消耗成本上，可取得較佳之競爭優勢， 更可在内電極板與外電極之連結上，取得較佳之連結效果。 此外，本製程相較於該第二習知技術所提供之製程，亦可 在與能源消耗成本上與内電極板與外電極之連結上，取得 較佳之競爭優勢。 藉由上述之本發明實施例可知，本發明確具產業上之 利用價值。惟以上之實施例說明，僅為本發明之較佳實施 例說明，凡習於此項技術者當可依據本發明之上述實施例 說明而作其它種種之改良及變化。然而這些依據本發明實 施例所作的種種改良及變化，當仍屬於本發明之發明精神 及界定之專利範圍内。 【圖式簡單說明】 第一圖係顯示依據第一習知技術所製成之陶瓷電容器成品 結構示意圖； 第二圖係顯示依據第二習知技術所製成之陶瓷電容器成品 15 Ί266343 結構示意圖； 第三圖係顯示依據本發明實施例所製成之積層陶瓷電容器 成品不意圖， 第四圖係顯示本發明完成積層陶瓷堆疊體製作後之結構示 意圖， 第五圖係顯示本發明完成金屬化端面製作後之結構示意 圖， 第六圖係顯示本發明完成固化導電材料層製作後之結構示 意圖； 第七圖係顯示本發明完成電極保護層製作後之結構示意 圖， 第八圖係顯示本發明之積層陶瓷電容器之低成本量產製程 流程圖； 第九圖係第一圖圈A所示區域之局部微觀結構示意圖； 第十圖係第二圖圈B所示區域之局部微觀結構示意圖； 第十一圖係第三圖圈C所示區域之局部微觀結構示意圖。 【主要元件符號說明】 1 陶瓷電容器 11 積層陶瓷堆疊 111 陶瓷基板 112 内電極板 112a 固定端 16 •1266343 112b 自由端 113 第一陶瓷端面 114 第二陶兗端面 12 外電極 13 電極保護層 14 焊接層 2 陶瓷電容器 21 積層陶瓷堆疊體1266343 IX. Description of the Invention: [Technical Field] The present invention relates to a process technology for a multilayer ceramic capacitor, and more particularly to a process technology for a multilayer ceramic capacitor which uses a low temperature curing of a metal to form an external electrode. [Prior Art] In recent years, ceramic capacitors have been widely and widely used in various circuits without being unknowingly, and have become an indispensable important component in the motor electronics industry. However, most of the ceramic capacitor manufacturing techniques that have been used must rely on rare precious metal materials or high-energy-consuming equipment to complete the fabrication of ceramic capacitors, so it is often necessary to spend a lot of production costs. Here, we specifically illustrate two conventional ceramic capacitor fabrication techniques. Please refer to the first figure, which is a schematic view showing the structure of a finished ceramic capacitor according to the first conventional technique. As shown, one of the ceramic capacitors 1 fabricated by the first conventional technique comprises a laminated ceramic stack II, an outer electrode 12, an electrode protective layer 13, and a solder layer 14. The laminated ceramic stack 11 includes a ceramic substrate 111 and a plurality of internal electrode plates 112 composed of a silver (Ag) palladium (Pd) alloy, wherein the ceramic substrate 111 is provided with a first ceramic end surface 113 and a second ceramic. The end surface 114 is interposed between the first ceramic end surface 113 and the second ceramic end 114 surface, and the internal electrode plates 112 are sequentially interleaved and interposed between the ceramic substrates III. 5 1266343 each inner electrode plate 112 is provided with a fixed end 112a and a free end 112b, and the fixed end 112a of each inner electrode plate 112 is flush with one of the first ceramic end surface 113 and the second ceramic end surface 114, and The free ends 112b of the inner electrode plates 112 are spaced apart from the other of the first ceramic end faces 113 and the second ceramic end faces 114 by a predetermined distance to prevent shorting of the inner electrode plates 112. The outer electrode 12 is coated on the first ceramic end surface 113 and the second ceramic end surface 114 by high-temperature sintering of silver, thereby connecting the inner electrode plates 112 and constituting the two terminal electrodes of the ceramic capacitor 1. The electrode protective layer 13 is coated on the outer surface of the outer electrode 12 by means of electroplating nickel (Ni) to protect the outer electrode 12. The solder layer 14 is coated on the outer surface of the electrode protective layer 13 by means of tin plating (Sn) for solder bonding. Anyone familiar with the art can understand that in this process, since the inner electrode plate 112 must use expensive bump (Ag) palladium (Pd) as a raw material, it is necessary to consume a large raw material cost. At the same time, in the process of sintering the silver nano 丨........ into the outer electrode 12, in addition to having to use expensive silver as a material, it is still required to be completed in a warm environment, so It is also necessary to bear a higher cost of energy consumption. Therefore, when the mass production of the ceramic capacitor 1 is performed in this process, there is a lack of market-based JUL competition. Please refer to the second figure, which is based on the second conventional technology. Schematic diagram of the finished structure of ceramic capacitors. As shown, one of the ceramic capacitors 2 fabricated by the second conventional technique comprises a laminated ceramic stack 266343 2b-outer electrode 22, an electrode protective layer 23 and a "welding layer 24." The stacked ceramic body 21 has a ceramic substrate 211 and a plurality of inner electrode plates 212 ′. The ceramic substrate 211 has a first ceramic end surface 213 and a second ceramic end surface 214 , and the inner electrode plate The 212 has a fixed end 212a and a free end 212b' and the overall arrangement of the laminated ceramic stack 2i is similar to that of the laminated Taojing stack 11. The electrode protection layer 23 and the solder layer 24 are similar to the electrode protection layer 13 and the solder layer 14 in terms of material selection and manufacturing methods. The difference between the shovel (4) and the stacking body 11 is that the ruthenium electrode plate 212 is made of a nickel alloy or a copper alloy. In addition, the A outer electrode 22 is made of a nickel alloy or a steel alloy in the lake. ◦ to 9〇〇. The ring of 〇 ' ^ ^ Xiang nitrogen as a catalyst, and sintered formed on the first - ceramic end face 213 and the first pottery end face 214. Anyone who is familiar with the relevant art can understand that in this process, the process of recording the alloy or copper b high temperature bee into the outer electrode 22 still needs to be in the environment of [8〇〇(^_900) Next, and the nitrogen gas can be completed as a catalyst, so it must also bear a higher cost of energy and consumables qV. Therefore, when the ceramic capacitor 2 is placed in this process, there is also a lack of market. In addition, in the manufacturing process of the outer electrode 12, it is formed by high-temperature sintering of silver; in the manufacturing process of the outer electrode 22, two temperatures are used (800C to 900 ° C environment) , using nitrogen as a catalyst to sinter nickel or copper. The capsule is cooled and crystallized at room temperature (about 25 〇c), and the resulting junction is caused to cause the outer electrode 12 and the inner electrode plates 1266343. The connection between the outer electrode 12 and the inner electrode plate 112 is also poor. [Technical Problem] The technical problem to be solved by the present invention is: In the above-mentioned ceramic capacitor manufacturing technology, On the material Material cost can be incorporated into the control, there is still a great improvement ________ one. One y. Space, in addition, the connection between the internal electrode and the external electrode will directly affect the conductivity of the ceramic capacitor terminal Sex, in the multilayer ceramic capacitors made by the conventional ceramic capacitors, the problems of excessive, party and external electrodes & poor connectivity are also detrimental to some of the conductivity, and another worthwhile. The problem of positive improvement. Therefore, in view of the lack of conventional process technology, the main object of the present invention is to provide a low-cost mass production process of a laminated ceramic capacitor, thereby fabricating a laminated ceramic capacitor comprising a laminated ceramic structure. a metalized end face, a cured conductive material layer, an electrode protective layer and a solder layer. The laminated ceramic stack has a ceramic substrate and a plurality of internal electrode plates embedded therein. The cured conductive material layer Used as an electrode outside the laminated ceramic stack, which is made of copper or tin in a low-cost environment And an epoxy-based polymer material may be added to increase curing adhesion. Another object of the present invention is to provide a low-cost mass production process of a multilayer ceramic capacitor, whereby the multilayer ceramic capacitor is fabricated in the multilayer ceramic 1266334 capacitor The two ends of the laminated ceramic stack are attached to a micro-sized nano silver material at a specific ratio to form a metalized end surface, thereby indirectly improving the connection between the inner electrode plate and the outer electrode. Technical means: The technical means adopted by the present invention to solve the problems of the prior art provides a low-cost mass production process of a laminated ceramic capacitor, thereby reducing the manufacturing cost of the laminated ceramic capacitor in mass production, and is an internal electrode plate and The outer electrode plate provides better bonding adhesion. The process pre-prepares a ceramic substrate, and sequentially forms a plurality of layers of nickel alloy and tin alloy on the two ceramic end faces of the ceramic substrate. The inner electrode plate is composed 'to form a laminated pottery* structure. Next, a nano silver particle solution is adhered to the ceramic end face to form a metallized end face, and a solid conductive material layer is formed on the outer surface of the metallized end face as an external electrode in a curing environment. Finally, an electrode protective layer is plated on the outer surface of the outer electrode, and a solder layer is plated on the outer surface of the electrode protective layer. Meanwhile, another technical means adopted by the present invention to solve the problems of the prior art is to provide a laminated ceramic capacitor which is fabricated according to the above process and includes the laminated ceramic structure, the metalized end face, and the cured conductive material. a layer, the electrode protective layer and the splicing layer. Wherein, the laminated ceramic structure comprises the ceramic substrate and a plurality of internal electrode plates, the cured conductive material layer forms an electrode outside the laminated ceramic capacitor structure, and the laminated ceramic is formed with the metalized end face and each internal electrode plate Both ends of the capacitor. The metallized end face is formed by coating with a solution of nano silver particles, and 9 1266343 is used to indirectly improve the connectivity between the inner electrode plates and the outer electrodes. The present invention compares the effects of the prior art: Compared with the existing _capacitor conversion technology, the present invention provides a low-cost 4 production process and structure, which not only saves efficiency, but also reduces cost and source selection. The cost can more indirectly improve the connection between the inner nuclear plates and the outer poles, thereby improving the conductivity of the two ends of the laminated capacitor. The specific embodiment adopted by the present invention will be as follows by the following embodiments and accompanying drawings. Formula for the step-by-step description. [Embodiment] Referring to the second drawing, there is shown a schematic view of a finished product of a laminated ceramic capacitor fabricated in accordance with an embodiment of the present invention. As shown, a laminated ceramic capacitor 3 comprises a laminated ceramic stack 31, a metallized end face 32, a cured conductive material layer 33, an electrode protective layer 34 and a solder layer 35. The laminated ceramic stack 31 includes a ceramic substrate 311 and a plurality of internal electrode plates 312 composed of a nickel alloy or a copper alloy. The ceramic substrate 311 is provided with a first ceramic end surface 313 and a second ceramic end surface 314. Between the first ceramic end surface 313 and the second ceramic end surface 314, the internal electrode plates 312 are sequentially interleaved and interposed between the ceramic substrates 311. Each of the inner electrode plates 312 is provided with a fixed end 312a and a free end 312b. The fixed end 312a of each inner electrode plate 312 is flush with one of the first ceramic end surface 1263343 and the second ceramic end 314, and each The free end 312b of the inner electrode plate 312 is spaced apart from the other of the first ceramic end surface 313 and the second ceramic end surface 314 by a predetermined distance to prevent short circuiting of the inner electrode plates 312. The metallized end face 32 is composed of a solution of nano silver particles coated on the first ceramic end face 313 and the second ceramic end face 314, and has a very thin thickness. The cured conductive material layer 33 is cured on the outer surface of the metallized end surface 32 by using powder particles containing nickel or copper, thereby forming an external electrode, and connecting the internal electrode plates 312 through the metalized end surface 32, thereby The two terminal electrodes of the multilayer ceramic capacitor 3 are formed. The electrode protection layer 34 is composed of nickel and is coated on the outer surface of the cured conductive material layer 33 to protect the cured conductive material layer 33 (which may also be regarded as protecting the two terminal electrodes of the multilayer ceramic capacitor 3). The solder layer 35 is composed of tin and is coated on the outer surface of the electrode protective layer 34, whereby the laminated ceramic capacitor 3 is solder bonded to a specific circuit. Please refer to the fourth to seventh figures, which show the production process of the present invention. The fourth figure shows the structural schematic diagram of the completed laminated ceramic stack of the present invention, the fifth figure shows the structural schematic diagram of the finished metallized end face of the present invention, and the sixth figure shows the finished curing conductive material layer of the present invention. The structure diagram of the latter, the seventh figure shows the structure diagram of the electrode protective layer after the completion of the invention. At the same time, please refer to the third figure to show the schematic diagram of the finished ceramic capacitor according to the embodiment of the present invention, that is, the structural schematic diagram after the fabrication of the soldering layer is completed. As shown in the fourth figure, the low-cost 11 1266343 cost-volume manufacturing process of the multilayer ceramic capacitor proposed by the present invention (in the following embodiment, referred to as the process) is to prepare the ceramic substrate 31 first, and in the ceramic Between the first ceramic end surface 313 of the substrate 31 and the second ceramic end surface 314, a plurality of internal electrode plates 312 composed of one of a nickel alloy and a copper alloy are formed in the ceramic substrate 311 in a staggered manner. The laminated ceramic stack 31 is formed with the ceramic substrate 311, and thus the fabrication of the laminated ceramic capacitor blank 3a is completed. As shown in the fifth figure, the next step of the process utilizes a solution of nano silver particles of a specific ratio and a small size (in this case, a solution of 35% of 20 nano silver particles is recommended) on the first ceramic end face 313. The metallized end face 32 is formed to be extremely thin with the second ceramic end face 314, and thus the fabrication of the laminated ceramic capacitor blank 3b is completed. As shown in the sixth figure, the next step of the process is in a curing environment (in this case, it is recommended to maintain the pressure condition of O.OOltorr and the temperature of 250 ° C to 280 ° C for 30 minutes). Forming a cured conductive material layer 33 comprising a nickel alloy or a copper alloy as an outer electrode on the outer surface of the metallized end face 32, and connecting the inner electrode plates 312 through the metallized end faces 32, thereby constituting the laminated ceramic capacitor At the end of the 3rd, the fabrication of the laminated ceramic capacitor semi-finished product 3c is completed. As shown in the seventh figure, the second step of the process is to coat the electrode protective layer 34 on the outer surface of the cured conductive material layer 33 by means of electroplating nickel, thereby protecting the cured conductive material layer 33. The fabrication of the laminated ceramic capacitor semi-finished product 3d was completed. Finally, please return to the third picture. As shown in the figure, the last step 12 1266343 of the process is to coat the solder layer 35 on the outer surface of the electrode protection layer 34 by means of electroplating tin, whereby the multilayer ceramic capacitor 3 is soldered to a specific circuit. Thus, the fabrication of the multilayer ceramic capacitor 3 has been completed. Anyone who is familiar with the relevant art can understand that in this process, since the thickness of the metallized end face 32 is extremely thin, the material cost consumed is very limited. Meanwhile, in the process of fabricating the cured conductive material layer 33, in order to increase the curing adhesion ability of the powder particles containing nickel or copper, a specific south molecular material (such as an epoxy-based polymer material) may be added to the powder particles. , commonly known as Epoxy). In addition, when the curing conductive material layer 33 is formed, it can be completed only under the pressure condition of O. OOltorr and the temperature of 250 ° C to 280 ° C for 30 minutes, which can effectively reduce the production process. The energy cost that must be consumed. Please refer to the eighth drawing, which is a flow chart showing the low-cost mass production process of the multilayer ceramic capacitor of the present invention. As shown in the figure, and referring to the above description, the process of the present invention pre-prepares a ceramic substrate (step 110), and sequentially forms a plurality of layers of nickel alloy and tin alloy on the two ceramic end faces of the ceramic substrate. One of the inner electrode plates (step 120) is formed to form a laminated ceramic structure. Next, a nano silver particle solution is adhered to the ceramic end face to form a metallized end face (step 130), and a solid conductive material layer is formed on the outer surface of the metallized end face in a curing environment as a External electrode (step 140). Finally, an electrode protective layer is plated on the outer surface of the outer electrode (step 150), and a solder layer is plated on the outer surface of the electrode protective layer (step 160). 13 Ϊ 266343 Please refer to the ninth to eleventh figures, which show a comparison between the two conventional techniques and the connection relationship between the inner and outer electrodes of the present invention. The ninth figure is a partial microscopic structure diagram of the area shown in the first circle A, the tenth is a partial microscopic structure diagram of the area shown by the second circle B, and the eleventh figure is the area shown by the third circle C Schematic diagram of the local microstructure. As shown in the ninth figure, in the ceramic capacitor 1 manufactured by the first conventional technique, the outer electrode 12 is coated on the first ceramic end face 113 by the method of sintering silver at a high temperature. The two ceramic end faces 114 are connected to the inner electrode plates 112 and constitute the two end poles of the ceramic capacitor 1. Therefore, in a microscopic environment, when the silver is sintered at a high temperature and cooled at room temperature (about 25 ° C) After crystallization, the crystal particles formed are large, resulting in poor connectivity between the outer electrode 12 and each of the inner electrode plates 112 (i.e., a large crystallization gap and a small effective contact area). As shown in the tenth figure, in the ceramic capacitor 2 fabricated by the second conventional technique, the outer electrode 22 is coated on the first ceramic end face 213 by means of high-temperature sintering of nickel or copper. The second ceramic end face 214 is connected to each of the internal electrode plates 112 and constitutes the two end poles of the ceramic capacitor 1. Therefore, in a microscopic environment, when nickel or copper is sintered at a high temperature (at 80 (TC to 900°) In the case of C, sintering with nitrogen as a catalyst, and after cooling and crystallization at room temperature (about 25 ° C), the crystal particles formed are large, so that the outer electrode 12 and the inner electrode plates 112 are connected. Poor (that is, the crystallization gap is large, the effective contact area is small). Please continue to refer to the eleventh figure, and compared with the eighth and ninth figures, in the laminated ceramic capacitor 3 fabricated by using the process. Between the inner electrode plate 1263343 312 and the external electrode formed by the solidified conductive material layer 33, a nano silver particle solution of a specific ratio and a small size is used (in this case, 35% of 20 nanometer silver particles are recommended) The metal formed by the solution) The end face 32 is connected. Since the size of the nano silver particles is as small as about 20 nm, the connection between the inner electrode plate 312 and the outer electrode can be effectively improved by the metallized end face 32 (lifting) Effective contact area). The process is better than the process provided by the first prior art, which not only achieves a better competitive advantage in terms of material cost and energy consumption cost, but also connects the inner electrode plate to the outer electrode. In addition, the process is better than the process provided by the second prior art, and can achieve a better competitive advantage in connection with the cost of energy consumption and the connection between the internal electrode plate and the external electrode. It will be understood from the above-described embodiments of the present invention that the present invention has industrial use value. However, the above embodiments are merely illustrative of the preferred embodiments of the present invention, and those skilled in the art can The above-described embodiments of the invention are described with various other modifications and variations. However, various modifications and changes made in accordance with the embodiments of the present invention are still And the scope of the defined patents. [Simplified description of the drawings] The first figure shows the schematic structure of the finished ceramic capacitor according to the first conventional technique; the second figure shows the ceramic made according to the second conventional technique. The schematic diagram of the finished capacitor 15 Ί 266343; the third figure shows the finished product of the laminated ceramic capacitor prepared according to the embodiment of the present invention, and the fourth figure shows the structural schematic diagram of the completed laminated ceramic stack of the present invention, the fifth figure The schematic diagram of the structure after the completion of the metallized end face of the present invention is shown. The sixth figure shows the structural schematic diagram of the completed cured conductive material layer of the present invention. The seventh figure shows the structural schematic diagram of the electrode protective layer after the invention is completed. The figure shows a low-cost mass production process flow chart of the multilayer ceramic capacitor of the present invention; the ninth figure is a partial microscopic structure diagram of the area shown in the first circle A; the tenth figure is the part of the area shown by the second picture circle B Schematic diagram of the microstructure; the eleventh figure is a schematic diagram of the local microstructure of the area shown in the third circle C. [Main component symbol description] 1 Ceramic capacitor 11 Laminated ceramic stack 111 Ceramic substrate 112 Internal electrode plate 112a Fixed end 16 • 1266343 112b Free end 113 First ceramic end face 114 Second ceramic end face 12 External electrode 13 Electrode protective layer 14 Solder layer 2 ceramic capacitor 21 laminated ceramic stack
211 陶瓷基板 212 内電極板 212a 固定端 212b 自由端 213 第一陶瓷端面 214 第二陶瓷端面 22 外電極211 ceramic substrate 212 inner electrode plate 212a fixed end 212b free end 213 first ceramic end face 214 second ceramic end face 22 outer electrode
23 電極保護層 24 焊接層 3 積層陶瓷電容器 3a 積層陶瓷電容器之半成品 3b 積層陶瓷電容器之半成品 3c 積層陶瓷電容器之半成品 3d 積層陶瓷電容器之半成品 31 積層陶瓷堆疊體 311 陶瓷基板 17 Ί266343 312 内電極板 312a 固定端 312b 自由端 313 第一陶瓷端面 314 第二陶瓷端面 32 金屬化端面 33 固化導電材料層 34 電極保護層 35 焊接層 1823 electrode protection layer 24 solder layer 3 laminated ceramic capacitor 3a semi-finished product of laminated ceramic capacitor 3b semi-finished product of laminated ceramic capacitor 3c semi-finished product of laminated ceramic capacitor 3d semi-finished product of laminated ceramic capacitor 31 laminated ceramic stack 311 ceramic substrate 17 Ί266343 312 inner electrode plate 312a Fixed end 312b Free end 313 First ceramic end face 314 Second ceramic end face 32 Metallized end face 33 Cured conductive material layer 34 Electrode protective layer 35 Solder layer 18