TWI236326B - Fabricating process of circuit board with embedded passive component - Google Patents

Fabricating process of circuit board with embedded passive component Download PDF

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Publication number
TWI236326B
TWI236326B TW93116298A TW93116298A TWI236326B TW I236326 B TWI236326 B TW I236326B TW 93116298 A TW93116298 A TW 93116298A TW 93116298 A TW93116298 A TW 93116298A TW I236326 B TWI236326 B TW I236326B
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Taiwan
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layer
item
circuit board
photoresist
electrode
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TW93116298A
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Chinese (zh)
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TW200541424A (en
Inventor
Chen-Chuan Chang
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Subtron Technology Co Ltd
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Priority to TW93116298A priority Critical patent/TWI236326B/en
Priority to US10/908,987 priority patent/US7441329B2/en
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Publication of TWI236326B publication Critical patent/TWI236326B/en
Publication of TW200541424A publication Critical patent/TW200541424A/en

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Abstract

A fabricating process of circuit board with embedded passive component is described. The process comprises few steps. First, a circuit substrate is provided, and the circuit substrate has a conductive layer, and at least one material layer of passive component. Additionally, the conductive layer is on a surface of the circuit substrate, and the conductive layer covers the material layer of passive component. The conductive layer has at least one component region, and the material layer of passive component is set on the component region. Next, a patterned photoresist layer is formed on the conductive layer. The conductive layer is carried out a first etching process and a second etching process to form a circuit layer. A basic etchant, is used in the first etching process, and an acid etchant is used in the second etching process.

Description

1236326 五、發明說明(1) 是有關於 【發明所屬之技術領域】 本發明疋有關於一種電路板製程,且特別 種具有埋入式被動元件之電 【先前技術】 > 由ί電子產品的積集度(integration )越Hi f用於南積集度之電子產品的電路板,其線絡廣也由乎 層、2層而蠻為fi靥、_____ ..以使if 件能夠更密集的裝設於印刷電路板上。然而, 層數的增加與線路的密集化,在電路板中傳遞之 號,其電阻電容延遲效應(Rc deUy)或串音效應 (cross talk)所造成的影響也越來越明顯。為了 路板的電性性質,因此必須在電路板有限的配置面積上增 設被動元件。 随著電路板 電性訊 了改善電 承上所述,在電路板有限的配置面積上除了要配置被 動元件外,更要配置各種電子元件。此外,具有特定電性 數值之規格化被動元件可能無法完全符合特別的電路設 計,因此將被動元件直接製作於電路板内部便是一個可行 的解決之道。再者,在電路板内部之被動元件也可以隨著 電路板之佈線設計及材料選擇等來調整電路板電性數值。 值得注意的是,電路板線路層的材質通常是銅,而且 在線路層的#刻過程中通常使用使用酸性、蝕刻液,因為酸 性触刻液比較不會造成線路輪廟(p r 〇 f i 1 e )具有底切現 象(undercut)。此外,對於習知具有埋入被動元件之電 路板之製程而言,此種電路板的兩相對表面均配置線路1236326 V. Description of the invention (1) is related to [the technical field to which the invention belongs] The present invention relates to a circuit board manufacturing process, and particularly a kind of electricity with embedded passive components [prior art] > The integration degree (integration) is higher. Hi f is used for the circuit boards of electronic products with a south integration degree, and its line width is also dependent on layers and 2 layers, which is fi 靥, _____ .. so that if pieces can be more dense Mounted on a printed circuit board. However, the increase in the number of layers and the denseness of the lines, and the transmission of the signal in the circuit board, the effects caused by the resistance-capacitance delay effect (Rc deUy) or cross talk effect (cross talk) are becoming more and more obvious. For the electrical properties of the board, passive components must be added to the limited layout area of the board. With the improvement of the electrical performance of the circuit board, as described above, in addition to the passive components on the limited layout area of the circuit boards, various electronic components must be provided. In addition, standardized passive components with specific electrical values may not fully meet the special circuit design, so it is a feasible solution to make passive components directly inside the circuit board. Furthermore, the passive components inside the circuit board can also be adjusted with the circuit board's wiring design and material selection. It is worth noting that the material of the circuit board circuit layer is usually copper, and acid and etching solution are usually used in the #etching process of the circuit layer, because acidic etching solution will not cause circuit wheel temples (pr 〇fi 1 e ) Has an undercut. In addition, for the conventional manufacturing process of a circuit board with embedded passive components, two opposite surfaces of such a circuit board are provided with circuits.

13454twf.ptd 第7頁 1236326 五、發明說明(2) 層,而兩層線路 外,此兩層線路 而蝕刻製程使用 分被動元件材料 元件無法達到預 【發明内容】 有鑒於此, 被動元件之電路 刻液損傷,進而 基於上述目 式被動元件之電 提供一線路基板 層,其中導體層 蓋被動元件材料 且被動元件材料 其中之一通常會覆 層通常是同時採用,動元件材料層。此 酸性蝕刻液形成,二蝕刻製程所形成, 層會被酸性蝕刻液 t•在蝕刻製程中,部 定的電性規袼。 貝傷,進而造成被動 本發明 板製程 提1¾埋 的或其 路板製 ’其具 係位於 層。此 層係配 形成一圖案化光阻層於 一第一钱刻製程與一第 中第一餘刻製 驗性钱刻液 用一 的目 ,以 入式 他目 程, 有一 線路 外, 置於 導體 二蝕 酸性 的就 避免 被動 的, 其例 導體 基板 導體 導體 層上 刻製 是在 被動 元件 本發 如包 層與 之一 層具 層之 〇接 程, 液, 提供— 元件材 的製程 明提出 括幾個 至少— 表面, 有至少 元件區 著,對 以形成 而第二 種具有 料遭受 良率。 一種具 步驟。 被動元 且導體 一元件 域上。 於導體 一線路 韻刻製 埋入式 酸性敍 有埋入 首先, 件材料 層係覆 區域, 然後, 層進行 層,其 程使用 依照本發明的較佳實施例所述,酸性蝕刻液例如包括 氯化銅溶液或氣化鐵溶液。 、 依照本發明的較佳實施例戶斤述,驗性餘刻液例如包括 阿摩尼亞溶液或氣化錄溶液。 依照本發明的較佳實施例所述’導體層之材質例如為13454twf.ptd Page 7 1236326 V. Description of the invention (2) layer, but outside the two-layer line, the etching process of this two-layer line using the passive element material element can not reach the pre- [content of the invention] In view of this, the circuit of the passive element The etching liquid is damaged, and then a circuit substrate layer is provided based on the electricity of the above-mentioned passive component, wherein the conductive layer covers the passive component material and one of the passive component materials is usually covered at the same time, and the dynamic component material layer is usually used at the same time. This acidic etching solution is formed, and the layer is formed by the second etching process. The layer will be subjected to the acidic etching solution. • During the etching process, some electrical specifications are regulated. Injury, which in turn causes the board manufacturing process of the present invention to be buried or its circuit board system, its system is located in the layer. This layer is matched to form a patterned photoresist layer in a first money engraving process and a first middle time engraving test money engraving solution with a single eye, in a different way, with a line outside, placed on The passive etching of the conductor avoids the passive. For example, the conductor substrate is engraved on the conductive layer of the conductive substrate. The passive component, such as a cladding and a layer with a layer, is connected. The liquid is provided. Several at least-surfaces, with at least element regions, pair to form while the second has material yield. One step. Passive element and conductor-element domain. Embedding is embedded in the conductor-line rhyme. First, the material layer covers the area, and then the layer is layered. The process uses the acidic etching solution such as chlorine, as described in the preferred embodiment of the present invention. Copper solution or vaporized iron solution. According to the description of the preferred embodiment of the present invention, the test solution includes, for example, an Armonia solution or a gasification solution. According to a preferred embodiment of the present invention, the material of the 'conductor layer is, for example,

1236326 五、發明說明(3) 銅。 依照本發明的較佳實施例所述,線路層例如更具有一 第一電極及相互電性隔絕之一第二電極,其分別連接至被 動元件材料層,且被動元件材料層之材質包括一電阻材 料。此外,電阻材料包括填酸鎳。 依照本發明的較佳實施例所述,線路基板例如更包括 至少一電極層,其位於被動元件材料層及元件區域上,且 線路層更具有一第一電極與一第二電極,其中第一電極係 連接至電極層,而至少部分之電極層及至少部分之第二電 極係相互重疊,且被動元件材料層之材質包括一電容材 料。此外,電容材料例如包括鈦酸鋇。 依照本發明的較佳實施例所述,形成圖案化光阻層於 導體層上之方法例如包括先形成一光阻層於導體層上,再 對於光阻層進行曝光製程與顯影製程。此外,形成光阻層 於導體層上之方法例如包括塗佈液態光阻或貼附光阻乾 膜。 依照本發明的較佳實施例所述,對於導體層進行第一 蝕刻製程與第二蝕刻製程之後例如更包括移除圖案化光阻 層。 基於上述目的或其他目的,本發明提出一種具有埋入 式被動元件之電路板製程,其例如包括幾'個步驟。首先, 提供一線路基板,其具有一第一導體層、一第二導體層與 至少一被動元件材料層,其中第一導體層與第二導體層係 分別位於線路基板之兩相對表面上。此外,第二導體層係1236326 V. Description of the invention (3) Copper. According to a preferred embodiment of the present invention, the circuit layer further includes, for example, a first electrode and a second electrode electrically isolated from each other, which are respectively connected to the passive element material layer, and the material of the passive element material layer includes a resistor. material. In addition, the resistance material includes nickel-filled acid. According to a preferred embodiment of the present invention, the circuit substrate further includes, for example, at least one electrode layer, which is located on the passive element material layer and the element region. The circuit layer further includes a first electrode and a second electrode. The electrode system is connected to the electrode layer, and at least part of the electrode layer and at least part of the second electrode system overlap each other, and the material of the passive element material layer includes a capacitor material. In addition, the capacitor material includes, for example, barium titanate. According to a preferred embodiment of the present invention, a method for forming a patterned photoresist layer on a conductive layer includes, for example, forming a photoresist layer on the conductive layer, and then performing an exposure process and a development process on the photoresist layer. In addition, a method of forming a photoresist layer on the conductor layer includes, for example, applying a liquid photoresist or attaching a photoresist dry film. According to a preferred embodiment of the present invention, after the first etching process and the second etching process are performed on the conductor layer, for example, the patterned photoresist layer is further removed. Based on the foregoing or other objectives, the present invention proposes a circuit board manufacturing process with embedded passive components, which includes, for example, several steps. First, a circuit substrate is provided, which has a first conductor layer, a second conductor layer and at least one passive element material layer, wherein the first conductor layer and the second conductor layer are respectively located on two opposite surfaces of the circuit substrate. In addition, the second conductor layer system

13454twf.ptd 第9頁 1236326 五、發明說明(4) ------ 覆蓋被動元件材料層,而第二導體層具有至少一元件區 域’且被動元件材料層係配置於第二導體層之元件區域 上。然後,形成一第一光阻層與一第二光阻層分別覆蓋於 第一導體層與第二導體層上。圖案化第一光阻層,並對於 第一導體層進行一第一蝕刻製程,以形成一第一線路層。 之,,移除圖案化之第一光阻層與第二光阻層,並形&一 第三光阻層與一第四光阻層分別覆蓋於第一線路層與第二 導體層上。接著,圖案化第四光阻層。再者,對於第二導 體層進行 第一餘刻製程與一第三钱刻製程,以形成一第 二線路層,其令第二蝕刻製程使用一酸性蝕刻液,而第三 餘刻製程使用一驗性餘刻液。 依照本發明的較佳實施例所述,酸性蝕刻液例如包括 氣化銅溶液或氯化鐵溶液。 依照本發明的較佳實施例所述,鹼性蝕刻液例如包括 阿摩尼亞溶液或氣化銨溶液。 依照本發明的較佳實施例所述,第一導體層與第二導 體層之材質例如為銅。 依照本發明的較佳實施例所述,第二線路層例如更具 有一第一電極及相互電性隔絕之一第二電極,其分別連^ 至被動元件材料層,且被動元件材料層之材質包括一電阻 材料。此外,電阻材料包括磷酸鎳。 ·、13454twf.ptd Page 9 1236326 V. Description of the invention (4) ------ Covers the passive element material layer, and the second conductor layer has at least one element area 'and the passive element material layer is arranged in the second conductor layer On the component area. Then, a first photoresist layer and a second photoresist layer are formed to cover the first conductor layer and the second conductor layer, respectively. The first photoresist layer is patterned, and a first etching process is performed on the first conductor layer to form a first circuit layer. In other words, the patterned first photoresist layer and the second photoresist layer are removed, and a third photoresist layer and a fourth photoresist layer are respectively covered on the first circuit layer and the second conductor layer. . Next, a fourth photoresist layer is patterned. Furthermore, a first remaining etching process and a third etching process are performed on the second conductor layer to form a second circuit layer. The second etching process uses an acidic etching solution, and the third remaining etching process uses an Experiential remaining liquid. According to a preferred embodiment of the present invention, the acidic etching solution includes, for example, a vaporized copper solution or a ferric chloride solution. According to a preferred embodiment of the present invention, the alkaline etching solution includes, for example, an Armonia solution or a vaporized ammonium solution. According to a preferred embodiment of the present invention, the material of the first conductor layer and the second conductor layer is, for example, copper. According to a preferred embodiment of the present invention, for example, the second circuit layer further has a first electrode and a second electrode electrically isolated from each other, which are respectively connected to the passive element material layer, and the material of the passive element material layer is Includes a resistive material. In addition, the resistance material includes nickel phosphate. ·,

1236326 五、發明說明(5) 第二線路層更具有一第一電極與一第二電極,其中第一電 極係連接至電極層,而至少部分之電極層及至少部分之第 二電極係相互重疊,且被動元件材料層之材質包括一電容 材料。此外,電容材料例如包括鈦酸鋇。 依照本發明的較佳實施例所述,圖案化第一光阻層與 圖案化第四光阻層之方法例如包括曝光製程與顯影製程。 依照本發明的較佳實施例所述,形成第一光阻層、第 二光阻層、第三光阻層與第四光阻層之方法例如包括塗佈 液態光阻或貼附光阻乾膜。 依照本發明的較佳實施例所述,對於第二導體層進行 第二蝕刻製程與第三蝕刻製程之後例如更包括移除圖案化 之第四光阻層與第三光阻層。 基於上述,本發明之具有埋入式被動元件之電路板製 程採用兩階段蝕刻製程,以形成接觸被動元件材料層之線 路層,而兩階段蝕刻製程為先進行使用酸性蝕刻液之第一 蝕刻製程,後進行使用鹼性蝕刻液之第二蝕刻製程,因此 兩階段蝕刻製程能夠避免酸性蝕刻液損傷被動元件材料 層,進而提高埋入式被動元件的製程良率。 為讓本發明之上述和其他目的、特徵和優點能更明顯 易懂,下文特舉一較佳實施例,並配合所附圖式,作詳細 說明如下。 ' 【實施方式】 【第一實施例】 圖1 A至圖1 C係繪示依照本發明第一較佳實施例之具有1236326 V. Description of the invention (5) The second circuit layer further has a first electrode and a second electrode, wherein the first electrode system is connected to the electrode layer, and at least part of the electrode layer and at least part of the second electrode system overlap each other. The material of the passive element material layer includes a capacitor material. In addition, the capacitor material includes, for example, barium titanate. According to a preferred embodiment of the present invention, the method for patterning the first photoresist layer and the patterning the fourth photoresist layer includes, for example, an exposure process and a development process. According to a preferred embodiment of the present invention, a method for forming a first photoresist layer, a second photoresist layer, a third photoresist layer, and a fourth photoresist layer includes, for example, applying a liquid photoresist or attaching a photoresist to dry membrane. According to a preferred embodiment of the present invention, after the second etching process and the third etching process are performed on the second conductor layer, for example, the patterned fourth photoresist layer and the third photoresist layer are further removed. Based on the above, the circuit board process with embedded passive components of the present invention uses a two-stage etching process to form a circuit layer contacting the passive component material layer, and the two-stage etching process is a first etching process using an acidic etchant first Then, a second etching process using an alkaline etchant is performed, so the two-stage etching process can prevent the acidic etchant from damaging the passive element material layer, thereby improving the process yield of the embedded passive element. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below and described in detail with reference to the accompanying drawings. '[Embodiment] [First Embodiment] Figs. 1A to 1C show a structure according to a first preferred embodiment of the present invention.

13454twf.ptd 第11頁 1236326 五、發明說明(6) 式i 3,件之電路板製程的剖面結構示意圖。請參照 ^。音iI入式被動元件之電路板製程例如包括幾個步 ^、。首无1提供一線路基板110,其具有一導體層120與至 一被動7C件材料層i 3 〇,其中導體層i 2 〇係位於線路基板 10之一表面,且導體層12〇係覆蓋被動元件材料層13〇。 此外,導體層120具有至少一元件區域12〇a,且被動元件 材料層130係配置於導體層12〇之元件區域12〇a上。另外, $體層120之材質例如包括銅或其他導電性質良好的物 /參照圖1A,形成一光阻層21〇於導體層12〇上,而形 ^光阻層120的方法例如貼附光阻乾膜(dry f丨lm ) ,態光阻。請參照圖1 B,對於光阻層2丨〇進行曝 影製程’以形成—圖案化光阻層212。接 ::路層m (如圖κ所示)。此外,第U製以 蝕刻液,而酸性蝕刻液例如包括氣化鋼溶 ::或其他適當的酸性蝕刻液。特別 虱鐵 :刻製程並未完全將導體層120触刻出:路;的,如:-所不厂而第-㈣製程只去除部分之導體層層1LY。如圖1C -凊參照圖1 C,隨後對於上述製程所形 一蝕刻製程,以形成線路層122,其中 之π構進仃第 鹼性蝕刻液,而鹼性蝕刻液例如包括一刻製程使用 :以或其他適當的驗性丄㈡化= 層川(如圖1B所示),以便於完全暴露出心圖層案 12化2= 第12頁 13454twf.ptd I236326 五、發明說 形点 外,=入式被動元件之電路板100 (如圖lc所示)。13454twf.ptd Page 11 1236326 V. Description of the invention (6) The schematic diagram of the cross-sectional structure of the circuit board manufacturing process of formula i 3, pcs. See ^. The circuit board manufacturing process of the sound-in-type passive component includes, for example, several steps. No. 1 provides a circuit substrate 110 having a conductor layer 120 and a passive 7C material layer i 3 〇, where the conductor layer i 2 〇 is located on one surface of the circuit substrate 10 and the conductor layer 12 0 covers the passive Element material layer 13〇. In addition, the conductor layer 120 has at least one element region 120a, and the passive element material layer 130 is disposed on the element region 120a of the conductor layer 120. In addition, the material of the body layer 120 includes, for example, copper or other materials with good conductive properties. Referring to FIG. 1A, a photoresist layer 21o is formed on the conductor layer 120, and a method of forming the photoresist layer 120 is, for example, attaching a photoresist. Dry film (dry film), state photoresist. Referring to FIG. 1B, an exposure process is performed on the photoresist layer 20 to form a patterned photoresist layer 212. Connect to :: road layer m (as shown in Figure κ). In addition, the U-based etching solution is used, and the acidic etching solution includes, for example, a gasified steel solution :: or other appropriate acidic etching solution. Special iron lice: The engraving process does not completely etch the conductive layer 120: road; for example:-the factory does not remove and only the part of the conductive layer 1LY. As shown in Fig. 1C-Fig. 1C, an etching process is formed for the above process to form a circuit layer 122, wherein π is structured into a first alkaline etching solution, and the alkaline etching solution includes, for example, a one-step process. Use: Or other appropriate qualitative analysis = layer (as shown in Figure 1B), in order to fully expose the heart layer case 12 = 2 = page 13454twf.ptd I236326 5. The invention is outside the point, = type Circuit board 100 for passive components (as shown in Figure lc).

性隔ΐ二線路層122例如更具有一第—電極122a及相ΐ φ 13〇之一第二電極122b,其分別連接至被動元件材H 材料例如包括磷酸鎳或其他會受到酸$ 、《阻材料。 卿刻液才貝 為鋼Ϊ得注意的是,當導體層120 (如圖1B所示)之材暂 此盡ϊ ϊ=130 (例如磷酸鎳電阻材料)造成損傷對於因被 結果‘了、i堪ΐ ϊ=第二钱刻製程姓刻出線路層丨22,直 哉刻液20產生底切現象外,更可避免酸;生 用兩的金屬線路’其製作方式均可採 程)酸性蝕刻液製程,後驗性蝕刻液製 卜。二入並式不被二件 也可以暑客展括攸1 π疋於早層線路板,而線路基板1 1 0 定於電阻材二私此外’被動元件材料層130並不限 其詳述如後。 被動70件材料層130更可是電容材料, 【第二實施例】 玉里人式被:2 η不依照本發明第二較佳實施例之具有 電路板製程的剖面結構示意圖。請先參For example, the second circuit layer 122 has a first electrode 122a and a second electrode 122b of φ 13 °, which are respectively connected to the passive component material H. Materials such as nickel phosphate or other materials are material. It ’s important to note that when the conductive layer is made of steel, the conductor layer 120 (as shown in Figure 1B) is used for the time being. Ϊ = 130 (for example, nickel phosphate resistance material). Defective ϊ = Second money engraving process last name engraved the circuit layer 丨 22, in addition to the undercut phenomenon produced by the engraving liquid 20, acid can be avoided; the use of two metal circuits can be produced in both ways) Process, posterior etching solution diversion. The two-in-combination type can be included in the early-stage circuit board without the two pieces, and the circuit board 1 1 0 is determined by the resistance material. In addition, the passive component material layer 130 is not limited to the detailed description such as Rear. The passive 70 material layer 130 may be a capacitor material. [Second Embodiment] The Yuli quilt: 2 η is a schematic cross-sectional structure diagram of a circuit board manufacturing process that does not follow the second preferred embodiment of the present invention. Please refer first

第13頁 1236326Page 13 1236326

照圖2 A,第二實施例與第一實施例的不同之處在於:線路 基板310為多層線路板’而被動元件材料層34〇之材為電 容材料’其例如包括欽酸鎖或其他會受到酸性蝕刻液損傷 之電谷材料。線路基板310具有一第一導體層mo、一第二 導體層3 3 0、至少一被動元件材料層34〇與盘θ至少一 ^ 3 5 0,其中第一導體層32〇與第二導體層33μ系分別位於線曰 路基板31 〇之兩相對表面上。此外,第二導體層係覆蓋被 動元件材料層34 0與電極層350,而第二導體層具有至少一 元件區域3 3 0 a,其中被動元件材料層34〇係配置於第二 體層3 3 0之元件區域3 3 0 a上,且電極層26〇係覆蓋於被動 件材料層340及元件區域3 3 0 a上 請繼續參照圖2A,在第一導體層“ο上形成一第一 阻層410,並在第二導體層33〇上形成一第二光阻層42〇, 其中第一光阻層4 1 0與第二光阻層42 〇的方法例如貼附光阻 乾膜(d r y f i 1 m )或塗佈液態光阻。請參照圖2 B,對於第 一光卩且層410進行曝光製程與顯影製程,以形成一圖案化 第一光阻層412。接著,對於第一導體層412進行第一蝕刻 製程,以形成一第一線路層3 2 2。請參照圖2 C,之後,移 除圖案化第一光阻層412與第二光阻層42〇,並形成一第三 光阻層43 0覆蓋於第一線路層3 2 2上以及形成一第四光阻層 4^°覆蓋於第二導體層330 ,而第三光阻層430能夠避 ,二,路層3 2 2於隨後之蝕刻製程中產生損傷,其中形 喊^二光阻層43 0與第四光阻層440的方法例如貼附光阻乾 、〇 film)或塗佈液態光阻。再來,對於第四光阻層According to FIG. 2A, the second embodiment is different from the first embodiment in that the circuit substrate 310 is a multilayer circuit board and the material of the passive component material layer 34 is a capacitor material. Electric valley material damaged by acidic etching solution. The circuit substrate 310 has a first conductive layer mo, a second conductive layer 3 3 0, at least one passive element material layer 34 0, and a disk θ at least 1 3 5 0, wherein the first conductive layer 32 0 and the second conductive layer 33μ is located on two opposite surfaces of the line substrate 31 °. In addition, the second conductor layer covers the passive element material layer 340 and the electrode layer 350, and the second conductor layer has at least one element region 3 3 0 a, wherein the passive element material layer 34 0 is disposed on the second body layer 3 3 0 On the device region 3 3 0 a, and the electrode layer 26 0 covers the passive material layer 340 and the device region 3 3 0 a. Please continue to refer to FIG. 2A to form a first resistive layer on the first conductor layer “ο. 410, and a second photoresist layer 42o is formed on the second conductor layer 33o, where the method of the first photoresist layer 4 10 and the second photoresist layer 42 is, for example, attaching a photoresist dry film (dryfi 1 m) or coating a liquid photoresist. Referring to FIG. 2B, an exposure process and a development process are performed on the first photoresist layer 410 to form a patterned first photoresist layer 412. Then, for the first conductor layer 412 A first etching process is performed to form a first circuit layer 3 2 2. Referring to FIG. 2C, the patterned first photoresist layer 412 and the second photoresist layer 42 are removed, and a third light is formed. The resist layer 43 0 covers the first circuit layer 3 2 2 and forms a fourth photoresist layer 4 ^ ° and covers the second conductor layer 330 The third photoresist layer 430 can be avoided. Second, the road layer 3 2 2 is damaged in the subsequent etching process. Among them, the method of forming the second photoresist layer 430 and the fourth photoresist layer 440, such as attaching light. Dry-resistance, 0film) or coating liquid photoresist. Then, for the fourth photoresist layer

13454twf.ptd 第14頁 1236326 五、發明說明(9) 進行圖案化製程(例如 化第四光阻層442 (如圖2D所、;\衫製程),以形成一圖案 請參照圖2D,先對二所不)。 製程,而第二姓刻製程\吏|二f體層3 3 0進行一第二姓刻 銅溶液、氯化鐵溶液或1 =性蝕刻液(例如包括氯化 刻大部分之第二導體層3’30,%?使酸用性上:刻液。),以蝕 蝕刻製程並未將第二導 ^疋使用S夂性蝕刻液之第二 圖2E,然後,對於上述JJ3二餘刻出金屬線路。請參照 刻製程,以便於第二導體)成之結構物進行一第三蝕 其中第二蝕刻製程使用一 :3〇:二 液、氣化銨溶液或其他摘岑蝕刻液(例如阿摩尼亞溶 第三光阻層4 3 0與圖案化第田、驗性蝕刻液)。再來,除去 以形成具有埋入式被動元件Y且層442 (如圖2D所示), )^ ^^ 3 3 2 ^ ^ : 電極3 3 2b,其中笫一雷搞弟電極3 3 2a與一第二 少部分之電極層3 5 0及至少係連#接至電極層35(),而至 叠,以形成-埋入式電容元V。之第二電極3321)係相互重 雷好if由τ被動元件材料層340 (例如鈦酸鋇介 電材枓〃)谷易遭受酸性钱刻液損傷,因此對於第二導體層 進行兩階段蝕刻製程(先使用酸性蝕刻液製程,再使 鹼性蝕刻液製程),以形成苐二線路層'3 3 2,其結果除 了避免被動元件材料層340受到損傷外,更可提升電路板 3_0 0的電性品質。習知技術係同時對於第一導體層3 2 〇與第 一導體層330進行圖案化製程,因此容易對於被動元件材13454twf.ptd Page 14 1236326 V. Description of the invention (9) Perform a patterning process (for example, the fourth photoresist layer 442 (as shown in Figure 2D; \ shirt process) to form a pattern. Please refer to Figure 2D. The two do not). Process, and the second last engraving process \ 官 | 二 f 体 层 3 3 0 to perform a second last engraving of copper solution, ferric chloride solution or 1 = etching solution (such as the second conductor layer 3 including most of chlorination) '30,%? For acid use: etching solution.), The second guide using the etching solution of the second etching method is not shown in Figure 2E, and then the metal is etched to the above JJ3. line. Please refer to the engraving process to facilitate the third etching of the structure formed by the second conductor. The second etching process uses one: 30: two liquid, gasified ammonium solution or other etching solution (such as Armonia Dissolve the third photoresist layer 4 3 0 and the patterned first field, the etch solution). Then, remove to form a layer 442 with embedded passive element Y (as shown in FIG. 2D), ^ ^^ 3 3 2 ^ ^: the electrode 3 3 2b, of which the electrode 3 3 2a and the electrode 3 3 2a and A second small portion of the electrode layer 3 50 and at least a series connection are connected to the electrode layer 35 (), and then stacked to form a buried capacitor V. The second electrode 3321) is mutually heavy. If the passive component material layer 340 (such as barium titanate dielectric material) is easily damaged by acidic etching solution, a two-stage etching process is performed on the second conductor layer. (The acidic etching solution process is used first, and then the alkaline etching solution process is used) to form the second circuit layer '3 3 2'. As a result, in addition to avoiding damage to the passive element material layer 340, the electricity of the circuit board 3_0 0 can be increased. Sexual quality. The conventional technology is a patterning process for the first conductive layer 3 2 0 and the first conductive layer 330 at the same time.

13454twf.ptd 第15冑 1236326 五、發明說明(10) 料 體 層340造成相傷。所以,力楚_ 層3 2 0進行圖案化製程(冰:實施例中先對於第一導 ),再對於第二導體厚又有接觸被動元件材料層340 ' 層3 3 0進行圖荦化製斧呈 件材料層34 0 ),以提高拽Λ 茶化衣程(接觸被動元 值得注意的是本V里明入;\?皮動元件的、品質。 1 Α與圖2 Α所繪示之結構, 女路板製程並不限定用於圖 或340之線路層均可先採用/\有接觸被動元件材料層1 30 蝕刻液製程,以提高埋入★文^刻液製程,再使用鹼性 本發明並不限定用於製作^ ^ ,70件的製程良率。此外, 件,更可用於製作埋入i雷式電阻兀件或埋入式電容元 綜上所述,本發明tit元件。 程具有下列優點: ,、有埋入式被動兀件之電路板製 一、相較於習知製@ 之電路板製程採用先酸性铋=發明之具有埋入式被動元件 蝕刻製程’以形成接=t ^刻液與後鹼性蝕刻液之兩階段 動元件材料層不會被酸材料層之線路層,因此被 被動元件的製程良率 蝕刻液所損傷,進而提高埋入式 一、本發明所採用夕iL私 兩階段#刻製程更可3 酸性姓刻液與後驗性餘刻液之 線路層,其結果不僅 ^ ^作任何接觸被動元件材料層之 動元件材料層遭受損傷。所需之線路層,更可以避免被 料層第一導體層(沒有接觸被動元件材 元件材料層? ί = 1 =第二導體層(有接觸被動 % ^又餘刻製程,其結果能夠改善被動13454twf.ptd Section 15 胄 1236326 V. Description of the invention (10) Material layer 340 caused phase damage. Therefore, Li__ layer 3 2 0 is patterned (Ice: the first conductor in the embodiment), and then the second conductor is thick and contacts the passive component material layer 340 'layer 3 3 0. Axe submits the material layer 34 0) to improve the dragging process of tea (the contact with passive elements is noteworthy in this document; the quality of the leather moving elements. 1 Α and Figure 2 Α Structure, the circuit board manufacturing process is not limited to the circuit layer used in the diagram or 340. The contact passive component material layer 1 30 etching solution process can be used first to improve the embedding process, and then use alkaline. The present invention is not limited to the manufacturing yield of 70 pieces. In addition, the pieces can also be used to make embedded i-type resistor elements or embedded capacitor elements. As described above, the tit element of the present invention. The process has the following advantages: 1. Circuit board manufacturing with embedded passive components. 1. Compared with the conventional circuit board manufacturing process, the use of the first acidic bismuth = invented embedded etching with embedded passive components' to form the connection. = t ^ The two-stage moving element material layer of the etching solution and the post-alkali etching solution will not be lined by the acid material layer Layer, which is damaged by the yield rate etching solution of the passive component, thereby improving the embedding method. The circuit of the present invention, which is used in the present invention, is even more acidic. As a result, not only does any moving element material layer contact the passive element material layer suffer damage. The required circuit layer can also avoid the first conductor layer of the material layer (no contact with the passive element material element material layer? Ί = 1 = the second conductor layer (% passive with contact) ^ and the remaining process, the result can improve the passive

13454twf.ptd 第16頁 1236326 五、發明說明(11) 元件材料層被酸性蝕刻液損傷的情形。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明’任何热習此技藝者’在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。13454twf.ptd Page 16 1236326 V. Description of the Invention (11) The component material layer is damaged by the acidic etching solution. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention to 'any enthusiast who is skilled in this art'. Without departing from the spirit and scope of the present invention, some modifications and retouching can be made. The scope of protection of the invention shall be determined by the scope of the attached patent application.

13454twf.ptd 第17頁 1236326 圖式簡單說明 圖1 A至圖1 C係繪示依照本發明第一較佳實施例之具有 埋入式被動元件之電路板製程的剖面結構示意圖。 圖2 A至圖2 E係繪示依照本發明第二較佳實施例之具有 埋入式被動元件之電路板製程的剖面結構不意圖。 【圖式標示說明】 100、300 ··具有埋入式被動元件之電路板 1 1 0、3 1 0 :線路基板 1 2 0 :導體層 120a、330a :元件區域 1 2 2 :線路層 122a、332a ··第一電極 122b、332b :第二電極 1 3 0、3 4 0 :被動元件材料層 210 光 阻 層 212 圖 案 化 光 阻 層 320 第 _ 一 導 體 層 322 第 _ 一 線 路 層 330 第 二 導 體 層 332 第 二 線 路 層 350 電 極 層 410 第 一 光 阻 層 412 圖 案 化 第 一 光阻層 420 第 二 光 阻 層 430 第 三 光 阻 層13454twf.ptd Page 17 1236326 Brief Description of Drawings Figures 1A to 1C are schematic cross-sectional structures of a circuit board with embedded passive components according to the first preferred embodiment of the present invention. 2A to 2E are schematic cross-sectional structures of a circuit board manufacturing process with embedded passive components according to a second preferred embodiment of the present invention. [Schematic description] 100, 300 ·· Circuit board with embedded passive components 1 1 0, 3 1 0: Circuit board 1 2 0: Conductor layer 120a, 330a: Element area 1 2 2: Circuit layer 122a, 332a ·· First electrodes 122b, 332b: Second electrodes 1 3 0, 3 4 0: Passive element material layer 210 Photoresistive layer 212 Patterned photoresistive layer 320 First conductive layer 322 First wiring layer 330 Second Conductor layer 332 second circuit layer 350 electrode layer 410 first photoresist layer 412 patterned first photoresist layer 420 second photoresist layer 430 third photoresist layer

13454twf.ptd 第18頁 1236326 圖式簡單說明 4 4 0 ··第四光阻層 4 4 2 ··圖案化第四光阻層 IIIH1 第19頁 13454twf.ptd13454twf.ptd Page 18 1236326 Simple illustration of the diagram 4 4 0 · 4th photoresist layer 4 4 2 · · Patterned fourth photoresist layer IIIH1 Page 19 13454twf.ptd

Claims (1)

Ϊ236326Ϊ236326 種具有埋入式被動元件之電路板製程,包括: 提供一線路基板,其具有一導體層與至少一被動元 ^料層’其中該導體層係位於該線路基板之一表面,且 -體層係覆蓋該被動元件材料層,而該導體層具有至少 =件區域’且該被動元件材料層係配置於該導體層之該 件區域上; 件該 —— 元 程, 刻液 之電 鐵溶 之電 化銨 之電 之電 性隔 且該 之電 形成一圖案化光阻層於該導體層上;以及 對於該導體層進行一第一蝕刻製程與一第二蝕刻製 以形,一線路層,其中該第一蝕刻製程使用一酸性蝕 ’而該第二蝕刻製程使用一鹼性蝕刻液。 •如T請專利範圍第1項所述之具有埋入式被動元件 路板製程’其中該酸性蝕刻液包括氣化銅溶液與氯化 3 ·如申 路板製 溶液其 4.如申 路板製 5 ·如申 路板製 絕之一 被動元 6 ·如申 路板製 請專 程, 中之請專 程,請專 程,第二件材請專程, 利範圍 其中該 〇 利範圍 其中該 利範圍 其中該 電極, 料層之 利範圍 其中該 第1項所述之具有埋入式被動元件 鹼性蝕刻液包括阿摩尼亞溶液與氣 第1項所述之具有埋入式被動元件 導體層之材質為銅。 第1項所述之具有埋入式被動元件 線路層更具有一第一電極及相互電 ί ί連接至該被、動元件材料層, 材質包括一電阻材料。 ί)且項Λ述上具有埋入式被動元件 電阻材枓包括磷酸鎳。A circuit board manufacturing process with embedded passive components includes: providing a circuit substrate having a conductor layer and at least one passive element layer, wherein the conductor layer is located on a surface of the circuit substrate, and Cover the passive element material layer, and the conductor layer has at least = piece area 'and the passive component material layer is arranged on the piece area of the conductor layer; The electrical isolation of the ammonium electricity and the electricity forming a patterned photoresist layer on the conductor layer; and performing a first etching process and a second etching process on the conductor layer to form a circuit layer, wherein the The first etching process uses an acidic etching and the second etching process uses an alkaline etching solution. • As described in item 1 of the patent scope, a process for slabs with embedded passive components, where the acidic etching solution includes a vaporized copper solution and chlorinated 3 System 5 · If the road board system is one of the passive elements 6 · If the road board system is required, please make a special trip, if you are in the middle, please make a special trip, please make a special trip, if the second piece of material, please make a special trip. The benefits of the electrode and the material layer, wherein the alkaline etching solution with the embedded passive element described in the first item includes the Armonia solution and the material with the conductive layer of the embedded passive element described in the first item. For copper. The circuit layer with an embedded passive component described in item 1 further has a first electrode and is electrically connected to the passive component material layer, and the material includes a resistive material. (1) The item Λ has embedded passive elements. The resistor material includes nickel phosphate. 1236326 六、申請專利範圍 7. 如申請專利範圍第1項所述之具有埋入式被動元件 之電路板製程,其中該線路基板更包括至少一電極層,其 位於該被動元件材料層及該元件區域上,且該線路層更具 有一第一電極與一第二電極,其中該第一電極係連接至該 電極層,而至少部分之該電極層及至少部分之該第二電極 係相互重疊,且該被動元件材料層之材質包括一電容材 料。 8. 如申請專利範圍第7項所述之具有埋入式被動元件 之電路板製程,其中該電容材料包括鈦酸鋇。 9 .如申請專利範圍第1項所述之具有埋入式被動元件 之電路板製程,其中形成該圖案化光阻層於該導體層上之 方法包括先形成一光阻層於該導體層上,再對於該光阻層 進行曝光製程與顯影製程。 1 0.如申請專利範圍第9項所述之具有埋入式被動元件 之電路板製程,其中形成該光阻層於該導體層上之方法包 括塗佈液態光阻與貼附光阻乾膜其中之一。 1 1.如申請專利範圍第1項所述之具有埋入式被動元件 之電路板製程,其中對於該導體層進行該第一蝕刻製程與 該第二蝕刻製程之後更包括移除該圖案化光阻層。 12. —種具有埋入式被動元件之電路板製程,包括: 提供一線路基板,其具有一第一導體'層、一第二導體 層與至少一被動元件材料層,其中該第一導體層與該第二 導體層係分別位於該線路基板之兩相對表面上,而該第二 導體層係覆蓋該被動元件材料層,且該第二導體層具有至1236326 6. Scope of patent application 7. The process of the circuit board with embedded passive components described in item 1 of the scope of patent application, wherein the circuit substrate further includes at least one electrode layer located on the passive component material layer and the component Area, and the circuit layer further has a first electrode and a second electrode, wherein the first electrode system is connected to the electrode layer, and at least part of the electrode layer and at least part of the second electrode system overlap each other, The material of the passive element material layer includes a capacitor material. 8. The process of manufacturing a circuit board with an embedded passive component as described in item 7 of the scope of patent application, wherein the capacitor material includes barium titanate. 9. The process of manufacturing a circuit board with an embedded passive component as described in item 1 of the scope of patent application, wherein the method of forming the patterned photoresist layer on the conductor layer includes first forming a photoresist layer on the conductor layer Then, an exposure process and a development process are performed on the photoresist layer. 10. The process for manufacturing a circuit board with an embedded passive component as described in item 9 of the scope of the patent application, wherein the method of forming the photoresist layer on the conductor layer includes applying a liquid photoresist and attaching a photoresist dry film one of them. 1 1. The process for manufacturing a circuit board with an embedded passive component as described in item 1 of the scope of patent application, wherein the first etching process and the second etching process are performed on the conductor layer and the patterned light is further removed. Barrier layer. 12. A process for manufacturing a circuit board with embedded passive components, including: providing a circuit substrate having a first conductor 'layer, a second conductor layer, and at least one passive component material layer, wherein the first conductor layer And the second conductor layer are respectively located on two opposite surfaces of the circuit substrate, and the second conductor layer covers the passive element material layer, and the second conductor layer has 13454twf.ptd 第21頁 1236326 六、申請專利範圍 少一元件區域,而該被動元件材料層係配置於該第二導體 層之該元件區域上; 形成一第一光阻層與一第二光阻層分別覆蓋於該第一 導體層與該第二導體層上; 圖案化該第一光阻層; 對於該第一導體層進行一第一蝕刻製程,以形成一第 一線路層; 移除圖案化之該第一光阻層與該第二光阻層; 形成一第三光阻層與一第四光阻層分別覆蓋於該第一 線路層上與該第二導體層上; 圖案化該第四光阻層; 對於該第二導體層進行一第二蝕刻製程與一第三蝕刻 製程,以形成一第二線路層,其中該第二蝕刻製程使用一 酸性蝕刻液,而該第三蝕刻製程使用一鹼性蝕刻液。 1 3.如申請專利範圍第1 2項所述之具有埋入式被動元 件之電路板製程,其中該酸性蝕刻液包括氣化銅溶液與氣 化鐵溶液其中之一。 ' 1 4.如申請專利範圍第1 2項所述之具有埋入式被動元 件之電路板製程,其中該鹼性蝕刻液包括阿摩尼亞溶液與 氣化錄溶液其中之一。 1 5.如申請專利範圍第1 2項所述之具有埋入式被動元 件之電路板製程,其中該第一導體層與該第二導體層之材 質為銅。 1 6.如申請專利範圍第1 2項所述之具有埋入式被動元13454twf.ptd Page 21 1236326 6. The scope of the patent application is one element area less, and the passive element material layer is arranged on the element area of the second conductor layer; forming a first photoresist layer and a second photoresist Layers respectively covering the first conductor layer and the second conductor layer; patterning the first photoresist layer; performing a first etching process on the first conductor layer to form a first circuit layer; removing the pattern Forming the first photoresist layer and the second photoresist layer; forming a third photoresist layer and a fourth photoresist layer to cover the first circuit layer and the second conductor layer respectively; patterning the A fourth photoresist layer; performing a second etching process and a third etching process on the second conductor layer to form a second circuit layer, wherein the second etching process uses an acidic etchant and the third etching The process uses an alkaline etchant. 1 3. The process for manufacturing a circuit board with embedded passive components as described in item 12 of the scope of patent application, wherein the acidic etching solution includes one of a vaporized copper solution and a vaporized iron solution. '1 4. The process for manufacturing a circuit board with embedded passive components as described in item 12 of the scope of patent application, wherein the alkaline etching solution includes one of an Armonia solution and a gasification solution. 1 5. The process for manufacturing a circuit board with embedded passive components as described in item 12 of the scope of patent application, wherein the material of the first conductor layer and the second conductor layer is copper. 16. With embedded passive element as described in item 12 of the scope of patent application 13454twf.ptd 第22頁 1236326 六、 申請專利範圍 件之電路板製程,其中該第二線路層更具有一第一電極及 相互電性隔絕之一第二電極,其分別連接至該被動元件材 料層,且該被動元件材料層之材質包括一電阻材料。 1 7 ·如申,請專利範圍第丨6項所述之具有埋入式被動元 件之電路板製a程’其中該電阻材料包括磷酸鎳。 如^申專利範圍第1 2項所述之具有埋入式被動元 其係位於該被動元^ Z該線路基板更包括至少一電極層, 路層更具有一第一料層及該元件區域上,且該第二線 連接至該電極層,而δ與一第二電極’其中該第一電極係 第二電極係相互重聂^少部分之該電極層及至少部分之該 電容材料。 & ’且該被動元件材料層之材質包括一 1 9 ·如申請專利 件之電路板製程,其園第18項所述之具有埋入式被動元 2 〇 ·如中請專利、〜中該電容材料包括鈦酸鋇。 電路板製程,I範園第12項所述之具有埋入式被動元 光卩且層之方法包^中圖案化該第一光阻層與圖案化該第 件> 2 1 ·如申請專利t曝光製程與顯影製程。 屉之電略板製程,固第12項所述之具有埋入式被動元 pi你讀第三光阻層i i形成該第一光阻層、該第二光阻 、貝占附光阻乾犋其$第四光阻層之方法包括塗佈液態光 件+ 2 2 ·如申請專利銘^ 、 製電路板製程,其園第12項所述之具有埋入式被動元 與該第三蝕刻^妇對於該第二導體層進行該第二蝕刻 之後更包括移除該圖案化之該第四13454twf.ptd Page 22 1236326 6. The process of applying for a circuit board for a patent application, wherein the second circuit layer further has a first electrode and a second electrode electrically isolated from each other, which are respectively connected to the passive component material layer The material of the passive element material layer includes a resistive material. 1 7 · If applied, please refer to the process of manufacturing a circuit board with embedded passive components as described in item 丨 6 of the patent, wherein the resistive material includes nickel phosphate. The embedded passive element described in item 12 of the patent application scope is located on the passive element. The circuit substrate further includes at least one electrode layer, and the circuit layer further has a first material layer and the element area. And the second line is connected to the electrode layer, and δ and a second electrode, wherein the first electrode system and the second electrode system mutually overlap a small portion of the electrode layer and at least a portion of the capacitor material. & 'And the material of the passive component material layer includes a 1 9 · As a patented circuit board process, it has embedded passive elements as described in item 18 of the park. The capacitor material includes barium titanate. Circuit board manufacturing process, the method of patterning the first photoresistive layer and patterning the first piece in a method package with an embedded passive element and a layer described in Item 12 of I Fan Yuan > 2 1 · If applying for a patent t exposure process and development process. The process of the electrical circuit board of the drawer is based on the embedded passive element pi described in Item 12. You can read the third photoresist layer ii to form the first photoresist layer, the second photoresist, and the photoresist. The method of the fourth photoresist layer includes coating a liquid light member + 2 2. As described in the patent application ^, the circuit board process, the embedded passive element and the third etching described in item 12 of the park ^ After performing the second etching on the second conductor layer, the method further includes removing the patterned fourth 第23頁 1236326 六、申請專利範圍 光阻層與該第三光阻層。 第24頁 13454twf.ptdPage 23 1236326 6. Scope of patent application Photoresist layer and the third photoresist layer. 13454twf.ptd
TW93116298A 2004-06-07 2004-06-07 Fabricating process of circuit board with embedded passive component TWI236326B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107743341A (en) * 2017-09-28 2018-02-27 衢州顺络电路板有限公司 Improve the printed wiring board and its manufacture method of embedded resistors reliability
CN111417256A (en) * 2020-03-18 2020-07-14 浙江万正电子科技有限公司 Etching process of planar resistive film of embedded planar resistive circuit board

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111642075A (en) * 2020-07-03 2020-09-08 广东兴达鸿业电子有限公司 Manufacturing method of single-sided resistor circuit board and manufacturing method of multilayer PCB

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107743341A (en) * 2017-09-28 2018-02-27 衢州顺络电路板有限公司 Improve the printed wiring board and its manufacture method of embedded resistors reliability
CN111417256A (en) * 2020-03-18 2020-07-14 浙江万正电子科技有限公司 Etching process of planar resistive film of embedded planar resistive circuit board

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