TWI231588B - Semiconductor device package with a heat spreader - Google Patents

Semiconductor device package with a heat spreader Download PDF

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Publication number
TWI231588B
TWI231588B TW092132289A TW92132289A TWI231588B TW I231588 B TWI231588 B TW I231588B TW 092132289 A TW092132289 A TW 092132289A TW 92132289 A TW92132289 A TW 92132289A TW I231588 B TWI231588 B TW I231588B
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Taiwan
Prior art keywords
heat sink
substrate
package structure
wires
patent application
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TW092132289A
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English (en)
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TW200518299A (en
Inventor
Yaw-Yuh Yang
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Advanced Semiconductor Eng
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Priority to TW092132289A priority Critical patent/TWI231588B/zh
Priority to US10/991,300 priority patent/US7122911B2/en
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Publication of TWI231588B publication Critical patent/TWI231588B/zh
Publication of TW200518299A publication Critical patent/TW200518299A/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

1231588 柒、指定代表圖： (一) 本案指定代表圖為：第（2 )圖。 (二) 本代表圖之元件代表符號簡單說明： 2本發明較佳實施例之封裝結構 . 21基板 22半導體晶片 23導線 231導線之最高點 24散熱片 241散熱片本體 2411凹槽 242支撐部 243環狀底部 2431内環緣 2432突起 25封膠 26錫球 捌、本案若有化學式時，請揭示最能顯示發明特徵的化學式： 玖、發明說明： 【發明所屬之技術領域】 本發明係關於一種半導體封裝結構，特別是一種具有散 O:\88\88666.DOC 4 1231588 熱片之封裝結構。 【先前技術】 參考圖1，習用之封裝結構1包括：一基板U、一半導 月豆日日片12、複數條導線13、一散熱片14、一封膠15及 複數個錫球16。該基板11具有一上表面及一下表面。該 半導體晶片12係附著於該基板11之上表面。該等導線 13係用以電氣連接該基板11及該半導體晶片12。該散熱 片14包括一散熱片本體ι41及一支撐部ι42，該散熱片 本體141係為一平面，其上表面係為一外露表面，用以於 封裝完成後暴露於空氣中以作為散熱途徑。 該支撐部142係由該散熱片本體141之最外緣向外向下 延伸，且與該基板11上表面相接觸以形成一容置空間， 戎容置S間係用以罩住該半導體晶片丨2及該等導線丨3。 該封膠1 5係包覆該基板11、該半導體晶片丨2、該等導線 13以及該散熱片14 ’且暴露出該散熱片本體ι41之外露 表面。該等錫球16係形成於該基板丨丨之下表面，用以供 該半導體晶片12藉之與外界裝置電氣連接。 此種習用封裝結構1之缺點如下所述，由於該等導線 13係為彎曲之曲線，因此在其轉折的地方會有一最高處 131，當該半導體晶片12之高度較高或是該散熱片支撐 142部之高度較低時，該散熱片本體丨41之下表面很容易 接觸到該等導線13之最高處131，而造成短路（sh〇n circuit);或者，該散熱片14對該等導線u的下壓會破 壞該等導線13與該半導體晶片12或基板丨丨間之連接， O:\88\88666.DOC 5 1231588 而造成斷路（〇pen)。 因此，有必要提供一創新且富進步性的半導體封 構，以解決上述問題。 【發明内容】 本發明之主要目的係於散熱片下表面相對於導線之最 高處開設有-凹槽，以防止該等導線接觸到該散熱片。 本發月之另目的係提供一種具有散熱片之封裝結 構’包括：一基板、一半導體晶片、複數條導線、—散熱
片、一封膠及複數個導電元件。該基板具有-上表面及I 下表面4半導晶片係附著於該基板之上表面。該等導 線係用以電氣連接該基板及該半導體晶片，每一該等導線 具有一最高處。 m散熱片係包括-散熱片本體及_支撐部，該散熱片本 體具有-i表面及-下表面，該下表面相對於該等導線之 最高處開設有-凹槽，以防止該等導線接觸到該散熱片本 體，該支撐部係由該散熱片本體向外向下延伸，且與該基 板上表面相接觸以形成一容置空間，該容置空間係用以罩 住該半導體晶片及該等導線。 該封膠係包覆該基板、該半導體晶片、該散熱片及該等 導線，且暴露出該散熱片本體之上表面。該等導電元件係 形成於孩基板之下表面，以供該半導體晶片藉之與外界裝 置電氣連接。 【實施方式】 參考圖2 ,顯示本發明較佳實施例之封裝結構之剖面示 ；\88\88666.DOC 5 -6 - 1231588
意圖’該封裝結構2包括：一基板21、一半導體晶片L 複數條導線23、—散熱片24、一封膠25及複數個導電元 件〇 二板21具有一上表面及一下表面。該半導體晶片u 了附著於该基板21之上表面。該等導線23係用以電氣連 矣以基板21及料導體晶片22，該等導線23係為彎曲 〈曲、、泉，因此在其轉折的地方會有一最高處231。在本實 施例中，該等導線23係為金線。 该散熱片24係用以罩住該半導體晶片22及該等導線 23+邊封膠25係用以包覆該基板21、該半導體晶片22、 該等導線23以及該散熱片24，且暴露出該散熱片以之 上側。该等導電元件係用以連接於該基板2丨之下表面， 以供该半導體晶片22藉之與外界裝置電氣連接，在本實 施例中，該等導電元件係為錫球26。 同時參考圖3,其顯示本發明較佳實施例中散熱片之仰 視圖。該散熱片24包括一散熱片本體241、一支撐部242 及一¥狀底部243，該散熱片本體241係為一平板狀結 構，其具有一上表面及一下表面。該上表面係用以頂抵上 模具（圖中未示），因此封裝完成後，該上表面可暴露於 芝氣中，以作為散熱途徑。該下表面相對於該等導線23 之取咼處23 1開設有一凹槽2411，以防止該等導線23接 觸到該散熱片本體241。該凹槽2411係為不貫穿該散熱 片本體241之盲孔，以避免降低該散熱片24之散熱效率。 在本實施例中，該凹槽2411之截面係為梯形，然而在其 O:\88\88666.DOC 5 1231588 他應用中，該凹槽2411之截面可以為矩形、三角形或是 半圓形等。 該支撐部242係由該散熱片本體241向外向下延伸，且 與該基板21上表面相接觸以形成一容置空間，該容置空 間係用以罩住該半導體晶片22及該等導線23。 該環狀底部243係為一具有一透孔之片狀結構，其具有 一内環緣2431以定義該透孔，即該透孔之輪廓係由該内 環緣2431所界定，而該支撐部242之下緣係連接該内環 緣2431。該環狀底部243之下方具有複數個突起2432， 該等突起2432係接觸該基板21之上表面。 上述實施例僅為說明本發明之原理及其功效，並非限制 本發明，因此習於此技術之人士對上述實施例進行修改及 變化仍不脫本發明之精神。本發明之權利範圍應如後述之 申請專利範圍所列。 【圖式簡單說明】 圖1顯示習用之封裝結構之剖面圖； 圖2顯示本發明較佳實施例之封裝結構之剖面示意 圖；及 圖3顯不本發明較佳實施例中散熱片之仰視圖； 【圖式元件符號說明】 1習用之封裝結構 11基板 12半導體晶片 13導線 O:\88\88666.DOC 5 1231588 1 3 1導線之最高點 14散熱片 141散熱片本體 142支撐部 15封膠 16錫球 2本發明較佳實施例之封裝結構 21基板 22半導體晶片 23導線 231導線之最高點 24散熱片 241散熱片本體 2411凹槽 242支撐部 243環狀底部 2431内環緣 2432突起 25封膠 26錫球 O:\88\88666.DOC5

Claims (1)

1231588 拾、申請專利範固： 1. 一種具有散熱片之封裝結構，包括： 一基板，具有一上表面及一下表面； 一半導體晶片，附著於該基板之上表面； 複數條導線，用以電氣連接該基板及該半導體晶 片’母一該等導線具有一最高處； 一散熱片，其包括一散熱片本體及一支撐部，該散 熱片本體具有一上表面及一下表面，該下表面相對於 该等導線之最高處開設有一凹槽，以防止該等導線接 觸到該散熱片本體，該支撐部係由該散熱片本體向外 向下延伸，且與該基板上表面相接觸以形成一容置空 間，該容置空間係用以罩住該半導體晶片及該等導線； 一封膠，其包覆該基板、該半導體晶片、該散熱片 及該等導線’且暴露出該散熱片本體之上表面；及 複數個導電元件，係形成於該基板之下表面，以供 該半導體晶片藉之與外界裝置電氣連接。 2·如申請專利範圍第1項之封裝結構，其中，該散熱片 本體係為一平板狀結構。 3. 如申請專利範圍第1項之封裝結構，其中，該散熱片 更包括一環狀底部，該環狀底部係為一具有一透孔之 片狀結構，其具有一内環緣以定義該透孔，該支撐部 之下緣係連接該内環緣，該環狀底部之下方具有複數 個突起，該等突起係接觸該基板之上表面。 4. 如申請專利範圍第1項之封裝結構，其中，該等導電 O:\88\88666.DOC 6 _ 1 1231588 元件係為錫球。 5. 如申請專利範圍第1項之封裝結構，其 係為金線。 6. 如申請專利範圍第1項之封裝結構，其 截面係為矩形。 7. 如申請專利範圍第1項之封裝結構，其 截面係為三角形。 8. 如申請專利範圍第1項之封裝結構，其 截面係為梯形。 9. 如申請專利範圍第1項之封裝結構，其 截面係為半圓形。 10. 如申請專利範圍第1項之封裝結構，其 為不貫穿該散熱片本體之盲孔。 中，該等導線 中，該凹槽之 中，該凹槽之 中，該凹槽之 中，該凹槽之 中，該凹槽係 O:\88\88666.DOC 6
TW092132289A 2003-11-18 2003-11-18 Semiconductor device package with a heat spreader TWI231588B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW092132289A TWI231588B (en) 2003-11-18 2003-11-18 Semiconductor device package with a heat spreader
US10/991,300 US7122911B2 (en) 2003-11-18 2004-11-17 Heat spreader and semiconductor device package having the same

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Application Number Priority Date Filing Date Title
TW092132289A TWI231588B (en) 2003-11-18 2003-11-18 Semiconductor device package with a heat spreader

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TWI231588B true TWI231588B (en) 2005-04-21
TW200518299A TW200518299A (en) 2005-06-01

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US (1) US7122911B2 (zh)
TW (1) TWI231588B (zh)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060091542A1 (en) * 2004-11-03 2006-05-04 Broadcom Corporation Flip chip package including a heat spreader having an edge with a recessed edge portion and method of making the same
US7787250B2 (en) * 2007-12-28 2010-08-31 Universal Scientific Industrial (Shanghai) Co., Ltd. Metallic cover of miniaturization module
JP5171549B2 (ja) * 2008-10-30 2013-03-27 ルネサスエレクトロニクス株式会社 電子装置
JP2012033559A (ja) 2010-07-28 2012-02-16 J Devices:Kk 半導体装置
US8952523B2 (en) * 2010-09-27 2015-02-10 Cisco Technology, Inc. Integrated circuit package lid configured for package coplanarity
US8476115B2 (en) * 2011-05-03 2013-07-02 Stats Chippac, Ltd. Semiconductor device and method of mounting cover to semiconductor die and interposer with adhesive material
EP2608258A1 (en) * 2011-12-20 2013-06-26 STMicroelectronics (Grenoble 2) SAS A package
US8937376B2 (en) 2012-04-16 2015-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor packages with heat dissipation structures and related methods
US8704341B2 (en) 2012-05-15 2014-04-22 Advanced Semiconductor Engineering, Inc. Semiconductor packages with thermal dissipation structures and EMI shielding
US8836110B2 (en) * 2012-08-31 2014-09-16 Freescale Semiconductor, Inc. Heat spreader for use within a packaged semiconductor device
US9293428B2 (en) * 2012-12-06 2016-03-22 Intel Corporation Low profile heat spreader and methods

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5289039A (en) * 1988-02-05 1994-02-22 Citizen Watch Co., Ltd. Resin encapsulated semiconductor device
US5977626A (en) * 1998-08-12 1999-11-02 Industrial Technology Research Institute Thermally and electrically enhanced PBGA package
TW452196U (en) * 2000-08-17 2001-08-21 Walsin Advanced Electronics Improved structure of heat sink having integrated circuit device of plastic ball grid array type

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