TWI231025B - Method for plating metal layer over pads on substrate for semiconductor package - Google Patents

Abstract

A method for plating a metal layer over pads on a substrate for a semiconductor package is proposed. The substrate is formed with a plurality of pads on at least a surface thereof, and a conductive film is formed on the surface of the substrate. A first resist layer is applied over the conductive film and formed with a plurality of through holes penetrating the first resist layer and the conductive film, for exposing the pads on the substrate to the atmosphere, which a portion of the conductive film is remained within the through hole. Then, a second resist layer is applied over the first resist layer to cover the remaining conductive film exposed within the through hole. After a metal layer such as Ni/Au is deposited on the pads by a plating method, the second resist layer, first resist layer and the remaining conductive film underneath the resist layer are removed. Finally, a solder mask is applied on the surface of the substrate and formed with a plurality of openings for exposing the pads with the plating metal layer thereon; this can eliminate drawbacks induced by conventional chemical Ni/Au deposition, and effectively increase routing area of the substrate without having to form plating traces on the substrate.

Description

1231025 V. Description of the invention (1)

[Technical field to which the invention belongs] The present invention relates to an electroplated metal layer method for electrically connecting pads of a semiconductor package substrate, and more particularly to a method in which a nickel / gold metal layer is provided on the exposed surface of a pad of a substrate for a chip package. Electrical connection pad with good electrical connection quality. '' [Prior art]

Due to the rapid advancement of related technologies in the electronics industry, along with the trend of lightening electronic products': 2Packaging industry also faces many key points in the manufacturing process, among which the surface of the substrate used for bulk packaging is formed with a majority of conductive materials composed of materials, for example. An electrical pad formed by the circuit and extending from it is used to transmit electronic signals or power. At the same time, a metal layer such as nickel / gold (Ni / Au) is usually formed on the exposed surface of the electrical pad. Provides conductive connection (such as the gold wire or solder ball and the chip or circuit board's electrical connection ') can also avoid body oxidation due to external environmental influences. The electrical connection pads can be used for semiconductor chip sealing U chip packaging When punching a gold wire, the wire between the gold wire and the substrate is made of metal gold, which facilitates the connection between the two ... For example, the electrical consumption of the package substrate and the circuit board: Ball pad · Save

Nickel / gold metal layer to provide white recognition ^ 蛰 The outer surface of the external circuit has 塾 (usually metallic copper) which is difficult to restore the electrical gold wires, solder balls, etc. in the nickel / gold metal layer. : Ring J affects and oxidizes to improve the quality of electrical connection in the know-how. The method includes the formation of a nickel / gold metal layer on the surface of the chemical nickel / gold connection ^ "Jin Yiyun and the electroplated nickel / gold process, etc." ▲

1231025 V. Description of the invention (2) The chemical nickel / gold process should be used for soldering with poor solderability or strong noise at 5 o'clock. For example, ore jumping and black pads are due to insufficient nickel C in the process. And other issues. All the operating conditions for the jump plating problem have been prepared to reduce :: interest-to-period reproduction, even if the phenomenon makes the subsequent full helmet. The current power and mining capacity is not easy to full plating and the formation of the black pad problem is beneficial to the plating In the above case, the copper exposure phenomenon appears; when the recording surface is ί = ί oxygen, the surface is undergoing immersion gold replacement # Ρ 彳, Υ _ I 4 α ^ reaction, and the large volume of gold atoms does not have the battery effect It is not motivated, but 2 'Xi &, & bottom nickel continues to be oxidized and aged by the chemical soldiers, so that nickel rust that does not smelt away under the gold surface continues. FREE 裎 一跳 之 跳 Permanent toilet # 0日 ^ ,, only accumulated, the above chemical nickel / gold system, connected? The problem of J-dependence that the peeling and peeling cannot be electrically connected to each other.豕 豕 ϋ ϋ: Learn about the gold process problem, and another way to form a nickel / gold metal layer on the surface of the electrical connection pad is to use a driver: as shown in the figure below, the conventional nickel plating / Gold's manufacturing process is in the shape of the packaging substrate with f pad 10! In addition, a plurality of electroplated wires " are provided on the top, and the nickel / gold metal I 12 electric ore is connected to the electricity through the electroplated wire U]. Connection: No: 2: A large number of electric ore wires 11 must be laid in advance for electroplating Not only does it occupy the wiring wiring area of the package substrate, which reduces the area available for wiring, but also generates noise due to the excess electrical conductivity and antenna effect during high frequency use. ”-In order to solve the above-mentioned problems of the electroplated nickel / gold process, another way of GPP (G01d pattern platlng), such as the first to 2D diagrams =

1231025 V. Description of the invention (3) Shows / has been used by the general industry. In this process, first, a conductive layer 21 (shown in FIG. 2A) is formed on the upper and lower surfaces of a substrate 2 for carrying a semiconductor, and a plurality of via holes (PTH) or blind holes are formed in the substrate 2. Hole (, Bllnd via) (not shown); then on the conductive layer 21 of the substrate = a resistance layer iayer 22 is covered outside the area where the lines are formed, and $ electrical f 2 1 is the current conducting path; and A nickel / gold metal layer 23 is electroplated (as shown in FIG. 2B) at the place where the conductive I 2 丨 is not covered by the resistance layer 22; thereafter, the resistance layer 22 is removed, leaving only the nickel / gold Metal layer 23 (as shown in Figure 2 (: Figure Ξ υ′ΛΠrecord / gold metal | 23 as a mask,% by etching, etc. = Yi; Yiquan out of Λ road layer 24, butterfly). Cheng An is plated with nickel / Gold metal layer 23 (as shown in Figure 2D, although this conventional technology does not require the entire wiring layer (including electrical connection pads = cold, cold, and friendly, but a nickel / gold metal layer is covered on the substrate, and The surface of all nickel (V) circuits is covered with a substantial increase in production costs; furthermore, the raw material of the f metal layer is very expensive, and the conductive surface of the circuit layer is covered with nickel / gold. A fresh-resistant layer of Risi Temple is easy to be found because the materials of the two are special and poor, and the subsequent combination of on / board covering results in a lack of reliability. 未 It has not reached stability. Therefore, how to use a simple process, w ^ ^ ta ^ ^ ^ ^ Know the options of electroplating nickel / gold process 1 ° Reliance on risk, or practice has become a lesson that is urgently needed to solve; money wire and cost waste, [Inventive Content]

17046. ptd $ 9 page 1231025 ^^ ----------------------------------------- --- V. Description of the invention (4) The above provides a semiconducting semiconductor to make the electrical connection help the gold wire or layer to oxidize the electrical connection body. The electroplated gold electroplated jump pad of the pad of the present invention and the black pad The electroplated gold electromoney wire of the pad of the present invention is formed on the pad of the electroplated gold entire layer of the circuit layer due to the provision of electric money. . In order to reach the upper surface of the electroplated metal layer, the surface of the plate is covered with a plurality of plates (fi 1 m); then the fresh ball pad covering the body seal is removed from another layer, etc. Another layer of nickel

17046. Ptd knows the disadvantages of the technology. The main purpose of the present invention is the plating metal layer method for mounting the board electrical connection pads. The exposed surface is plated with a metal layer such as nickel / gold. Coupling, the metal is liable to cause the electrical connection due to external environmental impacts. The purpose is to provide a method for electrically connecting semiconductor packaging substrates, which can avoid problems caused by conventional chemical nickel / gold processes, to effectively improve the reliability of the packaging structure. The purpose is to provide a method for electrically connecting semiconductor package substrates', which does not require additional layout on the surface of the package substrate to increase the effective wiring area of the package substrate and reduce the problem of noise interference. The purpose is to provide a method for electrically connecting semiconductor packaging substrates, which can avoid the conventional manufacturing process from having to cover a nickel / gold metal layer on the packaging substrate, and only the electrical connection / gold metal layer, thereby effectively reducing the nickel / gold plating. Purpose The present invention provides a method for forming an electrical connection. The method includes the following steps: First, a semiconductor package substrate with at least one electrical connection pad is provided, and an electrically conductive film on the base is electrically conductive on the conductive film. Forming a first resistive layer; and then electrically connecting the first resistive layer and the conductive film on the pad at the same time so that the

Page 10 1231025 V. Description of the invention (5) The first connection layer and the conductive film can be exposed in the opening through the electrical connection; # ^ j ^ ^ forms an opening so that the electrical layer can make The second resistance layer covers the first resistance layer and performs plating on the package substrate = conductive film; there is a zinc / all-all-round J >. After the exposed surface of the β β connection pad is plated with metal such as dart / gold , Remove the conductive film covered by the second resistive layer J; ϋ can form a rejection on the surface of the package substrate: 'when rattan, the solder resist layer has a plurality of openings to reveal that:: layer, electrical connection Pad, and the opening of the rejection layer :: the size of the two electrical connection pads. What is smaller than the electrical lamination of the semiconductor package substrate of the present invention *, not only can provide electrical connections, the exposed surface is coated with a metal j: j / gold metal layer to effectively help gold wires or solder balls, etc. Wafer or electrical exposure; can also prevent the electrical connection pad body from being oxidized by the outside world; and avoid problems such as plating and black pads generated during the conventional chemical nickel / gold process ^ | Effectively improve the reliability of package structure; at the same time, there is no need to arrange plated wires on the surface of the package substrate when nickel / gold plating; increase the effective wiring area of the package substrate and reduce the noise interference caused by the layout of plating 9; It is also possible to avoid the conventional nickel / gold plating, and the entire circuit layer of the packaging substrate must be covered with a nickel / gold-containing metal layer, which can effectively reduce the cost of nickel / gold plating. To the following, examples are given to further illustrate the present invention in detail, but are not limited to these examples. In particular, the present invention has a method for electroplating a metal layer of a substrate electrical connection pad, which can be widely used for two substrates. Although the drawings and illustrations illustrate the implementation with wire-type packaging substrates,

17046.ptd Page 11 1231025 V. Description of the invention (6), but this should not be used to limit the scope of application of the present invention, and it will be described first. [Embodiment] Please read FIG. 3 for a meal. It is a schematic cross-sectional view of a substrate to which a method for electroplating a metal layer of a semiconductor package substrate electrical connection pad according to the present invention is applied. The packaging substrate 3 is a wire packaging substrate, which includes a plurality of insulation layers 3b and a circuit layer 3 in which the insulation layers are staggered. 2. The insulation layers are passed through to electrically connect the circuit layers. A through hole (v 丨 a) 3 3 and a solder resist layer 3 8 for covering and protecting the surface of the substrate 3. The insulating layer 3 1 of the substrate 3 may be composed of organic materials, fiber-reinforced organic materials, or particle reinforced (Part icl e-re inf ore ed) organic materials, such as epoxy resin (£ 0 ( ^ 7 1 ^ 3: 11〇 Polyethylenimine (1> 〇14111 丨 (^), Bismaleimide triazine-based resin, Cyanate ester, etc. The circuit layer 32 can be produced by forming a metal conductive layer, such as a copper layer, on the insulating layer 31, and then using an etching technique to form a circuit patterned circuit layer 32. The circuit layer 32 can also be formed. The electroplating method is used to form a detailed circuit in the patterned electroplating. The circuit layer 32 on the first surface 3a and the second surface 3b of the package substrate 3 is formed with a plurality of electrical connections 塾 35, such as the first The electrical connection pad 35 on the surface may be a wire pad for providing at least one semiconductor wafer 40. The electrical connection pad 35 may be connected to the first surface 3 of the substrate through the majority of the gold wires 41, and The electrical connection pad 35 on the second surface 3b is a solder ball pad Γ to plant a large number of solder balls. S〇Uer bal1) 39 to & ϋ wire element into the semiconductor crystal job # 4 () is electrically connected to an external device

17046. ptd Page 12 1231025 V. Description of the invention (7) ~ " ~~~-(not shown), such as soldering to join on a circuit board. Since the material of the circuit layer 32 and the electrical connection pads 35 is generally metallic copper, in order to provide the electrical connection pads 35 on the first surface 3a and the second surface 3b of the substrate to avoid oxidation due to the influence of the external environment, or Effective bonding ability with gold wire 41 or solder ball 3 9 is that the metal connection layer 35c is electroplated on the exposed surface of the electrical connection pad 3 5 as a metal barrier layer, the general metal barrier layer \ nickel-containing adhesive layer and A gold protective layer is formed on the electrical connection pad 35. However, the barrier layer can also be deposited with gold 'nickel, palladium, silver' tin, electroplating (electroless plating), physical vapor deposition (physicai deposit ion), and other methods. It is made of nickel / handle, chromium / titanium, palladium / gold, or nickel / palladium / gold. Then, a zinc-repellent layer 3 8 ′ can be formed to cover the surface of the substrate 3, and a number of openings 38 a are formed in the solder-repellent layer, so that the electrical connection pad can be exposed in the openings of the solder-repellent layer. The conductive connection pads 35 are not in communication with any plated wires. Please refer to FIGS. 4A to 4H, which are schematic diagrams of a method for forming a plated metal layer of the semiconductor package-based connection pads of the present invention. As shown in FIG. 4A, first provide a The package substrate 3 is a general wire-type package substrate as shown in the package. The package substrate 5 3 is formed by a conventional process such as a majority of via holes (ρτ B1 ind Vi a) (not shown). Among them, the packaging substrate 3 has a circuit patterned circuit layer 32, and the circuit layer is provided with several electrical connection pads 35. Of course, it can also include a number of surfaces with the sealing substrate 3. Related circuits There are many patterning technologies. 7 y | The well-known process technology is not a technical feature of this case, so it will not be repeated here.

17046. ptd

1231025 V. Description of the invention (8) Remark 0 36; ^ = shown on the surface of the package substrate 3 is covered with a conductive 臈 current conduction circuit = = Π J required to plate the metal layer 35c / 硌 t is organic Conductive polymer (organic conductive polymer), which is composed of ancient materials, 1 can be selected from the non-metallic conductive phen HL alkyne, polyparaben, polypylon, polyplug: . … The group of materials specially formed is formed on the surface of the package substrate as shown in FIG. 4C, and is covered with a conductive film? The first resistance is formed by two brushes, spin coating or bonding, etc. = ft layeOMa 'For example, it is a dry film, a photoresist, or a liquid photoresist. It is shown in the following special feature: The non-gold technology of the conductive polymer of M 36 is used to remove the covering of the electrical connection pad [50 0 刀 a 370 & The electrical connection pad 35 is provided with A; V ^ A3I00am ^ «36a, 37a and, the conductive film 36 provided with the cover, in the electrical connection pad 3: openings 37 ^ to make the electrical connection pad 35 Revealed in the opening 3. As shown in FIG. 4E, a second sound blocking layer 3s is formed on the surface of the substrate 3. The first resistance layer 37c may be, for example, a dry film, photoresist, or liquid light. The second resistance layer 37c covers the remaining portion A resistive layer 37a opening 3? B guide = 36b 'at the same time reveals the circuit to be used as the electrical connection pad 35, to avoid remaining in the first one when the metal layer is plated on the substrate 3 The conductive film 3 6b of the layer opening 3 7b will also be plated with a metal layer, and the circuit of the board will have a short circuit phenomenon. Base on

! 23l〇25 V. Description of the invention (9) ^ As shown in FIG. 4F, followed by electroplating (Electroplating ^ The package substrate 3 is plated with a metal layer step. The plated metal can be Meng, Lu, Bar, silver, Tin, tin / saturated, chromium / titanium, tin / gold, tin / gold or nickel / gold, etc. By virtue of the conductive properties of the conductive film 36, it can be used as a current conduction path when electroplating. Electroplated nickel / gold metal layer, 1 is firstly plated with a layer of nickel, and then a layer of gold is plated thereon. The nickel / gold metal can be plated on the exposed surface of each electrical connection pad 35 through the conductive film 36 to make the electrical connection. The exposed surface of the pad 35 is covered with an electroplated metal layer 35c. Of course, the choice of the electroplated metal material of the present invention can also be only one of the aforementioned nickel, gold, or other metals, for example, electroplating directly on the electrical connection pad 35 with gold. The "exposed surface" is a simple replacement, and should all belong to the scope of the present invention. As shown in Fig. 4G, the metal layer with nickel / gold layer 35 after electroplating is finished = after the exposed surface of the electrical connection pad 35, first Remove the second resistive layer 3? C and a resistive layer 37a, and then, The V-electric film 36 covered by the first resist layer is removed, that is, the electroplated metal layer 35c is to be formed to cover the exposed surface of the sexual connection pad 35. As shown in FIG. 4H, the package substrate 3 can be used later. The surface is covered with a solder mask (S ο 1 de Γ mask) 3 8, such as green paint 技, technology, t /… from external environmental pollution damage, the rejection = J openings 38a, so that the finished electroplated metal The number of layers 35c is exposed in the openings 38a of the solder resist layer. Among them, the electrical contact resistance 35 can be larger or smaller than the size of the electrical connection 35 / day / 1 hole 383: 5; V 〇 " — — — ^

1231025 V. Description of the invention (10) Through the semiconductor package substrate layering * of the present invention, not only can the package substrate be formed to form electrical jn to be covered with a nickel / gold electric shovel. The electrical coupling of the components is to effectively prevent the oxidation of the thunder connection pad body caused by the external environment when the nW is used to effectively provide a dry connection with the remaining conductive elements. # Π 孤 φ 羽The influence of Α clothing 1 caused the shovel shovel produced by Haidian and avoided the problems such as & chemical nickel / gold process, to effectively improve the trust of the packaging structure ..., # 于 忒 Electrical connection pad surface In the process of electroplating nickel / gold metal, the electric film is used as a current conduction path. The electric connection pads on the V through package substrate do not need to be on the surface of the package substrate to greatly increase the package base.饨 Green and then ^ ww and electroplated wires, 赭 it ^ ^ ^ effective wiring area of the board, and reduce the need to lay out the electroplating guide: ί interfere with the stomach; in addition, you can avoid the conventional plating nickel / gold covering one person Zhao & The entire metal layer of the sealing substrate must be covered with a metal layer. Effectively reduce the process cost. Pads, such as the package substrate to pass i ::: ;; :::::: number; shape and as a power mine to add leaves # 八 Therefore w cover layer according to the actual process requirements and order -Side surface. FΛ substrate surface. At the same time, this process can be implemented on the substrate, the first connection pad and the first resist layer openings are approximately circular shapes, and it is easy for the surgeon to think about an equivalent embodiment. The specific embodiments of the above functions are only used to illustrate the characteristics of the present invention, and are not intended to limit the implementable scope of the present invention.

Page 16 1231025 V. Description of the invention (π) In the spirit and technical scope of the invention disclosure, any equivalent changes and modifications made by using the content disclosed by the present invention shall still be covered by the scope of patent application described below.

17046. ptd Page 17 1231025 Brief description of the drawings [Simplified description of the drawings] The first diagram is a schematic cross-sectional view of a conventional nickel-gold metal layer electroplated on the electrical connection pad of a conventional package substrate; the second diagrams 2A to 2D are other diagrams. A conventional cross-sectional schematic diagram of the electroplated nickel / gold manufacturing process of the electrical connection pads of the package substrate; FIG. 3 is a schematic cross-sectional schematic view of a substrate to which the method for electroplating a metal layer of the electrical connection pad of the semiconductor package substrate of the present invention is applied; 4 The schematic diagram is a schematic diagram of the method for manufacturing the electroplated metal layer of the semiconductor package base of the present invention. 1 Package substrate 10 Electrical connection pads 11 Plating wires 12 Nickel / gold metal layer 2 Substrate 21 Conductive layer 22 Resistive layer 23 Nickel / gold metal layer 24 Circuit layer 3 Substrate 3 3 First surface 3b Second surface 31 Insulating layer 32 Circuit layer 33 Through-hole 35 Electrical connection pad 35c Plating metal layer 36 Conductive film 3 6a Except conductive film 36b Exposed conductive film 37a First resistance layer 37b Opening hole 37c Second resistance layer 3 7 0a Resistance to be removed Layer 38 Solder resist layer 38a Opening hole 39 Solder ball 40 Semiconductor wafer

17046.ptd page 18 1231025 Schematic illustration 41 Gold wire 1111111 17046. ptd page 19

Claims (1)

1231025 6. Scope of patent application 1. A semiconductor includes the steps of providing an integrated package substrate with the conductive transfer film at the same time so as to form an opening; the base is left on the first side of the electricity 2 · Rushen plating has 0 3 · Rushen Plating Electrical 4 · Rushen Plating Electrically removes the seal with gold plating The patented metal layer is applied on the seal Several patented metal layer connection pads Patented metal layer connection pads Packaging substrates Electrical connection pad plating In the metal layer manufacturing method, a surface of at least one surface has a plurality of semiconductors of electrical connection pads, and a conductive film is covered on the surface of the substrate; a first resistance layer is formed on the electrical film; and the first resistance is covered on the electrical connection pads. Layer and conducting the first resistive layer and the conductive film to form a second resistive layer on the surface of the electrically connected plate, so that the second resistive layer covers the conductive film in the opening area of the resistive layer; The electrical connection pad has a surface layer exposed; and a resist layer, a first resist layer, and a conductive film covered by the resist layer. The method of manufacturing the electrical connection pad of the semiconductor package substrate of item 1 includes: forming a solder resist layer on the surface of the substrate, and opening the solder resist layer to reveal the electrical connection of the completed electroplated metal layer = circle The fourth method of the electrical connection pad of the semiconductor package substrate of item 2, wherein the hole diameter of the solder resist layer can be larger than that. = Method 1 of the electrical connection pad of the semiconductor package substrate surrounding item 2 in which the hole diameter of the far-rejected solder layer can be smaller than. 17046.ptd 1231025 6. Scope of patent application 5. For the method of electroplating metal layer for the electrical connection pad of the semiconductor package substrate according to item 2 of the patent application scope, the solder resist layer may be a green paint. 6. The electroplated metal layer method for electrically connecting pads of a semiconductor package substrate according to item 1 of the patent application scope, wherein the package substrate is a wire-type package substrate. 7. For the electroplated metal layer manufacturing method of the electrical connection pad of the semiconductor package substrate according to item 1 of the patent application scope, wherein the electrical connection pad may be a wire bonding pad. 8. For the electroplated metal layer manufacturing method of the electrical connection pad of the semiconductor package substrate according to item 1 of the patent application scope, wherein the electrical connection pad may be a solder ball pad. 9. The plating metal layer manufacturing method for the electrical connection pad of the semiconductor package substrate according to item 1 of the application, wherein the plating metal layer is selected from the group consisting of gold, nickel, Ιε, silver, tin, nickel / ίε, chromium / titanium, One of the groups consisting of nickel / gold, Ιε / gold, and nickel / palladium / gold. 10. The method of plating metal layer for electrically connecting pads of a semiconductor package substrate according to item 1 of the scope of patent application, wherein the conductive film is an organic conductive polymer ° 1 The method for electroplating a metal layer of a semiconductor package substrate electrical connection pad according to the item, wherein the conductive film may be selected from the group consisting of polyacetylene, polyparaphenylene, polybile, polythiophene, polyaniline, and the like. 1 2 . For example, the method of electroplating a metal layer for electrically connecting pads of a semiconductor package substrate according to item 1 of the application, wherein the resist layer may be any one of a dry film, a photoresist, and a liquid photoresist. 17046.ptd Page 21