CN1808701B - Manufacturing method of package base plate - Google Patents
Manufacturing method of package base plate Download PDFInfo
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- CN1808701B CN1808701B CN 200510002346 CN200510002346A CN1808701B CN 1808701 B CN1808701 B CN 1808701B CN 200510002346 CN200510002346 CN 200510002346 CN 200510002346 A CN200510002346 A CN 200510002346A CN 1808701 B CN1808701 B CN 1808701B
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- conductive layer
- substrate
- gold
- base plate
- packaging
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
This invention discloses one sealing baseboard process method, which comprises the following steps: using two time coating to fulfill coating by nickel on upper and down surfaces of the baseboard; before coating, defining the coating area on the copper layer wire by anti-welding resistance agent; then processing nickel coating without overlapping with the agent to avoid the nickel layer and resistance adhesive agent to improve the sealing baseboard product reliability.
Description
Technical field
The present invention relates to a kind of base plate for packaging manufacture method, refer to the base plate for packaging manufacture method that a kind of nickel gold that utilizes through hole and twice nickel gold electroplating process to finish the upper and lower surface gold-plating of substrate zone is respectively electroplated especially.
Background technology
Constantly under the trend of light, thin, short, little development, progressively improve for the attention degree of flip-chip encapsulation technology in market at electronic product.Because Flip Chip possesses multiple advantage than the conventional package mode, make its in action communication environment day by day be shaped down, become in recent years envelope and survey the emphasis of industry development.At present, gradually become the main flow encapsulation technology along with adopting sphere grid array (BGA), flip-chip encapsulation (Flip Chip) to wait this class to plant the encapsulation of ball formula high-order, market during for encapsulation needed base plate for packaging (Packaging Substrate) also increase day by day.Upstream IDM factory and IC Chevron Research Company (CRC) are based on cost consideration, usually the substrate purchase right being transferred to encapsulation factory is solely responsible for, the foundry of encapsulation factory is also transferred in the substrate circuit design in the lump, so account for still above IC base plate for packaging of packaging cost up to three one-tenth, when just becoming encapsulation factory and striding into high-order encapsulation market, the most important critical material that must grasp.And, how to improve the wiring density of base plate for packaging along with the wiring on the base plate for packaging gets over densification, and take into account the yield of reliable and stable degree, low cost and the product of processing procedure simultaneously, be the important topic that base plate for packaging is made.
Known to the sector person, in the manufacturing process of base plate for packaging, except forming fine and closely woven wire pattern (being generally copper wires) thereon, and the I/O contact on each wire line needs again through plating one deck so-called " soft gold ", nickel-gold layer just, in beating the gold thread process, constitute firm electric connection between base plate for packaging and the chip to promote, simultaneously, the function that prevents the oxidation of copper wires pattern is also arranged.Subsequently, print anti-welding resistance agent surface treatment (surface finish) processing procedures such as (solder mask) again, be formed at wire line on the substrate surface with protection.
The practice that known electronickelling gold surface is handled generally need have copper circuit from the substrate surface to extend to plating extension wire (plating bus) around the substrate in the zone of not covered by anti-welding resistance agent, with the conductive path when electroplating, so, each that could expose on substrate outside the anti-welding resistance agent needs the nickel-gold layer of plating one deck specific thicknesses on the gold-plated zone.Yet the major defect of the above-mentioned known practice is, electroplates extension wire and certainly will occupy available substrate wiring space, makes the substrate wiring density to promote.In addition, electroplated lead is vulnerable to the signal interference generation noise problem of adjacent wires circuit.In known skill, nickel-gold layer tends to anti-welding resistance agent the overlapping of part arranged, and the not good reliability of base plate for packaging product that can cause of tack descends between nickel-gold layer and the anti-welding resistance agent.
In the related known skill, can be with reference to as United States Patent (USP) the 6th, 576, No. 540 " method for preparing substrate of the structure of electronickelling gold on contact mat (Method For Fabricating Substrate Within A Ni/AuStructure Electroplated On Electrical Contact Pads) ", its disclosed technology, shortcoming is to need after circuit forms, and again substrate is done once metallization action more, causes cost waste.In addition, more may the fine rule road on the substrate be impacted easily because handling the situation that accidentally the circuit scratch is arranged or wound in the processing procedure takes place.Another shortcoming is that when aforementioned techniques formed back desire making image transferring process at circuit, meeting after covering photoresist, produced metal level and substrate surface peeling off phenomenon easily because the metal level of substrate surface generates after being, causes the reduction of yield.
Summary of the invention
The technical problem to be solved in the present invention is: provide a kind of, it utilizes the characteristic of base plate for packaging, gold-plated zone can appear in the substrate two sides, and seeing through through hole is communicated with, so allow substrate simultaneously cover metal level earlier, so that its comprehensive conducting utilizes through hole to be conducting to another side again, reach the base plate for packaging that makes part circuit electronickelling gold and make.
For this reason, the present invention proposes a kind of manufacture method of base plate for packaging, includes the following step: a substrate is provided, and in last formation through hole; On the inwall of the upper and lower surface of this substrate and this through hole, form a first metal layer; Carry out a little shadow and an etch process, this the first metal layer is defined as first wire pattern in the upper surface of this substrate, lower surface in this substrate is defined as second wire pattern, and this first wire pattern is electrically connected via this through hole formation with this second wire pattern; In the upper and lower surface coverage one anti-welding resistance agent of this substrate, and this through hole is filled up in this anti-welding resistance agent; Form one first opening and one second opening in this anti-welding resistance agent, wherein this first opening exposes this first wire pattern of part, and this second opening exposes this second wire pattern of part; Upper surface in this substrate forms one first conductive layer, and this this anti-welding resistance agent of covering of first conductive layer and this first opening, and contacts with this first wire pattern; On this first conductive layer, cover one first insulating barrier; On this second wire pattern of part that this second opening exposes, electroplate one second metal level; Divest this first insulating barrier; Carry out an etch process, etch away this first conductive layer, to expose this first wire pattern in this first opening; Lower surface in this substrate forms one the 4th conductive layer, and this anti-welding resistance agent of covering of the 4th conductive layer and this second opening, and contacts with the 3rd conductive layer; On the 4th conductive layer, cover one second insulating barrier; And on this first wire pattern of part that this first opening exposes, electroplate one the 5th conductive layer.
Characteristics of the present invention and advantage are: the manufacture method of the base plate for packaging that the present invention proposes, its nickel gold that utilizes twice electroplating process to finish the upper and lower surface gold-plating of substrate zone is respectively electroplated, and before electroplating, the gold-plated zone for the treatment of on the copper layer conductor is defined out by anti-welding resistance agent earlier, and then carry out the nickel gold and electroplate, therefore the nickel-gold layer of electroplating can be not overlapping with anti-welding resistance agent, so can avoid between nickel-gold layer and the anti-welding resistance agent problems such as tack is not good to take place, improve the reliability of base plate for packaging product thus.
Description of drawings
Fig. 1 to Figure 12 is the generalized section of the specific embodiment of base plate for packaging manufacture method of the present invention.
The drawing reference numeral explanation:
10 substrates, 12 through holes
18 bronze medal layers, 22 bronze medal layer pad
24 bronze medal layer pad, 26 through hole copper metals
30 anti-welding resistance agent
32 openings, 34 openings
38 conductive layers, 40 insulating barriers
48 conductive layers, 50 insulating barriers
52 nickel-gold layers, 62 nickel-gold layers
101 upper surfaces, 102 lower surfaces
105 treat that gold-plated regional 106 treat gold-plated zone
Specifically execute mode
In order further to understand feature of the present invention and technology contents, see also following about detailed description of the present invention and accompanying drawing.Yet accompanying drawing is only for reference and aid illustration usefulness, is not to be used for the present invention is limited.
The present invention mainly is when not having the lead of drawing at the base plate for packaging product, needs with special flow process, to reach in the power on purpose of plating nickel-gold layer of part circuit.The present invention is characterized in to utilize twice electroplating process to finish the nickel gold plating in the upper and lower surface gold-plating of substrate zone respectively, and before electroplating, the gold-plated zone for the treatment of on the copper layer conductor is defined out by anti-welding resistance agent earlier, and then carry out the nickel gold and electroplate, therefore the nickel-gold layer of electroplating can be not overlapping with anti-welding resistance agent, so can avoid between nickel-gold layer and the anti-welding resistance agent problems such as tack is not good to take place, improve the reliability of base plate for packaging product by this.
See also Fig. 1 to Figure 12, what it illustrated is the generalized section of the specific embodiment of base plate for packaging manufacture method of the present invention.At first, as shown in Figure 1, provide a substrate 10, it has upper surface 101 and lower surface 102, and substrate 10 forms through hole 12 thereon earlier to drill through hole fabrication process mistake.
As shown in Figure 2, carry out a metallization process, on the surface of substrate 10 and through hole 12, form copper layer 18.Copper layer 18 can be the chemical depositing copper layer, and its thickness is about below 10 microns.Then, as shown in Figure 3, carry out little shadow and etch process, copper layer 18 is defined as copper layer pad 22 at the upper surface 101 of substrate 10, make copper layer 18 be defined as copper layer pad 24 simultaneously at the lower surface 102 of substrate 10, wherein copper layer pad 22 and copper layer pad 24 both constitute electrical ties via the through hole copper metal on through hole 12 sidewalls 26.
As shown in Figure 4, in the upper surface 101 and the anti-welding resistance agent 30 of lower surface 102 coverings of substrate 10, and fill up through hole 12.As have the knack of known to this skill person, anti-welding resistance agent 30 is can light absorbing photoresistance composition, utilize exposure and developing manufacture process to form opening 32 and openings 34 in anti-welding resistance agent 30, it defines is respectively treating gold-plated regional 105 and treat gold-plated regional 106 on copper layer pad 24 on the copper layer pad 22.
As shown in Figure 5, the upper surface of following at substrate 10 101 all covers conductive layers 38, copper layer pad 22 and base materials 10 that the zone of its covering includes anti-welding resistance agent 30 and comes out.Conductive layer 38 can be a metal level, copper layer for example, or other any material that can conduct electricity constitutes.As shown in Figure 6, and then on conductive layer 38, cover an insulating barrier 40, for example anti-welding resistance agent.
As shown in Figure 7, then carry out plating nickle gold process, make copper layer pad 24 via through hole 12 conductings to copper layer pad 22 and conductive layer 38, and make conductive layer 38 be external to a predetermined voltage, so that treat to be electroplated a nickel-gold layer 52 on the copper layer pad 24 in gold-plated regional 106.Because the present invention defines with anti-welding resistance agent 30 earlier to treat gold-plated regional 106, electroplate, therefore, nickel-gold layer 52 can be not overlapping with anti-welding resistance agent 30 again, so can avoid between nickel-gold layer and the anti-welding resistance agent problems such as tack is not good to take place, improve the reliability of base plate for packaging product by this.And owing to above the upper surface 101 of substrate 10, be coated with insulating barrier 40, therefore can the electronickelling gold.
Finish treat gold-plated regional 106 plating nickle gold process after, as shown in Figure 8, the insulating barrier 40 that covers upper surface 101 tops of substrate 10 is divested.As shown in Figure 9, carry out a microetch processing procedure then, etch away, expose the copper layer pad for the treatment of in gold-plated regional 105 22 divesting the conductive layer 38 that is come out after the insulating barrier 40.
Below be presented in the step for the treatment of electronickelling gold in gold-plated regional 105 of the upper surface 101 of substrate 10 by Figure 10 to Figure 12.Basically, identical in the step for the treatment of electronickelling gold in gold-plated regional 105 of the upper surface 101 of substrate 10 with the step for the treatment of electronickelling gold in gold-plated regional 106 of aforementioned lower surface 102 at substrate 10.
At first, as shown in figure 10, at lower surface 102 a whole conductive layer 48, nickel-gold layers 52 that the zone of its covering includes anti-welding resistance agent 30 and comes out of covering of substrate 10.Same, conductive layer 48 can be a metal level, copper layer for example, or other any material that can conduct electricity constitutes.Then, on conductive layer 48, cover an insulating barrier 50, for example anti-welding resistance agent or photoresist (photoresistance) material again.
As shown in figure 11, carry out plating nickle gold process, make copper layer pad 22 via through hole 12 conductings to copper layer pad 24, nickel-gold layer 52 and conductive layer 48, and make conductive layer 48 be external to a predetermined voltage, so that treat to be electroplated a nickel-gold layer 62 on the copper layer pad 22 in gold-plated regional 105.Since above the lower surface 102 of substrate 10, be coated with insulating barrier 50, therefore can re-plating nickel gold.
At last, shown in Fig. 1 figure, the insulating barrier 50 that covers lower surface 102 tops of substrate 10 is divested, carry out a microetch processing procedure then, etch away, expose nickel-gold layer 52 divesting the conductive layer 48 that is come out after the insulating barrier 50.
The above only is specific embodiments of the invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.
Claims (6)
1. the manufacture method of a base plate for packaging includes the following step:
One substrate is provided, and forms through hole thereon;
On the inwall of the upper and lower surface of this substrate and this through hole, form one first conductive layer;
Carry out a little shadow and an etch process, this first conductive layer is defined as first wire pattern in the upper surface of this substrate, lower surface in this substrate is defined as second wire pattern, and this first wire pattern is electrically connected via this through hole formation with this second wire pattern;
In the upper and lower surface coverage one anti-welding resistance agent of this substrate, and this through hole is filled up in this anti-welding resistance agent;
Form one first opening and one second opening in this anti-welding resistance agent, wherein this first opening exposes this first wire pattern of part, and this second opening exposes this second wire pattern of part;
Only the upper surface in this substrate forms one second conductive layer, and this this anti-welding resistance agent of covering of second conductive layer and this first opening, and contacts with this first wire pattern;
On this second conductive layer, cover one first insulating barrier;
On this second wire pattern of part that this second opening exposes, electroplate one the 3rd conductive layer;
Divest this first insulating barrier;
Carry out an etch process, etch away this second conductive layer, to expose this first wire pattern in this first opening;
Lower surface in this substrate forms one the 4th conductive layer, and this anti-welding resistance agent of covering of the 4th conductive layer and this second opening, and contacts with the 3rd conductive layer;
On the 4th conductive layer, cover one second insulating barrier; And
On this first wire pattern of part that this first opening exposes, electroplate one the 5th conductive layer.
2. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, the 4th conductive layer is the copper layer.
3. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, the 5th conductive layer includes gold and nickel.
4. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, this first conductive layer is the copper layer.
5. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, the 3rd conductive layer includes gold and nickel.
6. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, this second conductive layer is the copper layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510002346 CN1808701B (en) | 2005-01-17 | 2005-01-17 | Manufacturing method of package base plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510002346 CN1808701B (en) | 2005-01-17 | 2005-01-17 | Manufacturing method of package base plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1808701A CN1808701A (en) | 2006-07-26 |
| CN1808701B true CN1808701B (en) | 2011-07-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510002346 Active CN1808701B (en) | 2005-01-17 | 2005-01-17 | Manufacturing method of package base plate |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101610644B (en) * | 2008-06-20 | 2012-05-02 | 欣兴电子股份有限公司 | Surface plating technology of circuit base plate |
| CN101930931B (en) * | 2009-06-18 | 2012-02-08 | 南亚电路板股份有限公司 | Packaging circuit substrate structure and manufacturing method thereof |
| CN102637627A (en) * | 2011-02-09 | 2012-08-15 | 上海旌纬微电子科技有限公司 | Manufacture process of hole metallization of thick-film mixed integrated circuit |
| CN102510675A (en) * | 2011-10-25 | 2012-06-20 | 深南电路有限公司 | Method for electroplating surface of substrate |
-
2005
- 2005-01-17 CN CN 200510002346 patent/CN1808701B/en active Active
Non-Patent Citations (3)
| Title |
|---|
| JP平5-121860A 1993.05.18 |
| JP特开2001-110939A 2001.04.20 |
| JP特开2003-37215A 2003.02.07 |
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| CN1808701A (en) | 2006-07-26 |
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