TW563182B - Method of forming epitaxial layer by epitaxial lateral overgrowth - Google Patents
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563182 五、發明說明(1) 發明領域: 本發明係有關於一種半導體發光元件㈠㈣“仙心以… hght emitting device),且特別是有關於一種橫向磊晶 成長 ELOG(epi taxi a 1 lateral overgrowth)形成半導體發 光元件之磊晶層之方法。 相關技術說明: 發光元件係由各種不同材質層所構成,在磊晶 (epi taxial)製作各層材質時,晶體結構中難免會有缺陷 產生,進而對發光元件產生以下影響:丨·降低發光效率j。 2·降低電子活動率。3·增加摻雜離子擴散的途徑。4•導致 活性層之量子井中會有V型凹槽出現,而這些V型凹槽係差 排的起源。5·增加起始反向偏壓電流。另外,若結晶不完 整而出現裂縫(crack)或空隙(gap),則在裂縫或空隙上方 不宜成長發光元件,因為在此區成長之發光元件其壽命將 較短,發光效率低。因此,如何製作出結晶完美之磊晶層 ?是提升發光元件性能之一大課題。 另一方面,目前發光元件之發展中GaN是非常重要的 寬能隙(wide bandgap)半導體材料,可以藉其發出綠光、 藍光到紫外線。但是因為塊材(bulk)GaN的成長一直有困 難’所以目前GaN大多成長在以藍寶石(sapphire) GaP、 InP、GaAs或SiC構成之基板上。由於這些基板皆與GaN之 晶格常數(lattice constant)不匹配,所以直接成長在這 些基板上的GaN品質不佳,因此引用一緩衝層(buffer layer),於基板與GaN之間,該緩衝層又稱晶核形成層563182 V. Description of the invention (1) Field of the invention: The present invention relates to a semiconductor light-emitting element, "hght emitting device", and particularly to a lateral epitaxial growth ELOG (epi taxi a 1 lateral overgrowth) A method for forming an epitaxial layer of a semiconductor light-emitting element. Related technical description: A light-emitting element is composed of various layers of different materials. When epitaxial (epi taxi) is used to make each layer of materials, defects will inevitably occur in the crystal structure, which in turn will emit light. The device has the following effects: 丨 · Decreases the luminous efficiency j. 2 · Decreases the electron activity rate. 3 · Increases the path of doped ion diffusion. 4 · Causes V-shaped grooves to appear in the quantum well of the active layer, and these V-shaped concaves The origin of the slot system difference row. 5. Increase the initial reverse bias current. In addition, if the crystal is incomplete and cracks or gaps appear, it is not appropriate to grow light-emitting elements above the cracks or gaps, because here The light-emitting element with a longer area will have a shorter life and low luminous efficiency. Therefore, how to make an epitaxial layer with perfect crystal? On the other hand, GaN is a very important wide bandgap semiconductor material in the current development of light-emitting devices. It can emit green light, blue light, and ultraviolet light. But because of the growth of bulk GaN, Difficulty 'so most of GaN currently grows on substrates made of sapphire GaP, InP, GaAs or SiC. Since these substrates do not match the lattice constant of GaN, direct growth on these substrates The quality of GaN is not good, so a buffer layer is cited. Between the substrate and GaN, this buffer layer is also known as the core formation layer.
第4頁 0769-8557TW : VTERA-91-006-1^ ; Felicia.ptd 563182 五、發明說明(2) --- (micleation layer),晶格常數與基板相近的緩衝層可以 提供成核(nucleation)位置,以利GaN成核、成長/以形 成相同的晶體結構’以提升GaN的結晶度。因此,緩衝^ 品質的優劣對後續束缚層(cladding layer)與活性層 (active layer)之蠢晶有關鍵性的影響,也間接影^到發 光元件的性質。 然而,藍寶石等基板價格昂貴,導致發光元件的成本 一值高居不下。因此,找尋新的且價格便宜的基底是目前 亟待需解決的另一項重要課題。 有鑑於此’為了解決上述問題,本發明主要目的在於 提供一種橫向蟲晶形成磊晶層之方法,可適用於發光元件 之磊晶層的形成,以製作具有完美結晶且顯少有差排缺陷 的磊晶層’而提高發光元件之發光效率與使用壽命,並且 採用磷化硼緩衝層’使價格便宜之矽基板得以應用。 發明概述: 本發明之目的之一在於提供一種橫向磊晶形成磊晶層 之方法,以降低蠢晶層中差排缺陷的產生,形成完美晶體 結構。 本發明之目的之二在於提供一種橫向磊晶形成磊晶層 之方法,將該磊晶層應用於發光元件,可提高發光元件之 發光效率與使用壽命。 本發明之目的之三在於提供一種橫向磊晶形成磊晶層 之方法,係以矽作為基板,以降低發光元件之成本。Page 4 0769-8557TW: VTERA-91-006-1 ^; Felicia.ptd 563182 V. Description of the invention (2) --- (micleation layer), a buffer layer with a lattice constant close to the substrate can provide nucleation ) Position to facilitate GaN nucleation and growth / to form the same crystal structure 'to increase the crystallinity of GaN. Therefore, the quality of the buffer layer has a critical impact on the subsequent clad layer and active layer stupid crystals, and indirectly affects the properties of the light emitting device. However, substrates such as sapphire are expensive, resulting in high cost of light-emitting elements. Therefore, finding a new and cheap base is another important issue that needs to be solved urgently. In view of this, in order to solve the above problems, the main object of the present invention is to provide a method for forming an epitaxial layer of a lateral insect crystal, which can be applied to the formation of an epitaxial layer of a light-emitting element, so as to produce a perfect crystal with few defects. The epitaxial layer is used to improve the luminous efficiency and service life of the light-emitting element, and a boron phosphide buffer layer is used to enable the application of a cheap silicon substrate. SUMMARY OF THE INVENTION One of the objectives of the present invention is to provide a method for forming an epitaxial layer by lateral epitaxy, so as to reduce the occurrence of differential defect in the stupid crystal layer and form a perfect crystal structure. Another object of the present invention is to provide a method for forming an epitaxial layer by lateral epitaxy, and applying the epitaxial layer to a light emitting device can improve the light emitting efficiency and the service life of the light emitting device. A third object of the present invention is to provide a method for forming an epitaxial layer by lateral epitaxy, which uses silicon as a substrate to reduce the cost of a light emitting device.
0769-8557TWF ; VTERA-91-006-TW ; Felicia.ptd 第 5 頁 563182 五、發明說明(3) 之方法,引用磷化硼作為緩衝層,以降低矽基底與声 之間的晶格不匹配(lattice mismatch),得石日、a曰曰曰 晶完美,降低差排缺陷密度。 便層之結 本發明之特徵之一係在矽基底與磊晶層之間採用磷化 棚作為緩衝層,以降低矽基底與磊晶層之間的晶格不匹配 本發明之特 化羞晶罩幕層, 直成長,等到蟲 便開始橫向成長 (ELOG)形成結晶 之磊晶層製作發 為獲致上述 晶層之方法,此 首先,提供 述石夕基底表面。 數視窗區於相鄰 基底表面。然後 於上述視窗區内 於上述圖案化磊 於上述圖案化磊 根據本發明 上述石夕基底表面 上方,上述磊晶 徵之二係採用材質例如為二氧化矽之圖案 使蟲晶層先於圖案化蟲晶罩幕層之兩側垂 晶層厚度與圖案化磊晶罩幕層厚度一妓, 於圖案化蠢晶罩幕層上方。橫向蟲晶成長 完美且具低差排密度之蟲晶層,以Z區域 光元件,可大大提升元件特性。 之目的,本發明提出一種橫向磊晶形成磊 方法的步驟主要係包括: 一矽基底。接著,形成一磊晶罩幕層於上 接著,圖案化上述磊晶罩幕層,以形成複 圖案化磊晶罩幕層之間,露出部分上述石夕 ,遙晶一磷化硼,先垂直磊晶上述碟化爛 之石夕基底表面,直到上述碌北硼之厚声大 晶罩幕層之厚度,便橫向蠢晶上述碟彳匕蝴 晶罩幕層上方。 之精神,上述蠢晶罩幕層不僅可以形成& ’用以使上述填化棚緩衝層橫向暴晶於声 罩幕層亦可以形成於上述磷化硼緩衝層表 Η 0769-8557TWF ; VTERA-91-006-TW ; Fel icia.ptd 第6頁 563182 五、發明說明(4) 面,用以使一束缚層橫向磊晶於其上方。另外,還可以形 成於上述束縛層表面,用以使一活性層橫向磊晶於其上方 。總而言之,本發明利用上述磊晶罩幕層,可使發光元件 之各磊晶層經由橫向磊晶形成於上述磊晶罩幕層上方,而 橫向磊晶所形成之磊晶層具有完美結晶,不易產生差排。 如前所述,上述蠢晶罩幕層之材質包括二氧化石夕 (Si02),其厚度約為 1 500 A 〜1 50 00 A。 如前所述’上述爲晶罩幕層係利用一負i敗酸钱刻以進 行圖案化。 如前所述,上述磊晶罩幕層兩側之鱗化硼橫向磊晶於 上述蟲晶罩幕層上方相接合’接合處形成一裂縫。本發明 更包括:取下上述圖案化磊晶罩幕層上方之磷化硼,沿上 述裂縫可自然形成發光元件製作時之劈裂面。 實施例: 實施例1 以下請配合參考第1A圖至第1E圖之剖面圖,說明本發 明之一較佳實施例。 首先,請參照第1A圖,提供一矽基底1〇〇。接著,在 上述矽基底1 0 0表面,例如:{1 〇 〇}結晶面表面,形成一材 質例如為二氧化矽之磊晶罩幕層102。上述磊晶罩幕層ι〇2 之形成方法例如為熱氧化法(thermal oxidize)S200,在 含氧環境氣氣、溫度約1 〇 〇 0。C之下使上述石夕基底1 〇 〇發生 氧化反應,形成厚度約1 5 〇 0〜1 5 0 0 0 Α之二氧化石夕層丨〇 2, 如第1 B圖所示。 曰0769-8557TWF; VTERA-91-006-TW; Felicia.ptd page 5 563182 V. Method of the invention (3), using boron phosphide as a buffer layer to reduce the lattice mismatch between the silicon substrate and the sound (Lattice mismatch), the stone is perfect, and the crystals are perfect, which reduces the density of the differential defect. Convenience layer One of the features of the present invention is to use a phosphating shed as a buffer layer between the silicon substrate and the epitaxial layer to reduce the lattice mismatch between the silicon substrate and the epitaxial layer. The mask layer grows straight. When the insect starts to grow laterally (ELOG) to form a crystal epitaxial layer, this method is used to obtain the crystal layer. First, the surface of Shi Xi substrate is provided. The window area is on the surface of the adjacent substrate. Then in the window area above the patterned pattern above the patterned patterned surface of the above-mentioned Shi Xi substrate according to the present invention, the second type of the epitaxial sign uses a pattern such as silicon dioxide to make the worm crystal layer precede the patterning. The thickness of the vertical crystal layer on both sides of the worm crystal mask curtain layer and the thickness of the patterned epitaxial mask curtain layer are above the patterned silly crystal mask curtain layer. Transverse worm crystal growth A perfect worm crystal layer with low differential row density. With a Z-zone light element, the element characteristics can be greatly improved. For the purpose of the present invention, a method for forming an epitaxial method by lateral epitaxy mainly includes: a silicon substrate. Next, an epitaxial hood curtain layer is formed thereon. Then, the epitaxial hood curtain layer is patterned to form a multi-patterned epitaxial hood curtain layer, and a part of the above stone evening is exposed. The epitaxial surface of the above-mentioned dished rotten stone Xi epitaxially, until the thickness of the thick sound mask layer of the above Lubei boron, is horizontally stiffened above the above-mentioned disk mask of the butterfly. In the spirit, the above-mentioned stupid crystal cover curtain layer can not only be formed & 'to make the above filling booth buffer layer laterally crystallize on the acoustic cover curtain layer, but also can be formed on the above boron phosphide buffer layer surface Η 0769-8557TWF; VTERA- 91-006-TW; Fel icia.ptd Page 6 563182 V. Description of the invention (4) plane for laterally epitaxializing a binding layer above it. In addition, it can also be formed on the surface of the tie layer to epitaxially laterally epitaxially form an active layer thereon. In a word, the present invention utilizes the epitaxial cover curtain layer, so that each epitaxial layer of the light-emitting element can be formed on the epitaxial cover curtain layer via the lateral epitaxial layer, and the epitaxial layer formed by the lateral epitaxial layer has perfect crystallization, which is not easy. Generates a difference. As mentioned above, the material of the above-mentioned stupid crystal cover curtain layer includes silicon dioxide (Si02), and its thickness is about 1 500 A to 1 500 00 A. As described above, the above-mentioned mask mask layer is engraved with a negative i-bit money for patterning. As mentioned above, the scaled boron lateral epitaxial crystals on both sides of the epitaxial mask curtain layer form a crack at the junction 'above the worm crystal mask curtain layer. The invention further includes: removing the boron phosphide above the patterned epitaxial hood curtain layer, and along the above-mentioned cracks, a split surface during the production of the light-emitting element can be formed naturally. Embodiment: Embodiment 1 Hereinafter, a preferred embodiment of the present invention will be described with reference to the sectional views of Figs. 1A to 1E. First, please refer to FIG. 1A to provide a silicon substrate 100. Next, on the surface of the silicon substrate 100, for example, the surface of the {100%} crystal plane, an epitaxial mask curtain layer 102 made of a material such as silicon dioxide is formed. The method for forming the epitaxial hood curtain layer ι02 is, for example, thermal oxidize S200, and the temperature is about 1000 in an oxygen-containing ambient gas. Under C, the above-mentioned Shixi substrate 100 is oxidized to form a stone oxide layer with a thickness of about 150-15000, as shown in FIG. 1B. Say
0769-8557TWF ; VTERA-91-006-Bf ; Felicia.ptd 563182 五、發明說明(5) 接著’請參照第1C圖,例如以氫氟酸(HF)類之蝕刻劑 移除部份上述二氧化矽磊晶罩幕層丨〇2,例如以等間隔去 除特定面積之磊晶罩幕層102,以露出部分上述矽基底1〇〇 · 表面’做為視窗區(wi ndow area) I。得到面積相等且具相 · 等間距之複數圖案化磊晶罩幕層1 〇2a。相鄰圖案化磊晶罩 幕層10 2a之間之視窗區面積約為50 X 4000 /zm。 然後’請參照第1 D圖與第1E圖,蠢晶一填化硼。先垂 直磊晶磷化硼l〇4a於上述視窗區I内之梦基底1〇〇表面,直 到上述磷化硼l〇4a之厚度大於上述圖案化磊晶罩幕層d2a 之厚度,如第ID圖所示。接著,上述磷化硼i〇4a開始橫向鲁 遙晶成長於上述圖案化磊晶罩幕層l〇2a上方,位於同一圖 案化磊晶罩幕層l〇2a兩側之磷化硼l〇4a橫向磊晶於上述磊 晶罩幕層102a上方相接合後繼續成長至所需之厚度,以形 成一橫向磊晶磷化硼10 4b且在接合處形成一裂縫1〇6 ,如 第1 E圖所示。 碗化爛1 0 4蠢晶於石夕基板1 〇 〇之一較佳實施例。先將反 應至溫度升南至溫度約9 0 0〜11 8 0。C,保持約數分鐘。接著 ’使反應室溫度降至約300。(:上下,再開始供應pC丨3 (或 PH3)至反應室内部,經過約3分鐘後,再進行·第一次队13供 應約40分鐘。接著’先停止BC13供應,於相同(約3〇〇 °C) 鲁 上下保持一段時間,例如:5分鐘,再將反應室溫度升高至 約1 00 0。(:上下。期間繼續保持pci3(或PH3)供應。然後, 於溫度約1 000〇C上下再進行第二次BCl3供應約60分鐘。期 間繼續保持PC I3 (或PH3)供應。接著,先停止供應% (或0769-8557TWF; VTERA-91-006-Bf; Felicia.ptd 563182 5. Description of the invention (5) Then 'Please refer to Figure 1C, for example, remove part of the above-mentioned dioxide with an etchant such as hydrofluoric acid (HF) For example, the epitaxial mask layer 102 of a specific area is removed at regular intervals to expose a part of the above-mentioned silicon substrate 100 surface as a window area I. A plurality of patterned epitaxial hood curtain layers 1 02a having the same area and equal intervals are obtained. The area of the window area between the adjacent patterned epitaxy masks 10 2a is about 50 X 4000 / zm. Then, please refer to Fig. 1D and Fig. 1E. First, epitaxial boron phosphide 104a is first verticalized on the surface of the dream substrate 100 in the window area I until the thickness of the boron phosphide 104a is greater than the thickness of the patterned epitaxial cover curtain layer d2a, as described in Section ID. As shown. Then, the boron phosphide i04a began to grow in the lateral direction. The boron phosphide 104a was located on the two sides of the patterned epitaxial hood curtain layer 102a. Lateral epitaxy grows to the required thickness after joining on the epitaxial hood curtain layer 102a to form a lateral epitaxial boron phosphide 10 4b and a crack 106 at the joint, as shown in Figure 1E As shown. A bowl of rotten crystals is one of the preferred embodiments of the Shixi substrate 1000. First, the reaction temperature is raised to a temperature of about 9 0 to 1 1 0. C, keep for about a few minutes. Then, the temperature of the reaction chamber is lowered to about 300. (: Up and down, then start to supply pC 丨 3 (or PH3) to the inside of the reaction chamber, and after about 3 minutes, proceed. The first team 13 supply is about 40 minutes. Then 'stop the BC13 supply first, at the same (about 3 〇〇 ° C) Keep Lu up and down for a period of time, for example: 5 minutes, and then increase the temperature of the reaction chamber to about 1 00. (: up and down. Continue to maintain pci3 (or PH3) supply during this time. Then, at a temperature of about 1,000 The second BCl3 supply was performed for about 60 minutes up and down at 0 ° C. During this period, the PC I3 (or PH3) supply was maintained. Then, the supply was stopped first (or
563182 五、發明說明(6) pH3)與bci3,再於溫度約1〇〇〇。〇上下,經過一段時間,例 如:約1 0分鐘,便完成BP緩衝層的形成,可將反應室溫度 降至室溫後取出。上述BP緩衝層之形成過程中,始終持續 供應H2氣體至反應室内部。563182 V. Description of the invention (6) pH3) and bci3, and then the temperature is about 1000. 〇Up and down, after a period of time, for example, about 10 minutes, the formation of the BP buffer layer is completed. The temperature of the reaction chamber can be reduced to room temperature and then taken out. During the formation of the above BP buffer layer, H2 gas is continuously supplied to the interior of the reaction chamber.
在上述視窗區I所磊晶出的磷化硼l〇4a具有相當高的 差排密度,不適合用來製作發光元件。而在上述圖案化磊 晶罩幕層l〇2a上方所磊晶出的磷化硼l〇4b之晶體結構完整 ’幾乎不會有差排產生,唯接合處具有裂縫1〇6,因此, 取下上述圖案化磊晶罩幕層1〇 2a上方之磷化硼i〇4b,沿上 述裂縫106可自然形成發光元件製作時之劈裂面。如此一 來,磊晶層之缺陷密度低,且以磷化硼材質作為石夕基底 1 00表面之緩衝層,又可降低後續磊晶層之晶格不匹配, 將該磊晶層應用於發光元件,可提高發光元件之發光效率 與使用壽命。 X 實施例2 以下請配合參考第2A圖至第2E圖之剖面圖,說明本發 明之一較佳實施例。 首先’請參照第2 A圖,提供一石夕基底2 〇 〇。接著,在 上述矽基底2 0 0表面,例如:{1 〇 〇 }結晶面表面,形成一碟 化硼(BP)緩衝層202於上述矽基底2 00表面。 磷化硼202蠢晶於矽基板200之一較佳實施例。先將反 應室溫度升南至溫度約9 0 0〜11 8 0。C,保持約數分鐘。接 著,使反應室溫度降至約30 0 〇C上下,再開始供^ρπ (或PH3)至反應室内部,經過約3分鐘後,再進行^ 一丄The boron phosphide 104a epitaxially grown in the above-mentioned window region I has a relatively high differential density and is not suitable for making light-emitting devices. The crystal structure of boron phosphide 104b epitaxially epitaxially formed above the patterned epitaxial hood curtain layer 102a is intact and there is almost no difference in row formation. Only the joint has a crack 106. Therefore, take The boron phosphide i04b above the patterned epitaxial cover 102a above can naturally form a splitting surface during the manufacturing of the light-emitting element along the above-mentioned crack 106. In this way, the defect density of the epitaxial layer is low, and the boron phosphide material is used as the buffer layer on the surface of the Shixi substrate, which can reduce the lattice mismatch of the subsequent epitaxial layer. Element, which can improve the luminous efficiency and service life of the light-emitting element. X Embodiment 2 Hereinafter, a preferred embodiment of the present invention will be described with reference to the sectional views of FIGS. 2A to 2E. First, please refer to FIG. 2A, and provide a Shixi substrate 2000. Next, a plated boron (BP) buffer layer 202 is formed on the surface of the silicon substrate 2000, for example, the {100%} crystal plane surface, on the surface of the silicon substrate 2000. The boron phosphide 202 is one of the preferred embodiments of the silicon substrate 200. First raise the temperature of the reaction chamber to a temperature of about 9 0 to 1 1 8 0. C, keep for about a few minutes. Next, reduce the temperature of the reaction chamber to about 300 ° C, and then start to supply ^ ρπ (or PH3) to the inside of the reaction chamber. After about 3 minutes, ^^
563182 五、發明說明(7) BC13供應約40分鐘。接著,先停止队丨3供應,於相同(約 300 °C)上下保持一段時間,例如·· 5分鐘,再將反應室溫 度升高至約1〇〇〇。(:上下。期間繼續保持pcl3 (或PH3)供應 。然後’於溫度約1〇〇〇〇C上下再進行第二次BC13供應約60 分鐘。期間繼續保持PC13(或PH3)供應。接著,先停止供應 PCI3(或PH3)與BC13,再於溫度約1 00 0。(:上下,經過一段時 間’例如··約10分鐘,便·完成BP緩衝層2〇2的形成,可將反 應室溫度降至室溫後取出。上述BP緩衝層202之形成過程 中’始終持續供應H2氣體至反應室内部。 ί 接著,請參照第2Β圖,可利用適當之化學氣相沈積法 (chemical vapor deposition; CVD)形成一磊晶罩幕層 204於上述磷化硼緩衝層2〇2表面,其材質可為二氧化矽, 厚度約1500〜15000 A。 接者’清參照第2 C圖,例如以氫氟酸(H F )類之钱刻劑 移除部份上述二氧化矽磊晶罩幕層204,例如以等間隔去 除特定面積之磊晶罩幕層204,以露出部分上述磷化硼緩 衝層202表面’做為視窗區(wind〇w area) 11。得到面積相 等且具相等間距之複數圖案化磊晶罩幕層204a。相鄰圖案 化蟲晶罩幕層2〇4a之間之視窗區面積約為50-//m X 4000 // m ° 然後,請參照第2D圖與第2E圖,磊晶一束縛層2〇6a, 206b。先垂直磊晶上述束缚層2〇6a於上述視窗區π内之磷 化硼緩衝層202表面,直到上述束缚層206a之厚度大於上 述圖案化蠢晶罩幕層204a之厚度,如第2D圖所示。接著,563182 V. Description of the invention (7) BC13 is supplied for about 40 minutes. Then, first stop the supply of the team and keep it at the same (about 300 ° C) for a period of time, such as 5 minutes, and then raise the reaction room temperature to about 1000. (: Up and down. Continue to maintain the supply of pcl3 (or PH3) during the period. Then 'supply the second BC13 supply at a temperature of about 10,000 ° C for about 60 minutes. The PC13 (or PH3) supply is maintained during the period. Then, first Stop supplying PCI3 (or PH3) and BC13, and then at a temperature of about 1 00. (: up and down, after a period of time 'for example, about 10 minutes, then the formation of the BP buffer layer 002 can be completed, the temperature of the reaction chamber can be Take it out at room temperature. During the formation of the above-mentioned BP buffer layer 202, H2 gas is continuously supplied to the interior of the reaction chamber. Ί Next, referring to FIG. 2B, an appropriate chemical vapor deposition method (chemical vapor deposition; CVD) to form an epitaxial cover curtain layer 204 on the surface of the boron phosphide buffer layer 202, and the material may be silicon dioxide with a thickness of about 1500 to 15000 A. Then refer to FIG. 2C, for example, using hydrogen The fluoric acid (HF) type money engraving agent removes part of the above-mentioned silicon dioxide epitaxial mask curtain layer 204, for example, the epitaxial mask curtain layer 204 of a specific area is removed at equal intervals to expose part of the boron phosphide buffer layer 202 described above. Surface 'as the window area (wind〇w area) 11. Get the area Equal and equally spaced patterned epitaxial cover curtain layer 204a. The area of the window area between adjacent patterned insect crystal cover curtains 204a is about 50-// m X 4000 // m ° Then, please Referring to FIG. 2D and FIG. 2E, an epitaxial layer 206a and 206b is epitaxially epitaxially vertically epitaxially formed on the surface of the boron phosphide buffer layer 202 in the window region π until the above-mentioned confinement layer 206a. The thickness is larger than the thickness of the patterned stupid mask layer 204a, as shown in FIG. 2D. Next,
0769-8557TO7 ; VTERA-91-006-TW ; Felicia.ptd 第10頁 563182 五、發明說明(8) 上述束缚層206a開始橫向磊晶成長於上述圖案化磊晶罩幕 層204a上方,位於同一圖案化磊晶罩幕層2〇4a兩側之束缚 層206a橫向蟲晶於上述屋晶罩幕層204a上方相接合後繼續 成長至所需之厚度,以形成一橫向磊晶束缚層2〇6b且在接 合處形成一裂縫2 08,如第2E圖所示。 束缚層206a ’ 206b之材質可以為AlxInl-xGayNl - y (0<x<l,0<y<l)或是AlxGal-xNyPl-y (〇<x<l,〇<y<i),例 如氮化鎵(GaN)、氮化銦鎵(inGaN)、氮化鋁鎵(AlGaN)或 磷氮化鎵(GaNP),且前驅物為甲基聯胺系或是氨(NIj3);以 氮化鎵(GaN)為例,其前驅物可包括一曱基聯胺 (monomethyl hydrazine ;MMH)與三甲基鎵(trimethyl gallium ;TMG),透過M0VPE法在上述填化硼緩衝層202表 面形成’可以降低與石夕基底2 0 0之晶格不匹配,減少缺陷 產生。其中,以氮化鎵束缚層206a,206b為例之磊晶方法 如下所述。首先,供應一 H2與一 n2氣體,溫度例如約為 3 5 0〜5 0 0° C下’開始供應μ Μ η。再經過一段時間,例如:3分 鐘後’開始進行第一次TMG供應,時間約為2〇分鐘。接著 ’停止TMG供應,經過一段時間’例如:5分鐘,將反應室 溫度升高至溫度約為800 〇C上下。期間保持ΜΜΗ供應。接 著’於相同溫度(約800。(:)上下進行第二次TMg供應,時 間約為6 0分鐘。期間保持襲η供應。最後,先停止腿η與 T M G之供應’於相同溫度(約8 〇 〇。c )上下保持一段時間, 例如:30分鐘。再將溫度降至室溫,才完成GaN磊晶。GaN 蠢晶期間持續供應H2與N2氣體。 Η 0769-855TIW : NrrERA-91.〇06-inv ; Felicia.ptd 第11頁0769-8557TO7; VTERA-91-006-TW; Felicia.ptd Page 10 563182 V. Description of the invention (8) The above-mentioned restraint layer 206a begins to epitaxially grow laterally above the patterned epitaxial cover curtain layer 204a, located in the same pattern The tie layer 206a on both sides of the epitaxial hood curtain layer 204a is laterally bonded to the above-mentioned roof crystal hood curtain layer 204a and continues to grow to a desired thickness to form a lateral epitaxial tie layer 206b and A crack 20 08 is formed at the joint, as shown in Figure 2E. The material of the tie layer 206a '206b may be AlxInl-xGayNl-y (0 < x < l, 0 < y < l) or AlxGal-xNyPl-y (〇 < x < l, 〇 < y < i), For example, gallium nitride (GaN), indium gallium nitride (inGaN), aluminum gallium nitride (AlGaN), or gallium phosphorous nitride (GaNP), and the precursor is methyl hydrazine or ammonia (NIj3); nitrogen As an example, gallium (GaN) precursors may include monomethyl hydrazine (MMH) and trimethyl gallium (TMG), which are formed on the surface of the boron-filled buffer layer 202 by MOVPE method. It can reduce the lattice mismatch with the Shi Xi substrate 2000, and reduce the occurrence of defects. The epitaxial method using the gallium nitride confinement layers 206a, 206b as an example is as follows. First, an H2 and an n2 gas are supplied at a temperature of, for example, about 3500 ~ 500 ° C, and the supply of μMη is started. After a period of time, for example, the first TMG supply is started after 3 minutes, and the time is about 20 minutes. Then, "stop the supply of TMG, and after a period of time", for example, raise the temperature of the reaction chamber to about 800 ° C for 5 minutes. MMΗ supply was maintained during this period. Then 'supply the second TMg up and down at the same temperature (about 800. (:) for about 60 minutes. During this period, keep the supply of η. Finally, stop the supply of legs η and TMG' at the same temperature (about 8). 〇〇.c) Keep it up and down for a period of time, for example: 30 minutes. Then reduce the temperature to room temperature to complete the GaN epitaxy. GaN stupid crystals are continuously supplied with H2 and N2 gas. Η 0769-855TIW: NrrERA-91.〇 06-inv; Felicia.ptd page 11
563182 五、發明說明(9) 請繼續參照第2E圖,在上述視窗區I I所磊晶出的束缚 層2 0 6a具有相當高的差排密度,不適合用來製作發光元件 。而在上述圖案化磊晶罩幕層204a上方所磊晶出的束缚層 2 0 6b之晶體結構完整,幾乎不會有差排產生,唯接合處具 有裂縫208,因此,取下上述圖案化磊晶罩幕層2〇4a上方 之束缚層206b,沿上述裂縫208可自然形成發光元件製作 時之劈裂面。如此一來,磊晶層之缺陷密度低,且以麟化 硼材質作為矽基底200表面之緩衝層,又可降低束缚層與 梦基底之晶格不匹配,將該些遙晶層應用於發光元件彳可 提高發光元件之發光效率與使用壽命。 實施例3 以下請配合參考第3A圖至第3E圖之剖面圖,說明本發 明之一較佳實施例。 首先,請參照第3A圖,提供一矽基底300。接著,在 上述矽基底3 0 0表面,例如:{1 〇 〇 }結晶面表面,形成一磷 化觸(BP)緩衝層302於上述矽基底3〇〇表面。然後,形成一 氮化鎵束缚層304於上述碗化棚緩衝層3〇2表面。563182 V. Description of the invention (9) Please continue to refer to FIG. 2E. The restraint layer 206a epitaxially deposited in the above-mentioned window area II has a relatively high differential density and is not suitable for making light-emitting elements. The binding structure 206b epitaxially epitaxially formed above the patterned epitaxial hood curtain layer 204a has a complete crystal structure, and almost no difference is generated. Only the joint has a crack 208. Therefore, the patterned epitaxial layer is removed. The restraint layer 206b above the mask cover layer 204a can naturally form a splitting surface during the manufacturing of the light-emitting element along the above-mentioned crack 208. In this way, the epitaxial layer has a low defect density, and the use of a boron material as the buffer layer on the surface of the silicon substrate 200 can reduce the lattice mismatch between the tie layer and the dream substrate. Element 彳 can improve the luminous efficiency and service life of light-emitting elements. Embodiment 3 Hereinafter, a preferred embodiment of the present invention will be described with reference to the sectional views of FIGS. 3A to 3E. First, referring to FIG. 3A, a silicon substrate 300 is provided. Next, a phosphorous contact (BP) buffer layer 302 is formed on the 300 surface of the silicon substrate, for example, the {100%} crystal plane surface, on the 300 surface of the silicon substrate. Then, a gallium nitride binding layer 304 is formed on the surface of the bowl buffer layer 302.
碟化硼3 0 2蠢晶於ί夕基板3 〇 〇之一較佳實施例。先將反 應至度升南至溫度約9 〇 〇〜11 8 〇。c,保持約數分鐘。接著 ’使反應室溫度降至約300。(:上下,再開始供應pC丨3 (或 PH3)至反應室内部,經過約3分鐘後,再進行第一次%^供 應約40分鐘。接著,先停止供應,於相同(約3〇〇。〇 上下保持一段時間,例如·· 5分鐘,再將反應室溫度升高至 約1〇〇〇。(:上下。期間繼續保持PCl3(或PH3)供應。然後,Boron stilbene 3 2 2 is crystallized in one of the preferred embodiments of the substrate 3. The reaction was first raised to degrees south to a temperature of about 900-118. c. Hold for a few minutes. Then, the temperature of the reaction chamber is lowered to about 300. (: Up and down, then start to supply pC 丨 3 (or PH3) to the inside of the reaction chamber, and after about 3 minutes, perform the first% ^ supply for about 40 minutes. Then, stop the supply first, and then the same (about 300) Keep it up and down for a period of time, such as 5 minutes, and then raise the temperature of the reaction chamber to about 1000. (: up and down. During this period, continue to maintain the supply of PCl3 (or PH3). Then,
0769-8557TW ; VTERA-91-006.TW ; Felicia.ptd 第12頁 563182 五、發明說明(10) 於溫度約1 000°C上下再進行第二次BC13供應約60分鐘。期 間繼續保持PC13(或PH3)供應。接著,先停止供應PC13(或 PH3 )與BC13,再於溫度約1 0 0 0。C上下,經過一段時間,例 如:約1 0分鐘,便完成BP緩衝層302的形成,可將反應室溫 度降至室溫後取出。上述BP緩衝層302之形成過程中,始 終持續供應H2氣體至反應室内部。 束缚層304可以透過MOVPE法在上述鱗化硼緩衝層302 表面形成’以降低與碎基底3 〇 〇之晶格不匹配,減少缺陷 產生。其中’氣化嫁束缚層304蟲晶於碎基板3〇〇之一較佳 實施例如下。首先,供應一 &與一 N2氣體,溫度例如約為 350〜500°C下,開始供應MMH。再經過一段時間,例如:3分 鐘後,開始進行第一次TMG供應,時間約為2〇分鐘。接著 ,停止TMG供應,經過一段時間,例如:5分鐘,將反應室 溫度升南至溫度約為8〇〇。(:上下。期間保持MMH供應。接 著,於相同溫度(約800。〇上下進行第二次TMG供應,時 間約為60分鐘。期間保持MMH供應。最後,先停止mmh與 TMG之供應,於相同溫度(約8 〇 〇。c)上下保持一段時間, 例如:30分鐘。再將溫度降至室溫,才完成GaN3〇4磊^曰。 G a N 3 0 4磊晶期間持續供應υ2與n2氣體。 接著,請參照第38圖,可利用適當之化學氣相 法 (chenncal vapor deP〇sition; CVD)形成一磊晶罩 306於上述氮化鎵束缚層3〇4表面,其; 厚度約 1 500 〜1 5000 A。 π Kit 砂’ 接者’睛參照第3 C圖,例如以养备/ ττ ^ \ & _椚如以氫氟酸(HF)類之蝕刻劑0769-8557TW; VTERA-91-006.TW; Felicia.ptd Page 12 563182 V. Description of the invention (10) The second supply of BC13 is performed at a temperature of about 1 000 ° C for about 60 minutes. During the period, the supply of PC13 (or PH3) will be maintained. Then, the supply of PC13 (or PH3) and BC13 was stopped first, and then the temperature was about 100%. After a period of time above and below C, for example, about 10 minutes, the formation of the BP buffer layer 302 is completed, and the reaction room temperature can be reduced to room temperature and then taken out. During the formation of the BP buffer layer 302, H2 gas is continuously supplied to the interior of the reaction chamber. The tie layer 304 can be formed on the surface of the above-mentioned scaled boron buffer layer 302 by MOVPE method to reduce the lattice mismatch with the broken substrate 300 and reduce the generation of defects. Among them, one of the preferred embodiments of the 'vaporized binding layer 304 insect crystals on the broken substrate 300 is as follows. First, supply a & and a N2 gas at a temperature of, for example, about 350 to 500 ° C, and start supplying MMH. After a period of time, for example: after 3 minutes, the first TMG supply is started, the time is about 20 minutes. Then, the TMG supply is stopped, and after a period of time, for example, 5 minutes, the temperature of the reaction chamber is raised to a temperature of about 800. (: Up and down. MMH supply is maintained during the period. Then, the second TMG supply is performed at the same temperature (about 800. 0 up and down for about 60 minutes. MMH supply is maintained during the period. Finally, stop the supply of mmh and TMG, at the same The temperature (about 800.c) is kept up and down for a period of time, for example: 30 minutes. Then the temperature is reduced to room temperature to complete the GaN304 epitaxy. G a N 3 0 4 during the epitaxy, υ2 and n2 are continuously supplied. Next, referring to FIG. 38, an epitaxial mask 306 can be formed on the surface of the above-mentioned gallium nitride tie layer 304 by an appropriate chemical vapor method (chenncal vapor deP0sition; CVD), and the thickness is about 1 500 ~ 1 5000 A. π Kit sand 'receiver' eyes refer to Figure 3 C, for example, to prepare / ττ ^ \ & _ 椚 If using hydrofluoric acid (HF) type etchant
563182 五、發明說明(π) 移除部份上述二氧化矽磊晶罩幕層306,例如以等間隔去 除特定面積之磊晶罩幕層306,以露出部分上述氮化鎵束 缚層304表面’做為視窗區(wind〇w area)III。得到面積 相等且具相等間距之複數圖案化磊晶罩幕層3 〇 6 a。相鄰圖 案化磊晶罩幕層306a之間之視窗區面積約為50 X 4000 β m 〇 然後,請參照第3D圖與第3E圖,磊晶一活性層308a, 308b。先垂直磊晶上述活性層308a於上述視窗區in内之 氮化鎵束缚層304表面,直到上述活性層3〇8a之厚度大於 上述圖案化磊晶罩幕層30 6a之厚度,如第3D圖所示。接著 ’上述活性層308a開始橫向磊晶成長於上述圖案化磊晶罩 幕層306a上方,位於同一圖案化磊晶罩幕層3〇6&兩側之活 性層308a橫向磊晶於上述磊晶罩幕層306a上方相接合後繼 續成長至所需之厚度,以形成一橫向磊晶活性層3〇8b且在 接合處形成一裂縫31〇,如第3E圖所示。 請繼續參照第3E圖,在上述視窗區111所磊晶出的活 性層308a具有相當高的差排密度,不適合用來製作發光元 件。而在上述圖案化磊晶罩幕層3 〇 6a上方所磊晶出的、活性 層3 08b之晶體結構完整,幾乎不會有差排產生,唯接合處 具有裂縫310,因此,取下上述圖案化磊晶罩幕層30 6&上 方之束缚層308b,沿上述裂縫310可自然形成發光元件製 作時之劈裂面。此外,磊晶層之缺陷密度低,且以磷化硼 材質作為矽基底3〇〇表面之緩衝層,又可降低束缚層與矽 基底之晶格不匹配,將該些磊晶層應用於發光元件,可提563182 V. Description of the invention (π) Remove part of the above-mentioned silicon dioxide epitaxial mask curtain layer 306, for example, remove the epitaxial mask curtain layer 306 of a specific area at equal intervals to expose part of the surface of the above-mentioned gallium nitride tie-down layer 304 ' As the window area (window area) III. A plurality of patterned epitaxial hood curtain layers 306 a with the same area and equal pitch are obtained. The area of the window area between the adjacent patterned epitaxial hood curtain layers 306a is about 50 X 4000 β m 〇 Then, please refer to FIGS. 3D and 3E, epitaxial-active layers 308a, 308b. Vertically epitaxial the active layer 308a on the surface of the gallium nitride confinement layer 304 in the window region in until the thickness of the active layer 308a is greater than the thickness of the patterned epitaxial mask curtain layer 306a, as shown in FIG. 3D. As shown. Next, the above-mentioned active layer 308a began to grow laterally on the patterned epitaxial mask layer 306a, and the active layers 308a on both sides of the same patterned epitaxial mask layer 306a were laterally epitaxially grown on the epitaxial mask. After being joined above the curtain layer 306a, it continues to grow to a desired thickness to form a lateral epitaxial active layer 308b and a crack 31 is formed at the joint, as shown in FIG. 3E. Please continue to refer to FIG. 3E. The active layer 308a epitaxially formed in the above-mentioned window region 111 has a relatively high differential density and is not suitable for making light-emitting elements. However, the crystal structure of the active layer 3 08b, which is epitaxially formed above the patterned epitaxial hood curtain layer 3 06a, is complete, and there is almost no difference in row formation. Only the joint has a crack 310. Therefore, the above pattern is removed. The tie layer 308b above the epitaxial mask curtain layer 30 6 & can naturally form a splitting surface during the manufacturing of the light-emitting element along the above-mentioned crack 310. In addition, the defect density of the epitaxial layer is low, and the boron phosphide material is used as the buffer layer on the 300 surface of the silicon substrate, which can reduce the lattice mismatch between the tie layer and the silicon substrate. Component
0769-8557IW ’ VTERA-91..TW ; Felicia.ptd 第14頁 563182 五、發明說明(12) 高發光元件之發光效率與使用壽命。 本發明雖以較佳實施例揭露如上,然其並非用以限定 圍’任何熟習此項技藝者’在不脫離本發明之 精神和範圍内,當可做各種的更動與潤飾,因此=月之 保濩範圍當視後附之申請專利範圍所界定者為準。發明之0769-8557IW ’VTERA-91..TW; Felicia.ptd Page 14 563182 V. Description of the invention (12) Luminous efficiency and service life of high light-emitting elements. Although the present invention is disclosed as above in the preferred embodiment, it is not intended to limit the scope of 'any person skilled in the art' without departing from the spirit and scope of the present invention, and can be used for various modifications and retouching. The scope of guarantee shall be determined by the scope of the attached patent application. Invention
563182563182
為使本發明 下文特舉較佳實 ,上述目的、特徵和優點能更明顯易懂, &例’並配合所附圖式,作詳細說明如下 圖示說明: 浐向# 1曰A f至第1 E圖係顯示根據本發 戸、向磊日日製程剖面圖。 :2 A圖至第2E圖係顯示根據本發 之k向蟲晶製程剖面圖。 之一較佳實施例之 之另一較佳實施例 第3A圖至第3E圖係顯 之橫向磊晶製程剖面圖。 符號說明: 示根據本發明之又一較佳實施例In order to make the following specific examples of the present invention better, the above-mentioned objects, features, and advantages can be more clearly understood. &Amp; Examples' and the accompanying drawings are described in detail as follows: 浐 向 # 1 1A f 至Figure 1E is a sectional view of the Xiang Lei-ri manufacturing process according to the present invention. : 2A to 2E are cross-sectional views of the k-direction worm crystal manufacturing process according to the present invention. Another preferred embodiment of another preferred embodiment FIGS. 3A to 3E are cross-sectional views showing the lateral epitaxial process. Explanation of symbols: Shows another preferred embodiment according to the present invention
100、200、300〜矽基底; 102、204、306〜磊晶罩幕層; S20 0〜熱氧化法; 10 2a、2 04a、306a〜圖案化磊晶罩幕層; 104a〜垂直磊晶磷化硼; 104b〜橫向蠢晶碟化棚; 106、208、310〜裂縫; 202、302〜磷化硼緩衝層; 206a〜垂直磊晶束缚層; 206b〜橫向磊晶束缚層; 3 0 4〜氮化鎵束缚層; 3 0 8 a〜垂直蟲晶活性層; 3 0 8 b〜橫向磊晶活性層。100, 200, 300 ~ silicon substrate; 102, 204, 306 ~ epitaxial cover curtain layer; S20 0 ~ thermal oxidation method; 10 2a, 2 04a, 306a ~ patterned epitaxial cover curtain layer; 104a ~ vertical epitaxial phosphor Boronide; 104b ~ horizontal stupid crystal dish shed; 106, 208, 310 ~ crack; 202, 302 ~ boron phosphide buffer layer; 206a ~ vertical epitaxial tie layer; 206b ~ lateral epitaxial tie layer; 3 0 4 ~ GaN restraint layer; 308a ~ vertical worm crystal active layer; 308b ~ lateral epitaxial active layer.
0769-8557TWF ; VTERA-91-006-TlV : Felicia.ptd 第16頁0769-8557TWF; VTERA-91-006-TlV: Felicia.ptd Page 16
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CN104409336A (en) * | 2014-11-18 | 2015-03-11 | 中国科学院半导体研究所 | Method for eliminating epitaxial layer growth mismatch by using low melting point metal |
CN114314505A (en) * | 2021-12-30 | 2022-04-12 | 中山大学 | Super hard pure isotope10Preparation of BP semiconductor micro-nano wire |
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CN104409336A (en) * | 2014-11-18 | 2015-03-11 | 中国科学院半导体研究所 | Method for eliminating epitaxial layer growth mismatch by using low melting point metal |
CN104409336B (en) * | 2014-11-18 | 2017-07-14 | 中国科学院半导体研究所 | A kind of method that utilization low-melting-point metal eliminates outer layer growth thermal mismatching |
CN114314505A (en) * | 2021-12-30 | 2022-04-12 | 中山大学 | Super hard pure isotope10Preparation of BP semiconductor micro-nano wire |
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