JP2000091253A - Method of producing gallium nitride based compound semiconductor - Google Patents

Method of producing gallium nitride based compound semiconductor

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Publication number
JP2000091253A
JP2000091253A JP11289870A JP28987099A JP2000091253A JP 2000091253 A JP2000091253 A JP 2000091253A JP 11289870 A JP11289870 A JP 11289870A JP 28987099 A JP28987099 A JP 28987099A JP 2000091253 A JP2000091253 A JP 2000091253A
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JP
Japan
Prior art keywords
gallium nitride
compound semiconductor
based compound
layer
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11289870A
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Japanese (ja)
Other versions
JP4055304B2 (en
Inventor
Norikatsu Koide
典克 小出
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Toyoda Gosei Co Ltd
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Toyoda Gosei Co Ltd
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Publication of JP2000091253A publication Critical patent/JP2000091253A/en
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Abstract

PROBLEM TO BE SOLVED: To form a semiconductor layer without crack and dislocation by etching in the shape of an island with a dot-shape, a stripe-shape or a grid-shape and laterally growing a second gallium nitride based compound semiconductor on an exposed surface of a substrate using an island-shaped first gallium nitride based compound semiconductor as core. SOLUTION: An SiO2 layer is etched in a specified form by photolithography. Next an Al0.15Ga0.85N layer 2 is dry-etched using the SiO2 layer with the specified shape as mask. A GaN layer 3 is epitaxially grown on a substrate 1 by MOVPE method. At that time, the GaN layer 3 is epitaxially grown on an Al0.15Ga0.85N layer 2 using the Al0.15Ga0.85N layer 2 as core. But the GaN layer dose not epitaxially grow on an exposed region A of a silicon substrate 1. The GaN is epitaxially grown on the exposed region A of the silicon substrate 1 in the direction of the surface of the silicon substrate 1 using the GaN grown on the Al0.15Ga0.85N layer 2 as core.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、一般式Alx Gay In
1-x-y N(0 ≦x ≦1,0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリ
ウム系化合物半導体とその製造方法に関する。特に、基
板上に横方向エピタキシャル成長(ELO)を用いた方
法に関する。
The present invention relates to a compound represented by the general formula: Al x Ga y In
The present invention relates to a gallium nitride-based compound semiconductor of 1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) and a method of manufacturing the same. In particular, it relates to a method using lateral epitaxial growth (ELO) on a substrate.

【0002】[0002]

【従来の技術】窒化ガリウム系化合物半導体は、発光ス
ペクトルが紫外から赤色の広範囲に渡る直接遷移型の半
導体であり、発光ダイオード(LED) やレーザダイオード
(LD)等の発光素子に応用されている。この窒化ガリウム
系化合物半導体では、通常、サファイア上に形成してい
る。
2. Description of the Related Art Gallium nitride-based compound semiconductors are direct-transition semiconductors whose emission spectrum covers a wide range from ultraviolet to red, and include light-emitting diodes (LEDs) and laser diodes.
(LD) and the like. This gallium nitride-based compound semiconductor is usually formed on sapphire.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来技術では、サファイア基板上に窒化ガリウム系化合物
半導体を形成すると、サファイアと窒化ガリウム系化合
物半導体との熱膨張係数差により、半導体層にクラッ
ク、そりが発生し、ミスフットにより転位が発生し、こ
のため素子特性が良くないという問題がある。
However, in the prior art, when a gallium nitride-based compound semiconductor is formed on a sapphire substrate, cracks and warpages occur in the semiconductor layer due to the difference in thermal expansion coefficient between sapphire and the gallium nitride-based compound semiconductor. Occurs, and dislocation occurs due to a misfoot, which causes a problem that device characteristics are not good.

【0004】従って、本発明の目的は、上記課題に鑑
み、クラック、転位のない窒化ガリウム系半導体層を形
成することで、素子特性を向上させると共に、効率のよ
い製造方法を実現することである。
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a gallium nitride-based semiconductor layer free from cracks and dislocations in view of the above problems, thereby improving device characteristics and realizing an efficient manufacturing method. .

【0005】[0005]

【課題を解決するための手段及び作用効果】上記の課題
を解決するために、請求項1に記載の発明は、基板上に
第1の窒化ガリウム系化合物半導体を成長させ、その
後、その第1の窒化ガリウム系化合物半導体を、前記基
板の露出部が散在するように、点状、ストライプ状又は
格子状等の島状態にエッチングし、その後、島状態の第
1の窒化ガリウム系化合物半導体を核として成長する
が、基板の露出部を核としてはエピタキシャル成長しな
い第2の窒化ガリウム系化合物半導体を成長させ、基板
の露出面上は横方向成長により形成し、第2の窒化ガリ
ウム系化合物半導体の上に窒化ガリウム系化合物半導体
から成る素子層を形成することを特徴とする窒化ガリウ
ム系化合物半導体の製造方法である。
In order to solve the above-mentioned problems, according to the present invention, a first gallium nitride-based compound semiconductor is grown on a substrate, and then the first gallium nitride-based compound semiconductor is grown. Gallium nitride-based compound semiconductor is etched into islands such as dots, stripes, or lattices so that the exposed portions of the substrate are scattered, and then the first gallium nitride-based compound semiconductor in the islands is nucleated. A second gallium nitride-based compound semiconductor that grows as a nucleus but does not epitaxially grow with the exposed portion of the substrate as a nucleus is grown, and the exposed surface of the substrate is formed by lateral growth, and Forming a device layer made of a gallium nitride-based compound semiconductor on the substrate.

【0006】尚、ここでいう横方向とは、基板の面方向
を意味する。これにより、第2の窒化ガリウム系化合物
半導体は、基板の露出部には成長せず、第1の窒化ガリ
ウム系化合物半導体上に3次元的、即、面方向にも成長
し、基板の上方向では一様に成長される。この結果、基
板と窒化ガリウム系化合物半導体との間のミスフィット
に基づく転位は縦方向に成長し、横方向へは成長しな
い。よって、基板の露出部上の第2の窒化ガリウム系化
合物半導体の縦方向の貫通転位はなくなり、第1の窒化
ガリウム系化合物半導体の上の部分だけ縦方向の貫通転
位が残る。この結果、第2の窒化ガリウム系化合物半導
体の縦方向の貫通転位の面密度が極めて減少する。従っ
て、第2の窒化ガリウム系化合物半導体の結晶性が向上
する。また、基板の露出部とその上の第2の窒化ガリウ
ム系化合物半導体とは化学的に接合していないので、第
2の窒化ガリウム系化合物半導体のそりが防止されると
共に応力歪みがその半導体に入ることが抑制される。
[0006] The term "horizontal direction" used herein means the plane direction of the substrate. As a result, the second gallium nitride-based compound semiconductor does not grow on the exposed portion of the substrate, but also grows three-dimensionally and immediately in the plane direction on the first gallium nitride-based compound semiconductor. Grows uniformly. As a result, dislocations due to misfit between the substrate and the gallium nitride-based compound semiconductor grow in the vertical direction and do not grow in the horizontal direction. Therefore, the threading dislocations in the vertical direction of the second gallium nitride-based compound semiconductor on the exposed portion of the substrate are eliminated, and threading dislocations in the vertical direction remain only in the portion above the first gallium nitride-based compound semiconductor. As a result, the areal density of threading dislocations in the vertical direction of the second gallium nitride-based compound semiconductor is extremely reduced. Therefore, the crystallinity of the second gallium nitride-based compound semiconductor is improved. Further, since the exposed portion of the substrate and the second gallium nitride-based compound semiconductor thereon are not chemically bonded, warpage of the second gallium nitride-based compound semiconductor is prevented and stress distortion is applied to the semiconductor. The entry is suppressed.

【0007】請求項2の発明は、基板上にバッファ層を
形成し、そのバッファ層の上に第1の窒化ガリウム系化
合物半導体を成長させ、その後、バッファ層及び第1の
窒化ガリウム系化合物半導体を、基板の露出部が散在す
るように、点状、ストライプ状又は格子状等の島状態に
エッチングし、その後、島状態の第1の窒化ガリウム系
化合物半導体を核として成長するが、基板の露出部を核
としてはエピタキシャル成長しない第2の窒化ガリウム
系化合物半導体を成長させ、基板の露出面上は横方向成
長により形成することを特徴特徴とする窒化ガリウム系
化合物半導体の製造方法である。
According to a second aspect of the present invention, a buffer layer is formed on a substrate, a first gallium nitride compound semiconductor is grown on the buffer layer, and thereafter, the buffer layer and the first gallium nitride compound semiconductor are grown. Is etched into islands such as dots, stripes, or grids so that the exposed portions of the substrate are scattered, and then grown using the first gallium nitride-based compound semiconductor in the islands as a nucleus. A method for manufacturing a gallium nitride-based compound semiconductor, characterized in that a second gallium nitride-based compound semiconductor that does not epitaxially grow is grown with the exposed portion as a nucleus, and that the exposed surface of the substrate is formed by lateral growth.

【0008】請求項3の発明は、基板はサファイア、シ
リコン、又は、炭化珪素であることを特徴とする。 請
求項4の発明は、バッファ層は、任意組成比のAlGaN 、
任意組成比のAlGaInN であること特徴とする。請求項5
の発明は、第1の窒化ガリウム系化合物半導体と第2の
窒化ガリウム系化合物半導体とは同一組成比であること
を特徴とする。請求項6の発明は、第1の窒化ガリウム
系化合物半導体の厚さは500Å〜2000Åであるこ
とを特徴とする。請求項7の発明は、露出部はエッチン
グして残された前記第1の窒化ガリウム系化合物半導体
よりも広いことを特徴とする。
According to a third aspect of the present invention, the substrate is made of sapphire, silicon, or silicon carbide. According to a fourth aspect of the present invention, the buffer layer includes AlGaN having an arbitrary composition ratio,
It is characterized by being AlGaInN having an arbitrary composition ratio. Claim 5
According to the invention, the first gallium nitride-based compound semiconductor and the second gallium nitride-based compound semiconductor have the same composition ratio. The invention according to claim 6 is characterized in that the thickness of the first gallium nitride-based compound semiconductor is from 500 to 2000 degrees. The invention according to claim 7 is characterized in that the exposed portion is wider than the first gallium nitride-based compound semiconductor left after etching.

【0009】上記の発明において、基板には、サファイ
ア、シリコン、又は、炭化珪素を用いることができる。
そられの基板上で得られる第2の窒化ガリウム系化合物
半導体の結晶性を向上させることができる。
In the above invention, sapphire, silicon, or silicon carbide can be used for the substrate.
The crystallinity of the second gallium nitride-based compound semiconductor obtained on the substrate can be improved.

【0010】上記の発明において、基板をシリコン、島
状態に形成される第1の窒化ガリウム系化合物半導体を
アルミニウムを含む窒化ガリウム系化合物半導体、第2
の窒化ガリウム系化合物半導体をアルミニウムを含まな
い窒化ガリウム系化合物半導体とすることも可能であ
る。この場合には、アルミニウムを含む窒化ガリウム系
化合物半導体はシリコン上にエピタキシャル成長する
が、アルミニウムを含まない窒化ガリウム系化合物半導
体はシリコン上にエピタキシャル成長しない。よって、
シリコン基板上に島状態の第1の窒化ガリウム系化合物
半導体を形成し、その後、その第1の窒化ガリウム系化
合物半導体上にはエピタキシャル成長するが、シリコン
基板の露出部にはエピタキシャル成長しない第2の窒化
ガリウム系化合物半導体を形成することができる。これ
により、シリコン基板の露出部上は、第1の窒化ガリウ
ム系化合物半導体を核として、第2の窒化ガリウム系化
合物半導体が横方向にエピタキシャル成長することにな
り、結晶性の高い窒化ガリウム系化合物半導体を得るこ
とができる。
In the above invention, the substrate is silicon, the first gallium nitride compound semiconductor formed in an island state is a gallium nitride compound semiconductor containing aluminum,
The gallium nitride-based compound semiconductor may be a gallium nitride-based compound semiconductor containing no aluminum. In this case, the gallium nitride compound semiconductor containing aluminum grows epitaxially on silicon, but the gallium nitride compound semiconductor not containing aluminum does not grow epitaxially on silicon. Therefore,
A first gallium nitride-based compound semiconductor in an island state is formed on a silicon substrate, and thereafter, a second nitride that is epitaxially grown on the first gallium nitride-based compound semiconductor but is not epitaxially grown on an exposed portion of the silicon substrate A gallium-based compound semiconductor can be formed. As a result, the second gallium nitride-based compound semiconductor is epitaxially grown laterally on the exposed portion of the silicon substrate with the first gallium nitride-based compound semiconductor as a nucleus, and the gallium nitride-based compound semiconductor having high crystallinity is obtained. Can be obtained.

【0011】[0011]

【発明の実施の形態】以下、本発明を具体的な実施例に
基づいて説明する。 (第1実施例)図1は、本発明の第1実施例に係わる窒
化ガリウム系化合物半導体の断面構成を示した模式図で
ある。シリコン基板1の上には膜厚約1000ÅのAl0.15Ga
0.85N層(第1の窒化ガリウム系化合物半導体)2がス
トライプ状(図1(b))又は格子状(図1(c))に
形成されている。又、シリコン基板1上の層2を除いた
露出領域A及び層2の上面領域Bには膜厚約10μmのGa
N 層(第2の窒化ガリウム系化合物半導体)3が形成さ
れている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on specific embodiments. (First Embodiment) FIG. 1 is a schematic view showing a cross-sectional structure of a gallium nitride-based compound semiconductor according to a first embodiment of the present invention. On the silicon substrate 1, Al 0.15 Ga having a thickness of about 1000
The 0.85 N layer (first gallium nitride-based compound semiconductor) 2 is formed in a stripe shape (FIG. 1B) or a lattice shape (FIG. 1C). The exposed region A excluding the layer 2 on the silicon substrate 1 and the upper surface region B of the layer 2 have a thickness of about 10 μm.
An N layer (second gallium nitride-based compound semiconductor) 3 is formed.

【0012】次に、このGaN 系化合物半導体の製造方法
について説明する。この半導体は、スパッタリング法及
び有機金属気相成長法(以下「MOVPE 」と略す)により
製造された。MOVPE で用いられたガスは、アンモニア(N
H3) 、キャリアガス(H2,N2) 、トリメチルガリウム(Ga
(CH3)3)(以下「TMG 」と記す)、トリメチルアルミニ
ウム(Al(CH3)3)(以下「TMA 」と記す)である。
Next, a method of manufacturing the GaN-based compound semiconductor will be described. This semiconductor was manufactured by a sputtering method and a metal organic chemical vapor deposition method (hereinafter abbreviated as "MOVPE"). The gas used in MOVPE was ammonia (N
H 3 ), carrier gas (H 2 , N 2 ), trimethylgallium (Ga
(CH 3 ) 3 ) (hereinafter referred to as “TMG”) and trimethylaluminum (Al (CH 3 ) 3 ) (hereinafter referred to as “TMA”).

【0013】まず、フッ酸系溶液(HF:H2O=1:1)を用いて
洗浄した (111)面、 (100)面、又は、(110) 面を主面と
したn−シリコン基板1をMOVPE装置の反応室に載
置されたサセプタに装着する。次に、常圧でH2を流速2
liter/分で約10分間反応室に流しながら温度1150℃で基
板1をベーキングした。
First, an n-silicon substrate having a (111) plane, a (100) plane, or a (110) plane as a main surface, which has been washed with a hydrofluoric acid-based solution (HF: H 2 O = 1: 1). 1 is mounted on a susceptor placed in the reaction chamber of the MOVPE apparatus. Next, flow H 2 at normal pressure at a flow rate of 2
The substrate 1 was baked at a temperature of 1150 ° C. while flowing into the reaction chamber at liter / minute for about 10 minutes.

【0014】この後、基板1の温度を1150℃に保持し、
N2又はH2を10liter/分、NH3 を10liter/分、TMG を1.0
×10-4モル/分、トリメチルアルミニウム(Al(CH3)3)
(以下「TMA 」と記す)を1.0 ×10-5モル/分、H2ガス
により0.86ppm に希釈されたシランを20×10-8モル/分
で供給し、膜厚約1000Å、Si濃度1.0 ×1018/cm3のAl0.
15Ga0.85N 層2を形成した。
Thereafter, the temperature of the substrate 1 is maintained at 1150 ° C.
N 2 or H 2 10 liter / min, NH 3 10 liter / min, TMG 1.0
× 10 -4 mol / min, trimethyl aluminum (Al (CH 3 ) 3 )
(Hereinafter referred to as “TMA”) was supplied at 1.0 × 10 −5 mol / min, and silane diluted to 0.86 ppm with H 2 gas was supplied at 20 × 10 −8 mol / min. × 10 18 / cm 3 Al 0.
A 15 Ga 0.85 N layer 2 was formed.

【0015】次に、この層2の上に、一様に、SiO2層を
スパッタリングにより膜厚約2000Åに形成し、レジスト
を塗布して、フォトリソグラフィによりSiO2層を所定形
状にエッチングした。次に、この所定形状のSiO2層をマ
スクとして、Al0.15Ga0.85N層2をドライエッチングし
た。このようにして、層2の上部領域Bの幅bが約5μ
m、基板1の露出領域Aの間隔aが約5μmのストライ
プ状(図1(b))又は格子状(図1(c))に形成し
た。
Next, an SiO 2 layer was uniformly formed on this layer 2 to a thickness of about 2000 ° by sputtering, a resist was applied, and the SiO 2 layer was etched into a predetermined shape by photolithography. Next, the Al 0.15 Ga 0.85 N layer 2 was dry-etched using the SiO 2 layer having the predetermined shape as a mask. Thus, the width b of the upper region B of the layer 2 is about 5 μm.
m, and the distance a between the exposed regions A of the substrate 1 was about 5 μm in the form of a stripe (FIG. 1B) or a grid (FIG. 1C).

【0016】次に、MOVPE 法により基板1の温度を1100
℃にしてN2又はH2を20liter/分、NH 3 を10liter/分、TM
G を1.0 ×10-4モル/分、H2ガスにより0.86ppm に希釈
されたシランを20×10-8モル/分で供給して、膜厚約10
μmのGaN 層3をエピタキシャル成長させた。このと
き、GaN は、Al0.15Ga0.85N 層2の上に、このAl0.15Ga
0.85N を核として、エピタキシャル成長する。しかし、
シリコン基板1の露出領域Aの上には、GaN はエピタキ
シャル成長しない。そして、シリコン基板1の露出領域
Aでは、Al0.15Ga0.85N 層2上に成長したGaN を核とし
て、GaN が横方向、即ち、シリコン基板1の面方向に沿
ってエピタキシャル成長する。このGaN 層3は、Al0.15
Ga0.85N 層2の上部領域Bにだけ縦方向に転位が生じ、
シリコン基板1の露出領域Aでは、横方向のエピタキシ
ャル成長であるために、転位は生じない。シリコン基板
1の露出領域Aの面積をAl0.15Ga0.85N 層2の上部領域
Bの面積に比べて大きくすることで、広い面積に渡って
結晶性の良好なGaN 層3を形成することができる。ま
た、シリコン基板1とその上のGaN は化学的に結合して
いないために、GaN 層3のそり、応力歪みを極めて大き
く減少させることができる。
Next, the temperature of the substrate 1 is set to 1100 by the MOVPE method.
° C and NTwoOr HTwo20 liter / min, NH Three10 liter / min, TM
G is 1.0 × 10-FourMol / min, HTwoDiluted to 0.86 ppm by gas
20 × 10-8The film thickness is about 10
A μm GaN layer 3 was epitaxially grown. This and
GaN, Al0.15Ga0.85On the N layer 2, this Al0.15Ga
0.85Epitaxial growth with N as a nucleus. But,
On the exposed region A of the silicon substrate 1, GaN is epitaxy.
Shall not grow. Then, the exposed region of the silicon substrate 1
In A, Al0.15Ga0.85With GaN grown on the N layer 2 as the core
As a result, GaN is oriented in the horizontal direction, that is, in the plane direction of the silicon substrate 1.
Epitaxial growth. This GaN layer 3 is made of Al0.15
Ga0.85Dislocations occur in the vertical direction only in the upper region B of the N layer 2,
In the exposed area A of the silicon substrate 1, a lateral epitaxy
Dislocation does not occur because of the thermal growth. Silicon substrate
The area of the exposed area A is0.15Ga0.85Upper area of N layer 2
By making it larger than the area of B, over a large area
The GaN layer 3 having good crystallinity can be formed. Ma
Also, the silicon substrate 1 and the GaN thereon are chemically bonded.
Therefore, warpage and stress strain of the GaN layer 3 are extremely large.
Can be reduced.

【0017】尚、上記実施例において、ストライプ状又
は格子状に形成されたシリコン基板1の露出領域Aの幅
aを約5μmとしたが、露出領域Aの幅aが10μmを超
えると横方向の成長に長時間必要となり、シリコン基板
1の露出領域Aの幅aが1μm未満になると、良好なGa
N 膜の形成が困難となるので、望ましくは1〜10μmの
範囲が良い。また、Al0.15Ga0.85N 層2の上部領域Bの
幅bを5μmとしたが、Al0.15Ga0.85N 層2の上部領域
Bの幅bが10μmを超えると転位発生の確率が増大し、
上部領域Bの幅bが1μm未満になると横方向の成長の
ための核形成が良好でできず、したがって、結晶性の良
い横方向のエピタキシャル成長が困難となる。よって、
望ましくは1〜10μmの範囲が良い。また、層3の結晶
性の観点から、シリコン基板1の露出領域Aの幅aのAl
0.15Ga0.85N 層2の上部領域Bの幅bに対する割合a/
bは1〜10が望ましい。
In the above embodiment, the width a of the exposed region A of the silicon substrate 1 formed in a stripe or lattice is set to about 5 μm. However, when the width a of the exposed region A exceeds 10 μm, the width a in the horizontal direction is increased. If the width a of the exposed region A of the silicon substrate 1 is less than 1 μm, a good Ga
Since it becomes difficult to form an N 2 film, the thickness is preferably in the range of 1 to 10 μm. Although the width b of Al 0.15 Ga 0.85 upper region of the N layer 2 B and 5 [mu] m, the probability of Al 0.15 Ga 0.85 width b of the upper region B of the N layer 2 is more than 10μm and dislocation generation is increased,
When the width “b” of the upper region B is less than 1 μm, nucleation for lateral growth cannot be performed well, and therefore, lateral epitaxial growth with good crystallinity becomes difficult. Therefore,
Desirably, the range is 1 to 10 μm. Further, from the viewpoint of the crystallinity of the layer 3, the width a of the exposed region A of the silicon substrate 1
0.15 Ga 0.85 N Ratio a / to width b of upper region B of layer 2
b is preferably 1 to 10.

【0018】尚、上記実施例では、シリコン基板を用い
たが、他の導電性基板、サファイア基板、炭化珪素等を
用いることができる。導電性基板を用いた場合には、基
板の裏面と基板上に形成された素子層の最上層とに電極
を形成して、基板面に垂直に電流を流すことができ、発
光ダイオード、レーザ等における電流供給効率が向上す
る。本実施例では、層2の組成をAl0.15Ga0.85N とした
が、任意組成比の一般式Al x Gay In1-x-y N(0 ≦x ≦1,
0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリウム系化合物半導体
を用いることができる。シリコン基板1上にエピタキシ
ャル成長させるには、Alx Ga1-x N(0 <x ≦1)(AlN を
含む) が望ましい。また、層3は、任意組成比の一般式
Alx Gay In1-x-y N(0 ≦x ≦1,0 ≦y ≦1,0 ≦x+y ≦1)
の窒化ガリウム系化合物半導体を用いることができ、層
2と同一組成比であっても、異なる組成比であっても良
いが、基板に対してエピタキシャル成長しない組成比と
する必要がある。又、本実施例では、層2の膜厚を約10
00Åとしたが、層2は厚いとクラックが多くなり、薄い
と層2を核として層3が成長しない。よって、層2の厚
さは、500 Å〜2000Åが望ましい。
In the above embodiment, a silicon substrate is used.
However, other conductive substrates, sapphire substrates, silicon carbide, etc.
Can be used. If a conductive substrate is used,
Electrodes on the back of the plate and the top layer of the device layer formed on the substrate
To allow current to flow perpendicular to the substrate surface.
Improves current supply efficiency in photodiodes, lasers, etc.
You. In this embodiment, the composition of the layer 2 is changed to Al0.15Ga0.85N
Is an arbitrary composition ratio of the general formula Al xGayIn1-xyN (0 ≤x ≤1,
Gallium nitride-based compound semiconductor with 0 ≤ y ≤ 1,0 ≤ x + y ≤ 1)
Can be used. Epitaxy on silicon substrate 1
Al growthxGa1-xN (0 <x ≦ 1) (AlN
Is desirable. The layer 3 has a general formula of an arbitrary composition ratio.
AlxGayIn1-xyN (0 ≤x ≤1,0 ≤y ≤1,0 ≤x + y ≤1)
Gallium nitride-based compound semiconductor can be used.
The composition ratio may be the same as 2, or may be a different composition ratio.
However, the composition ratio that does not epitaxially grow with the substrate
There is a need to. In this embodiment, the thickness of the layer 2 is set to about 10
However, when the thickness of the layer 2 is large, cracks increase and the layer 2 is thin.
Layer 3 does not grow with layer 2 as a nucleus. Therefore, the thickness of layer 2
It is desirable that the size is 500 to 2000 mm.

【0019】(第2実施例)上述の第1実施例では、第
1の窒化ガリウム系化合物半導体として、Al0.15Ga 0.85
N 層2を1層だけ設けられている。本実施例では、第1
の窒化ガリウム系化合物半導体として、Al0.15Ga0.85N
層21とその上のGaN 層22の2層で形成したことを特
徴とする。
(Second Embodiment) In the first embodiment, the second embodiment
Al gallium nitride based compound semiconductor0.15Ga 0.85
Only one N layer 2 is provided. In the present embodiment, the first
AlGaN as a gallium nitride based compound semiconductor0.15Ga0.85N
It is characterized in that it was formed of two layers, a layer 21 and a GaN layer 22 thereon.
Sign.

【0020】図2は、本発明の第2実施例に係わる窒化
ガリウム系化合物半導体の断面構成を示した模式図であ
る。シリコン基板1の上には膜厚約1000ÅのAl0.15Ga
0.85N層21が形成され、この層21上に、膜厚約1000
ÅのGaN 層22が形成されている。層21と層22とで
第1の窒化ガリウム系化合物半導体が構成される。これ
らの層21と層22層は、第1実施例と同様にストライ
プ状又は格子状に形成されている。層22及びシリコン
基板1の露出領域A上には、膜厚約10μmのGaN層3が
形成されている。
FIG. 2 is a schematic diagram showing a sectional structure of a gallium nitride-based compound semiconductor according to a second embodiment of the present invention. On the silicon substrate 1, Al 0.15 Ga having a thickness of about 1000
0.85 N layer 21 is formed, and a thickness of about 1000
A GaN layer 22 is formed. The layer 21 and the layer 22 constitute a first gallium nitride-based compound semiconductor. These layers 21 and 22 are formed in a stripe shape or a lattice shape as in the first embodiment. On the layer 22 and the exposed region A of the silicon substrate 1, a GaN layer 3 having a thickness of about 10 μm is formed.

【0021】この第2実施例の窒化ガリウム系化合物半
導体は、第1実施例において、層21、層22をシリコ
ン基板1上に一様に形成した後、所定パターンのSiO2
をマスクにして、層21、層22をドライエッチングで
図1(b)又は(c)に示すように、ストライプ状又は
格子状にする。その後のGaN 層3の形成は第1実施例と
同一である。
In the gallium nitride-based compound semiconductor of the second embodiment, the layers 21 and 22 are formed uniformly on the silicon substrate 1 in the first embodiment, and then a predetermined pattern of SiO 2 layer is used as a mask. , The layer 21 and the layer 22 are formed into a stripe shape or a lattice shape by dry etching as shown in FIG. The subsequent formation of the GaN layer 3 is the same as in the first embodiment.

【0022】膜厚約10μmのGaN 層3の成長過程は以下
の通りである。GaN は、GaN 層22の上部領域BのGaN
を核として、面に垂直方向に成長する。そして、シリコ
ン基板1の露出領域Aでは、層22の露出領域B上に成
長したGaN を核として、GaNが横方向にエピタキシャル
成長する。このようにして、本実施例では、GaN がGaN
を核として縦方向にも横方向にもエピタキシャル成長す
るので、第1実施例よりも、さらに、結晶性の高いGaN
が得られる。
The process of growing the GaN layer 3 having a thickness of about 10 μm is as follows. GaN is the GaN in the upper region B of the GaN layer 22.
With the nucleus as a nucleus, it grows in the direction perpendicular to the plane. Then, in the exposed region A of the silicon substrate 1, GaN epitaxially grows in the lateral direction with GaN grown on the exposed region B of the layer 22 as a nucleus. Thus, in the present embodiment, GaN is
Since GaN is used as a nucleus for epitaxial growth in both the vertical and horizontal directions, GaN having higher crystallinity than in the first embodiment can be obtained.
Is obtained.

【0023】尚、本実施例において、層22と層3とを
GaN としたが、層22と層3とを同一組成比の一般式Al
x Gay In1-x-y N(0 ≦x ≦1,0 ≦y ≦1,0 ≦x+y ≦1)の
窒化ガリウム系化合物半導体としても良い。但し、層2
は基板に対してエピタキシャル成長しない組成比とする
必要がある。基板にシリコンを用いた場合には、Alが含
まれない窒化ガリウム系化合物半導体を用いるのが良
い。勿論、層22と第2の層3との組成比を変化させて
も良い。
In this embodiment, the layer 22 and the layer 3 are
Although GaN was used, the layer 22 and the layer 3 were formed by the general formula Al having the same composition ratio.
x Ga y In 1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) of may be gallium nitride-based compound semiconductor. However, layer 2
Must be a composition ratio that does not cause epitaxial growth with respect to the substrate. When silicon is used for the substrate, a gallium nitride-based compound semiconductor containing no Al is preferably used. Of course, the composition ratio between the layer 22 and the second layer 3 may be changed.

【0024】上記の全実施例において、シリコン基板1
又は、シリコン基板1から層2又は層22までの部分C
を研磨又はエッチングにより除去することにより、無転
位のGaN 基板を得ることができる。上記の全実施例にお
いて、層3にGaN を用いたが、任意組成比のInGaN を用
いても良い。また、層3の上に、他の材料の半導体層を
形成しても良い。特に、窒化ガリウム系化合物半導体を
さらに成長させることで、発光ダイオード、レーザ等の
特性の良好な素子を得ることができる。また、上記の全
実施例において、基板1と層2、又は層22の間に、任
意組成比のAlGaN のバッファ層や AlGaInNのバッファ層
を設けても良い。このバッファ層は層2、層22の単結
晶成長温度よりも低温で形成されるアモルファス状又は
微結晶の混在したアモルファス等の結晶構造をしたもの
である。
In all the above embodiments, the silicon substrate 1
Or a portion C from the silicon substrate 1 to the layer 2 or the layer 22
Is removed by polishing or etching, whereby a dislocation-free GaN substrate can be obtained. Although GaN is used for the layer 3 in all of the above embodiments, InGaN having an arbitrary composition ratio may be used. Further, a semiconductor layer of another material may be formed on the layer 3. In particular, by further growing a gallium nitride-based compound semiconductor, an element having good characteristics such as a light emitting diode and a laser can be obtained. In all of the above embodiments, an AlGaN buffer layer or an AlGaInN buffer layer having an arbitrary composition ratio may be provided between the substrate 1 and the layer 2 or the layer 22. This buffer layer has a crystal structure such as amorphous or amorphous mixed with microcrystals formed at a temperature lower than the single crystal growth temperature of the layers 2 and 22.

【0025】素子層としてSQW又はMQW等の量子構
造を有した発光ダイオード、レーザを形成することがで
きる。上記の全実施例において、MOVPE 法は常圧雰囲気
中で行われたが、減圧成長下で行っても良い。また、常
圧、減圧の組み合わせで行なって良い。本発明で得られ
たGaN 系化合物半導体は、LEDやLDの発光素子に利
用可能であると共に受光素子及び電子ディバイスにも利
用することができる。
A light emitting diode or a laser having a quantum structure such as SQW or MQW as an element layer can be formed. In all of the above embodiments, the MOVPE method was performed in a normal pressure atmosphere, but may be performed under reduced pressure growth. Further, it may be performed under a combination of normal pressure and reduced pressure. The GaN-based compound semiconductor obtained by the present invention can be used not only for light-emitting devices such as LEDs and LDs, but also for light-receiving devices and electronic devices.

【0026】尚、本件出願には、基板上に第1の窒化ガ
リウム系化合物半導体を成長させ、その後、その第1の
窒化ガリウム系化合物半導体を、基板の露出部が散在す
るように、点状、ストライプ状又は格子状等の島状態に
エッチングし、その後、島状態の第1の窒化ガリウム系
化合物半導体を核として成長するが、基板の露出部を核
としてはエピタキシャル成長しない第2の窒化ガリウム
系化合物半導体を成長させ、基板の露出面上は横方向成
長により形成することを特徴とする窒化ガリウム系化合
物半導体の製造方法も開示されている。
In the present application, a first gallium nitride-based compound semiconductor is grown on a substrate, and then the first gallium nitride-based compound semiconductor is placed in a dot-like manner so that exposed portions of the substrate are scattered. Is etched in an island state such as a stripe or lattice, and then grown using the first gallium nitride-based compound semiconductor in the island state as a nucleus, but not epitaxially grown using the exposed portion of the substrate as a nucleus. There is also disclosed a method of manufacturing a gallium nitride-based compound semiconductor, which comprises growing a compound semiconductor and forming the exposed surface of the substrate by lateral growth.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の具体的な第1実施例に係わる窒化ガリ
ウム系化合物半導体の構造を示した模式的断面図。
FIG. 1 is a schematic sectional view showing the structure of a gallium nitride-based compound semiconductor according to a first specific example of the present invention.

【図2】本発明の具体的な第2実施例に係わる窒化ガリ
ウム系化合物半導体の構造を示した模式的断面図。
FIG. 2 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor according to a second specific example of the present invention.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 Al0.15Ga0.85N 層(第1の窒化ガリウム系化
合物半導体) 3 GaN 層(第2の窒化ガリウム系化合物半導
体) 21 Al0.15Ga0.85N 層(第1の窒化ガリウム系化
合物半導体) 22 GaN 層(第1の窒化ガリウム系化合物半導
体)
Reference Signs List 1 silicon substrate 2 Al 0.15 Ga 0.85 N layer (first gallium nitride compound semiconductor) 3 GaN layer (second gallium nitride compound semiconductor) 21 Al 0.15 Ga 0.85 N layer (first gallium nitride compound semiconductor) 22 GaN layer (first gallium nitride compound semiconductor)

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】基板上に第1の窒化ガリウム系化合物半導
体を成長させ、その後、その第1の窒化ガリウム系化合
物半導体を、前記基板の露出部が散在するように、点
状、ストライプ状又は格子状等の島状態にエッチング
し、その後、前記島状態の前記第1の窒化ガリウム系化
合物半導体を核として成長するが、前記基板の露出部を
核としてはエピタキシャル成長しない第2の窒化ガリウ
ム系化合物半導体を成長させ、前記基板の露出面上は横
方向成長により形成し、 前記第2の窒化ガリウム系化合物半導体の上に窒化ガリ
ウム系化合物半導体から成る素子層を形成するすること
を特徴とする窒化ガリウム系化合物半導体の製造方法。
A first gallium nitride-based compound semiconductor is grown on a substrate, and then the first gallium nitride-based compound semiconductor is formed into a dot-like, stripe-like, or strip-like shape such that exposed portions of the substrate are scattered. The second gallium nitride-based compound is etched into an island state such as a lattice, and then grown using the first gallium nitride-based compound semiconductor in the island state as a nucleus, but not epitaxially grown using the exposed portion of the substrate as a nucleus. Growing a semiconductor, forming an exposed surface of the substrate by lateral growth, and forming an element layer made of a gallium nitride compound semiconductor on the second gallium nitride compound semiconductor. A method for manufacturing a gallium-based compound semiconductor.
【請求項2】基板上にバッファ層を形成し、そのバッフ
ァ層の上に第1の窒化ガリウム系化合物半導体を成長さ
せ、その後、バッファ層及び第1の窒化ガリウム系化合
物半導体を、前記基板の露出部が散在するように、点
状、ストライプ状又は格子状等の島状態にエッチング
し、その後、前記島状態の前記第1の窒化ガリウム系化
合物半導体を核として成長するが、前記基板の露出部を
核としてはエピタキシャル成長しない第2の窒化ガリウ
ム系化合物半導体を成長させ、前記基板の露出面上は横
方向成長により形成することを特徴とする窒化ガリウム
系化合物半導体の製造方法。
2. A buffer layer is formed on a substrate, a first gallium nitride compound semiconductor is grown on the buffer layer, and then the buffer layer and the first gallium nitride compound semiconductor are formed on the substrate. Etching is performed in an island state such as a dot, a stripe, or a lattice so that the exposed portions are scattered, and then, the first gallium nitride-based compound semiconductor in the island state is grown as a nucleus. A second gallium nitride-based compound semiconductor that does not epitaxially grow with a portion as a nucleus, and the exposed surface of the substrate is formed by lateral growth.
【請求項3】前記基板はサファイア、シリコン、又は、
炭化珪素であることを特徴とする請求項1又は請求項2
に記載の窒化ガリウム系化合物半導体の製造方法。
3. The method according to claim 1, wherein the substrate is sapphire, silicon, or
3. The method according to claim 1, wherein the material is silicon carbide.
3. The method for producing a gallium nitride-based compound semiconductor according to item 1.
【請求項4】前記バッファ層は、任意組成比のAlGaN 、
任意組成比のAlGaInNであること特徴とする請求項2又
は請求項3に記載の窒化ガリウム系化合物半導体の製造
方法。
4. The buffer layer is composed of AlGaN having an arbitrary composition ratio,
The method for producing a gallium nitride-based compound semiconductor according to claim 2 or 3, wherein the composition is AlGaInN having an arbitrary composition ratio.
【請求項5】前記第1の窒化ガリウム系化合物半導体と
前記第2の窒化ガリウム系化合物半導体とは同一組成比
であることを特徴とする請求項1乃至請求項4のいずれ
か1項に記載の窒化ガリウム系化合物半導体の製造方
法。
5. The semiconductor device according to claim 1, wherein said first gallium nitride-based compound semiconductor and said second gallium nitride-based compound semiconductor have the same composition ratio. A method for producing a gallium nitride-based compound semiconductor.
【請求項6】前記第1の窒化ガリウム系化合物半導体の
厚さは500Å〜2000Åであることを特徴とする請
求項1乃至請求項5のいずれか1項に記載の窒化ガリウ
ム系化合物半導体の製造方法。
6. The method for manufacturing a gallium nitride-based compound semiconductor according to claim 1, wherein the thickness of the first gallium nitride-based compound semiconductor is from 500 to 2000 degrees. Method.
【請求項7】前記露出部はエッチングして残された前記
第1の窒化ガリウム系化合物半導体よりも広いことを特
徴とする請求項1乃至請求項6のいずれか1項に記載の
窒化ガリウム系化合物半導体の製造方法。
7. The gallium nitride-based semiconductor device according to claim 1, wherein the exposed portion is wider than the first gallium nitride-based compound semiconductor left after etching. A method for manufacturing a compound semiconductor.
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