JPH11135832A - Gallium nitride group compound semiconductor and manufacture therefor - Google Patents

Gallium nitride group compound semiconductor and manufacture therefor

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Publication number
JPH11135832A
JPH11135832A JP31151897A JP31151897A JPH11135832A JP H11135832 A JPH11135832 A JP H11135832A JP 31151897 A JP31151897 A JP 31151897A JP 31151897 A JP31151897 A JP 31151897A JP H11135832 A JPH11135832 A JP H11135832A
Authority
JP
Japan
Prior art keywords
layer
compound semiconductor
gallium nitride
based compound
gan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31151897A
Other languages
Japanese (ja)
Inventor
Norikatsu Koide
典克 小出
Masayoshi Koike
正好 小池
Hisayoshi Kato
久喜 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyoda Gosei Co Ltd
Original Assignee
Toyoda Gosei Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toyoda Gosei Co Ltd filed Critical Toyoda Gosei Co Ltd
Priority to JP31151897A priority Critical patent/JPH11135832A/en
Publication of JPH11135832A publication Critical patent/JPH11135832A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To improve element characteristics and manufacturing efficiency. SOLUTION: A layer 5 composed of Al0.15 Ga0.85 N is formed on a silicon substrate 1, and a layer 6 composed of GaN is formed on the layer 5. A third layer is constituted of the layer 5 and the layer 6. On the layer 6, a first layer 2 of the film thickness of about 2,000 Å composed of SiO2 is formed in a stripe shape or a grating shape. A second layer 3 composed of GaN is grown in the upper region A of the first layer 2 and on the exposed part B of the layer 6. At the time, GaN is grown in a direction vertical to a surface with GaN at the exposed part B of the layer 6 as a core. Then, in the upper region A of the first layer 2, with GaN grown on the exposed part B of the layer 6 as the core, GaN is epitaxially grown in a horizontal direction. In this manner, since GaN is epitaxially grown both in the vertical direction and the horizontal direction with GaN as the core, the gallium nitride group compound semiconductor of non dislocation is obtained in a horizontal directional growth region which is the upper region A of the first layer 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、一般式Alx Gay In
1-x-y N(0 ≦x ≦1,0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリ
ウム系化合物半導体とその製造方法に関する。特に、基
板にシリコン(Si)を用いたものに関する。
The present invention relates to a compound represented by the general formula: Al x Ga y In
The present invention relates to a gallium nitride-based compound semiconductor of 1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) and a method of manufacturing the same. In particular, the present invention relates to a substrate using silicon (Si).

【0002】[0002]

【従来の技術】窒化ガリウム系化合物半導体は、発光ス
ペクトルが紫外から赤色の広範囲に渡る直接遷移型の半
導体であり、発光ダイオード(LED) やレーザダイオード
(LD)等の発光素子に応用されている。この窒化ガリウム
系化合物半導体では、通常、サファイア上に形成してい
る。
2. Description of the Related Art Gallium nitride-based compound semiconductors are direct-transition semiconductors whose emission spectrum covers a wide range from ultraviolet to red, and include light-emitting diodes (LEDs) and laser diodes.
(LD) and the like. This gallium nitride-based compound semiconductor is usually formed on sapphire.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来技術では、サファイア基板上に窒化ガリウム系化合物
半導体を形成すると、サファイアと窒化ガリウム系化合
物半導体との熱膨張係数差により、半導体層にクラッ
ク、そりが発生し、ミスフットにより転位が発生し、こ
のため素子特性が良くないという問題がある。さらに、
サファイアは絶縁性であるので、基板に対して同一面側
に両電極を形成する必要があり、そのために基板に近い
側にあるn層までのエッチングをする必要があるために
製造効率がよくないという問題がある。又、同一面側に
両電極を形成するために、素子サイズが増大する。ま
た、両電極に対してワイヤボンディングを必要とすると
共に、n層において横方向の電流路が形成され電流路が
長くなるため駆動電圧が若干増加するという問題があ
る。加えて、基板と半導体層とが異種の物質で構成され
ているので、レーザダイオードでは良好なへき開が困難
である。
However, according to the prior art, when a gallium nitride-based compound semiconductor is formed on a sapphire substrate, cracks and warpage occur in the semiconductor layer due to a difference in thermal expansion coefficient between sapphire and the gallium nitride-based compound semiconductor. Occurs, and dislocation occurs due to a misfoot, which causes a problem that device characteristics are not good. further,
Since sapphire is insulative, it is necessary to form both electrodes on the same surface side with respect to the substrate, and therefore, it is necessary to etch up to the n layer on the side close to the substrate, so that the production efficiency is not good There is a problem. Also, since both electrodes are formed on the same surface side, the element size increases. In addition, wire bonding is required for both electrodes, and a current path in the lateral direction is formed in the n-layer, and the current path becomes longer. In addition, since the substrate and the semiconductor layer are made of different materials, it is difficult to satisfactorily cleave the laser diode.

【0004】従って、本発明の目的は、上記課題に鑑
み、シリコン基板上に窒化ガリウム系半導体層を形成す
ることで、素子特性を向上させると共に、効率のよい製
造方法を実現することである。
Accordingly, an object of the present invention is to provide a gallium nitride-based semiconductor layer formed on a silicon substrate to improve the device characteristics and realize an efficient manufacturing method in view of the above problems.

【0005】[0005]

【課題を解決するための手段及び作用効果】上記の課題
を解決するために、請求項1に記載の手段によれば、シ
リコン(Si)基板と、シリコン基板上に、シリコンの露出
部が散在するように、点状、ストライプ状又は格子状等
の島状態に形成され、窒化ガリウム系化合物半導体がそ
の上にエピタキシャル成長しない第1の層と、第1の層
で覆われていないシリコンの露出部を核として、エピタ
キシャル成長させ、第1の層の上部では、横方向にエピ
タキシャル成長させることで形成された窒化ガリウム系
化合物半導体から成る第2の層とを有する。
According to the first aspect of the present invention, there is provided a silicon (Si) substrate, and silicon exposed portions are scattered on the silicon substrate. And a first layer in which a gallium nitride-based compound semiconductor is not epitaxially grown thereon, and an exposed portion of silicon not covered with the first layer. And a second layer made of a gallium nitride-based compound semiconductor formed by epitaxially growing in the lateral direction above the first layer.

【0006】尚、ここでいう横方向とは、基板の面方向
を意味する。これにより、窒化ガリウム系化合物半導体
から成る第2の層は、第1の層の上にはエピタキシャル
成長せず、シリコン基板の露出部から成長した層が、第
1の層の上では横方向にエピタキシャル成長される。こ
の結果、シリコン基板と窒化ガリウム系化合物半導体と
の間のミスフィットに基づく転位は縦方向にのみ成長
し、横方向には成長しない。従って、第1の層の上にお
ける窒化ガリウム系化合物半導体の結晶性が向上する。
また、第1の層とその上の窒化ガリウム系化合物半導体
とは化学的に接合していないので、第2の層のそりが防
止されると共に応力歪みがその層に入ることが抑制され
る。
[0006] The term "horizontal direction" used herein means the plane direction of the substrate. As a result, the second layer made of the gallium nitride-based compound semiconductor does not epitaxially grow on the first layer, and the layer grown from the exposed portion of the silicon substrate grows laterally on the first layer. Is done. As a result, dislocations due to misfit between the silicon substrate and the gallium nitride-based compound semiconductor grow only in the vertical direction and do not grow in the horizontal direction. Therefore, the crystallinity of the gallium nitride-based compound semiconductor on the first layer is improved.
Further, since the first layer and the gallium nitride-based compound semiconductor thereover are not chemically bonded, warpage of the second layer is prevented and stress strain is suppressed from entering the layer.

【0007】請求項2に記載の手段によれば、シリコン
(Si)基板と、シリコン基板上に形成された窒化ガリウム
系化合物半導体から成る第3の層と、第3の層の上に形
成され、第3の層の露出部が散在するように、点状、ス
トライプ状又は格子状等の島状態に形成され、窒化ガリ
ウム系化合物半導体がその上にエピタキシャル成長しな
い第1の層と、第1の層で覆われていない第3の層の露
出部を核として、エピタキシャル成長させ、第1の層の
上部では、横方向にエピタキシャル成長させることで形
成された窒化ガリウム系化合物半導体から成る第2の層
とを有する。
[0007] According to the means of claim 2, silicon
An (Si) substrate, a third layer made of a gallium nitride-based compound semiconductor formed on a silicon substrate, and a third layer formed on the third layer and having an exposed portion of the third layer scattered. Nuclei are formed in a first layer on which a gallium nitride-based compound semiconductor is not epitaxially grown and an exposed portion of a third layer which is not covered with the first layer. And a second layer made of a gallium nitride-based compound semiconductor formed by epitaxial growth in the lateral direction above the first layer.

【0008】この構成によれば、第2の層は、窒化ガリ
ウム系化合物半導体から成る第3の層の露出部を核とし
て、請求項1の発明と同様に、窒化ガリウム系化合物半
導体から成る第2の層が形成される。結晶成長の核がシ
リコンではなく、成長させる第2の層の半導体と同種の
半導体を用いている結果、その第2の層の結晶性がより
向上する。
According to this structure, the second layer is made of a gallium nitride-based compound semiconductor, with the exposed portion of the third layer made of the gallium nitride-based compound semiconductor as a nucleus. Two layers are formed. As a result of using a semiconductor of the same kind as the semiconductor of the second layer to be grown instead of silicon as the nucleus for crystal growth, the crystallinity of the second layer is further improved.

【0009】請求項3の発明は、第1の層を、二酸化シ
リコン(SiO2)としたことである。この場合には、第2の
層をAlを含まない窒化ガリウム系化合物半導体とするこ
とで、第1の層の上にはエピタキシャルせずに、横方向
のエピタキシャル成長により第2の層を結晶性良く得る
ことができる。
A third aspect of the present invention is that the first layer is made of silicon dioxide (SiO 2 ). In this case, the second layer is made of a gallium nitride-based compound semiconductor containing no Al, so that the second layer has good crystallinity by lateral epitaxial growth without epitaxial growth on the first layer. Obtainable.

【0010】請求項4の発明は、第1の層を、高融点を
有した金属又は非晶質のシリコン(Si)としたことを特徴
とする。第1の層が導電性を有するので、シリコン基板
に導電性を持たせることで、第2の層とシリコン基板と
の間に、面に垂直方向に均一に電流を流すことが可能と
なる。よって、素子の電極を両端面に形成することが可
能となる。尚、高融点を有した金属とは2000℃以上
の融点を有する金属であり、例えば、Nb,Mo,Ru,Hf,Ta,W
が上げられる。
The invention according to claim 4 is characterized in that the first layer is made of a metal having a high melting point or amorphous silicon (Si). Since the first layer has conductivity, by providing conductivity to the silicon substrate, it is possible to allow a current to flow uniformly between the second layer and the silicon substrate in a direction perpendicular to the plane. Therefore, the electrodes of the element can be formed on both end surfaces. Incidentally, the metal having a high melting point is a metal having a melting point of 2000 ° C. or more, for example, Nb, Mo, Ru, Hf, Ta, W
Is raised.

【0011】請求項5 に記載の発明は、第3の層を、Al
xGa1-xN(0≦x≦1)から成る層上にGaN から成る層が形成
された2層構造としたことである。この構造によれば、
第2の層をGaN とすれば、GaN を核としてGaN を結晶成
長させることができるために、より、結晶性の良い第2
の層を得ることができる。
[0011] According to a fifth aspect of the present invention, the third layer is made of Al
This is a two-layer structure in which a layer made of GaN is formed on a layer made of xGa 1 -xN (0 ≦ x ≦ 1). According to this structure,
If GaN is used as the second layer, GaN can be grown using GaN as a nucleus.
Can be obtained.

【0012】請求項6の発明は、請求項1の半導体の製
造方法であり、請求項7の発明は、請求項2の半導体の
製造方法である。この方法により、良質な結晶の窒化ガ
リウム系化合物半導体を得ることができる。請求項8、
9、10は、請求項3、4、5と同一の効果を有する。
また、請求項11は、シリコン基板、第3の層、第1の
層のうち、少なくともシリコン基板を除去して、第2の
層から成るウエハを得ることを特徴とする。これによ
り、結晶性の良い窒化ガリウム系化合物半導体単体の基
板を得ることができる。
[0012] The invention of claim 6 is the method of manufacturing a semiconductor according to claim 1, and the invention of claim 7 is the method of manufacturing the semiconductor of claim 2. According to this method, a gallium nitride-based compound semiconductor having good quality can be obtained. Claim 8,
9 and 10 have the same effects as in claims 3, 4, and 5.
An eleventh aspect is characterized in that at least the silicon substrate among the silicon substrate, the third layer, and the first layer is removed to obtain a wafer composed of the second layer. Thus, a substrate of a single crystal gallium nitride-based compound semiconductor having good crystallinity can be obtained.

【0013】[0013]

【発明の実施の形態】以下、本発明を具体的な実施例に
基づいて説明する。 (第1実施例)図1は、本発明の第1実施例に係わる窒
化ガリウム系化合物半導体の断面構成を示した模式図で
ある。シリコン基板1の上にはSiO2から成る膜厚約2000
Åの第1の層2がストライプ状(図1(b))又は格子
状(図1(c))に形成されている。又、シリコン基板
1上の第1の層2を除いた露出領域B及び第1の層2の
上にはGaN から成る膜厚約10μm の第2の層3が形成
されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on specific embodiments. (First Embodiment) FIG. 1 is a schematic view showing a cross-sectional structure of a gallium nitride-based compound semiconductor according to a first embodiment of the present invention. On the silicon substrate 1, a film thickness of about 2000 made of SiO 2
The first layer 2 of Å is formed in a stripe shape (FIG. 1B) or a lattice shape (FIG. 1C). A second layer 3 made of GaN and having a thickness of about 10 μm is formed on the exposed region B except the first layer 2 on the silicon substrate 1 and on the first layer 2.

【0014】次に、このGaN 系化合物半導体の製造方法
について説明する。この半導体は、スパッタリング法及
び有機金属気相成長法(以下「MOVPE 」と略す)により
製造された。MOVPE で用いられたガスは、アンモニア(N
H3) 、キャリアガス(H2,N2) 、トリメチルガリウム(Ga
(CH3)3)(以下「TMG 」と記す)である。
Next, a method of manufacturing the GaN-based compound semiconductor will be described. This semiconductor was manufactured by a sputtering method and a metal organic chemical vapor deposition method (hereinafter abbreviated as "MOVPE"). The gas used in MOVPE was ammonia (N
H 3 ), carrier gas (H 2 , N 2 ), trimethylgallium (Ga
(CH 3 ) 3 ) (hereinafter referred to as “TMG”).

【0015】まず、フッ酸系溶液(HF:H2O=1:1)を用いて
洗浄した (111)面、 (100)面、又は、(110) 面を主面と
したn−シリコン基板1をMOVPE装置の反応室に載
置されたサセプタに装着する。次に、常圧でH2を流速2
liter/分で約10分間反応室に流しながら温度1150℃で基
板1をベーキングした。次に、基板1上にSiO2から成る
第1の層2をスパッタリングにより膜厚約2000Å、幅a
が約5μm、露出部Bの間隔bが約5μmのストライプ
状(図1(b))又は格子状(図1(c))に形成し
た。
First, an n-silicon substrate having a (111) plane, a (100) plane, or a (110) plane as a main surface, which is washed with a hydrofluoric acid solution (HF: H 2 O = 1: 1). 1 is mounted on a susceptor placed in the reaction chamber of the MOVPE apparatus. Next, flow H 2 at normal pressure at 2
The substrate 1 was baked at a temperature of 1150 ° C. while flowing into the reaction chamber at liter / minute for about 10 minutes. Next, a first layer 2 made of SiO 2 is formed on the substrate 1 by sputtering to a thickness of about 2000 ° and a width a.
Was formed in a stripe shape (FIG. 1 (b)) or a lattice shape (FIG. 1 (c)) in which the distance b between the exposed portions B was approximately 5 μm.

【0016】次に、MOVPE 法により基板1の温度を600
℃にしてN2又はH2を20liter/分、NH3 を10liter/分、TM
G を1.0 ×10-4モル/分、H2ガスにより0.86ppm に希釈
されたシランを20×10-8モル/分で供給して、膜厚約10
μmのGaN を形成することにより、第2の層3を得た。
このとき、GaN は、シリコン基板1の露出部Bのシリコ
ンを核として面に垂直に成長する。そして、第1の層2
の上部領域Aでは、シリコン基板1の露出部Bに成長し
たGaN を核として、GaN が横方向、即ち、シリコン基板
1の面方向に沿ってエピタキシャル成長する。この第2
の層3は、シリコン基板1の露出部Bにだけ縦方向に転
位が生じ、第1の層2の上部領域Aには横方向のエピタ
キシャル成長であるために、転位は生じない。第1の層
2の面積をシリコン基板1の露出部Bの面積に比べて大
きくすることで、広い面積に渡って結晶性の良好なGaN
から成る第2の層3を形成することができる。また、第
1の層2とその上のGaN は化学的に結合していないため
に、第2の層3のそり、応力歪みを極めて大きく減少さ
せることができる。
Next, the temperature of the substrate 1 is set to 600 by the MOVPE method.
℃ To 20Liter / min N 2 or H 2 and the NH 3 10liter / min, TM
G was supplied at 1.0 × 10 −4 mol / min, and silane diluted to 0.86 ppm with H 2 gas was supplied at 20 × 10 −8 mol / min.
The second layer 3 was obtained by forming GaN of μm.
At this time, GaN grows perpendicularly to the surface with the silicon in the exposed portion B of the silicon substrate 1 as a nucleus. And the first layer 2
In the upper region A, GaN is epitaxially grown in the lateral direction, that is, in the plane direction of the silicon substrate 1 with GaN grown on the exposed portion B of the silicon substrate 1 as a nucleus. This second
In the layer 3, dislocations occur in the vertical direction only in the exposed portions B of the silicon substrate 1, and no dislocations occur in the upper region A of the first layer 2 because of lateral epitaxial growth. By increasing the area of the first layer 2 as compared with the area of the exposed portion B of the silicon substrate 1, GaN having good crystallinity over a wide area
The second layer 3 made of Further, since the first layer 2 and the GaN thereon are not chemically bonded, the warp and the stress strain of the second layer 3 can be extremely reduced.

【0017】尚、上記実施例において、ストライプ状又
は格子状に形成された第1の層2の幅aを約5μmとし
たが、第1の層2の幅aが10μmを超えると横方向の成
長に長時間必要となり、第1の層2の幅aが1μm未満
になると、後にアセトン等でのSiO2膜の除去が困難とな
るので、望ましくは1〜10μmの範囲が良い。又、上記
実施例ではシリコン基板1の露出部Bの間隔bを5μm
としたが、露出部Bの間隔bが10μmを超えると転位発
生の確率が増大し、露出部Bの間隔bが1μm未満にな
ると良好なGaN 膜の形成が困難となるので、望ましくは
1〜10μmの範囲が良い。また、第2の層3の結晶性の
点から幅の割合a/bは1〜10が望ましい。
In the above embodiment, the width a of the first layer 2 formed in a stripe or a lattice is set to about 5 μm, but when the width a of the first layer 2 exceeds 10 μm, the width a in the horizontal direction is increased. If the growth is required for a long time and the width a of the first layer 2 is less than 1 μm, it becomes difficult to remove the SiO 2 film later with acetone or the like, so that the range is preferably 1 to 10 μm. In the above embodiment, the distance b between the exposed portions B of the silicon substrate 1 is 5 μm.
However, when the distance b between the exposed portions B exceeds 10 μm, the probability of dislocation increases, and when the distance b between the exposed portions B is less than 1 μm, it becomes difficult to form a good GaN film. A range of 10 μm is good. In addition, the width ratio a / b is preferably 1 to 10 from the viewpoint of the crystallinity of the second layer 3.

【0018】(第2実施例)上述の第1実施例では、第
1の層2をシリコン基板1上に形成したが、本実施例の
特徴は、シリコン基板1の上に窒化ガリウム系化合物半
導体の第3の層を設け、その第3の層の上に、第1の層
を島状に形成して、その上に窒化ガリウム系化合物半導
体を形成したことである。
(Second Embodiment) In the first embodiment described above, the first layer 2 is formed on the silicon substrate 1, but this embodiment is characterized in that the gallium nitride-based compound semiconductor is formed on the silicon substrate 1. Is provided, a first layer is formed in an island shape on the third layer, and a gallium nitride-based compound semiconductor is formed thereon.

【0019】図2は、本発明の第2の実施例に係わる窒
化ガリウム系化合物半導体の断面構成を示した模式図で
ある。シリコン基板1の上にはAl0.15Ga0.85N から成る
膜厚約1000Åの第3の層5が形成され、この第3の層5
上にSiO2から成る膜厚約2000Åの第1の層2が第1実施
例と同様にストライプ状又は格子状に形成されている。
又、第3の層5の露出部B及び第1の層2の上部領域A
には、GaN から成る膜厚約10μmの第2の層3が形成さ
れている。
FIG. 2 is a schematic view showing a sectional structure of a gallium nitride-based compound semiconductor according to a second embodiment of the present invention. A third layer 5 made of Al 0.15 Ga 0.85 N and having a thickness of about 1000 ° is formed on the silicon substrate 1.
A first layer 2 made of SiO 2 and having a thickness of about 2000 ° is formed in a stripe shape or a lattice shape similarly to the first embodiment.
Also, the exposed portion B of the third layer 5 and the upper region A of the first layer 2
Is formed with a second layer 3 made of GaN and having a thickness of about 10 μm.

【0020】次に、このGaN 系化合物半導体の製造方法
について説明する。シリコン基板1をベーキングすると
ころまでは、上記第1実施例と同様である。この後、基
板1の温度を1150℃に保持し、N2又はH2を10liter/分、
NH3 を10liter/分、TMG を1.0 ×10-4モル/分、トリメ
チルアルミニウム(Al(CH3)3)(以下「TMA 」と記す)を
1.0 ×10-5モル/分、H2ガスにより0.86ppm に希釈され
たシランを20×10-8モル/分で供給し、膜厚約1000Å、
Si濃度1.0 ×1018/cm3のAl0.15Ga0.85N から成る第3の
層5を形成した。
Next, a method of manufacturing the GaN-based compound semiconductor will be described. Up to the point where the silicon substrate 1 is baked, it is the same as the first embodiment. Thereafter, the temperature of the substrate 1 is maintained at 1150 ° C., and N 2 or H 2 is set at 10 liter / min.
NH 3 at 10 liter / min, TMG at 1.0 × 10 -4 mol / min, trimethylaluminum (Al (CH 3 ) 3 ) (hereinafter referred to as “TMA”)
1.0 × 10 −5 mol / min, silane diluted to 0.86 ppm by H 2 gas is supplied at 20 × 10 −8 mol / min, and the film thickness is about 1000 Å.
A third layer 5 made of Al 0.15 Ga 0.85 N having a Si concentration of 1.0 × 10 18 / cm 3 was formed.

【0021】次に、第1実施例と同様に、第3の層5上
にSiO2から成る第1の層2を膜厚約2000Å、幅aが約5
μm、第3の層5の露出部Bの間隔bが約5μmのスト
ライプ状又は格子状に形成する。次に、第1実施例と同
様に、第1の層2及び第3の層5の露出部B上に膜厚約
10μmのGaN から成る第2の層3を形成する。このと
き、GaN は、第3の層5の露出部BのAl0.15Ga0.85N を
核として、面に垂直方向に成長する。そして、第1の層
2の上部領域Aでは、第3の層5の露出部B上に成長し
たGaN を核として、GaN が横方向にエピタキシャル成長
する。このようにして、第1の層2及び第3の層5の露
出部上にGaN から成る第2の層3が形成される。
Next, as in the first embodiment, a first layer 2 made of SiO 2 is formed on the third layer 5 to a thickness of about 2000 ° and a width a of about 5 mm.
μm, and the distance b between the exposed portions B of the third layer 5 is about 5 μm in the form of a stripe or grid. Next, in the same manner as in the first embodiment, a film thickness of about 1 mm is formed on the exposed portions B of the first layer 2 and the third layer 5.
A second layer 3 of 10 μm GaN is formed. At this time, GaN grows in the direction perpendicular to the surface with Al 0.15 Ga 0.85 N in the exposed portion B of the third layer 5 as a nucleus. Then, in the upper region A of the first layer 2, GaN is epitaxially grown in the lateral direction with GaN grown on the exposed portion B of the third layer 5 as a nucleus. Thus, the second layer 3 made of GaN is formed on the exposed portions of the first layer 2 and the third layer 5.

【0022】上記に示されるように、GaN はAl0.15Ga
0.85N を核として、先ず、成長するので、Siを核とした
場合に比べてGaN の結晶性はより高くなる。また、シリ
コン基板1、又は、シリコン基板1から第1の層2まで
の領域Cを研磨又はエッチングにより除去することによ
り、第2の層3により、無転位の窒化ガリウム系化合物
半導体基板を得ることができる。
As indicated above, GaN is Al 0.15 Ga
Since GaN is grown first with 0.85 N as a nucleus, the crystallinity of GaN is higher than in the case of using Si as a nucleus. Further, by removing the silicon substrate 1 or the region C from the silicon substrate 1 to the first layer 2 by polishing or etching, a dislocation-free gallium nitride-based compound semiconductor substrate can be obtained by the second layer 3. Can be.

【0023】尚、本実施例では、第3の層5の組成をAl
0.15Ga0.85N としたが、任意組成比の一般式Alx Gay In
1-x-y N(0 ≦x ≦1,0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリ
ウム系化合物半導体を用いることができる。シリコン基
板1上にエピタキシャル成長させるには、Alx Ga1-x N
(0 ≦x ≦1)(AlN を含む) が望ましい。また、第2の
層3は、任意組成比の一般式Alx Gay In1-x-y N(0 ≦x
≦1,0 ≦y ≦1,0 ≦x+y≦1)の窒化ガリウム系化合物半
導体を用いることができ、第3の層5と同一組成比であ
っても、異なる組成比であっても良い。又、本実施例で
は、第3の層5の膜厚を約1000Åとしたが、第3の層5
の膜厚が500 Å未満であると、第2の層の横方向の成長
が悪くなるので、第3の層5の膜厚は500 Å以上である
ことが望ましい。
In this embodiment, the composition of the third layer 5 is Al
0.15 Ga 0.85 N, but the general formula Al x Ga y In
A gallium nitride-based compound semiconductor of 1-xy N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) can be used. For epitaxial growth on the silicon substrate 1, Al x Ga 1-x N
(0 ≦ x ≦ 1) (including AlN) is desirable. The second layer 3 has a general formula of Al x Ga y In 1-xy N (0 ≦ x
≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) gallium nitride-based compound semiconductor can be used, and the same composition ratio as that of the third layer 5 or a different composition ratio can be used. good. Further, in the present embodiment, the thickness of the third layer 5 is set to about 1000
If the film thickness of the third layer 5 is less than 500 °, the growth of the second layer in the lateral direction is deteriorated, so that the film thickness of the third layer 5 is preferably 500 ° or more.

【0024】(第3実施例)前述の第2実施例では、第
3の層5を単層で構成したが、本実施例の特徴は、第3
の層を2層構造とした点にある。図3は、本発明の第3
実施例に係わる窒化ガリウム系化合物半導体の断面構成
を示した模式図である。シリコン基板1の上にはAl0.15
Ga0.85N から成る膜厚約1000Åの層5が形成され、この
層5上に、GaN から成る膜厚約1000Åの層6が形成され
ている。層5と層6とで第3の層が構成される。層6上
には、SiO2から成る膜厚約2000Åの第1の層2が上記実
施例と同様にストライプ状又は格子状に形成されてい
る。層6及び第1の層2上には、GaN から成る膜厚約10
μmの第2の層3が形成されている。
(Third Embodiment) In the second embodiment described above, the third layer 5 is constituted by a single layer.
Has a two-layer structure. FIG. 3 shows a third embodiment of the present invention.
FIG. 1 is a schematic diagram illustrating a cross-sectional configuration of a gallium nitride-based compound semiconductor according to an example. Al 0.15 on silicon substrate 1
A layer 5 made of Ga 0.85 N and having a thickness of about 1000 ° is formed, and a layer 6 made of GaN and having a thickness of about 1000 ° is formed on the layer 5. The layer 5 and the layer 6 constitute a third layer. On the layer 6, a first layer 2 made of SiO 2 and having a thickness of about 2000 ° is formed in a stripe shape or a lattice shape as in the above-described embodiment. On the layer 6 and the first layer 2, a film thickness of about 10
A second layer 3 of μm is formed.

【0025】次に、このGaN 系化合物半導体の製造方法
について説明する。基板1をベーキングし、基板1上に
MOVPE 法により層5を形成するところまでは、第2実施
例と同様である。層5の形成後、層5上にMOVPE 法によ
り基板1の温度を1100℃にしてN2又はH2を20liter/分、
NH3 を10liter/分、TMG を2.0 ×10-4モル/分、H2ガス
により0.86ppm に希釈されたシランを20×10-8モル/分
で供給して、GaN を形成し、膜厚約1000Åの層6を得
る。
Next, a method of manufacturing the GaN-based compound semiconductor will be described. Bake the substrate 1 and place it on the substrate 1
The process is the same as that of the second embodiment up to the point where the layer 5 is formed by the MOVPE method. After the formation of the layer 5, the temperature of the substrate 1 is set to 1100 ° C. on the layer 5 by MOVPE, and N 2 or H 2 is added at 20 liter / min.
NH 3 was supplied at 10 liter / min, TMG was supplied at 2.0 × 10 −4 mol / min, and silane diluted to 0.86 ppm with H 2 gas was supplied at 20 × 10 −8 mol / min to form GaN. A layer 6 of about 1000 ° is obtained.

【0026】次に、第1、第2実施例と同様に、第3の
層5上にSiO2から成る第1の層2を膜厚約2000Å、幅a
が約5μm、層6の露出部Bの間隔bが約5μmのスト
ライプ状又は格子状に形成する。次に、第1の層2の上
部領域A及び層6の露出部B上に膜厚約10μmのGaN か
ら成る第2の層3を成長させる。このとき、GaN は、層
6の露出部BのGaN を核として、面に垂直方向に成長す
る。そして、第1の層2の上部領域Aでは、層6の露出
部B上に成長したGaN を核として、GaN が横方向にエピ
タキシャル成長する。このようにして、本実施例では、
GaN がGaN を核として縦方向にも横方向にもエピタキシ
ャル成長するので、上記の実施例よりも、さらに、結晶
性の高いGaN が得られる。
Next, as in the first and second embodiments, the first layer 2 made of SiO 2 is formed on the third layer 5 to a thickness of about 2000 Å and a width a.
Are formed in a striped or lattice shape with a distance b of about 5 μm and an interval b between exposed portions B of the layer 6 of about 5 μm. Next, a second layer 3 made of GaN having a thickness of about 10 μm is grown on the upper region A of the first layer 2 and the exposed portion B of the layer 6. At this time, GaN grows in a direction perpendicular to the surface with GaN of the exposed portion B of the layer 6 as a nucleus. Then, in the upper region A of the first layer 2, GaN epitaxially grows in the lateral direction with GaN grown on the exposed portion B of the layer 6 as a nucleus. Thus, in this embodiment,
Since GaN is epitaxially grown in the vertical and horizontal directions with GaN as a nucleus, GaN having higher crystallinity than that of the above embodiment can be obtained.

【0027】本実施例でも、同様に、シリコン基板1又
は、シリコン基板1から第1の層2までの部分Cを研磨
又はエッチングにより除去することにより、第2の層3
から成る無転位のGaN 基板を得ることができる。また、
層6と第2の層3とをGaN としたが、層6と第2の層3
とを同一組成比の一般式Alx Gay In1-x-y N(0 ≦x ≦1,
0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリウム系化合物半導体
としても良い。但し、第1の層2にSiO2を用いた場合に
は、Alが含まれない窒化ガリウム系化合物半導体を用い
るのが良い。勿論、層6と第2の層3との組成比を変化
させても良い。
In this embodiment, the second layer 3 is similarly removed by polishing or etching the silicon substrate 1 or the portion C from the silicon substrate 1 to the first layer 2.
And a dislocation-free GaN substrate composed of Also,
Although the layer 6 and the second layer 3 are made of GaN, the layer 6 and the second layer 3
And the general formula Al x Ga y In 1-xy N (0 ≤ x ≤ 1,
A gallium nitride-based compound semiconductor satisfying 0 ≦ y ≦ 1,0 ≦ x + y ≦ 1) may be used. However, when SiO 2 is used for the first layer 2, a gallium nitride-based compound semiconductor containing no Al is preferably used. Of course, the composition ratio between the layer 6 and the second layer 3 may be changed.

【0028】上記の全実施例において、第2の層3にGa
N を用いたが、任意組成比のInGaNを用いても良い。Al
が含まれる窒化ガリウム系化合物半導体は、SiO2層上に
成長するので、Alを含まない方が望ましい。しかし、ス
トライプ状又は格子状に形成される第1の層2をSiO2
代えて、タングステン(W) など高融点の金属や、アモル
ファスSiなどを用いてもよい。このように、第1の層2
を金属又は非晶質Siで構成することにより、第1の層2
に電流が流れるので、GaN 化合物半導体の厚さ方向に均
一に電流をより良好に流すことができる。タングステン
(W) など高融点の金属や、アモルファスSiを用いた場合
には、任意組成比の一般式Alx Gay In1-x-y N(0 ≦x ≦
1,0 ≦y ≦1,0 ≦x+y ≦1)の窒化ガリウム系化合物半導
体は、その上にエピタキシャル成長しないので、一般式
Alx Gay In1-x-y N を第2の層として用いることができ
る。また、上記の全実施例において、基板の上に窒化ガ
リウム系化合物半導体の低温成長によるバッファ層を形
成した後、各層を形成しても良い。上記の全実施例にお
いて、MOVPE 法は常圧雰囲気中で行われたが、減圧成長
下で行っても良い。また、常圧、減圧の組み合わせで行
なって良い。
In all the above embodiments, the second layer 3 is made of Ga.
Although N 2 was used, InGaN having an arbitrary composition ratio may be used. Al
The gallium nitride-based compound semiconductor containing Al grows on the SiO 2 layer, so that it is preferable not to contain Al. However, instead of SiO 2 , the first layer 2 formed in a stripe or lattice may be made of a metal having a high melting point such as tungsten (W) or amorphous Si. Thus, the first layer 2
Is composed of metal or amorphous Si, the first layer 2
Since the current flows through the GaN compound semiconductor, it is possible to more uniformly flow the current uniformly in the thickness direction of the GaN compound semiconductor. tungsten
(W) high melting point metal or amorphous Si, when using the general formula Al x Ga y In 1-xy N (0 ≤ x ≤
The gallium nitride-based compound semiconductor of 1,0 ≤ y ≤ 1,0 ≤ x + y ≤ 1) does not epitaxially grow thereon, so the general formula
The Al x Ga y In 1-xy N can be used as the second layer. Further, in all of the above embodiments, each layer may be formed after forming a buffer layer by low-temperature growth of a gallium nitride-based compound semiconductor on a substrate. In all of the above embodiments, the MOVPE method was performed in a normal pressure atmosphere, but may be performed under reduced pressure growth. Further, it may be performed under a combination of normal pressure and reduced pressure.

【0029】本発明で得られたGaN 系化合物半導体は、
LEDやLDの発光素子に利用可能であると共に受光素
子及び電子ディバイスにも利用することができる。
The GaN-based compound semiconductor obtained by the present invention is
The present invention can be used not only for light emitting elements of LEDs and LDs but also for light receiving elements and electronic devices.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の具体的な第1実施例に係わる窒化ガリ
ウム系化合物半導体の構造を示した模式的断面図。
FIG. 1 is a schematic sectional view showing the structure of a gallium nitride-based compound semiconductor according to a first specific example of the present invention.

【図2】本発明の具体的な第2実施例に係わる窒化ガリ
ウム系化合物半導体の構造を示した模式的断面図。
FIG. 2 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor according to a second specific example of the present invention.

【図3】本発明の具体的な第3実施例に係わる窒化ガリ
ウム系化合物半導体の構造を示した模式的断面図。
FIG. 3 is a schematic sectional view showing the structure of a gallium nitride-based compound semiconductor according to a third specific example of the present invention.

【符号の説明】[Explanation of symbols]

1 シリコン基板 2 第1の層 3 第2の層 5 第3の層 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 1st layer 3 2nd layer 5 3rd layer

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】シリコン(Si)基板と、 前記シリコン基板上に、シリコンの露出部が散在するよ
うに、点状、ストライプ状又は格子状等の島状態に形成
され、窒化ガリウム系化合物半導体がその上にエピタキ
シャル成長しない第1の層と、 前記第1の層で覆われていないシリコンの露出部を核と
して、エピタキシャル成長させ、前記第1の層の上部で
は、横方向にエピタキシャル成長させることで形成され
た窒化ガリウム(GaN) 系化合物半導体から成る第2の層
とを備えたことを特徴とする窒化ガリウム系化合物半導
体。
1. A silicon (Si) substrate, and a gallium nitride-based compound semiconductor is formed on the silicon substrate in an island state such as a dot, stripe, or lattice so that exposed portions of silicon are scattered. A first layer that is not epitaxially grown thereon and an exposed portion of silicon that is not covered by the first layer are formed as nuclei by epitaxial growth, and an upper portion of the first layer is formed by laterally epitaxially growing. A second layer comprising a gallium nitride (GaN) -based compound semiconductor.
【請求項2】 シリコン(Si)基板と、前記シリコン基板
上に形成された窒化ガリウム系化合物半導体から成る第
3の層と、前記第3の層の上に形成され、前記第3の層
の露出部が散在するように、点状、ストライプ状又は格
子状等の島状態に形成され、窒化ガリウム系化合物半導
体がその上にエピタキシャル成長しない第1の層と、 前記第1の層で覆われていない前記第3の層の露出部を
核として、エピタキシャル成長させ、前記第1の層の上
部では、横方向にエピタキシャル成長させることで形成
された窒化ガリウム系化合物半導体から成る第2の層と
を備えたことを特徴とする窒化ガリウム系化合物半導
体。
2. A silicon (Si) substrate, a third layer made of a gallium nitride-based compound semiconductor formed on the silicon substrate, and a third layer formed on the third layer, A first layer in which a gallium nitride-based compound semiconductor is not epitaxially grown thereon is formed in a dot-like, stripe-like, or lattice-like island state such that the exposed portions are scattered, and the first layer covers the gallium nitride-based compound semiconductor. And a second layer made of a gallium nitride-based compound semiconductor formed by epitaxially growing in a lateral direction above the first layer, with the exposed portion of the third layer not serving as a nucleus. A gallium nitride-based compound semiconductor, characterized in that:
【請求項3】 前記第1の層は、二酸化シリコン(SiO2)
から成ることを特徴とする請求項1又は請求項2に記載
の窒化ガリウム系化合物半導体。
3. The method according to claim 1, wherein the first layer is made of silicon dioxide (SiO 2 ).
The gallium nitride-based compound semiconductor according to claim 1, wherein the compound semiconductor comprises:
【請求項4】 前記第1の層は、高融点を有した金属又
は非晶質のシリコン(Si)から成ることを特徴とする請求
項1又は請求項2に記載の窒化ガリウム系化合物半導
体。
4. The gallium nitride-based compound semiconductor according to claim 1, wherein the first layer is made of a metal having a high melting point or amorphous silicon (Si).
【請求項5】 前記第3の層は、AlxGa1-xN(0≦x≦1)か
ら成る層上にGaN から成る層が形成された2層構造を成
すことを特徴とする請求項2に記載の窒化ガリウム系化
合物半導体。
5. The method according to claim 1, wherein the third layer has a two-layer structure in which a layer made of GaN is formed on a layer made of Al x Ga 1 -xN (0 ≦ x ≦ 1). Item 3. A gallium nitride-based compound semiconductor according to item 2.
【請求項6】 シリコン(Si)基板上の窒化ガリウム系化
合物半導体の製造方法において、 前記シリコン基板上に、シリコンの露出部が散在するよ
うに、点状、ストライプ状又は格子状等の島状態に、窒
化ガリウム系化合物半導体がその上にエピタキシャル成
長しない第1の層を形成し、 前記第1の層で覆われていないシリンコの露出部を核と
して、エピタキシャル成長させ、前記第1の層の上部で
は、横方向にエピタキシャル成長させることで窒化ガリ
ウム系化合物半導体から成る第2の層を形成することを
特徴とする窒化ガリウム系化合物半導体の製造方法。
6. A method for manufacturing a gallium nitride-based compound semiconductor on a silicon (Si) substrate, comprising: an island state such as a dot-like, stripe-like, or lattice-like state such that exposed portions of silicon are scattered on the silicon substrate. Forming a first layer on which the gallium nitride-based compound semiconductor does not epitaxially grow, and epitaxially growing the exposed portion of the syringe not covered with the first layer as a nucleus; Forming a second layer of a gallium nitride-based compound semiconductor by epitaxially growing in a lateral direction.
【請求項7】 シリコン(Si)基板上の窒化ガリウム系化
合物半導体の製造方法において、 前記シリコン基板上に、窒化ガリウム系化合物半導体か
ら成る第3の層を形成し、 前記第3の層の上に、前記第3の層の露出部が散在する
ように、点状、ストライプ状又は格子状等の島状態に、
窒化ガリウム系化合物半導体がその上にエピタキシャル
成長しない第1の層を形成し、 前記第1の層で覆われていない前記第3の層の露出部を
核として、エピタキシャル成長させ、前記第1の層の上
部では、横方向にエピタキシャル成長させることで窒化
ガリウム系化合物半導体から成る第2の層を形成するこ
とを特徴とする窒化ガリウム系化合物半導体の製造方
法。
7. A method for manufacturing a gallium nitride-based compound semiconductor on a silicon (Si) substrate, comprising: forming a third layer made of a gallium nitride-based compound semiconductor on the silicon substrate; In an island state such as a dot shape, a stripe shape, or a grid shape so that the exposed portions of the third layer are scattered,
Forming a first layer on which the gallium nitride-based compound semiconductor does not epitaxially grow, and epitaxially growing the exposed portion of the third layer not covered with the first layer as a nucleus; A method for manufacturing a gallium nitride-based compound semiconductor, comprising forming a second layer made of a gallium nitride-based compound semiconductor by epitaxially growing in a lateral direction at an upper portion.
【請求項8】 前記第1の層は、二酸化シリコン(SiO2)
から成ることを特徴とする請求項6又は請求項7に記載
の窒化ガリウム系化合物半導体の製造方法。
8. The method according to claim 1, wherein the first layer is made of silicon dioxide (SiO 2 ).
The method for producing a gallium nitride-based compound semiconductor according to claim 6, wherein the method comprises:
【請求項9】 前記第1の層は、高融点を有した金属又
は非晶質のシリコン(Si)から成ることを特徴とする請求
項6又は請求項7に記載の窒化ガリウム系化合物半導体
の製造方法。
9. The gallium nitride-based compound semiconductor according to claim 6, wherein the first layer is made of a metal having a high melting point or amorphous silicon (Si). Production method.
【請求項10】 前記第3の層は、AlxGa1-xN(0≦x≦1)
から成る層上にGaN から成る層が形成された2層構造を
成すことを特徴とする請求項7に記載の窒化ガリウム系
化合物半導体の製造方法。
10. The third layer is composed of Al x Ga 1 -xN (0 ≦ x ≦ 1).
8. The method for producing a gallium nitride-based compound semiconductor according to claim 7, wherein a two-layer structure in which a layer made of GaN is formed on a layer made of GaN.
【請求項11】 前記シリコン基板、前記第3の層、前
記第1の層のうち、少なくともシリコン基板を除去し
て、窒化ガリウム系化合物半導体から成るウエハを得る
ことを特徴とする請求項6乃至請求項10のいづれか1
項に記載の窒化ガリウム系化合物半導体の製造方法。
11. A wafer made of a gallium nitride-based compound semiconductor by removing at least a silicon substrate among the silicon substrate, the third layer, and the first layer. Any one of claim 10
13. The method for producing a gallium nitride-based compound semiconductor according to the above item.
JP31151897A 1997-10-26 1997-10-26 Gallium nitride group compound semiconductor and manufacture therefor Pending JPH11135832A (en)

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