TW540260B - Substrate for mounting electronic component - Google Patents

Substrate for mounting electronic component Download PDF

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Publication number
TW540260B
TW540260B TW091118812A TW91118812A TW540260B TW 540260 B TW540260 B TW 540260B TW 091118812 A TW091118812 A TW 091118812A TW 91118812 A TW91118812 A TW 91118812A TW 540260 B TW540260 B TW 540260B
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TW
Taiwan
Prior art keywords
pattern
electronic component
patent application
scope
component mounting
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TW091118812A
Other languages
Chinese (zh)
Inventor
Yutaka Iguchi
Masaharu Ishizaka
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Mitsui Mining & Smelting Co
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Publication of TW540260B publication Critical patent/TW540260B/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)

Abstract

To provide a substrate for mounting an electronic component, which substrate has improved dimensional stability against moisture absorption and heating. A substrate 10 for mounting an electronic component includes an insulating base material 11; and a wiring pattern 12, formed on one side of the insulating base material 11, having a terminal portion for external connection. Separately from the wiring pattern 12, a metal pattern 16 is provided at least in the vicinity of the terminal portion.

Description

540260 五、發明說明(l) ·----- 【發明所屬技術領域】540260 V. Description of the invention (l) · ----- [Technical field to which the invention belongs]

本發明係有關用於安裝電子零件之電子零件安裝用基板 及,子零件安裝用基板之製造方法,尤有關csp(晶片尺寸 封裝,Chip Size Package)、BGA(焊球柵格陣列,BaUThe present invention relates to a substrate for mounting electronic components for mounting electronic components and a method for manufacturing a substrate for mounting sub-components, and particularly relates to csp (Chip Size Package), BGA (Ball Grid Array, BaU)

Grid Array)、#-bga( # -焊球栅格陣列,#GridGrid Array), # -bga (# -Solder ball grid array, #Grid

Array)、FC(倒裝晶片,Flip Chip)、QFp(四列扁平封 裝,Quad Flat Package)、TAB(帶式自動焊接,Tape Automated Bonding)、C〇F(晶片直裝薄膜’ Chip 〇nArray), FC (Flip Chip), QFp (Quad Flat Package), TAB (Tape Automated Bonding), COF (Chip Direct Mounting Film 'Chip 〇n

Fi lm)等電子零件安裝用基板(以下單稱「電子零件安裝用 基板」)。 【先行之技術】 雖然安裝1C(積體電路)、LSI(大規模積體電路)等電子 零件之印刷配線基板之需要隨著電子產業發達而急遽增 加,卻要求電子機器之小型化、輕盈化、高功能化,最 近,些電子零件之安裝方法採取使用TAB帶、T_BGA帶及 AS K:(專用積體電路)帶之方式。特別是,隨著電子機器之 輕薄短小化,為了更高密度安裝電子零件,同時提高電子 零件之可靠性,配置外部連接端子於大小大致對應於所安 裝電子零件尺寸之基板大致全面之例如csp、BGA、#_BGa 寺之使用頻率增高。 $成此電子零件安裝用基板之電子零件安裝用薄膜載體 用▼如-人製造。亦即,首先,例如貼附銅箔於聚亞醯胺等 絕緣薄膜,塗覆抗光蝕劑於此銅箱表面,將形成此抗光蝕 劑之配線圖型以外之部份曝光,除去曝光之抗光蝕劑。藉Film) and other electronic component mounting substrates (hereinafter referred to simply as "electronic component mounting substrates"). [Leading technology] Although the demand for printed wiring boards for mounting electronic components such as 1C (Integrated Circuit) and LSI (Large-Scale Integrated Circuit) has increased rapidly with the development of the electronics industry, it is required to reduce the size and weight of electronic equipment. High-functionality. Recently, the installation methods of some electronic parts adopt TAB tape, T_BGA tape and AS K: (dedicated integrated circuit) tape. In particular, with the thinning and thinning of electronic devices, in order to install electronic parts at higher density and improve the reliability of electronic parts, the external connection terminals are arranged on a substrate whose size roughly corresponds to the size of the installed electronic parts. For example, csp, BGA, #_BGa temples are used more frequently. The film carrier for mounting electronic components into this electronic component mounting substrate is manufactured by ▼ 如-人. That is, first, for example, attach a copper foil to an insulating film such as polyimide, apply a photoresist to the surface of the copper box, and expose parts other than the wiring pattern that forms the photoresist to remove the exposure. Photoresist. borrow

540260540260

又,上述C〇F固然在安裝1C情形下自絕緣薄膜面加熱, 形成金錫等之共晶,不過,卻有加熱溫度至3 0 0〜5 0 0 °C溫 度較高之問題。故而,會因加熱所造成絕緣薄膜之熱膨脹 而在内引線的圖型上發生間距偏差,又會因内引線内側之 、、、巴緣 >專膜加熱軟化所造成敵紋等之變形而發生圖型偏差, 有引起與I C接合不良等之問題。 本發明有鑑於這些情形,其目的在於提供提高吸濕或加 熱下尺寸穩定性之電子零件安裝用板。 【用來解決問題之手段】In addition, although the above COF is heated from the surface of the insulating film to form a eutectic of gold and tin under the condition of 1C installation, there is a problem that the heating temperature is relatively high from 300 to 500 ° C. Therefore, due to the thermal expansion of the insulating film caused by heating, gaps in the pattern of the inner leads will occur, and deformation will occur due to the deformation of the host lines caused by the heating and softening of the inner side of the inner leads. Pattern deviations cause problems such as poor connection to the IC. The present invention has been made in view of these circumstances, and an object thereof is to provide a board for mounting electronic parts that improves dimensional stability under moisture absorption or heating. [Means to solve the problem]

91118812.ptd 第6頁 540260 五、發明說明(3) 解決前述問題之本發明第1態樣為一種電子零件安裝用 基板,係具備絕緣基材以及形成於此絕緣基材之一表面, 同時具有用來連接外部之端子部配線圖型者,其特徵在 於,至少於前述端子部附近具有獨立於前配線圖型之外之 金屬圖型。 此第1態樣藉獨立於配線圖型之外之金屬圖型提高至少 是端子附近之尺寸穩定性。 本發明第2態樣係如第1態樣之電子零件安裝用基板,其 中前述金屬圖型具有設於前述絕緣基材設有前述配線圖型 之表面相反側之内面之内面圖型。 此第2態樣藉設於内面之内面圖型減低尺寸變化,特別 是減低絕緣基材之吸濕所造成尺寸變化。 本發明第3態樣係如第2態樣之電子零件安裝用基板,其 中前述内面圖型設於前述絕緣基材内面之對應於前述端子 部之區域及其附近。 此第3態樣藉内面圖型減低特別是端子部附近之尺寸變 化。 本發明第4態樣係如第2態樣之電子零件安裝用基板,其 中前述内面圖型設於前述絕緣基板内面之大致全面。 此第4態樣藉内面圖型減低全體之尺寸變化。 本發明第5態樣係如第2至第4態樣中任一態樣之電子零 件安裝用基板,其中前述内面圖型不經由黏接劑設在前述 絕緣基材上。 由於此第5態樣直接將内面圖型設於絕緣基材上,故特91118812.ptd Page 6 540260 V. Description of the invention (3) The first aspect of the present invention which solves the aforementioned problem is a substrate for mounting electronic parts, which is provided with an insulating base material and is formed on one surface of the insulating base material. A wiring pattern for connecting an external terminal portion is characterized by having a metal pattern independent of the front wiring pattern at least in the vicinity of the terminal portion. This first aspect improves the dimensional stability at least near the terminals by using a metal pattern independent of the wiring pattern. The second aspect of the present invention is the electronic component mounting substrate according to the first aspect, wherein the metal pattern has an inner surface pattern provided on the inner surface of the insulating substrate provided on the opposite side of the surface where the wiring pattern is provided. This second aspect reduces the dimensional change by the inner surface pattern located on the inner surface, especially the dimensional change caused by the moisture absorption of the insulating substrate. The third aspect of the present invention is the electronic component mounting substrate according to the second aspect, wherein the inner surface pattern is provided on the inner surface of the insulating base material and in the vicinity of the terminal portion. This third aspect is reduced by the inner surface pattern, especially the size change near the terminal portion. The fourth aspect of the present invention is the substrate for mounting electronic parts as in the second aspect, wherein the inner surface pattern is provided on the entire inner surface of the insulating substrate. This fourth aspect reduces the overall dimensional change by the internal pattern. The fifth aspect of the present invention is the electronic component mounting substrate according to any one of the second to fourth aspects, wherein the inner surface pattern is provided on the insulating base material without an adhesive. Because this fifth aspect directly sets the inner surface pattern on the insulating substrate,

91118812.ptd 第7頁 540260 五、發明說明(4) 別是極佳地減低絕緣基材之吸濕所造成尺寸變化。 本發明第6態樣係如第1至第5態樣中任一態樣之電子零 件安裝用基板,其中前述金屬圖型具有設於前述絕緣基材 設有前述配線圖型之表面之虛設圖型。 此第6態樣藉虛設圖型減低尺寸變化。 本發明第7態樣係如第6態樣之電子零件安裝用基板,其 中前述虛設圖型設於構成前述端子部中與電子零件連接之 端子之内引線内側。 此第7態樣藉虛設圖型減低内引線附近之尺寸變化,特 別是可減低電子零件安裝之際加熱所造成之尺寸變化。 本發明第8態樣係如第7態樣之電子零件安裝用基板,其 中前述虛設圖型設於前述内引線内側之大致全面。 此第8態樣防止内引線内側之絕緣基材之變形。 本發明第9態樣係如第7態樣之電子零件安裝用基板,其 中前述虛設圖型僅於前述内引線附近,沿該内引線之並排 方向設置。 此第9態樣藉虛設圖型減低内引線之間距偏差。 本發明第1 0態樣係如第1至第9態樣中任一態樣之電子零 件安裝用基板,其中電子零件安裝用基板為無裝置孔之 C0F基板。 此第1 0態樣防止電子零件安裝之際之加熱所造成尺寸變 化。 本發明第11態樣係如第2或第3態樣之電子零件安裝用基 板,其中於前述絕緣基材形成裝置孔,於該裝置孔之周緣91118812.ptd Page 7 540260 V. Description of the invention (4) Do not reduce the dimensional change caused by the moisture absorption of the insulating substrate. The sixth aspect of the present invention is an electronic component mounting substrate according to any one of the first to fifth aspects, wherein the metal pattern has a dummy pattern provided on a surface of the insulating substrate provided with the wiring pattern. type. This sixth aspect reduces the dimensional change by a dummy pattern. A seventh aspect of the present invention is the electronic component mounting substrate according to the sixth aspect, wherein the dummy pattern is provided on the inner side of the inner lead of the terminal constituting the terminal connected to the electronic component. This seventh aspect reduces the dimensional change near the inner leads by the dummy pattern, especially the dimensional change caused by heating during the installation of electronic parts. The eighth aspect of the present invention is the electronic component mounting substrate according to the seventh aspect, wherein the dummy pattern is provided on the inner side of the inner lead substantially in its entirety. This eighth aspect prevents deformation of the insulating base material inside the inner lead. A ninth aspect of the present invention is the electronic component mounting substrate according to the seventh aspect, wherein the dummy pattern is only near the inner lead and is arranged in a side-by-side direction of the inner lead. This ninth aspect reduces the deviation between the inner leads by a dummy pattern. The tenth aspect of the present invention is an electronic component mounting substrate according to any one of the first to ninth aspects, wherein the electronic component mounting substrate is a COF substrate without a device hole. This tenth aspect prevents dimensional changes caused by heating during the mounting of electronic parts. The eleventh aspect of the present invention is a substrate for mounting electronic parts as in the second or third aspect, wherein a device hole is formed in the aforementioned insulating base material, and a peripheral edge of the device hole is formed.

91118812.ptd 第8頁 540260 五、發明說明(5) 部設置前述内面圖型。 此第1 1態樣藉内面圖型防止設於裝置孔附近之内引線之 偏差。 本發明第1 2態樣係如第1至11態樣中任一態樣之電子零 件安裝用基板,其中前述配線圖型不經由黏接劑設在前述 絕緣基材上。 於此第1 2態樣中,配線圖型藉由電鍍形成,或者,絕緣 基材藉由鑄造形成於構成配線圖型之導電體上。 【發明之實施形態】 以下,根據實施形態說明本發明。 (實施形態1) 圖1顯示本發明實施形態1之電子零件安裝用基板之概略 平面及橫剖面。 如圖1所示,電子零件安裝用基板1 0連續形成複數個於 帶狀絕緣薄膜1上。此絕緣薄膜1於寬度方向二側,隔預定 間隔具有移送用鏈輪齒孔2,一般說來,一面移送,一面 安裝電子零件,在電子零件安裝後,切斷每一電子零件安 裝用基板10。 此種電子零件安裝用基板1 0於大小大致對應於所安裝電 子零件尺寸之絕緣基材11之表面上設置配線圖型1 2以及覆 蓋配線圖型1 2之内引線1 3和外引線1 4以外部份之阻焊層 1 5。又,於絕緣基材11之内面側設置由圖型化之金屬層構 成之内面圖型16。91118812.ptd Page 8 540260 5. The description of the invention (5) sets the aforementioned inner surface pattern. This 11th aspect prevents the deviation of the inner lead provided near the device hole by the inner surface pattern. The twelfth aspect of the present invention is the electronic component mounting substrate according to any one of the first to eleventh aspects, wherein the wiring pattern is provided on the insulating base material without an adhesive. In this twelfth aspect, the wiring pattern is formed by electroplating, or the insulating base material is formed on the conductive body constituting the wiring pattern by casting. [Embodiments of the invention] Hereinafter, the present invention will be described based on the embodiments. (Embodiment 1) Figure 1 shows a schematic plan and cross-section of a substrate for mounting electronic components according to Embodiment 1 of the present invention. As shown in FIG. 1, a plurality of substrates 10 for mounting electronic parts are continuously formed on the band-shaped insulating film 1. This insulating film 1 has two sprocket tooth holes 2 for transfer at predetermined intervals on two sides in the width direction. Generally, electronic components are mounted while being transferred, and each electronic component mounting substrate 10 is cut after the electronic components are mounted. . This electronic component mounting substrate 10 is provided with a wiring pattern 12 and an inner lead 1 3 and an outer lead 1 4 on a surface of an insulating substrate 11 having a size substantially corresponding to the size of the mounted electronic component. Outside the solder mask layer 15 An inner surface pattern 16 made of a patterned metal layer is provided on the inner surface side of the insulating base material 11.

91118812.ptd 第9頁 540260 五、發明說明(6) 至少於不為阻焊層1 5覆蓋之内引線1 3及外引線1 4,在形 成配線圖型12全體之導電體箔片上設置電鑛層。 二用廑=可撓性’ 時具有耐藥品性及;熱性之材料 於、吧、味溥Μ 1 (絕緣基材11)。此絕緣薄膜丨之材料列兴之, I,聚酯、聚醯胺、聚亞醯胺等,特別以具有聯苯&架之 王芳香族聚亞酿胺(例如,品名:優比列杳. y> 股份有限公司製)較佳。且,絕緣薄膜.之克厚V—于/二產5 至1 2 5 // m (微米),較佳的是2 5至7 5 // m 〇 又, 口又於纟巴緣薄膜1表面之配線圖型丨2 一般藉 錄構成之導電體猪片圖型化形成。此 將銅或紹、 接層A於π这# μ 住守电月足、〉白片即使直 等彤2:缚' i ’亦可透過黏接劑層,ϋ由敎壓接 、^成或者藉由電鍍形成。導電體箔片之厚 以' '較佳者為5至35 "m。導電體領片以鋼V二為1 ^者二可藉由鑄造法形成絕緣薄膜1於此種導電顺ί佳。 ;料=先;=f、rri處理構成絕^u 片上形成。 承亞&胺先貝樹脂組成物於導電體箔 鎳面圖型16固然亦藉金屬猪’例如鋼力 論如何不:v白片形 <,惟其不必是良好的導電體二呂、 二"發生依存於濕度之尺寸變化,故可活由於無 材因吸濕而發生之尺寸變化。 减低絕緣基 ψT t ^文所述,於亦期待減低加熱所造成尺+4 :2:地’使用熱膨脹係數小於絕緣基:u:,避化情 ,伞亞馭胺之熱膨脹係數雖為15至251)1)1]]/。〇之,。例 矛王度,不 540260 五、發明說明(7) ---—-- 過,銅為16Ppm/°C,鋁為23ppm/°C ’ 鎳為13ppm/t 此,可按照所用聚亞醯胺之種類加以選擇。 即使此種金屬箔片亦直接層疊於絕緣薄膜丨上,、 過黏接劑層,藉由熱壓接等形成,或者,藉由電鑛/透 進一步亦可將構成絕緣薄膜之材料或先質,例如^ , 先質樹脂組成物於形成配線圖型丨2之導電體箔片上,i胺 需要使其乾燥之後,層疊金屬層,此後,進行熱處理在依 直接層疊或經由鑄層層疊情形下,可自任一侧層疊,或在 者,亦可同時層疊。又,在藉由電鍍形成導電體箔= 屬箱片情形下,可一次電鍍二者,又,當然亦可個別^主 ,。且,固然構成内面圖型16之金屬箔片之厚度未特 定,惟可使用厚度與配線圖型丨2之導電體箔片相同程声限 Μ又’分別設於絕緣薄膜1表裏之導電體箔片及金屬羯 f由光微刻法圖型化成配線圖型丨2及内面圖型丨6。亦 藉由透過光罩之曝光及顯影將藉由塗覆抗光蝕材料塗液邢 成之抗光蝕材料塗層圖型化,以圖型化之抗光蝕材料塗^ 作為屏蔽,以蝕刻液化學溶解(蝕刻處理)除去,進一 ς曰 鹼液等溶解除去光抗蝕劑,藉此將導電體箔片及金二= 型化。 同,圖 此種光微刻法可兩面一齊進行,亦可單面進行,於扣 進行情形下,可就任一面先進行。 、早面 且’藉由將阻焊材料塗液塗覆於圖型化之導電體箱片 上,進行預定圖型化,形成阻焊層1 5。91118812.ptd Page 9 540260 V. Description of the invention (6) At least the inner lead 13 and the outer lead 1 4 which are not covered by the solder resist 15 are provided with a power ore on the conductor foil forming the entire wiring pattern 12 Floor. It has chemical resistance and heat resistance when 廑 = flexible. 、, bar, miso M 1 (insulating base 11). The materials of this insulating film are listed below: I, polyester, polyamide, polyimide, etc., especially the aromatic polyimide with the king of biphenyl & y > Co., Ltd.) is preferred. Moreover, the thickness of the insulating film is V—Yu / Secondary production 5 to 1 2 5 // m (micron), preferably 2 5 to 7 5 // m 〇 And, the mouth is on the surface of the thin film 1 The wiring pattern 丨 2 The pattern of the conductor pig slice generally formed by borrowing. Therefore, copper or copper, and the connection layer A at π # μ live on the moon, even if the white film is waiting for Tong 2: Binding 'i' can pass through the adhesive layer, which can be crimped by 敎, ^ or It is formed by electroplating. The thickness of the conductor foil is preferably 5 to 35 " m. The conductor collar piece is made of steel V2, which can be used to form an insulating film 1 by casting method. ; 料 = 先; = f, rri treatment constitutes absolutely on-chip formation. Cheng Ya & Amex resin composition on the conductor foil nickel surface pattern 16 of course also borrows the metal pig 'for example how steel force theory does not: v white sheet shape < but it does not have to be a good conductor Er Lu, Er " A dimensional change that depends on humidity occurs, so the dimensional change that occurs due to moisture absorption due to no material can occur. Reduce the insulating base ψT t ^ As mentioned in the article, I also look forward to reducing the ruler's thermal expansion coefficient +4: 2: ground 'using a thermal expansion coefficient smaller than the insulating base: u :, avoiding the situation, although the thermal expansion coefficient of Umbrella amine is 15 to 251) 1) 1]] /. 〇 之 , 。. Example of spear king degree, not 540260 V. Description of the invention (7) --------- Over, copper is 16Ppm / ° C, aluminum is 23ppm / ° C 'nickel is 13ppm / t This can be according to the polyimide used Choose the type. Even if this kind of metal foil is also laminated directly on the insulating film, the adhesive layer is formed by thermocompression bonding, etc., or the materials or precursors that make up the insulating film can be further processed by electro-mineralization / transmission. For example, ^, the precursor resin composition is formed on the conductor foil forming the wiring pattern, and the amine needs to be dried, and then the metal layer is laminated. Thereafter, the heat treatment is performed in the case of direct lamination or lamination via a cast layer. They can be laminated from either side, or at the same time. In addition, in the case where the conductor foil is formed by electroplating = it is a box piece, both of them can be electroplated at one time, and of course, it can also be individually controlled. Moreover, although the thickness of the metal foil constituting the inner surface pattern 16 is not specified, the same thickness as the conductor foil of the wiring pattern 2 and the sound limit M can be used, and the conductor foils provided on the surface of the insulating film 1 The sheet and the metal 羯 f are changed from the photo-micro-etching pattern to the wiring pattern 2 and the inner surface pattern 6. The photoresist material coating, which is coated with photoresist material coating solution Xing Cheng, is patterned by exposure and development through a photomask, and the patterned photoresist material is used as a shield. The photoresist is removed by dissolving (etching treatment), and then dissolving and removing the photoresist, thereby shaping the conductive foil and the gold foil. At the same time, the photomicro-engraving method can be performed on both sides at the same time, or on one side. In the case of deduction, it can be performed on either side first. , And the surface is formed by applying a solder resist coating liquid on the patterned conductive box sheet, and performing a predetermined pattern to form a solder resist layer 15.

例如使 材料不管 性質以及 酸酯,特 感光性樹 型環氧丙 型環氧曱 等。且, 域,使其 料塗液。 用光阻 是正性 保護導 別是添 脂之材 稀酸酉旨 基丙稀 阻焊層 硬化之 焊材料作 或負性均 電體箔片 加光聚合 料。環氧 樹脂、紛 酸酯樹脂 1 5可使用 一般熱硬 為形成阻焊層1 5之材料。 了’其可為具備一般光抗 之性貝之材料。例如,其 起始劑等於環氧丙烯酸酯 丙細酸樹脂列舉之,可為 齡型環氧丙浠酸酯樹脂、 、紛醛型環氧甲基丙烯酸 猎由網版印刷僅塗覆於必 化型或U V (紫外線)硬化型 光阻焊 |虫劑之 為丙稀 樹脂等 雙酚A 雙酚A 酯樹脂 要區 阻焊材 内面圖型1 6之形狀雖未特別限定,尤佳者卻是設成沿内 引線13及外引線14等之端子部並設方向減低尺寸變化。因 此’為了減低端子部之並設方向之尺寸變化,較佳地,形 成沿並設方向伸延之圖型。 圖1(b)之内面圖型16形成於形成鏈輪齒孔2之寬度方向 兩側緣部以外之大致全面,圖2所示内面圖型丨6a至丨6C沿 並設方向僅延設在對應於設有内引線丨3及外引線丨4之區域 之部份。 這些内面圖型1 6、1 6A至1 6C減低絕緣基材11之吸濕所造 成尺寸變化,防止内引線13及外引線14之間距之累積偏 差,進一步提高抗彎曲性。 又’特別是内面圖型1 6A亦奏得於一面對電子零件加熱 一面將其壓接、安裝於内引線;[3上之際防止絕緣基材丨丨熱 變形之效果。For example, regardless of the nature of the material and the acid ester, the special photosensitive dendritic epoxy resin, etc. And, to make the material coating liquid. Photoresist is a positive protective material, not a fat-adding material, dilute acid, acrylic-based solder resist, hardened solder material, or negative homogeneous foil with photopolymer. Epoxy resin and ester resin 15 can be used. Generally, the material is used to form solder resist 15. It ’s a material with general photoresistance. For example, its initiator is equal to epoxy acrylate and acrylic acid resin. It can be aging type epoxy propylene glycol resin, and aldehyde-type epoxy methacrylic acid. Type or UV (ultraviolet) hardening type photoresistive solder | The insecticide is bisphenol A, bisphenol A ester resin such as acrylic resin, etc. The shape of the inner surface of the solder resist material is not particularly limited. The shape of the inner surface is not particularly limited. It is provided to reduce the dimensional change along the parallel direction of the terminal portions of the inner lead 13 and the outer lead 14 and the like. Therefore, in order to reduce the dimensional change in the juxtaposition direction of the terminal portions, it is preferable to form a pattern extending in the juxtaposition direction. The inner surface pattern 16 of FIG. 1 (b) is formed on the sides of the sprocket tooth holes 2 in the width direction, and is substantially comprehensive. Corresponds to the part where the inner lead 丨 3 and the outer lead 丨 4 are provided. These inner surface patterns 16, 16A to 16C reduce the dimensional change caused by the moisture absorption of the insulating substrate 11, prevent the accumulated deviation between the inner lead 13 and the outer lead 14, and further improve the bending resistance. Also, especially the inner surface pattern 16A can also be used to crimp and install the electronic parts while heating the electronic parts; [3] The effect of preventing thermal deformation of the insulating substrate.

91118812.ptd 第12頁 540260 五、發明說明(9) 圖3顯示上述電子零件安裝用基板之一製程例。 如圖3(a)所示,於絕緣薄膜i之兩面準聂 二,1—2之*電體層! 2 〇以及形成内φ圖型i 6之^屬層/⑽之 1曰2(ΓΛ膜\如圖3(b)所示,藉由衝壓等,貫通導電體層 孔2可、Γ緣溥膜1及金屬層160,形成鏈輪齒孔2。此鏈:齒 2 7自任一側沖孔。其次,如圖3(c)所示,使用一妒光 法’將金屬層16〇圖型化,以其作為内面圖㈣。又 導電體層120上形成配線圖型12之區域 =姓材料塗覆溶液,形成抗光银材料塗層2〇(參考圖 3⑷所-當"V亦可使用正性抗光姓材料。進一步如圖 由二 定位銷插入鏈輪齒孔2内進行定位後,經 护成圖/光.顯影,藉此,使抗光蝕材料塗層圖型化, 崠a ;用(!)所不配線圖型用抗光蝕劑圖型22。其次,以配 划用:^ Γ層 進一步以鹼溶液等溶解、除去配線圖 型22,藉此’如圖3⑴所示,形成配線圖 u者,如圖3(g)所示’例如使用網版印刷形成阻g 後ΐ型中’固然在圖型化金屬層_之 時將兩面匕 亦可順序相反,進一步亦可同 美#不=以上5兒明例中,設置内面圖型之電子零件安事用 基1不限於上述⑽基板,亦可為具有裝置孔者。、用 圖4顯示具有裝置孔之一電子零件安裝用基板例 54026091118812.ptd Page 12 540260 V. Description of the invention (9) Fig. 3 shows an example of a manufacturing process of the above-mentioned electronic component mounting substrate. As shown in Fig. 3 (a), on both sides of the insulating film i, Nie 2, 1-2 * electric body layer! 2 〇 and the formation of the φ pattern i 6 of the metal layer / 1 曰 2 (ΓΛ film \ As shown in Figure 3 (b), through punching, etc., through the conductor layer hole 2 can, Γ edge 溥 film 1 And the metal layer 160 to form a sprocket tooth hole 2. This chain: teeth 2 7 are punched from either side. Second, as shown in FIG. 3 (c), the metal layer 16 is patterned using a jealous method, Take it as the inside view ㈣. And the area where the wiring pattern 12 is formed on the conductor layer 120 = the coating solution of the last name material to form a coating of light-resistant silver material 20 (refer to Figure 3-When " V can also use positive Anti-light surname material. As shown in the figure, two positioning pins are inserted into the sprocket tooth hole 2 for positioning, and then protected into a picture / light. Development, thereby patterning the photo-resistant material coating, 崠 a; (!) Photoresist pattern 22 for all wiring patterns. Secondly, for layout: ^ Γ layer is further dissolved and removed with alkali solution, etc., to form wiring pattern 22, as shown in Figure 3 (a). For the wiring diagram u, as shown in FIG. 3 (g), 'For example, using screen printing to form a g-type hindering type.' Although the pattern of the metal layer can be reversed when the metal layer is patterned, it can also be the same as the United States. # = In the above 5 examples, the electronic component safety base 1 provided with an internal pattern is not limited to the above-mentioned base plate, but may also be a device hole. Figure 4 shows an example of an electronic component mounting substrate with a device hole. 540260

所示,電子零件安裝用基板1〇A具有裝置孔17,於裝置孔 1 7内面側之周緣部具有沿内引線丨3之並設方向伸延之内面 圖型1 6 0,此外,其與上述例子相同,顯示有相同作用之 部份標以相同元件編號,省略重複說明。 (實施形態2) 圖5顯不實施形態2之電子零件安裝用基板之平面圖及顯 示安裝電子零件於其上之狀態之剖視圖。 如圖5所示’電子零件安裝用基板3 〇具備於絕緣基材3 j 上朝四方伸延之配線圖型3 2,配線圖型3 2具有安裝丨c等電 子零件之内引線33以及連接外部配線之外引線34。 於此,在内引線33之内側區域形成獨立於配線圖型32之_ 外之虚設圖型38。 虛設圖型38係將構成配線圖型32之導電體層圖型化,電 氣上獨立於配線圖型3 2之外形成之圖型。當然,亦可在圖 型化配線圖型32之後,部份以其他材料設置形成。 由於絕緣基材31與配線圖型32之材料及製造方法基本上 與上述實施形態相同,故省略重複說明。 且,配線圖型32及虛設圖型38可用與上述實施形態 配線圖型1 2相同之材料形成,又,在形成虛設圖型3 8而其 與配線圖型3 2有別情形下,亦可用與實施形態i之内面圖馨 型1 6相同之材質形成。 胃\ 於此種電子零件安裝用基板3〇之至少内引線33上形成鍍· 錫層,如圖5(b)所示,IC40之金隆起41接合於内引線33 上0 *As shown, the electronic component mounting substrate 10A has a device hole 17, and a peripheral portion on the inner surface side of the device hole 17 has an inner surface pattern 1 60 extending along the juxtaposed direction of the inner lead 3, and in addition to the above, The examples are the same, and the parts showing the same effect are marked with the same component numbers, and repeated descriptions are omitted. (Embodiment 2) Fig. 5 shows a plan view of an electronic component mounting substrate according to Embodiment 2 and a sectional view showing a state in which the electronic components are mounted thereon. As shown in FIG. 5, the electronic component mounting substrate 3 is provided with a wiring pattern 3 2 extending in a quadrilateral direction on an insulating substrate 3 j. The wiring pattern 3 2 has inner leads 33 for mounting electronic components such as c and connection to the outside. Outside wiring 34. Here, a dummy pattern 38 is formed inside the inner lead 33 independently of the wiring pattern 32. The dummy pattern 38 is a pattern of the conductor layer constituting the wiring pattern 32, and is electrically independent of the pattern formed outside the wiring pattern 32. Of course, after patterning the wiring pattern 32, a part may be formed by using other materials. Since the materials and manufacturing methods of the insulating base material 31 and the wiring pattern 32 are basically the same as those of the above-mentioned embodiment, repeated description is omitted. In addition, the wiring pattern 32 and the dummy pattern 38 may be formed of the same material as the wiring pattern 12 of the above embodiment. In addition, when the dummy pattern 3 8 is formed and it is different from the wiring pattern 32, it may be used. It is formed of the same material as the inner surface of the embodiment i. Stomach \ A tin plating layer is formed on at least the inner lead 33 of the electronic component mounting substrate 30. As shown in FIG. 5 (b), the gold bump 41 of the IC40 is bonded to the inner lead 33. *

91118812.ptd 第14頁 54026091118812.ptd Page 14 540260

五、發明說明(π) 於如此安裝IC40情形下,如圖6所示,載置IC4〇於加熱 載台51上,在内引線33重疊於隆起41上狀態下,以加熱器 具5 2自絕緣基材3 1側加熱壓接,於内引線3 3與隆起4 1之間 形成錫金共晶而將其接合。此時之加熱溫度固然為3 〇 〇至 5 0 0 °C,不過,藉由設置虛設圖型3 8,可防止此種加熱所 造成的絕緣基材31之熱變形或内引線33之位置偏差。 虛設圖型3 8如此減低絕緣基材3 1因加熱而熱變形或尺寸 變化,防止内引線3 3間距之累積偏差。V. Description of the invention (π) In the case where the IC40 is installed as shown in FIG. 6, the IC40 is placed on the heating stage 51, and the inner lead 33 is superposed on the hump 41, and the heating device 5 2 is self-insulated. The substrate 31 is heated and pressure-bonded to form a tin-gold eutectic between the inner lead 33 and the bump 41, and the two are bonded. The heating temperature at this time is 3,000 to 500 ° C. However, by setting a dummy pattern 38, thermal deformation of the insulating substrate 31 or positional deviation of the inner lead 33 caused by such heating can be prevented. . The dummy pattern 3 8 thus reduces the thermal deformation or dimensional change of the insulating substrate 31 due to heating, and prevents the cumulative deviation of the pitch of the inner leads 3 3.

虛設圖型3 8之形狀雖未特別限定,尤佳的卻是設成減低 其沿内引線3 3之並設方向發生尺寸變化。因此,為了減低 端子部沿並設方向之尺寸變化,較佳地,形成沿並設方向 伸延之圖型,亦可如圖7所示,僅於内引線附近設置沿内 引線33之並設方向伸延之帶狀虛設圖型38a。當然,亦可 如圖8所示’設於内引線3 3内侧,形成與内引線3 3之ϋ設 方向無關,傾斜設置之虛設圖型3 8 Β。於設置圖7之虛設圖 型3 8 Α情形下,固然從確保内引線内側區域平坦性的觀點 看來較虛設圖型38差,惟奏得於以樹脂密封1(:之際,密封 樹脂容易流入内引線内側區域之效果。且於圖8之虛設圖 聖3 8 B彳月形下,同日寸谋得内引線内側區域平坦性之確保以 及密封樹脂之流動容易度。Although the shape of the dummy pattern 38 is not particularly limited, it is particularly preferable to reduce the size of the dummy pattern 38 along the juxtaposed direction of the inner leads 33. Therefore, in order to reduce the dimensional change of the terminal part along the juxtaposed direction, it is preferable to form a pattern extending along the juxtaposed direction. As shown in FIG. 7, the juxtaposed direction along the inner lead 33 may be provided only near the inner lead. Extending strip-shaped dummy pattern 38a. Of course, as shown in FIG. 8, it can also be provided inside the inner lead 3 3 to form a dummy pattern 3 8 Β which is inclined regardless of the direction in which the inner lead 33 is arranged. In the case of setting the dummy pattern 3 8 Α in FIG. 7, although it is inferior to the dummy pattern 38 from the viewpoint of ensuring the flatness of the inner area of the inner lead, it can be easily sealed with resin. The effect of flowing into the inner area of the inner lead. Under the imaginary shape of Fig. 8 3 8 B, the same day can ensure the flatness of the inner area of the inner lead and the ease of flow of the sealing resin.

,娜於任一情形下’均可防止安裝I c4 〇之際加熱所造成 =絕緣,材31熱度形成内引線33之位置偏差。當然,與IC 子零件連接亦有金錫共晶以外之效果,例如奏得與絲 焊安裝之情形相同之效果。In any case, ’can prevent the positional deviation of the inner lead 33 caused by the heat caused by the heat of the material 31 during the installation of I c4 〇 = insulation. Of course, connecting to IC sub-components also has effects other than gold-tin eutectic, such as the same effect as in the case of wire bonding.

第15頁 540260Page 540 260

亦可於實施形態2之電子零件安裝用美 同實施形態1之内面圖型。藉此,驊 ^反之内面設置如 型的個別效果,亦進一步發揮相乘效果。口生和虛設圖 (實施例1) 其次’根據實施例及比較例,對本發 、, 藉由鑄造法,於厚度12 /ζπι之銅箔上形成平聚^亞成明/It can also be applied to the electronic component mounting of the second embodiment in the same manner as the inner surface of the first embodiment. In this way, 骅 ^ on the other hand, set the individual effects like this inside, and further exert the multiplicative effect. Oral and dummy maps (Example 1) Secondly, according to the examples and comparative examples, a flat polymer was formed on the copper foil with a thickness of 12 / ζπ by casting method according to the examples and comparative examples ^ 亚 成 明 /

樹脂組成物層,進一步層疊厚度丨2 # m之鋼〜 i ^先 理,製造將厚度40 /ΖΠ1之聚亞醯胺夾在銅氙g之:以熱 之層豐體。藉由光微刻法將雙面銅箔圖型化,士曰構 示,形成於由聚亞醯胺構成之絕緣基材裘 目二圖2所 ^ iHJ 有西己 js 型,於内面侧具有内面圖型之電子零件安裝用美、、、θ (比較例1) 、 土扳0 形成除了不設置内面圖型以外與實施例1相同之 件安裝用基板。 令 (試驗例1) 在濕度40%RH和6 0%RH之條件下,分別就實施例1及比較 例1之個別電子零件安裝用基板,測定内引線沿並設方向 之尺寸變化,獲得表1之結果。 且,將基板切成預定尺寸,把基板放入25 °C 40%RH之恒 溫恆濕槽,放置2日,測定4 0%RH下之尺寸1^,進一步將基The resin composition layer is further laminated with a steel sheet with a thickness of 2 # m ~ i ^ preliminary process, and a polyimide having a thickness of 40 / ZΠ1 is sandwiched between copper and xenon g: a layer of heat is used to enrich the body. The double-sided copper foil is patterned by photo-micro-engraving method. The structure is shown in Figure 2. It is formed on an insulating base material made of polyurethane. Figure 2 ^ iHJ has a jiji type, and it has Inner-surface pattern for electronic component mounting US,,, θ (Comparative Example 1), and soil plate 0 Form a substrate for mounting the same component as in Example 1 except that the inner-surface pattern is not provided. Let (Test Example 1) measure the dimensional change of the inner leads along the juxtaposed direction on the individual electronic component mounting substrates of Example 1 and Comparative Example 1 under the conditions of 40% RH and 60% RH. 1 result. Then, the substrate was cut into a predetermined size, and the substrate was placed in a constant temperature and humidity tank at 25 ° C and 40% RH for 2 days, and the size at 40% RH was measured.

540260 五、發明說明(13) 板放入25 °C 60%RH之恆溫恆濕槽,放置2日,測定60%RH下 之尺寸L2,此後,由下述式子求得尺寸變化率。 [數1 ] 尺寸變化率(40%—60%RH) =α2 —1^)/:^ [表 l] 1 尺寸變化率(40% — 60%RH) 實施例1 Oppm 比較例1 490ppm 結果,於比較例1觀察出相當於4 9 0ppm之尺寸變化,即 使濕度上昇,實施例1之電子零件安裝用基板亦完全看不 出有任何尺寸變化。 且,比較例1之尺寸變化率若以就市售鑄造型層疊薄膜 (品名:艾斯帕奈克斯SC12-40-00 - AE ;新日鐵化學公司) 之聚亞醯胺所測定每1 %RH變化之吸濕變化率(濕度膨脹係 數)為 3 4ppm/%RH(34 X 10_6mm/(mm · %RH)),按濕度變動20% 換算’即為6 8 0ppm。相對於此,市售之聚亞醯胺薄膜(例 如,品名··優比克斯S ;宇部興產(股份有限公司)、品 名:克卜東EN,東雷·杜邦公司)之吸濕變化率則分別為 14ppm/%RH、1 5ppm/%RH,就此而言,若設置内面圖型,顯 然可充份防止吸濕所造成尺寸變化。 (實施例2至4) 使用厚度4 0 // m之聚亞醯胺作為絕緣基材,將厚度丨2以爪 之銅%圖型化’匹配所安裝I C (外形為1 5 m m四方形),升彡成 配線圖型,形成相當於圖5、圖7及圖8之電子零件安梦用540260 V. Description of the invention (13) The board was placed in a constant temperature and humidity tank at 25 ° C and 60% RH and left for 2 days to measure the size L2 at 60% RH. Thereafter, the dimensional change rate was obtained from the following formula. [Number 1] Dimensional change rate (40% -60% RH) = α2 -1 ^) /: ^ [Table 1] 1 Dimensional change rate (40% -60% RH) Example 1 Oppm Comparative Example 1 490ppm In Comparative Example 1, a dimensional change equivalent to 490 ppm was observed, and even if the humidity increased, the electronic component mounting substrate of Example 1 did not show any dimensional change at all. In addition, if the dimensional change rate of Comparative Example 1 is determined by using a commercially available cast-type laminated film (product name: Asparex SC12-40-00-AE; Nippon Steel Chemical Co., Ltd.) for each 1 The moisture absorption change rate (humidity expansion coefficient) of% RH change is 34 ppm /% RH (34 X 10_6mm / (mm ·% RH)), which is converted to 20% when humidity change is 680 ppm. In contrast, the hygroscopic changes of commercially available polyurethane films (for example, product name ·· Ubex S; Ube Kosan Co., Ltd., product name: Kebudong EN, Donglei DuPont) The rates are 14ppm /% RH and 15ppm /% RH, respectively. In this regard, if the internal pattern is set, it is obvious that the dimensional change caused by moisture absorption can be fully prevented. (Examples 2 to 4) Using polyimide with a thickness of 40 / m as an insulating substrate, patterning the thickness of 丨 2 in copper% of the claws to match the mounted IC (outer diameter is 15 mm square) , Into a wiring pattern, forming the electronic parts Anmen equivalent to Figure 5, Figure 7 and Figure 8

540260 五、發明說明(14) 基板。 (比較例2 ) 製作除了不設置虚設圓型外與實施例2至4相同之電子零 件安裝用基板。 (試驗例2 ) 在圖6對實施例2至4及比較你丨?7 示要領下,以45〇t之加熱之對 30加熱壓接3秒鐘而安裝IC40,因肉=零件女裝用基板 發生之對向内引線之圖型位置 引線周邊區域變形而 _,實施例3 : 3 ,實施例4爲里分別為實施例2 : 〇 較例2情形下則發生大於7 之變形#。m。另一方面,於比 又’在濕度40%RH和60%RH條株\=丨^ 之尺寸變化’獲得與試驗例1 之、姓疋内引線沿並設方向 【發明效果】 叫心、、、。果。 如以上所示,本發明奏得 Μ 型’可提供提高吸濕或加埶;:5面圖型及虛設圖 用基板之效果。 ”、、尺寸^疋性之電子零件安裝 【元件編號說明】 11 ,子零件安裝用基板 、心緣基材 配線圖型 内引線 外引綠 阻焊層 91118812.ptd 第18頁 540260540260 V. Description of the invention (14) Substrate. (Comparative Example 2) A substrate for mounting electronic parts was produced in the same manner as in Examples 2 to 4 except that a dummy circle was not provided. (Experimental example 2) In Fig. 6, examples 2 to 4 are compared with you. 7 According to the instructions, the IC40 is installed by heating and crimping with a heating pair of 45 ° t for 3 seconds, and the IC40 is installed due to the deformation of the peripheral area of the lead in the pattern position of the pair of inward leads that occurs on the meat = component women's substrate. Example 3: 3, Example 4 is Example 2: 〇 In the case of Comparative Example 2, a deformation # 7 occurs. m. On the other hand, Yubi's 'dimensional change in humidity of 40% RH and 60% RH strains == ^^' was obtained in the same direction as in Test Example 1 with the inner leads of the last name [Inventive effect], . fruit. As shown above, the M-type according to the present invention can provide the effect of improving the moisture absorption or the increase of the substrate for the 5-sided pattern and the dummy pattern. ”, Size electronic components installation [component number description] 11, sub-substrate mounting substrate, core edge substrate wiring pattern inner lead outer lead green solder resist 91118812.ptd page 18 540260

91118812.ptd 第19頁 540260 圖式簡單說明 圖1 (a )、( b)是顯示本發明實施形態1之一電子零件安裝 用基板例之概略俯視圖及剖視圖。 圖2 (a )〜(c)是顯示本發明實施形態1之一電子零件安裝 用基板例之概略俯視圖及剖視圖。 圖3 (a)〜(g)是顯示本發明實施形態1之一電子零件安裝 用基板製程例之概略剖視圖。 圖4是顯示本發明實施形態1變形例之一電子零件安裝用 基板例之概略剖視圖。 圖5 (a )、( b)是顯示本發明實施形態2之一電子零件安裝 用基板例之概略俯視圖及安裝I C之剖視圖。 圖6是顯示將I C安裝於本發明實施形態2之電子零件安裝 用基板之模樣之圖面。 圖7是顯示本發明實施形態2變形例之一電子零件安裝用 基板例之概略俯視圖。 圖8是顯示本發明實施形態2變形例之一電子零件安裝用 基板例之概略俯視圖。91118812.ptd Page 19 540260 Brief Description of Drawings Figs. 1 (a) and (b) are schematic plan and sectional views showing an example of a substrate for mounting electronic parts according to the first embodiment of the present invention. Figs. 2 (a) to (c) are schematic plan views and sectional views showing an example of a substrate for mounting electronic components according to the first embodiment of the present invention. 3 (a) to (g) are schematic cross-sectional views showing an example of a manufacturing process of a substrate for mounting electronic parts according to the first embodiment of the present invention. Fig. 4 is a schematic sectional view showing an example of a substrate for mounting electronic parts, which is a modification of the first embodiment of the present invention. Figs. 5 (a) and 5 (b) are a schematic plan view showing an example of a substrate for mounting electronic components according to the second embodiment of the present invention, and a cross-sectional view of the mounting IC. Fig. 6 is a diagram showing a state in which IC is mounted on a substrate for mounting electronic parts according to a second embodiment of the present invention. Fig. 7 is a schematic plan view showing an example of a substrate for mounting electronic parts, which is a modification of the second embodiment of the present invention. Fig. 8 is a schematic plan view showing an example of a substrate for mounting electronic parts, which is a modification of the second embodiment of the present invention.

91118812.ptd 第20頁91118812.ptd Page 20

Claims (1)

540260 六、申請專利範圍 1. 一種電子零件安裝用基板,係具備絕緣基材以及形成 於此絕緣基材之一表面,同時,具有用來與外部連接之端 子部之配線圖型者,其特徵在於, 至少於前述端子部附近具有獨立於前述配線圖型之外之 金屬圖型。 2. 如申請專利範圍第1項之電子零件安裝用基板,其 中,前述金屬圖型具有設在前述絕緣基材設有前述配線圖 型之表面之反對側内面之内面圖型。 3. 如申請專利範圍第2項之電子零件安裝用基板,其 中,前述内面圖型設在前述絕緣基材内面對應於前述端子 部之區域及其附近。 4. 如申請專利範圍第2項之電子零件安裝用基板,其 中,前述内面圖型設於前述絕緣基材内面之大致全面。 5. 如申請專利範圍第2項之電子零件安裝用基板,其 中,前述内面圖型不經由黏接劑設在前述絕緣基材上。 6. 如申請專利範圍第3項之電子零件安裝用基板,其 中,前述内面圖型不經由黏接劑設在前述絕緣基材上。 7. 如申請專利範圍第4項之電子零件安裝用基板,其 中,前述内面圖型不經由黏接劑設在前述絕緣基材上。 8. 如申請專利範圍第1項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 9. 如申請專利範圍第2項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖540260 6. Application scope 1. A substrate for mounting electronic components, which is provided with an insulating base material and a wiring pattern formed on one surface of the insulating base material and has a terminal portion for connecting to the outside. The metal pattern is independent of the wiring pattern at least in the vicinity of the terminal portion. 2. For the electronic component mounting substrate according to item 1 of the scope of patent application, wherein the metal pattern has an inner surface pattern provided on the inner surface of the opposite side of the surface of the insulating substrate provided with the wiring pattern. 3. For the electronic component mounting substrate according to item 2 of the scope of patent application, wherein the inner surface pattern is provided in a region of the inner surface of the insulating base material corresponding to the terminal portion and its vicinity. 4. For the electronic component mounting substrate according to item 2 of the scope of patent application, wherein the aforementioned inner surface pattern is provided on the entire inner surface of the aforementioned insulating base material. 5. For the substrate for mounting electronic parts, as described in the second item of the patent application, wherein the aforementioned inner surface pattern is provided on the aforementioned insulating base material without an adhesive. 6. For the electronic component mounting substrate according to item 3 of the patent application scope, wherein the aforementioned inner surface pattern is provided on the aforementioned insulating base material without an adhesive. 7. For the electronic component mounting substrate according to item 4 of the patent application scope, wherein the aforementioned inner surface pattern is provided on the aforementioned insulating base material without an adhesive. 8. For the electronic component mounting substrate according to item 1 of the scope of patent application, wherein the metal pattern has a dummy pattern provided on a surface of the insulating substrate provided with the wiring pattern. 9. For the electronic component mounting substrate according to item 2 of the patent application scope, wherein the metal pattern has a wiring pattern provided on the insulating base material 91118812.ptd 第21頁 540260 六、申請專利範圍 型之表面之虛設圖型。 1 0.如申請專利範圍第3項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 1 1.如申請專利範圍第4項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 1 2.如申請專利範圍第5項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 1 3.如申請專利範圍第6項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 1 4.如申請專利範圍第7項之電子零件安裝用基板,其 中,前述金屬圖型具有設於前述絕緣基材設有前述配線圖 型之表面之虛設圖型。 1 5.如申請專利範圍第8項之電子零件安裝用基板,其 中,前述虛設圖型設於構成與前述端子部中之電子零件連 接之端子之内引線内側。 1 6.如申請專利範圍第1 5項之電子零件安裝用基板,其 中,前述虛設圖型設於前述内引線内側之大致全面。 1 7.如申請專利範圍第1 5項之電子零件安裝用基板,其 中,前述虛設圖型僅於前述内引線附近沿與該内引線並排 之方向設置。91118812.ptd Page 21 540260 VI. The dummy pattern of the surface of the scope of patent application. 10. The electronic component mounting substrate according to item 3 of the scope of patent application, wherein the metal pattern has a dummy pattern provided on a surface of the insulating substrate provided with the wiring pattern. 1 1. The electronic component mounting substrate according to item 4 of the scope of patent application, wherein the metal pattern has a dummy pattern provided on a surface of the insulating base material provided with the wiring pattern. 1 2. The substrate for mounting electronic parts according to item 5 of the scope of patent application, wherein the metal pattern has a dummy pattern provided on a surface of the insulating substrate provided with the wiring pattern. 1 3. The electronic component mounting substrate according to item 6 of the patent application scope, wherein the metal pattern has a dummy pattern provided on a surface of the insulating base material provided with the wiring pattern. 1 4. The electronic component mounting substrate according to item 7 of the scope of the patent application, wherein the metal pattern has a dummy pattern provided on a surface of the insulating substrate provided with the wiring pattern. 1 5. The electronic component mounting substrate according to item 8 of the scope of the patent application, wherein the dummy pattern is provided on an inner side of an inner lead constituting a terminal connected to the electronic component in the terminal portion. 1 6. The substrate for mounting electronic parts according to item 15 of the scope of patent application, wherein the dummy pattern is provided substantially on the inside of the inner lead. 1 7. The electronic component mounting substrate according to item 15 of the scope of patent application, wherein the dummy pattern is provided only in the vicinity of the inner lead in a direction parallel to the inner lead. 91118812.ptd 第22頁 540260 六、申請專利範圍 1 8.如申請專利範圍第1至1 7項中任一項之電子零件安裝 用基板,其中,電子零件安裝用基板是不具有裝置孔之 C0F基板。 1 9.如申請專利範圍第2或3項之電子零件安裝用基板, 其中,於前述絕緣基材形成裝置孔,於該裝置孔之周緣部 設置前述内面圖型。 2 0.如申請專利範圍第1至1 7項中任一項之電子零件安裝 用基板,其中,前述配線圖型不經由黏接劑設在前述絕緣 基材上。 2 1.如申請專利範圍第1 8項之電子零件安裝用基板,其 中,前述配線圖型不經由黏接劑設在前述絕緣基材上。 2 2.如申請專利範圍第1 9項之電子零件安裝用基板,其 中,前述配線圖型不經由黏接劑設於前述絕緣基材上。91118812.ptd Page 22 540260 6. Scope of patent application 1 8. The electronic component mounting substrate according to any one of items 1 to 17 of the patent application scope, wherein the electronic component mounting substrate is a C0F without a device hole. Substrate. 1 9. The electronic component mounting substrate according to item 2 or 3 of the scope of patent application, wherein a device hole is formed in the aforementioned insulating base material, and the aforementioned inner surface pattern is provided on a peripheral edge portion of the device hole. 20. The substrate for mounting electronic parts according to any one of claims 1 to 17, wherein the wiring pattern is provided on the insulating base material without an adhesive. 2 1. The electronic component mounting substrate according to item 18 of the scope of patent application, wherein the wiring pattern is provided on the insulating base material without an adhesive. 2 2. The electronic component mounting substrate according to item 19 of the scope of patent application, wherein the wiring pattern is provided on the insulating base material without an adhesive. 91118812.ptd 第23頁91118812.ptd Page 23
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