JP2001267376A - Manufacturing method of fpc and display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve an inexpensive FPC and a display that prevent lead burnout caused through tin plating, and the occurrence of resist peel-off in a soldering process. SOLUTION: First tin plating is formed on a copper pattern is subjected to patterning. After that, resist is formed, and second tin plating is made on the copper pattern of a part where the resist is not formed, thus achieving an inexpensive flexible substrate having a fine pattern.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a film substrate on which a fine pattern circuit (having a pattern of 100 .mu.m pitch or less) is formed, and a display device used for portable equipment and an electronic organizer.

[0002]

2. Description of the Related Art A liquid crystal display device has a driver IC mounting and C,
COF (Chip On FP) in which chip parts such as R and electronic parts such as package ICs are mixedly mounted on a film substrate.
A product in which C) is mounted on a liquid crystal panel has begun to be mass-produced.

[0003] Conventionally, a film substrate is prepared by applying a film-like adhesive to a polyimide film and forming a film by a method such as rolling or electrolysis.
It was formed by applying a u-foil and patterning it, and was subjected to electrolytic plating or electroless plating for resist coating and surface protection.

A film substrate having such a three-layer structure is:
Since the adhesive was deformed by heat and humidity, it was not suitable for fine patterns having a pitch of 100 μm or less in terms of dimensional stability.

Therefore, a film substrate from which the adhesive has been removed has been developed. There are two manufacturing methods for a two-layer film substrate without an adhesive layer.

[0006] One is a casting method in which a polyamic acid varnish is applied to a Cu foil and cured after the solvent is removed. For example, there is a vapor deposition method in which a metal thin film is formed to improve adhesion, and Cu is sputtered or vapor deposited to form a Cu thin film, and then Cu is laminated by electrolytic plating.

[0007] The difference between the film substrates in these manufacturing methods is the thickness of Cu. C used for casting method
The thickness of u is generally 35 μm or 18 μm, and recently 12 μm has been mass-produced. 9 μm is under development. In the vapor deposition method, the thickness of Cu is 1 to 18 μm
Mass production is possible.

In order to form a fine pattern, there is a casting method in which an electrolytic Cu foil is half-etched and then patterned. However, since the surface roughness of the Cu foil is relatively large, a stable yield cannot be obtained. Not easy. When the pattern has a pitch of 100 μm or less, a film substrate formed by a vapor deposition method that can uniformly reduce the thickness of Cu is more suitable.

[0009] In the bare chip mounting of the IC, when connection is performed by using an adhesive, a different bump is applied to the circuit board by using a plating bump formed by plating a bump made of Au on the IC pad or a stud bump applying wire bonding. It has been press-bonded with an isotropic conductive film or transferred to a substrate by transferring a silver paste to a bump, and an underfill has been filled and connected between them.

When metal diffusion connection is used, solder is used for the bumps of the IC, soldering is performed on the electrodes of the substrate, and underfill is filled. Au is used for the bumps of the IC, and Sn plating is performed on the electrodes on the substrate side. Then, Au-Sn diffusion connection was performed to fill the underfill.

The bump pitch of the external connection electrode of the IC is, for example, 80 μm in the mass for the liquid crystal driving IC, but the process development of the IC is progressing and the miniaturization is progressing. Therefore, the bump pitch of the external connection electrode of the IC is 5
Mass production of 0 μm pitch has begun, and 40 μm pitch has been developed.

On the other hand, a liquid crystal display device has been manufactured by connecting a COF having an IC connected to a film substrate to a liquid crystal panel. Since the COF can package packages such as a liquid crystal driving IC, C and R chip components, a power supply IC and an operational amplifier at a high density, the liquid crystal display device can be reduced in size and thickness. This liquid crystal display device is widely used in portable devices, and in particular, the demand for portable information terminals represented by portable telephones and PDAs has been increasing significantly in recent years.

[0013]

In order to use a liquid crystal driving IC having a pitch of 40 μm, the width of the pattern of the film substrate to be connected is 10 to 15 μm.

In order to connect this pattern to the bump of the IC, the most stable connection can be obtained by eutectic connection of gold and tin.

For forming a fine pattern on an FPC film, a film formed by a vapor deposition method is used. In the process of manufacturing using the film formed by the vapor deposition method, a pattern is formed on a copper foil by a photo method, and a photosensitive film is formed. A solder resist having properties and the like was formed by a photo method, and further, electroless tin plating was performed.

In this tin plating step, in particular,
Disconnection occurred frequently at the boundary of the resist in a portion where a continuous pattern was formed at a pitch of μm.

In the disconnection of the FPC, the electroless tin plating is substituted with Cu and thiouric acid, and the thiouric acid is substituted with tin and plated with tin. Cracks occur in the pattern due to the promotion of

[0018] Such cracking leading to disconnection is likely to occur in two places. The first crack is a boundary between the resist and the pattern, and the second crack is a portion where the pattern and the polyimide film are peeled off.

This first quarry is made of TAB (Tape Autom
A similar phenomenon has occurred in the production of an ated bonding tape, which is disclosed in JP-A-2000-36521. In this case, TAB uses a raw material in which 18 μm electrolytic copper foil is adhered to a polyimide film such as Iupirex by an epoxy adhesive. The disconnection occurs at the interface between the resist and the pattern. To solve this problem, the tin plating process is divided into two parts, one before and after the resist is formed. Basically, tin plating is performed before forming a resist.
No. 2,969, discloses the process.

The second crack is concentrated on the boundary of the resist due to the peeling of the polyimide and the pattern. By handling the FPC before plating, the FPC can be easily prepared if the polyimide is 50 μm or less and the copper foil is 12 μm or less. Due to bending, stress concentrates on the resist boundary portion, and the pattern is peeled off from the polyimide. Therefore, the tin plating process is basically impossible after the formation of the resist.

In order to prevent the first cracking and the second cracking, it is preferable to perform a tin plate before forming the resist. However, since the tin plate is also under the resist, the solder enters under the resist in the soldering process. In many cases, the resist was peeled off. The thickness of the tin plating cannot be reduced because the IC is connected to the eutectic of gold and tin.

That is, an object of the present invention is to provide an inexpensive FPC and display device which does not have lead disconnection due to tin plating and does not cause peeling of resist in a soldering process.

[0023]

Means for Solving the Problems To solve the above problems, tin-plated metal wiring and solder are formed by depositing copper on a polyimide film having a thickness of at least 50 μm or less and forming a pattern on the film having a thickness of 10 μm or less by plating and plating. The problem has been solved by at least a step of patterning copper, a step of performing first tin plating, a step of forming a solder resist, and a step of performing second tin plating in a method of manufacturing an FPC having a resist formed thereon.

Further, in order to prevent the resist from peeling off in the soldering step, a processing step for suppressing the solder wettability of the first tin plating is provided between the step of forming the solder resist and the step of forming the solder resist. I decided to do it.

Further, in order to prevent the second cracking, 10
In a continuous pattern having a pitch of 0 μm or less, the boundary between the solder resists was formed by continuously forming an oblique or chevron shape to disperse stress and secure adhesion between the polyimide and the pattern.

In addition, by performing tin plating twice, after the first tin plating and after the second tin plating, an annealing process for preventing whiskers is performed to increase the strength of the plating interface, so that the first tin plating is performed. By forming a diffusion layer with Cu on the layer and the second tin plating layer, the boundaries of plating were eliminated, and the strength was secured.

Further, in a display device comprising an FPC, an SMD, a semiconductor, and a display body, in which a pattern and a solder resist are formed on a film formed to a thickness of at least 10 μm by depositing and plating copper on a polyimide film having a thickness of at least 50 μm, An inexpensive display device that solves the above-described problem by tinning the entire surface or a part of the pattern and increasing the thickness of the tin plating where the pattern is exposed from the thickness of the tinplate in the portion where the solder resist is coated. I got it.

Further, in a continuous pattern having a pitch of 100 μm or less, the boundary between the solder resists is formed in a diagonal or mountain-like shape continuously, so that an inexpensive display device can be realized.

[0029]

Embodiments of the present invention will be described below with reference to the drawings. (Example 1) A manufacturing process of Example 1 of the present invention will be described with reference to FIG. As shown in (a), Cu is formed on a polyimide film 1 having a thickness of 25 μm by vapor deposition and plating to a thickness of 8 μm. Next, this film is etched by a photo method and patterned as shown in FIG. Next, as shown in (c), the first tin plating 3 is formed on the entire surface of the patterned pattern 2. The formation of the first tin plating is performed at a plating solution temperature of 50 ° C. for 30 seconds. In the case of partially plating with gold, plating is performed with protection by a plating mask. Next, as shown in (d),
The solder resist 4 is formed using a photosensitive resist. After forming the solder resist with a thickness of about 10 μm,
A heat treatment at 170 ° C. for 60 minutes is performed to improve the adhesion. At this time, the resist is conveyed so that no stress is applied to the resist. Then, the second tin plating 5 is formed as shown in FIG. The second tin plating 5 is formed at a plating solution of 50 ° C. for 7 minutes. Then, annealing is performed at 120 ° C. for 60 minutes to prevent whiskers, thereby forming a diffusion layer with Cu and a pure tin layer. At this time, the diffusion layer is a part of the first tin plating and the second tin plating, and the layers other than the diffusion layer of the second tin plating become pure tin layers. By forming this diffusion layer by the first tin plating and the second tin plating, the adhesion between the first tin plating and the second tin plating is improved.

The FPC is not limited to single-sided wiring, and the same applies to double-sided wiring boards and multilayer wiring boards. In the case of performing two-color plating with gold or the like, gold plating is performed by covering the portion with a plating mask before and after tin plating. (Example 2) In the process of Example 1, after forming the first tin plating, an alloy of tin and copper is formed in order to make the solder hard to wet. Heat treatment at about 180 ° C. for 1 hour in a nitrogen atmosphere causes the alloy ratio of tin to copper to be about 9: 1, the melting point to be about 380 ° C., and poor solder wetting. In addition, it is also possible to make tin less wet by forming a surface oxide film.
By performing the above-described heat treatment in the air, a surface oxide film can be formed, so that solder wettability can be further reduced. (Embodiment 3) FIG. 2 is a top view of a boundary portion between a resist and a pattern according to Embodiment 3 of the present invention. Pattern 3 is 40μ
It is formed with a pattern width of 10 μm at m pitches. The resist 4 was formed in a chevron shape in order to reduce the stress applied to one line due to bending. The shape is not limited to a mountain shape, but may be any shape that can relieve stress. (Example 4) In the process of Example 1, an alloy layer with copper was formed by heat treatment after the first tin plating step, and further heat treatment was performed after the second tin plating step, so that the alloy layer was diffused into the first tin plating. Copper is also diffused into the second tin plating, and the adhesion between the first tin plating and the second tin plating is improved. In order to further promote diffusion, there is a method of applying pressure together with heating. (Embodiment 5) FIG. 3 is a sectional view of a display device according to the present invention. The FPC described in Examples 1 to 4 is used, and 25
A pattern formed by depositing and plating 8 μm copper foil on a polyimide film 1 having a thickness of μm is provided.
The solder resist 4 is formed other than the terminal portion,
The electrode coated with the solder resist 4 is covered with a tin plate formed of an alloy with copper by 0.05 μm.
On the other exposed terminals 5, a diffusion layer of 0.17 μm and a pure tin layer of 0.17 μm are formed. The thickness of the pure tin layer is a thickness for connection with the gold bump of the IC 6, and when it is thick, a short circuit occurs due to a bridge, and when it is thin, the strength is weak. Not only the connection with the IC 6 but also the solder connection with a chip component such as the capacitor 7 and the connection terminal with the display panel 8 are plated with the same configuration. At the solder connection part, there is tin plating under the solder resist. However, since the tin plating is thin and an alloy with copper is formed, the solder can be stably soldered without dipping under the resist. The connection with the display panel 8 can be made without any particular problem by using an anisotropic conductive film (not shown) as in the related art.

[0031]

As described above, according to the present invention,
It has become possible to provide an inexpensive FPC and a display device which are free from disconnection by a tin plating process and peeling of a resist in a soldering process.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a process for manufacturing a film substrate of the present invention.

FIG. 2 is a top view showing a resist shape of the film substrate of the present invention.

FIG. 3 is a cross-sectional view schematically showing a configuration of a display device according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Polyimide film 2 Pattern 3 First tin plating 4 Solder resist 5 Second tin plating 6 IC 7 Capacitor 8 Display panel

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) C25D 5/50 C25D 5/50 5E343 5/56 5/56 B 5F044 7/00 7/00 J G02F 1 / 1345 G02F 1/1345 H01R 4/02 H01R 4/02 Z H05K 3/18 H05K 3/18 D 3/24 3/24 D (72) Inventor Nobukazu Koizumi 1-18-18 Muraoka Higashi, Fujisawa City, Kanagawa Prefecture F-term (reference) 2H092 GA50 GA60 MA11 MA34 NA15 NA18 NA27 NA29 PA06 4K022 AA02 AA15 AA42 BA21 BA31 BA35 DA01 EA01 4K024 AA07 AA09 AB03 AB04 AB06 AB08 AB15 AB17 BA14 BB11 DB01 DB10 FA05 GA16 BA10 A04 BB05 BC08 CA13 CA15 CA18 CA62 5E085 BB09 BB26 CC01 DD01 EE23 JJ27 JJ35 5E343 AA18 BB14 BB18 BB23 BB24 BB34 BB54 DD21 DD23 DD32 DD76 ER18 GG03 5F044 MM03 MM04 MM23 MM48

Claims (6)

[Claims] A step of forming copper on a polyimide film having a thickness of 50 μm or less to a thickness of 12 μm or less; a step of patterning the copper to form a pattern; and a step of performing first tin plating on the pattern. A method of selectively forming a solder resist and a step of performing second tin plating. 2. The method according to claim 1, wherein a processing step for suppressing solder wettability of the first tin plating layer is performed between the first tin plating step and the step of forming the solder resist. FPC manufacturing method. 3. The FPC according to claim 1, wherein the boundary of the solder resist is continuously formed in a continuous pattern having a pitch of 100 μm or less in an oblique, chevron, or wavy shape. Production method. 4. The method according to claim 1, wherein after forming the second tin plating, an alloy layer with copper is formed at a boundary between the first tin plating layer and the second tin plating layer. Manufacturing method of FPC. 5. A display device comprising a display element, a driving electronic component, and an FPC for electrically connecting the display element and the electronic component, wherein the FPC comprises: a polyimide film having a thickness of 50 μm or less; 10μm provided on polyimide film
The following copper pattern, tin plating provided on the copper pattern, and a solder resist provided on a part of the polyimide film and the copper pattern, tin plating of the copper pattern of the portion provided with the solder resist A display device characterized in that tin plating of a copper pattern in a portion where the solder resist is not provided is thicker than a thickness of the solder resist. 6. The solder resist provided in a portion having a pitch of 100 μm or less of the copper pattern, wherein the boundary of the solder resist is formed in a continuous shape having an oblique or chevron shape. Display device.