TW522496B - Quad flat leadless package leadframe - Google Patents

Quad flat leadless package leadframe Download PDF

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Publication number
TW522496B
TW522496B TW089122873A TW89122873A TW522496B TW 522496 B TW522496 B TW 522496B TW 089122873 A TW089122873 A TW 089122873A TW 89122873 A TW89122873 A TW 89122873A TW 522496 B TW522496 B TW 522496B
Authority
TW
Taiwan
Prior art keywords
thickness
lead frame
guide pins
chip
patent application
Prior art date
Application number
TW089122873A
Other languages
Chinese (zh)
Inventor
Bo-Shiun Shr
Yue-Ying Tsai
Original Assignee
Siliconware Precision Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to TW089122873A priority Critical patent/TW522496B/en
Application granted granted Critical
Publication of TW522496B publication Critical patent/TW522496B/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

A quad flat leadless package leadframe for carrying chip to conduct semiconductor package is disclosed in the present invention. The invention is provided with multiple packaging units. Each packaging unit has plural leads disposed on its periphery. A dam bar is provided in between the adjacent packaging units. The connection portion of the dam bar and the lead near two packaging units has a thickness smaller than that of the other area.

Description

522496 6158twf.d〇c/〇〇5 幻 _ B7 五、發明說明（f) 本發明是有關於一種四方扁平無接腳封裝導線架結 構’且特別是有關於一種具有薄厚度區的四方扁平無接腳 封裝導線架結構。 封裝產品大致可區分爲引腳插入型（PTH: Pin Through Hole)及表面黏著型（SMT: Surface Mount Technology) 兩大類。引腳插入型是將兀件的引腳插入已鑽孔的電路板 上完成接合，其中以DIP (Dual in Line Package)最具代表 性’另外尙有陣列狀金屬引腳的PGA (Pm Gnd Array);而表 面黏者型的封裝元件則需在電路板上塗上錫膏加以黏著， 其產品可區分爲S〇P (Small 〇ut-lme Package)、四方扁平封 裝（QFP ’ Quad Flat Package)、BGA (Ball Grid Array)三大族 群。 其中，DIP因受到腳數的限制，在不符經濟效益的 情形下’此類封裝方式已逐漸被淘汰或轉往勞力密集的地 區生產。而PGA因製作成本高、組裝不便、產品面積大， 相對於四方扁平封裝技術的成熟，市埸也已開始萎縮。 四方扁平封裝的引腳由1C四周以水平方向往外伸 張引腳間距彳皮以前的1·27 mm提昇至今的〇.3 mm，大部 刀以塑膠爲封裝材料，腳數約在300以下，其主導了邏輯 及中低階的微元件封裝型態。爲了對傳統的四方扁平 ，裝作改良’美國專利5,942794揭露一種四方扁平無接腳 太寸裝(QFN ’ Quad Flat No-leaded)產生，其中N意謂著no- leaded ’即無外導腳（outer lead)之意，其有訊號傳遞路徑 (trace)短，降低訊號衰減的優點。 • 3 ^張尺度通用中_家標準（CNi^⑽;-297 )---— (請先閱讀背面之注意事項再填寫本頁) 裝 L----訂---------線 經濟部智慧財產局員工消費合作社印製 A7 B7 522496 6158twf.doc/〇〇6 五、發明說明（2) 習知的四方扁平無接腳封裝依其封膠製程可槪括分 爲兩類，長條狀（Strip狀，即各封裝單元之導線架可自一 方向延伸連接，而呈長條狀)及陣列狀(Array狀，即各封裝 單元導線架可往上下及左右方向連接）。不管其所屬爲何 分類’其標準製程有黏晶（die Bond)、婷線(wire Bond)、封 膠（mold)切單（singulation)等製程。 I靑參考第1圖，其繪不一種習知]folded Array之四 方扁平無接腳封裝導線架平面結構示意圖。一般加工前之 導線架109係呈片狀結構，其上分布有複數個封裝單元 111。每一個封裝單元111可槪略區分爲兩部份：導腳部 份與平坦部。其導腳部份僅有內導腳l〇〇(Internal Lead)， 平坦部就是一般習稱的晶片座l〇6(Die Pad)，其功用爲承 載晶片（102，如第2圖所示）。爲了配合裝配及自動化，導 線架109 3a有連接各片導線架之導軌（side Rail)(未繪示）， 以及裝配時對準用的導引孔（Pilot Hole)(未繪示）。此外， 導線架109上之連接桿l〇3(Tie Bar)係用以連接晶片座106 並將之固定於導線架109上，而止洩桿l〇8(Dam Bar)則是 用以連接各導腳100與導軌，並在封裝時防止封膠外溢。 止洩桿108還可在導線架1〇9之內，構成各個封裝單元U1 的四周圍，至於最外圍的封裝單元111，則可利用止洩桿 108及導軌構成各封單元in的四周圍。 請參照第2圖，其繪示第丨圖黏晶、打線、封膠完 成後，切單前之側視剖面圖。習知的四方扁平無接腳封裝 的導線架係由晶片座106及其周緣多個內導腳1 〇〇所組 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） -----------------r---訂--------- φιι (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 522496 6l58twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（3 ) 成；晶片102以其背面l〇2b藉由銀膠lOl(epoxy)與晶片座 106之頂面106a貼合。晶片1〇2主動表面102a(active surface) 上的焊墊（bonding pad)(未繪示）則透過金線104(gold wire)， 分別與內導腳100的頂面100a連接，形成電性導通。而封 膠105包覆晶片102、金線104、晶片座106的頂面106a 及內導腳100的頂面100a，而暴露出晶片座106的底面106b 及內導腳100的底面100b。透過內導腳100的底面100b 與外部的印刷電路板（未繪示）連接。 請同時參考第1圖及第2圖，依一般的設計規則， 當導線架109的厚度爲^時(第1圖），止洩桿108(Dam Bar) 的寬度wl常設計爲導線架109厚度h的約0.7倍，即 w^O.7^ (第2圖），此一設規則爲加工的限制所導致。 完成黏晶、打線、封膠製程之後即進行切單製程。 切單的目的是要將整個導線架上已封膠好的晶粒個別分開 來。基本上切單時要能很平整的把多餘膠體及導線架上連 接用材料切除，由於硬化的樹脂與導線架的材質有很大的 不同，這對刀具而言是一項困擾，如何達到剪切的一致性， 且避免剪切時造成導線架的扭曲變形，皆是在設計上需考 量的因素。 習知的四方扁平無接腳封裝主要的缺點有三個： (1)濕氣容易進入： 請參考第2圖，因習知的四方扁平無接腳封裝之內 導腳100若因切割而變形，將與封膠1〇5間產生間隙，而 提供了水氣直接滲入的路徑，是以濕氣容易滲入。 5 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） --------------裝----^--丨丨訂---------mM— ^ I Bn (請先閱讀背面之注意事項再填寫本頁) 522496 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明（午） (2) 切單時，導腳易脫出’造成信賴性降低： 請同時參考第1、2及第3圖，虛線區域所示爲切 割道113，即進行切單製程的切割時，割刀（1〇7，如第3 圖所示）的寬度A及其所行經的路徑。 請參考第3圖，其繪示第2圖的後序製程，切單製 程側視透視示意圖。此時’割刀丨〇7位於各封裝單元I!1 交界處的切割道113之上’準備往下進行切單製程’將各 封裝單元的連接處割除。 在習知的四方扁平無接腳封裝中，因其內導腳100 爲單一的形狀，故在切單製程中容易被割刀107的拉力拉 出，而使內導腳100易自封膠105中脫出。請參考第4圖’ 其繪示切單製程中內導腳丨〇〇自封膠105中脫出的情形。 (3) 切單時，易因割刀偏差造成止洩桿(dambar)殘留： 請參考第3圖，其繪示切單製程側視透視示意圖。 此時，割刀107位於各封裝單元（111 ’如第1圖所示）交界 處的切割道H3之上，準備往下進行切單製程’將各封裝 單元的連接處割除。請再參考第1圖’切割道113寬度爲 A，導線架109厚度^。依一般設計規則，其止洩桿寬度 w!爲 0.7ti ，是故割刀的偏差容許量爲 = = —0.35、。一般的切割道 113，其寬度 2 2 A爲〇.3 mm (即割刀107寬度），導線架109厚度爲0.2 mm ’故依一*般設規則’其止拽桿寬度爲〇·7χ〇·2=0.14 mm， 是故割刀的偏差容許量爲（0.3-0.14)/2=0.08。此一過小的割 刀偏差容許量常造成因割刀偏差所產生的止洩桿108殘留 6 I-----V.------裝---丨 -丨丨訂---------I T (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 522496 6158twf . doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（f) 的問題，而導致封裝產品不良。請參考第5圖，其繪示因 割刀107偏差而造成的止拽桿1〇8殘留的情形，某些封裝 單元之間的止洩桿108有一部份在切單製程後還殘留在元 件上，導致封裝產品不良。 因此，本發明的目的就是在提供〜種導線架結構， 在可降低切單時的割刀阻力，及避免因割刀偏移所造成的 止洩桿(dam bar)殘留，以提高切單之良率。 本發明的另一目的則是在提供一種導線架結構，可 提尚封裝產品的可靠度。 根據上述之目的，本發明提出一種四方扁平無接腳 封裝導線架’用以承載晶片，進行半導體封裝。其具有多 個封裝單元，每個封裝單元具有數個導腳配置於其周緣， 而二相鄰封裝單元之間具有一止洩桿。止洩桿及導腳鄰近 一封裝單兀連接的部分，其厚度較其他區域薄。 本發明在製作導線架時，即利用半蝕刻技術（half etching)將切割道及局部的導腳區域的厚度製作成較導線架 的其他部份厚度爲薄。 利用薄切割道的特徵，因割刀切割時的切割深度減 、 少，可降低切單時的割刀阻力，避免導腳脫離，提高切單 良率。利用局部導腳區域較薄的特徵，更可使導腳尖端呈 階梯結構，以強化導腳與封膠的結合性，提高產品可靠度。 又，因薄厚度區的特徵，可縮小止洩桿（dam bar)的寬度， 是以增加切單之割刀偏移容許量，可進一步提高切單良 率。 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公髮) ' " -----i — — ^---I----- (請先閱讀背面之注意事項再填寫本頁) 522496 6158twf.doc/006 A7 B7 五、發明說明（<) (請先閱讀背面之注意事項再填寫本頁) 爲讓本發明之上述和其他目的、特徵、和優點能更 明顯易懂，下文特舉一較佳實施例，並配合所附圖式，作 詳細說明如下= 圖式之簡單說明： 第1圖繪示習知陣列形封膠之四方扁平無接腳封裝 導線架平面結構示意圖。 第2圖係第1圖切單前之側視剖面圖。 第3圖繪示切單製程側視透視示意圖。 第4圖繪示切單製程中內導腳自封膠脫出示意圖。 第5圖繪示因割刀偏差造成的止洩桿（Dam bar)殘留 示意圖。 第6圖繪示依照本發明之一較佳實施例的陣列形封 膠之四方扁平無接腳封裝導線架平面結構示意圖。 第7圖係第6圖之側視圖。 第8圖繪示依照本發明之一較佳實施例的切單製程 側視透視示意圖。 第9圖繪示依照本發明之一較佳實施例的切單製程 完成不意圖。 經濟部智慧財產局員工消費合作社印製 第10圖係第9圖之俯視透視圖。 圖式標號說明 100、 200 :內導腳（inner lead) 101、 201 :銀膠（epoxy) 102、 202 :晶片（chip) 103、 203 :連接桿(tie ba〇 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 522496 A7 B7 6l58twf.doc/006 五、發明說明（7) 104、 204 :金線(gold wire) 105、 205 :封膠 106、 206 :晶片座(die pad) 107、 207 :割刀 108、 208 :止拽桿(dam bar) 109、 209 :導線架（lead frame) 113、213 :切割道 214 :薄厚度區 A :切割道寬度 tl :導線架厚度 t2 :薄厚度區厚度 wl、w2 :止拽桿寬度 實施例 請參考第6圖，其繪示依照本發明之一較佳實施例的 陣列形封膠之四方扁平無接腳封裝導線架平面結構示意 圖。加工前之導線架209係呈片狀結構，其上分布有複數 個封裝兀單兀211。每一個封裝單元211可槪略區分爲兩 部份：導腳部份與平坦部。其導腳部份僅有內導腳 200(Internal Lead)’平坦邰就是一般習稱的晶片座2〇6(Die522496 6158twf.d〇c / 〇〇5 magic _ B7 V. Description of the invention (f) The present invention relates to a rectangular flat leadless package lead frame structure ', and in particular to a rectangular flat The lead encapsulates the lead frame structure. Package products can be roughly divided into two types: pin through type (PTH: Pin Through Hole) and surface mount type (SMT: Surface Mount Technology). The pin insertion type is to insert the pins of a component into a drilled circuit board to complete the bonding. Among them, DIP (Dual in Line Package) is the most representative. In addition, PGA (Pm Gnd Array) with array-shaped metal pins ); And surface-adhesive packaging components need to be coated with solder paste on the circuit board to adhere. Its products can be divided into S〇P (Small 〇ut-lme Package), QFP 'Quad Flat Package, Three major groups of BGA (Ball Grid Array). Among them, DIP is limited by the number of feet, and in the case of inconsistent economic benefits, such packaging methods have been gradually eliminated or transferred to labor-intensive areas for production. However, due to the high production cost, inconvenient assembly, and large product area, compared with the maturity of the Quartet flat packaging technology, the market has also started to shrink. The square flat package leads are extended horizontally from around 1C to a pin pitch of 1.27 mm before the skin has been raised to 0.3 mm. Most of the knives use plastic as the packaging material. The number of pins is less than 300. Dominates logic and low-to-medium-level micro-device packaging. In order to improve the traditional tetragonal flatness, pretend to improve the US patent 5,942,794 discloses a quad flat no-lead (QFN) produced, where N means no-leaded The meaning of the outer lead is that it has the advantages of short signal transmission path and reduced signal attenuation. • 3 ^ Zhang scale common Chinese home standard (CNi ^ ⑽; -297) ---- (Please read the precautions on the back before filling this page) Install L ---- Order -------- -Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 522496 6158twf.doc / 〇〇6 V. Description of the invention (2) The known quadrangular flat pinless package can be divided into two types according to its sealing process , Strip-shaped (Strip-like, that is, the lead frame of each packaging unit can be extended and connected from one direction, and is in a strip-like shape) and Array-shaped (Array-like, that is, the lead-frame of each packaging unit can be connected up and down and left and right). Regardless of its classification, its standard processes include die bonding, wire bonding, and mold singulation. I (refer to Figure 1, which is not a conventional drawing) Schematic diagram of the planar structure of a four-sided flat leadless package lead frame of a folded array. The lead frame 109 before processing generally has a sheet structure, and a plurality of packaging units 111 are distributed thereon. Each packaging unit 111 can be divided into two parts: a lead part and a flat part. The only part of the guide pin is the internal guide pin 100 (Internal Lead), and the flat part is generally known as the die pad 106 (Die Pad), and its function is to carry the wafer (102, as shown in FIG. 2). . In order to cooperate with assembly and automation, the lead frame 109 3a has a side rail (not shown) for connecting each piece of lead frame, and a pilot hole (not shown) for alignment during assembly. In addition, the connecting rod 103 (Tie Bar) on the lead frame 109 is used to connect and fix the chip holder 106 to the lead frame 109, and the drain bar 108 (Dam Bar) is used to connect each The guide pins 100 and the guide rails prevent the sealant from overflowing during packaging. The anti-leakage lever 108 can also form the periphery of each packaging unit U1 within the lead frame 109. As for the outermost packaging unit 111, the anti-leakage lever 108 and the guide rail can be used to constitute the four periphery of each sealing unit in. Please refer to Figure 2, which shows the cross-sectional side view before cutting the sheet after the die bonding, wire bonding and sealing are completed. The conventional square flat leadless packaged lead frame is composed of a chip holder 106 and a plurality of inner guide pins 100 on its periphery. 4 This paper size applies to China National Standard (CNS) A4 (210 X 297). ----------------- r --- Order --------- φιι (Please read the notes on the back before filling this page) Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the employee consumer cooperative 522496 6l58twf.doc / 006 A7 B7 Printed by the employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (3); chip 102 with its back 102b by silver glue lOl (epoxy) and chip The top surface 106a of the seat 106 is fitted. A bonding pad (not shown) on the active surface 102a of the wafer 102 is connected to the top surface 100a of the inner guide pin 100 through a gold wire 104 to form electrical conduction. . The sealant 105 covers the wafer 102, the gold wire 104, the top surface 106a of the wafer holder 106 and the top surface 100a of the inner guide pin 100, and the bottom surface 106b of the wafer holder 106 and the bottom surface 100b of the inner guide leg 100 are exposed. It is connected to an external printed circuit board (not shown) through the bottom surface 100 b of the inner guide pin 100. Please refer to Figure 1 and Figure 2 at the same time. According to the general design rules, when the thickness of the lead frame 109 is ^ (Figure 1), the width wl of the stop bar 108 (Dam Bar) is usually designed as the thickness of the lead frame 109. h is about 0.7 times, which is w ^ O.7 ^ (Figure 2). This rule is caused by the limitation of processing. After the process of sticking crystals, wire bonding and sealing is completed, a single cutting process is performed. The purpose of singulation is to separate the sealed die on the entire lead frame. Basically, when you cut a single piece, you can cut off the excess gel and the connecting material on the lead frame. The hardened resin is very different from the material of the lead frame. This is a problem for the cutter. The consistency of cutting and avoiding the distortion of the lead frame during cutting are all factors to be considered in design. The main shortcomings of the conventional square flat pinless package are threefold: (1) Moisture is easy to enter: Please refer to Figure 2, because the inner guide pin 100 of the conventional square flat pinless package is deformed due to cutting, the A gap is created between the sealant 105 and the moisture infiltration path, which allows moisture to penetrate easily. 5 This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) -------------- installation ---- ^-丨 丨 order ----- ---- mM— ^ I Bn (Please read the notes on the back before filling out this page) 522496 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 V. Description of the invention (noon) (2) Guide to the order "Easy to pull out" causes a decrease in reliability: Please refer to Figures 1, 2 and 3 at the same time. The dotted area shows the cutting path 113. That is, when cutting the single cutting process, the cutting knife (107, as shown in Figure 3) (Shown) and its path A. Please refer to FIG. 3, which shows the subsequent process of FIG. 2 and a schematic perspective view of the side cutting process. At this time, the “cutting knife 丨 〇7 is located above the cutting line 113 at the junction of each packaging unit I! 1” and is ready to perform the singulation process downward to cut off the connection of each packaging unit. In the conventional square flat pinless package, because the inner guide pin 100 is a single shape, it is easy to be pulled out by the pulling force of the cutter 107 during the cutting process, so that the inner guide pin 100 is easy to be sealed in the adhesive 105 Prolapse. Please refer to FIG. 4 ', which shows the situation where the inner guide feet 丨 00 are released from the sealant 105 during the cutting process. (3) When cutting the order, the dambar residue is likely to be caused by the deviation of the cutter: Please refer to Figure 3, which shows a schematic perspective view of the side of the cutting process. At this time, the cutter 107 is located above the cutting line H3 at the junction of each packaging unit (111 'as shown in Fig. 1), and it is ready to perform a singulation process downward to remove the connection of each packaging unit. Please refer to FIG. 1 again. The width of the cutting path 113 is A, and the thickness of the lead frame 109 is ^. According to the general design rules, the width w! Of the anti-leakage lever is 0.7ti, so the tolerance of the cutter is = = -0.35. For a general cutting path 113, the width 2 2 A is 0.3 mm (that is, the width of the cutter 107), and the thickness of the lead frame 109 is 0.2 mm. Therefore, the width of the drag rod is 0.77 ×. · 2 = 0.14 mm, so the tolerance of the cutter is (0.3-0.14) /2=0.08. This too small tolerance of the cutter deviation often results in the residue of the anti-drain lever 108 due to the cutter deviation. 6 I ----- V .------ install --- 丨-丨 丨 order --- ------ IT (Please read the notes on the back before filling out this page) This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) 522496 6158twf .doc / 006 A7 B7 Ministry of Economy Wisdom Printed by the Consumer Cooperative of the Property Bureau Staff 5. The problem of invention description (f), which resulted in defective packaging products. Please refer to FIG. 5, which shows the situation that the drag lever 108 remains due to the deviation of the cutter 107. Some of the leak lever 108 between some packaging units remain on the component after the singulation process. This leads to defective packaging products. Therefore, the object of the present invention is to provide a lead frame structure that can reduce the resistance of the cutting blade when cutting the order, and avoid the dam bar residue caused by the offset of the cutting blade, so as to improve the cutting order. Yield. Another object of the present invention is to provide a lead frame structure, which can improve the reliability of a packaged product. According to the above object, the present invention proposes a square flat leadless package lead frame 'for carrying a chip for semiconductor packaging. It has a plurality of packaging units, each packaging unit has a plurality of guide pins arranged at its periphery, and a leak-proof lever is provided between two adjacent packaging units. The anti-drain lever and the guide pin are adjacent to a part where a package is connected, and the thickness is thinner than other areas. When the lead frame is manufactured in the present invention, the thickness of the scribe line and the local guide pin area is made thinner than other parts of the lead frame by using half etching. Utilizing the characteristics of the thin cutting path, because the cutting depth of the cutting blade is reduced or reduced, the resistance of the cutting blade during cutting can be reduced, the guide feet can be prevented from detaching, and the cutting yield can be improved. Taking advantage of the thinner feature of the local guide pin area, the tip of the guide pin can be made into a stepped structure to strengthen the combination of the guide pin and the sealant and improve the reliability of the product. In addition, due to the characteristics of the thin thickness region, the width of the dam bar can be reduced, and the allowance of the cutter offset of the cut sheet can be increased, which can further improve the cut sheet yield. 7 This paper size applies to China National Standard (CNS) A4 specifications (210 X 297 issued) '" ----- i — — ^ --- I ----- (Please read the precautions on the back before (Fill this page) 522496 6158twf.doc / 006 A7 B7 V. Description of the invention (&); (Please read the notes on the back before filling this page) In order to make the above and other objects, features, and advantages of the present invention more obvious It is easy to understand. The following is a detailed description of a preferred embodiment and the accompanying drawings, which are described in detail as follows: = Brief description of the drawings: Figure 1 shows a rectangular flat leadless package lead frame with a conventional array sealant. Schematic plan view. Fig. 2 is a side sectional view of Fig. 1 before cutting. Figure 3 shows a schematic perspective view of the side cutting process. Fig. 4 is a schematic diagram of the self-sealing adhesive stripping of the inner guide leg during the cutting process. Figure 5 shows the schematic diagram of the Dam Bar residue caused by the cutter deviation. FIG. 6 is a schematic diagram showing a planar structure of a rectangular flat leadless package lead frame of an array-shaped sealant according to a preferred embodiment of the present invention. Figure 7 is a side view of Figure 6. FIG. 8 is a schematic side view of a cutting process according to a preferred embodiment of the present invention. FIG. 9 illustrates the completion of the order cutting process according to a preferred embodiment of the present invention. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. Figure 10 is a top perspective view of Figure 9. Explanation of drawing symbols 100, 200: inner lead 101, 201: epoxy 102, 202: chip 103, 203: tie rod (tie ba〇8) This paper standard applies to Chinese national standards (CNS) A4 specification (210 X 297 mm) 522496 A7 B7 6l58twf.doc / 006 V. Description of the invention (7) 104, 204: gold wire 105, 205: Sealant 106, 206: Wafer holder ( die pad) 107, 207: cutter 108, 208: dam bar 109, 209: lead frame 113, 213: cutting track 214: thin thickness area A: cutting track width tl: lead frame Thickness t2: Thin thickness area thickness wl, w2: The width of the drag bar. For an example, please refer to FIG. 6, which shows a flat rectangular leadless package lead frame plane of an array-shaped sealant according to a preferred embodiment of the present invention. Schematic diagram of the structure. The lead frame 209 before processing is a sheet-like structure, and there are a plurality of packaging units 211 distributed thereon. Each packaging unit 211 can be divided into two parts: a guide pin part and a flat part. The guide pin part is only the internal guide pin 200 (Internal Lead) 'flat', which is commonly known as the chip holder 206 (Die

Pad) ’其功用爲承載晶片（本圖未繪示）。爲了配合裝配及 自動化’導線架209還有連接各片導線架之導軌（Slde RaU)(未繪示），以及裝配時對準用的導引孔（pilcn Hole)(未 繪示）。此外，導線架209上之連接桿2〇3(Tie Ba〇係用以 連接晶片座206並將之固定於導線架209上，而止洩桿2〇8 9 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -------------裝 ----r I--訂·！- ----I f (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 522496 6158twf.doc/006 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（ί) (dam bar)則是用以連接各導腳200與導軌，並在封裝時防 止封膠外溢。止洩桿208還可在導線架209之內構成各個 封裝單元211的四周圍。至於最外圍的封裝單元211，則 可利用止洩桿208及導軌構成各封單元211的四周圍。 爲了改善習知切單製程的不良及濕氣容易滲入的缺 點，本發明在製作導線架209時，利用半蝕刻(half etching) 技術，將切割道213及與各封裝單元211的四周圍（由止洩 桿208及導軌所構成)相連的各個內導腳200的一部份處， 進行半蝕刻製程(half etching)，以得如第6圖的薄厚度區 214(如斜線所示）。本實施例中，薄厚度區214所選取的範 圍爲切割道213全部及與各封裝單元211的四周圍（由止洩 桿208及導軌所構成)相連的各個內導腳200的約1/2〜2/3 處。然而，依本發明之精神並不限定薄厚度區214需擴及 到內導腳200的多少長度，只要涵蓋住切割道213的範圍 即可。於本實施例中，經過半蝕刻製程，薄厚度區214的 厚度t2約爲導線架209厚度q的一半，即12=0.5以請再同 時參考第7圖，其係第6圖之側視圖）。 請參考第8圖，其繪示依照本發明之一較佳實施例 黏晶、打線、封膠完成後的切單製程側視透視示意圖。本 發明的四方扁平無接腳封裝的基板係由晶片座206及其周 緣多個內導腳200所組成；晶片202以其背面202b藉由銀 膠201(epoxy)與晶片座206之頂面206a貼合。晶片202主 動表面 202a(active surface)上的焊墊（bonding pad)(未繪示) 則透過金線204(gold wire)，分別與內導腳200的頂面200a ϋ I — ϋ ϋ ϋ βυ I ϋ ϋ ϋ ϋ n 1 ϋ 一：0、 ϋ I I ϋ I ·ϋ ϋ I I (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 522496 6 1 5 8 t w f :/00 6 A7 B7 五、發明說明（γ) (請先閱讀背面之注意事項再填寫本頁) 連接，形成電性導通。而封膠205包覆晶片202、金線204、 晶片座206的頂面206a及內導腳200的頂面2〇〇a，而暴露 出晶片座206的底面206b及內導腳200的底面200b。透 過內導腳200的底面200b與外部的印刷電路板（未繪示）連 接。此時，割刀207位於各封裝單元（211，如第6圖所示) 交界處的切割道213之上，準備往下進行切單製程，將各 封裝單元的連接處割除。此時薄厚度區214的厚度t2約僅 爲導線架209厚度q的一半，即〖2=0.5^。請同時參考第6 圖及第7圖，依一般的設計規則，止浅桿208(Dam Bar)的 寬度w2常設計爲其厚度的約〇·7倍，即w2=0.7t2 (第7圖）， 此一設計規則爲加工的限制所導致。此時，因半蝕刻製程 使得止洩桿208厚度t2已約爲導線架209厚度^的一半， 是故，止洩桿208的寬度w2可設計爲導線架厚度tl的約0.35 倍，即 ^=0.351^。 依本發明四方扁平無接腳封裝導線架的結構特徵， 相較於習知其具有以下的優點： (1) 濕氣不易進入： 經濟部智慧財產局員工消費合作社印製 請參考第9圖，其繪示依照本發明之一較佳實施例 的切單製程完成示意圖。因本發明具有薄厚度區214的特 徵，其內導腳200非爲單一形狀而呈階梯狀，是故延長了 白知的四方扁平無接腳封裝導線架水氣滲入的路徑，是以 濕氣不易滲入。 (2) 導腳不易脫出，可提昇信賴性： 請梦考第8圖，其繪示依照本發明之一較佳實施例 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公爱） 522496 A7 B7 6158twf.doc/006 五、發明說明（π) 的切單製程側視透視示意圖。因本發明具有薄厚度區214 的特微，內導腳200非爲單一的形狀而呈階梯狀，故其與 封膠205接觸的表面積較習知增加，故其黏附於封膠的結 合力亦較習知單一形狀導腳的結合力大。因此，實施例於 切單時，內導腳200較不易脫出，請參考第9圖，其繪示 依照本發明之一較佳實施例的切單製程完成示意圖。 (3) 降低切單阻力： 請參考第8圖，虛線區域所示爲切割道213，即進 行切單製程的線切割時，割刀207的寬度A及其所行經的 路徑。導線架厚度爲^，割刀207的寬度爲A。其中，一 般的導線架209厚度q約爲0.2 mm，割刀207的寬度A約 爲0.3mm。此時，割刀207位於各封裝單元交界處的切割 道213之上，準備往下進行切單製程，將各封裝單元的連 接處割除。 本發明因具有薄厚度區214之結構特徵，故於切單 時，割刀207與切割道213接觸的深度t2僅爲 即0.1 mm，較習知的切割道深度tl，即0.2 mm爲淺。故在使用 相同導線架厚度的情況下，本實施例於切單時，受到較小 的切割阻力。 (4) 不易因§!]刀偏差而造成止拽桿(dam bar)殘留： 請參考第8圖，其繪示依照本發明之一較佳實施例 的切單製程側視透視示意圖。此時，割刀207位於各封裝 單元(211，如第6圖所示)交界處的切割道213之上，準備 往下進行切單製程，將各封裝單元的連接處割除。導線架 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） -----------裝-----r---訂------------ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 522496 6158twf.doc/006 A7 B7 五、發明說明（/丨） 厚度^，切割道213寬度爲A(即割刀207寬度）。因本發明 具有薄厚度區214之結構特徵，其止洩桿208寬度w2可設 計爲 0.35^ ，是故割刀的偏差容許量爲 - A ~ ^35-1 - 〇.5Α - 0.175tl。一般的導線架厚度〖}爲 0.2 mm，切割道213寬度A爲0.3 mm (即割刀207寬度）。因 本發明具有薄厚區214之結構特徵，其止洩桿208寬度w2 可設計爲0.35x0.2=0.07 mm，是故割刀的偏差容許量爲 (0.3-0.07)/2=0.165。是故在使用相同厚度的導線架及相同 寬度割刀的情況下，本實施例可達到較大的割刀偏差容許 量，故可避免因割刀偏差造成止洩桿208殘留的問題，如 第9及第10圖，其繪示正常切單後的封裝元件示意圖。 依照上述本發明之實施例可知，本發明至少具有下 列優點： (1) 本發明之四方扁平無接腳封裝導線架，藉由薄厚度區的 特徵，其內導腳非爲單一形狀而呈階梯狀，是故延長 了習知的四方扁平無接腳封裝導線架水氣滲入的路 徑，是以濕氣不易滲入，進而改善產品可靠度。 (2) 本發明之四方扁平無接腳封裝導線架，藉由薄厚度區的 特微，內導腳非爲單一的形狀而呈階梯狀，故其與封 膠接觸的表面積較習知增加，故其黏附於封膠的結合 力亦較習知單一形狀導腳的結合力大，因此，依本發 明的特徵，切單時，內導腳不易脫出，可提高切單的 良率。 (3) 本發明之四方扁平無接腳封裝導線架，藉由薄厚度區之 13 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝-----r---訂---- 3! 經濟部智慧財產局員工消費合作社印製 522496 A7 6158twf.doc/006 _B7Pad) ’Its function is to carry a chip (not shown in this figure). In order to cooperate with assembly and automation, the lead frame 209 also includes a guide rail (Slde RaU) (not shown) for connecting the lead frames, and a pilcn hole (not shown) for alignment during assembly. In addition, the connecting rod 203 (Tie Ba〇 on the lead frame 209 is used to connect the chip holder 206 and fix it on the lead frame 209, and the anti-leakage rod 208 is suitable for the Chinese national standard (CNS) ) A4 size (210 X 297 mm) ------------- installation ---- r I--order ·! ----- I f (Please read the precautions on the back first (Fill in this page again) Printed by the Employees ’Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 522496 6158twf.doc / 006 A7 B7 Printed by the Employees’ Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The invention description (ί) (dam bar) is used to connect the various The guide pin 200 and the guide rail prevent the sealant from overflowing during packaging. The leak-proof lever 208 can also form the periphery of each packaging unit 211 within the lead frame 209. As for the outermost packaging unit 211, the leak-proof lever 208 and guide rails form the periphery of each sealing unit 211. In order to improve the disadvantages of the conventional cutting process and the disadvantage of easy moisture infiltration, when the lead frame 209 is manufactured by the present invention, the cutting path is cut by using half etching technology. 213 and internal guides connected to the four surroundings of each packaging unit 211 (consisting of the drain lever 208 and the guide rail) At a part of 200, a half etching process is performed to obtain a thin thickness region 214 as shown in FIG. 6 (shown as diagonal lines). In this embodiment, the selected range of the thin thickness region 214 is a cutting track. All of 213 and about 1/2 to 2/3 of each inner guide pin 200 connected to the periphery of each packaging unit 211 (consisting of the drain lever 208 and the guide rail). However, the spirit of the present invention is not limited. The thickness of the thin thickness region 214 needs to be extended to the length of the inner guide pin 200, as long as it covers the range of the cutting path 213. In this embodiment, after a half-etching process, the thickness t2 of the thin thickness region 214 is about the lead frame 209 Half the thickness q, ie 12 = 0.5. Please refer to Figure 7 again, which is a side view of Figure 6). Please refer to FIG. 8, which is a schematic side view of a single cutting process after die bonding, wire bonding and sealing according to a preferred embodiment of the present invention. The substrate of the rectangular flat pinless package of the present invention is composed of a wafer base 206 and a plurality of inner guide pins 200 on its periphery; the wafer 202 has a back surface 202b through a silver glue 201 (epoxy) and a top surface 206a of the wafer base 206 fit. The bonding pads (not shown) on the active surface 202a (active surface) of the chip 202 pass through the gold wire 204 and the top surface 200a of the inner guide pin 200, respectively. Ϋ I — ϋ ϋ ϋ βυ I ϋ ϋ ϋ 1 n 1 ϋ 1: 0, ϋ II ϋ I · ϋ ϋ II (Please read the notes on the back before filling out this page) This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ) 522496 6 1 5 8 twf: / 00 6 A7 B7 V. Description of the Invention (γ) (Please read the precautions on the back before filling this page) Connection, forming electrical continuity. The sealant 205 covers the wafer 202, the gold wire 204, the top surface 206a of the wafer holder 206, and the top surface 200a of the inner guide pin 200, and the bottom surface 206b of the wafer holder 206 and the bottom surface 200b of the inner guide pin 200 are exposed. . The bottom surface 200b of the inner guide pin 200 is connected to an external printed circuit board (not shown). At this time, the cutter 207 is located above the cutting path 213 at the junction of each packaging unit (211, as shown in FIG. 6), and it is ready to perform a singulation process to cut off the connection of each packaging unit. At this time, the thickness t2 of the thin-thickness region 214 is only about half of the thickness q of the lead frame 209, that is, 2 = 0.5 ^. Please refer to Figure 6 and Figure 7 at the same time. According to the general design rules, the width w2 of the shallow bar 208 (Dam Bar) is usually designed to be about 0.7 times its thickness, that is, w2 = 0.7t2 (Figure 7) This design rule is caused by processing limitations. At this time, due to the half-etching process, the thickness t2 of the leak-proof lever 208 is about half the thickness of the lead frame 209. Therefore, the width w2 of the leak-proof lever 208 can be designed to be about 0.35 times the thickness t1 of the lead frame, that is, ^ = 0.351 ^. According to the structural characteristics of the square flat leadless package lead frame according to the present invention, compared with the conventional one, it has the following advantages: (1) Moisture is not easy to enter: Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economics, please refer to Figure 9, It is a schematic diagram of the completion of the singulation process according to a preferred embodiment of the present invention. Because the present invention has the characteristics of a thin thickness region 214, the inner guide pin 200 is not a single shape but has a stepped shape, which is to extend the path of moisture infiltration of Bai Zhi's rectangular flat leadless package lead frame, which is based on moisture. Not easy to penetrate. (2) The guide feet are not easy to come out, which can improve the reliability: Please dream to test Figure 8, which shows that according to a preferred embodiment of the present invention, the paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 male) Love) 522496 A7 B7 6158twf.doc / 006 V. Side view perspective drawing of the process of cutting the invention (π). Because the present invention has the characteristics of the thin thickness region 214, the inner guide leg 200 is not a single shape but has a stepped shape, so the surface area in contact with the sealant 205 is increased as compared to the conventional one, so its binding force to the sealant is also The binding force of the conventional single-shaped guide foot is relatively large. Therefore, in the embodiment, when the order is cut, the inner guide leg 200 is not easy to come out. Please refer to FIG. 9, which illustrates a schematic diagram of the process of completing the order according to a preferred embodiment of the present invention. (3) Reduce the cutting resistance: Please refer to Figure 8. The dotted area shows the cutting path 213, that is, the width A of the cutter 207 and the path it travels during the line cutting of the cutting process. The thickness of the lead frame is ^, and the width of the cutter 207 is A. Among them, the thickness q of a general lead frame 209 is about 0.2 mm, and the width A of the cutting blade 207 is about 0.3 mm. At this time, the cutter 207 is located above the cutting path 213 at the junction of each packaging unit, and it is ready to perform the singulation process downward to cut off the connection of each packaging unit. Because the present invention has the structural feature of the thin thickness region 214, the depth t2 of the contact between the cutting blade 207 and the cutting path 213 is only 0.1 mm when the order is cut, which is shallower than the conventional cutting path depth t1, that is, 0.2 mm. Therefore, in the case of using the same lead frame thickness, the present embodiment suffers a smaller cutting resistance when cutting a single order. (4) It is not easy to cause the dam bar to remain due to the blade deviation: Please refer to FIG. 8, which illustrates a schematic side view of a cutting process according to a preferred embodiment of the present invention. At this time, the cutter 207 is located above the cutting path 213 at the junction of each packaging unit (211, as shown in FIG. 6), and is ready to perform a singulation process to cut off the connection of each packaging unit. Lead frame This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) ----------- install ----- r --- order ------- ----- (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 522496 6158twf.doc / 006 A7 B7 V. Description of the invention (/ 丨) Thickness ^, cutting path 213 The width is A (that is, the width of the cutter 207). Because the present invention has the structural feature of the thin thickness region 214, the width w2 of the anti-drain lever 208 can be designed to be 0.35 ^, so the tolerance of the cutting blade is-A ~ ^ 35-1-0.5A-0.175tl. The thickness of a general lead frame is 0.2 mm, and the width A of the cutting path 213 is 0.3 mm (that is, the width of the cutting knife 207). Because the present invention has the structural feature of the thin and thick area 214, the width w2 of the anti-drain lever 208 can be designed as 0.35x0.2 = 0.07 mm, so the tolerance of the cutter is (0.3-0.07) /2=0.165. Therefore, in the case of using a lead frame of the same thickness and a cutting blade of the same width, this embodiment can achieve a larger tolerance of the cutting blade deviation, so that the problem of the residue of the anti-drain lever 208 due to the cutting blade deviation can be avoided. Figures 9 and 10 are schematic diagrams of package components after normal singulation. According to the above-mentioned embodiments of the present invention, it can be known that the present invention has at least the following advantages: (1) The rectangular flat leadless package lead frame of the present invention, with the characteristics of a thin thickness region, the inner guide pins are not a single shape and are stepped This is to prolong the conventional water-infiltration path of the rectangular flat leadless package lead frame, which makes it difficult for moisture to penetrate, thereby improving product reliability. (2) The square flat leadless package lead frame of the present invention has a stepped shape due to the characteristics of the thin thickness region, and the inner lead is not a single shape, so its surface area in contact with the sealant is increased compared to the conventional one. Therefore, the binding force for adhering to the sealant is also greater than the binding force of the conventional single-shaped guide feet. Therefore, according to the features of the present invention, the inner guide feet are not easy to come out when cutting a single, which can improve the yield of the single cut. (3) The square flat leadless package lead frame of the present invention, with 13 thin papers in the thin thickness area, is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before (Fill this page) ----- r --- Order ---- 3! Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 522496 A7 6158twf.doc / 006 _B7

五、發明說明（O 結構特徵，切單時，割刀與切割道接觸的深度可降爲 比導線架的厚度小，然而，習知切單時，割刀與切割 道的接觸深度等於導線架厚度，故依本發明的特微可 降低切割阻力。 (4)本發明之四方扁平無接腳封裝導線架，藉由薄厚區之結 構特徵，其止洩桿寬度可設計成較小，是故在使用相 同導線架厚度，及相同割刀寬度的情況下，依照本發 明的特微，可達較大的割刀偏差容許量，故可避免因 割刀偏差造成止拽桿(dam bar)殘留的問題，提高切單良 率。 雖然本發明已以一較佳實施例揭露如上，然其並非 用以限定本發明，任何熟習此技藝者，在不脫離本發明之 精神和範圍內，當可作些許之更動與潤飾，因此本發明之 保護範圍當視後附之申請專利範圍所界定者爲準。 ------------裝 ----r I--訂· —----I-- (請先閱讀背面之注音？事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）V. Description of the invention (O Structural features, when cutting a single, the depth of the contact between the cutting blade and the cutting path can be reduced to less than the thickness of the lead frame. However, when cutting a single, the contact depth of the cutting blade and the cutting path is equal to the lead frame. (4) The four-sided flat leadless package lead frame of the present invention can be designed to have a smaller width of the anti-leakage lever due to the structural characteristics of the thin and thick area. In the case of using the same lead frame thickness and the same cutter width, according to the features of the present invention, a larger tolerance of the cutter deviation can be achieved, so the dam bar residue caused by the cutter deviation can be avoided. Although the present invention has been disclosed above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can depart from the spirit and scope of the present invention. Make some changes and retouching, so the scope of protection of the present invention shall be determined by the scope of the appended patent application. ------------ Installation ---- r I--Order · —---- I-- (Please read the Zhuyin on the back? Matters before filling out this page) Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized to the Chinese National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

522496 6l58twf.doc/006 C8 ------------- -^_____ 六、申請專利範圍 1·一種四方扁平無接腳封裝導線架，包手舌. 複數個封裝單元，其中每一該些封裝單元至少包括 複數個導腳配置於周緣；以及 一止洩桿，分別位於相鄰二封裝單元之間，且該些 導腳分別與該止洩桿連接， 其中’ g亥止拽桿及該些導腳鄰近該些封裝單元彼此 連接的區域，其厚度小於其他區域之厚度。 2.如申請專利範圍第1項所述之四方扁平無接腳封 裝導線架，其中每一該些封裝單元更包括一晶片座位於對 應該些導腳的中央。 3·如申g靑專利範圍第1項所述之四方扁平無接腳封 裝導線架，其中該止洩桿及該些導腳鄰近該些封裝單元彼 此連接的區域之厚度約爲其他區域厚度的二分之一。 4·如申請專利範圍第1項所述之四方扁平無接腳封 裝導線架，其中該止洩桿的寬度約爲其厚度的〇.7倍。 5·如申請專利範圍第1項所述之四方扁平無接腳封 裝導線架，其中該止洩桿及該些導腳鄰近該些封裝單元彼 此連接的區域係藉由一半蝕刻製程縮減厚度。 6·—種四方扁平無接腳封裝，包括： ~~*晶片； 複數個導腳，配置於該晶片之周緣，每一該些導腳 分別具有一頂面及對應之一底面，且該些導腳之該頂面分 別與該晶片電性連接’其中每〜該些導腳遠離該晶片的外 緣其厚度較其他區域薄；以及 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) ，裳· I ! ! 1訂-丨！ ！|丨Ί 經濟部智慧財產局員工消費合作社印製 522496 A8 B8 6158twf.doc/006 毯 六、申請專利範圍 一封裝材料，包覆該晶片及該些導腳之該頂面，並 暴露出該些導腳之該底面。 7. 如申請專利範圍第6項之四方扁平無接腳封裝， 其中更包括一晶片座位於該些導腳之中央，且該晶片固定 於該晶片座。 8. 如申請專利範圍第6項之四方扁平無接腳封裝， 其中該些導腳遠離該晶片的外緣之厚度約爲其他區域厚度 之二分之一。 9. 如申請專利範圍第6項之四方扁平無接腳封裝， 其中該些導腳中厚度較薄的區域約佔1/2〜2/3。 10. 如申請專利範圍第6項之四方扁平無接腳封裝， 其中該些導腳係藉由複數條金線電性連接該晶片。 ------ί—.—裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）522496 6l58twf.doc / 006 C8 --------------^ _____ 6. Scope of patent application 1. A rectangular flat leadless package lead frame, including a tongue. Several packaging units, of which Each of these packaging units includes at least a plurality of guide pins arranged at the periphery; and a leak-proof lever, which is respectively located between two adjacent packaging units, and the guide pins are respectively connected to the leak-proof lever, wherein 'g 海 止The thickness of the pull rod and the guide pins adjacent to the areas where the packaging units are connected to each other is smaller than the thickness of other areas. 2. The rectangular flat leadless packaged leadframe as described in item 1 of the scope of the patent application, wherein each of these packaging units further includes a chip holder located at the center of the corresponding lead. 3. The rectangular flat leadless package lead frame as described in item 1 of the patent scope of claim g, wherein the thickness of the anti-leak rod and the guide pins adjacent to the areas where the packaging units are connected to each other is approximately the thickness of other regions. Half. 4. The rectangular flat leadless packaged lead frame as described in item 1 of the scope of patent application, wherein the width of the anti-leakage rod is approximately 0.7 times its thickness. 5. The rectangular flat leadless packaged lead frame as described in item 1 of the scope of the patent application, wherein the area of the leak stopper and the guide pins adjacent to the packaging units adjacent to each other is reduced in thickness by a half-etching process. 6 · —A kind of square flat pinless package, including: ~~ * chip; a plurality of guide pins arranged on the periphery of the chip, each of the guide pins has a top surface and a corresponding bottom surface, and the The top surfaces of the guide pins are electrically connected to the chip, respectively. Each of the ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ = ~ 297 mm) (Please read the precautions on the back before filling out this page), Sang I!! 1 Order-丨! !! | 丨 Ί Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 522496 A8 B8 6158twf.doc / 006 Blanket 6. Scope of patent application: a packaging material that covers the chip and the top surfaces of the guide pins and exposes these The bottom surface of the guide feet. 7. For example, the square flat pinless package of item 6 of the patent application scope, which further includes a chip holder located in the center of the guide pins, and the chip is fixed to the chip holder. 8. If the square flat flat pinless package of item 6 of the patent application, the thickness of the outer edges of the lead pins away from the chip is about one-half of the thickness of other regions. 9. For example, the square flat no-lead package in item 6 of the patent application scope, wherein the thinner areas of these guide pins occupy about 1/2 to 2/3. 10. For example, the square flat no-pin package of the 6th aspect of the patent application, wherein the lead pins are electrically connected to the chip through a plurality of gold wires. ------ ί —.— install -------- order --------- (Please read the precautions on the back before filling out this page) Employee Cooperatives of Intellectual Property Bureau, Ministry of Economic Affairs The printed paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm)
TW089122873A 2000-10-31 2000-10-31 Quad flat leadless package leadframe TW522496B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928353A (en) * 2014-04-14 2014-07-16 矽力杰半导体技术(杭州)有限公司 Non-outer-pin packaging structure and manufacturing method and wire frame of non-outer-pin packaging structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928353A (en) * 2014-04-14 2014-07-16 矽力杰半导体技术(杭州)有限公司 Non-outer-pin packaging structure and manufacturing method and wire frame of non-outer-pin packaging structure

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