TWI429351B - Memory card package having a small substrate - Google Patents
Memory card package having a small substrate Download PDFInfo
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- TWI429351B TWI429351B TW100129132A TW100129132A TWI429351B TW I429351 B TWI429351 B TW I429351B TW 100129132 A TW100129132 A TW 100129132A TW 100129132 A TW100129132 A TW 100129132A TW I429351 B TWI429351 B TW I429351B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Description
本發明係有關於半導體裝置，特別係有關於一種小基板記憶卡封裝構造。The present invention relates to semiconductor devices, and more particularly to a small substrate memory card package construction.
早期記憶卡封裝構造中所使用的晶片承載體係為與記憶卡相同尺寸之基板，如美國專利第7,094,633號所揭示之技術者。在封裝製程中，多個基板係一體連接於一基板條內，晶片設置於基板條上，再予以模封，最後切割基板條以切單形成記憶卡之外形。然而，基板之裁切側面會顯露在封膠體之周邊，不僅抗濕性與產品可靠度較差，此外，在周邊應力下記憶卡等尺寸之基板容易由記憶卡剝離。The wafer carrier system used in the early memory card package construction is a substrate of the same size as the memory card, such as those disclosed in U.S. Patent No. 7,094,633. In the packaging process, a plurality of substrates are integrally connected to a substrate strip, the wafer is disposed on the substrate strip, and then molded, and finally the substrate strip is cut to form a memory card. However, the cut side of the substrate is exposed on the periphery of the sealant, and not only moisture resistance and product reliability are poor, but also substrates of a size such as a memory card are easily peeled off by the memory card under peripheral stress.
為了降低記憶卡封裝構造之封裝成本，有人嘗試使用導線架取代基板，如美國專利第7,488,620號所揭示之技術者。導線架提供有引線與接觸指。然而，導線架不容易作到足夠且適當的線路佈局，常需要複雜或較長的打線連接，並且晶片表面可能需要額外製作出重配置線路層，相對地造成晶片成本之提高。In order to reduce the packaging cost of the memory card package construction, it has been attempted to replace the substrate with a lead frame, such as the one disclosed in U.S. Patent No. 7,488,620. The lead frame is provided with leads and contact fingers. However, leadframes are not easy to make adequate and proper wiring layouts, often requiring complex or long wire bonding connections, and the wafer surface may require additional fabrication of rewiring wiring layers, which in turn results in increased wafer cost.
為了解決上述之問題，本發明之主要目的係在於一種小基板記憶卡封裝構造，能在記憶卡內安裝小基板以降低成本，並且不會有因周邊與中央應力導致基板由記憶卡剝離或發生裂痕之問題。In order to solve the above problems, the main object of the present invention is a small substrate memory card package structure, which can mount a small substrate in a memory card to reduce cost, and there is no peeling or occurrence of the substrate by the memory card due to peripheral and central stress. The problem of cracks.
本發明的目的及解決其技術問題是採用以下技術方案來實現的。本發明揭示一種小基板記憶卡封裝構造，包含一具有開孔之金屬承載座、一貼設於該金屬承載座下方之基板、一第一晶片、至少一第二晶片以及一卡片形之封膠體。該基板係並具有一顯露於該開孔之上表面以及一表面設置有複數個接觸指之下表面。該第一晶片係設置於該基板上並位於該開孔內。該第二晶片係設置於該金屬承載座上並且不覆蓋該開孔。該封膠體係密封該金屬承載座、該基板之該上表面、該第一晶片以及該第二晶片。其中，該基板之外形係小於該封膠體之外形，並且該基板係具有一凹凸不平之側邊並被該封膠體包覆，以使該基板之該下表面貼平於該封膠體之一底面內並增加該基板與該封膠體之結合力。The object of the present invention and solving the technical problems thereof are achieved by the following technical solutions. A small substrate memory card package structure includes a metal carrier having an opening, a substrate attached to the metal carrier, a first wafer, at least a second wafer, and a card-shaped encapsulant . The substrate has a surface exposed on the upper surface of the opening and a surface provided with a plurality of lower surfaces of the contact fingers. The first wafer is disposed on the substrate and located in the opening. The second wafer is disposed on the metal carrier and does not cover the opening. The encapsulation system seals the metal carrier, the upper surface of the substrate, the first wafer, and the second wafer. Wherein the outer shape of the substrate is smaller than the outer shape of the sealant, and the substrate has a rugged side and is covered by the sealant such that the lower surface of the substrate is flat on the bottom surface of the sealant. And increasing the bonding force between the substrate and the encapsulant.
本發明的目的及解決其技術問題還可採用以下技術措施進一步實現。The object of the present invention and solving the technical problems thereof can be further achieved by the following technical measures.
在前述之小基板記憶卡封裝構造中，該基板之該側邊係可具有一凹凸曲折的截面。In the aforementioned small substrate memory card package structure, the side of the substrate may have a concave-convex cross section.
在前述之小基板記憶卡封裝構造中，該基板之該側邊係可具有一導角缺口的截面。In the aforementioned small substrate memory card package structure, the side of the substrate may have a cross section with a lead angle.
在前述之小基板記憶卡封裝構造中，該基板之該側邊在該上表面係可為凹凸波浪形。In the aforementioned small substrate memory card package structure, the side of the substrate may have a concave-convex wave shape on the upper surface.
在前述之小基板記憶卡封裝構造中，該基板之該側邊係可相對遠離該封膠體之一插接側。In the foregoing small substrate memory card package configuration, the side of the substrate can be relatively far from the plug-in side of one of the encapsulants.
在前述之小基板記憶卡封裝構造中，該金屬承載座之周邊係可連接有複數個支撐繫條，其係往該封膠體之非插接側延伸。In the foregoing small substrate memory card package structure, the periphery of the metal carrier can be connected with a plurality of support strips extending to the non-plugging side of the sealant.
在前述之小基板記憶卡封裝構造中，該些支撐繫條之寬度係往該封膠體之非插接側逐漸縮小。In the foregoing small substrate memory card package structure, the width of the support strips is gradually reduced toward the non-plugging side of the sealant.
在前述之小基板記憶卡封裝構造中，另可包含有複數個銲線，係電性連接該第二晶片至該基板之該上表面。In the foregoing small substrate memory card package structure, a plurality of bonding wires may be further included to electrically connect the second wafer to the upper surface of the substrate.
在前述之小基板記憶卡封裝構造中，該開孔係可為U形開放孔，該金屬承載座係更具有至少一打線槽孔，係延伸平行於該開孔之開放口兩端。In the foregoing small substrate memory card package structure, the opening may be a U-shaped open hole, and the metal carrier further has at least one wire slot extending parallel to both ends of the opening of the opening.
在前述之小基板記憶卡封裝構造中，另可包含有複數個被動元件，係設置於該基板上並位於該開孔內。In the foregoing small substrate memory card package structure, a plurality of passive components may be further disposed on the substrate and located in the opening.
以下將配合所附圖示詳細說明本發明之實施例，然應注意的是，該些圖示均為簡化之示意圖，僅以示意方法來說明本發明之基本架構或實施方法，故僅顯示與本案有關之元件與組合關係，圖中所顯示之元件並非以實際實施之數目、形狀、尺寸做等比例繪製，某些尺寸比例與其他相關尺寸比例或已誇張或是簡化處理，以提供更清楚的描述。實際實施之數目、形狀及尺寸比例為一種選置性之設計，詳細之元件佈局可能更為複雜。The embodiments of the present invention will be described in detail below with reference to the accompanying drawings in which FIG. The components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape and size of the actual implementation. Some size ratios are proportional to other related sizes or have been exaggerated or simplified to provide clearer description of. The actual number, shape and size ratio of the implementation is an optional design, and the detailed component layout may be more complicated.
依據本發明之第一較佳實施例，一種小基板記憶卡封裝構造100舉例說明於第1圖之截面示意圖、第2圖透視其封膠體之上視示意圖以及第3圖之局部放大截面示意圖。該小基板記憶卡封裝構造100係主要包含一具有開孔111之金屬承載座110、一基板120、一第一晶片130、至少一第二晶片140以及一卡片形之封膠體150。In accordance with a first preferred embodiment of the present invention, a small substrate memory card package structure 100 is illustrated in a cross-sectional view in FIG. 1, a second perspective view of the encapsulant and a partially enlarged cross-sectional view of FIG. The small substrate memory card package structure 100 mainly includes a metal carrier 110 having an opening 111, a substrate 120, a first wafer 130, at least a second wafer 140, and a card-shaped encapsulant 150.
如第1及2圖所示，該金屬承載座110係具有如習知導線架之金屬材質但可不具有習知導線架之引線結構。在本實施例中，該金屬承載座110之周邊係可連接有複數個支撐繫條112，其係往該封膠體150之非插接側153延伸。因此，在封裝製程中，藉由該些支撐繫條112可串連多個金屬承載座以成為一種可大量生產與一次模封之金屬承載件。較佳地，該些支撐繫條112之寬度係往該封膠體150之非插接側153逐漸縮小，故在切單之後，該些支撐繫條112在該封膠體150之插接側152不會有外露金屬切面，而且顯露在該封膠體150之非插接側153之外露金屬切面亦具有較小的面積，以避免大面積金屬氧化造成的記憶卡產品之品質降低。As shown in FIGS. 1 and 2, the metal carrier 110 has a lead structure such as a metal material of a conventional lead frame but which does not have a conventional lead frame. In this embodiment, a plurality of support ties 112 are attached to the periphery of the metal carrier 110, and extend to the non-plugging side 153 of the sealant 150. Therefore, in the packaging process, the plurality of metal carriers can be connected in series by the support strips 112 to become a mass-produced and primary-molded metal carrier. Preferably, the width of the supporting straps 112 is gradually reduced toward the non-plugging side 153 of the sealing body 150. Therefore, after the singulation, the supporting straps 112 are not on the plugging side 152 of the sealing body 150. There is an exposed metal cut surface, and the exposed metal cut surface exposed on the non-plug side 153 of the sealant 150 also has a small area to avoid degradation of the quality of the memory card product caused by large-area metal oxidation.
該基板120係貼設於該金屬承載座110下方，可利用一固定膠帶114黏接該基板120之上表面周邊至該金屬承載座110之底部。再如第1及2圖所示，該基板120係具有一顯露於該開孔111之上表面121以及一表面設置有複數個接觸指123之下表面122。該些接觸指123係作為該小基板記憶卡封裝構造100之外接端子，其表面可鍍金。而該基板120本身具有上下表面導通之線路結構，例如BT、FR-4印刷電路板或陶瓷電路板。並且，該基板120之外形係小於該封膠體150之外形，在此所稱之「外形」為由上往下或由下往上觀看之輪廓外形，例如該基板120之上表面121周邊圖形比對至該封膠體150之頂面周邊圖形，或者是該基板120之下表面122周邊圖形比對至該封膠體150之底面151周邊圖形。在本實施例中，該基板120之下表面122面積係不大於該封膠體150之底面151之二分之一。The substrate 120 is attached to the metal carrier 110, and a fixing tape 114 is used to bond the periphery of the upper surface of the substrate 120 to the bottom of the metal carrier 110. Further, as shown in FIGS. 1 and 2, the substrate 120 has a surface 121 exposed on the upper surface of the opening 111 and a surface 122 on a surface provided with a plurality of contact fingers 123. The contact fingers 123 serve as external terminals of the small substrate memory card package structure 100, and the surface thereof may be plated with gold. The substrate 120 itself has a line structure in which the upper and lower surfaces are turned on, such as a BT, FR-4 printed circuit board or a ceramic circuit board. Moreover, the outer shape of the substrate 120 is smaller than the outer shape of the encapsulant 150. The "shape" referred to herein is a contour shape viewed from the top to the bottom or from the bottom to the top, for example, the peripheral pattern ratio of the upper surface 121 of the substrate 120. For the top peripheral pattern of the encapsulant 150, or the peripheral pattern of the lower surface 122 of the substrate 120 is aligned to the peripheral pattern of the bottom surface 151 of the encapsulant 150. In this embodiment, the area of the lower surface 122 of the substrate 120 is not more than one-half of the bottom surface 151 of the encapsulant 150.
該第一晶片130係設置於該基板120上並位於該開孔111內。該第一晶片130之設置方法係可為覆晶接合或是一般黏晶結合，在本實施例中，係利用複數個凸塊131結合該第一晶片130與該基板120並達到兩者之間的電性連接。在一更具體結構中，該小基板記憶卡封裝構造100係另可包含有複數個被動元件170，如電感、電容，係亦設置於該基板120上並位於該開孔111內。在本實施例中，該第一晶片130係可為一控制器晶片。The first wafer 130 is disposed on the substrate 120 and located in the opening 111. The method of disposing the first wafer 130 may be a flip chip bonding or a general die bonding. In this embodiment, the first chip 130 and the substrate 120 are combined by a plurality of bumps 131 and reach between the two. Electrical connection. In a more specific configuration, the small-substrate memory card package structure 100 can further include a plurality of passive components 170, such as inductors and capacitors, disposed on the substrate 120 and located in the opening 111. In this embodiment, the first wafer 130 can be a controller wafer.
該第二晶片140係設置於該金屬承載座110上並且不覆蓋該開孔111。在記憶卡封裝製程中，可先將裁切好適當尺寸之基板120先貼附於該金屬承載座110，再安裝該第一晶片130與該第二晶片140，而晶片的安裝順序則不受限制。在本實施例中，該第二晶片140係可為一記憶體晶片，如NAND flash晶片。在一具體結構中，該小基板記憶卡封裝構造100係另可包含有複數個銲線160，係電性連接該第二晶片140之銲墊141至該基板120之該上表面121。此外，如第2圖所示，在本實施例中，該開孔111係可為U形開放孔，使得該金屬承載座110用以承載該基板120之一部位係成為U形支撐架，並且該金屬承載座110係更具有至少一打線槽孔113，係延伸平行於該開孔111之開放口兩端。藉以充分運用該金屬承載座110的可用空間並且不會過度破壞該金屬承載座110之結構。The second wafer 140 is disposed on the metal carrier 110 and does not cover the opening 111. In the memory card packaging process, the substrate 120 of the appropriate size can be first attached to the metal carrier 110, and then the first wafer 130 and the second wafer 140 are mounted, and the order of mounting the wafer is not limit. In this embodiment, the second wafer 140 can be a memory wafer, such as a NAND flash wafer. In a specific configuration, the small-substrate memory card package structure 100 further includes a plurality of bonding wires 160 electrically connected to the pads 141 of the second wafer 140 to the upper surface 121 of the substrate 120. In addition, as shown in FIG. 2, in the embodiment, the opening 111 is a U-shaped open hole, so that the metal carrier 110 is used to carry a portion of the substrate 120 to form a U-shaped support frame, and The metal carrier 110 further has at least one wire slot 113 extending parallel to both ends of the opening of the opening 111. Therefore, the available space of the metal carrier 110 can be fully utilized without excessively damaging the structure of the metal carrier 110.
該封膠體150係密封該金屬承載座110、該基板120之該上表面121、該第一晶片130以及該第二晶片140。該封膠體150係為一種模封化合物，其成份可包含熱固性環氧樹脂、無機填料、色料…等等。該封膠體150係具有一記憶卡之外形，如第2圖所示為微型保全數位記憶卡(micro SD card)之外形。而該些接觸指123係顯露於該封膠體150之一底面151，且鄰近地朝向該封膠體150之一插接側152，而該封膠體150之其餘側邊則為非插接側153。The encapsulant 150 seals the metal carrier 110, the upper surface 121 of the substrate 120, the first wafer 130, and the second wafer 140. The encapsulant 150 is a mold compound, and the composition thereof may include a thermosetting epoxy resin, an inorganic filler, a colorant, and the like. The encapsulant 150 has a shape of a memory card, as shown in FIG. 2, which is a micro SD card. The contact fingers 123 are exposed on one of the bottom surfaces 151 of the encapsulant 150 and are adjacent to one of the plugging sides 152 of the encapsulant 150, and the remaining sides of the encapsulant 150 are non-plugging sides 153.
並且，該基板120係具有一凹凸不平之側邊124並被該封膠體150包覆，以使該基板120之該下表面122貼平於該封膠體150之該底面151內並增加該基板120與該封膠體150之結合力。因此，該基板120之該下表面122與該封膠體150之該底面151可概呈為共平面並且該基板120之該下表面122之周邊亦被該封膠體150包覆，故該基板120完全沒有顯露在該封膠體150之插接側152與非插接側153之外露側面，故不會有因周邊應力導致基板120由記憶卡剝離或發生裂痕之問題。較佳地，該基板120之該側邊124係可相對遠離該封膠體150之該插接側152，用以加強該基板120與該封膠體150在該小基板記憶卡封裝構造100中央之結合力，不會有因中央應力導致基板120由記憶卡剝離或發生裂痕之問題。Moreover, the substrate 120 has a rugged side 124 and is covered by the encapsulant 150 such that the lower surface 122 of the substrate 120 is flattened in the bottom surface 151 of the encapsulant 150 and the substrate 120 is added. The bonding force with the sealant 150. Therefore, the lower surface 122 of the substrate 120 and the bottom surface 151 of the encapsulant 150 are substantially coplanar and the periphery of the lower surface 122 of the substrate 120 is also covered by the encapsulant 150, so the substrate 120 is completely The exposed side of the plug-in side 152 and the non-plug-in side 153 of the encapsulant 150 are not exposed, so that there is no problem that the substrate 120 is peeled off or cracked by the memory card due to peripheral stress. Preferably, the side 124 of the substrate 120 is relatively far from the plug-in side 152 of the encapsulant 150 for reinforcing the combination of the substrate 120 and the encapsulant 150 in the center of the small-substrate memory card package structure 100. The force does not cause a problem that the substrate 120 is peeled off or cracked by the memory card due to the central stress.
而關於該凹凸不平之側邊124之形狀與形成有以下幾種具體型態與方法。The following specific forms and methods are formed regarding the shape and the side 124 of the unevenness.
如第3圖所示，在本實施例中，該基板120之該側邊124係可具有一凹凸曲折的截面，例如多條側向凹入之溝槽，可利用側邊124過度金屬蝕刻或雷射切割等方式達成。As shown in FIG. 3, in the embodiment, the side 124 of the substrate 120 may have a concave-convex cross-section, such as a plurality of laterally concave grooves, which may be excessively metal etched by the side 124 or Laser cutting and other methods are achieved.
如第4圖所示，在本實施例之一變化例中，該基板120之該側邊124’係可具有一導角缺口的截面，可利用大小寬度不同之特殊刀具由該下表面122切入成形、或是基板切割之後再施予一削邊之操作。As shown in FIG. 4, in a variation of the embodiment, the side 124' of the substrate 120 can have a cross section with a lead angle, and the lower surface 122 can be cut by a special cutter having different sizes and widths. After forming or cutting the substrate, a roughing operation is applied.
如第5圖所示，在本實施例之另一變化例中，該基板120之該側邊124”在該上表面121係可為凹凸波浪形，可利用特殊形狀刀具裁切成形、或是基板切割之前先施予一孔徑大於切割道之鑽孔製程。As shown in FIG. 5, in another variation of the embodiment, the side edge 124" of the substrate 120 may have a concave-convex wave shape on the upper surface 121, and may be cut and formed by using a special shape cutter, or Before the substrate is cut, a drilling process with a larger diameter than the cutting path is applied.
本發明不限定晶片與基板120之電性連接方式與晶片之數量，如第6圖所示，於第二較佳實施例揭示另一種小基板記憶卡封裝構造200，主要包含一具有開孔111之金屬承載座110、一貼設於該金屬承載座110下方之基板120、一第一晶片130、複數個第二晶片140以及一卡片形之封膠體150。其中，本實施例之主要元件與第一實施例之主要元件為大致相同，故沿用相同圖號並且不再贅述其細部結構。其中，該些第二晶片140為複數個並可階梯狀堆疊，並可利用複數個銲線280之連接使該第一晶片130與該基板120之間的電性連接關係亦由打線方式建立。The present invention does not limit the electrical connection between the wafer and the substrate 120 and the number of wafers. As shown in FIG. 6, another small substrate memory card package structure 200 is disclosed in the second preferred embodiment, which mainly includes an opening 111. The metal carrier 110, a substrate 120 disposed under the metal carrier 110, a first wafer 130, a plurality of second wafers 140, and a card-shaped encapsulant 150. The main components of the present embodiment are substantially the same as the main components of the first embodiment, and the same reference numerals will be used and the detailed structures thereof will not be described again. The second wafers 140 are stacked in a plurality of stages and can be electrically connected to each other by the connection of the plurality of bonding wires 280.
該基板120係並具有一顯露於該開孔111之上表面121以及一表面設置有複數個接觸指123之下表面122。該第一晶片130係設置於該基板120上並位於該開孔111內。該第二晶片140係設置於該金屬承載座110上並且不覆蓋該開孔111。該封膠體150係密封該金屬承載座110、該基板120之該上表面121、該第一晶片130以及該第二晶片140。其中，該基板120之外形係小於該封膠體150之外形，並且該基板120係具有一凹凸不平之側邊124並被該封膠體150包覆，以使該基板120之該下表面122貼平於該封膠體150之一底面151內並增加該基板120與該封膠體150之結合力。The substrate 120 has a surface 121 exposed on the upper surface of the opening 111 and a surface 122 on a surface provided with a plurality of contact fingers 123. The first wafer 130 is disposed on the substrate 120 and located in the opening 111. The second wafer 140 is disposed on the metal carrier 110 and does not cover the opening 111. The encapsulant 150 seals the metal carrier 110, the upper surface 121 of the substrate 120, the first wafer 130, and the second wafer 140. The outer surface of the substrate 120 is smaller than the outer shape of the encapsulant 150, and the substrate 120 has a rugged side 124 and is covered by the encapsulant 150 to flatten the lower surface 122 of the substrate 120. The bottom surface 151 of the encapsulant 150 is added to the bonding force of the substrate 120 and the encapsulant 150.
以上所述，僅是本發明的較佳實施例而已，並非對本發明作任何形式上的限制，雖然本發明已以較佳實施例揭露如上，然而並非用以限定本發明，任何熟悉本項技術者，在不脫離本發明之技術範圍內，所作的任何簡單修改、等效性變化與修飾，均仍屬於本發明的技術範圍內。The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes and modifications made without departing from the technical scope of the present invention are still within the technical scope of the present invention.
100．．．小基板記憶卡封裝構造100. . . Small substrate memory card package construction
110．．．金屬承載座110. . . Metal carrier
111．．．開孔111. . . Opening
112．．．支撐繫條112. . . Support tie
113．．．打線槽孔113. . . Wire slot
114．．．固定膠帶114. . . Fixing tape
120．．．基板120. . . Substrate
121．．．上表面121. . . Upper surface
122．．．下表面122. . . lower surface
123．．．接觸指123. . . Contact finger
124．．．凹凸不平之側邊124. . . Rugged side
124’．．．凹凸不平之側邊124’. . . Rugged side
124”．．．凹凸不平之側邊124"...side of the rugged side
130．．．第一晶片130. . . First wafer
131．．．凸塊131. . . Bump
140．．．第二晶片140. . . Second chip
141．．．銲墊141. . . Solder pad
150．．．封膠體150. . . Sealant
151．．．底面151. . . Bottom
152．．．插接側152. . . Plug side
153．．．非插接側153. . . Non-plugged side
160．．．銲線160. . . Welding wire
170．．．被動元件170. . . Passive component
200．．．小基板記憶卡封裝構造200. . . Small substrate memory card package construction
280．．．銲線280. . . Welding wire
第1圖：依據本發明之一第一較佳實施例，一種小基板記憶卡封裝構造之截面示意圖。1 is a cross-sectional view showing a package structure of a small substrate memory card in accordance with a first preferred embodiment of the present invention.
第2圖：依據本發明之一第一較佳實施例，該小基板記憶卡封裝構造透視其封膠體之上視示意圖。2 is a top plan view of the small substrate memory card package structure according to a first preferred embodiment of the present invention.
第3圖：依據本發明之一第一較佳實施例，該小基板記憶卡封裝構造於其基板側邊之局部放大截面示意圖。FIG. 3 is a partially enlarged cross-sectional view showing the small substrate memory card package structure on the side of the substrate according to a first preferred embodiment of the present invention.
第4圖：依據本發明之一第一較佳實施例之變化例，該小基板記憶卡封裝構造於其基板側邊之局部放大截面示意圖。Figure 4 is a partially enlarged cross-sectional view showing the small substrate memory card package structure on the side of the substrate in accordance with a variation of the first preferred embodiment of the present invention.
第5圖：依據本發明之一第一較佳實施例之變化例，該小基板記憶卡封裝構造之基板上表面示意圖。Figure 5 is a schematic view showing the upper surface of a substrate of the small substrate memory card package structure according to a variation of the first preferred embodiment of the present invention.
第6圖：依據本發明之一第二較佳實施例，另一種小基板記憶卡封裝構造之截面示意圖。Figure 6 is a cross-sectional view showing another small substrate memory card package structure in accordance with a second preferred embodiment of the present invention.
100．．．小基板記憶卡封裝構造100. . . Small substrate memory card package construction
110．．．金屬承載座110. . . Metal carrier
111．．．開孔111. . . Opening
112．．．支撐繫條112. . . Support tie
114．．．固定膠帶114. . . Fixing tape
120．．．基板120. . . Substrate
121．．．上表面121. . . Upper surface
122．．．下表面122. . . lower surface
123．．．接觸指123. . . Contact finger
124．．．凹凸不平之側邊124. . . Rugged side
130．．．第一晶片130. . . First wafer
131．．．凸塊131. . . Bump
140．．．第二晶片140. . . Second chip
141．．．銲墊141. . . Solder pad
150．．．封膠體150. . . Sealant
151．．．底面151. . . Bottom
152．．．插接側152. . . Plug side
153．．．非插接側153. . . Non-plugged side
160．．．銲線160. . . Welding wire
Claims (10)
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| TW100129132A TWI429351B (en) | 2011-08-15 | 2011-08-15 | Memory card package having a small substrate |
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| TW100129132A TWI429351B (en) | 2011-08-15 | 2011-08-15 | Memory card package having a small substrate |
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| TWI429351B true TWI429351B (en) | 2014-03-01 |
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| TWI619226B (en) * | 2015-01-15 | 2018-03-21 | 力祥半導體股份有限公司 | Semiconductor package apparatus |
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