TW490803B - Chip structure having outer layer connection on the protection layer - Google Patents

Chip structure having outer layer connection on the protection layer Download PDF

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Publication number
TW490803B
TW490803B TW90100176A TW90100176A TW490803B TW 490803 B TW490803 B TW 490803B TW 90100176 A TW90100176 A TW 90100176A TW 90100176 A TW90100176 A TW 90100176A TW 490803 B TW490803 B TW 490803B
Authority
TW
Taiwan
Prior art keywords
layer
surface
substrate
connection
protection
Prior art date
Application number
TW90100176A
Inventor
Mau-Shiung Lin
Jin-Yuan Li
Original Assignee
Megic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Megic Corp filed Critical Megic Corp
Priority to TW90100176A priority Critical patent/TW490803B/en
Application granted granted Critical
Publication of TW490803B publication Critical patent/TW490803B/en

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Abstract

A kind of chip structure that has outer layer connection on the protection layer includes the followings: a substrate, which has the first surface; multiple devices, which are disposed on the surface layer of the first surface of the substrate; at least one ESD protection circuit, which is disposed on the surface layer of the first surface of the substrate; a laminated layer covering the first surface of the substrate, in which the laminated layer has multiple metal interconnects for connecting devices and the ESD protection circuit; a protection layer, which covers the laminated layer to expose the ends of the metal interconnects; and a wide conducting wire layer covering the protection layer, in which the wide conducting wire layer includes the dielectric material and at least an external layer connection interlacing inside the dielectric material such that the external layer connection is electrically connected with the metal interconnect.
TW90100176A 2001-01-04 2001-01-04 Chip structure having outer layer connection on the protection layer TW490803B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW90100176A TW490803B (en) 2001-01-04 2001-01-04 Chip structure having outer layer connection on the protection layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW90100176A TW490803B (en) 2001-01-04 2001-01-04 Chip structure having outer layer connection on the protection layer

Publications (1)

Publication Number Publication Date
TW490803B true TW490803B (en) 2002-06-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW90100176A TW490803B (en) 2001-01-04 2001-01-04 Chip structure having outer layer connection on the protection layer

Country Status (1)

Country Link
TW (1) TW490803B (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7932172B2 (en) 2005-09-23 2011-04-26 Megica Corporation Semiconductor chip and process for forming the same
US7960269B2 (en) 2005-07-22 2011-06-14 Megica Corporation Method for forming a double embossing structure
US7964973B2 (en) 2004-08-12 2011-06-21 Megica Corporation Chip structure
US8008775B2 (en) 2004-09-09 2011-08-30 Megica Corporation Post passivation interconnection structures
US8013449B2 (en) 2003-10-15 2011-09-06 Megica Corporation Post passivation interconnection schemes on top of the IC chips
US8018060B2 (en) 2004-09-09 2011-09-13 Megica Corporation Post passivation interconnection process and structures
US8022544B2 (en) 2004-07-09 2011-09-20 Megica Corporation Chip structure
US8089155B2 (en) 1998-12-21 2012-01-03 Megica Corporation High performance system-on-chip discrete components using post passivation process
US8198729B2 (en) 2004-07-16 2012-06-12 Megica Corporation Connection between a semiconductor chip and a circuit component with a large contact area
US8304907B2 (en) 1998-12-21 2012-11-06 Megica Corporation Top layers of metal for integrated circuits
US8581404B2 (en) 2004-07-09 2013-11-12 Megit Acquistion Corp. Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8304907B2 (en) 1998-12-21 2012-11-06 Megica Corporation Top layers of metal for integrated circuits
US8129265B2 (en) 1998-12-21 2012-03-06 Megica Corporation High performance system-on-chip discrete components using post passivation process
US8089155B2 (en) 1998-12-21 2012-01-03 Megica Corporation High performance system-on-chip discrete components using post passivation process
US8013449B2 (en) 2003-10-15 2011-09-06 Megica Corporation Post passivation interconnection schemes on top of the IC chips
US8022544B2 (en) 2004-07-09 2011-09-20 Megica Corporation Chip structure
US8519552B2 (en) 2004-07-09 2013-08-27 Megica Corporation Chip structure
US8581404B2 (en) 2004-07-09 2013-11-12 Megit Acquistion Corp. Structure of gold bumps and gold conductors on one IC die and methods of manufacturing the structures
US8198729B2 (en) 2004-07-16 2012-06-12 Megica Corporation Connection between a semiconductor chip and a circuit component with a large contact area
US7964973B2 (en) 2004-08-12 2011-06-21 Megica Corporation Chip structure
US8018060B2 (en) 2004-09-09 2011-09-13 Megica Corporation Post passivation interconnection process and structures
US8008775B2 (en) 2004-09-09 2011-08-30 Megica Corporation Post passivation interconnection structures
US7960269B2 (en) 2005-07-22 2011-06-14 Megica Corporation Method for forming a double embossing structure
US7932172B2 (en) 2005-09-23 2011-04-26 Megica Corporation Semiconductor chip and process for forming the same

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