479318 6769twf.doc/008 A7 B7 五、發明說明（ί ) 本發明是有關一種元件隔離結構的製造方法’特別 是有關於一種淺溝渠隔離結構的製造方法。 元件隔離區係用以防止載子通過基底而在相鄰之元件 間移動，傳統上，元件隔離區形成於稠密的半導體電路比 如是動態隨機存取記憶體中相鄰的場效應電晶體間’藉以 減少由場效電晶體產生的電荷遺漏（Charge Leakage) ° 習知之淺溝渠隔離結構製造方法是一種普遍的元件隔 離方法。通常是利用非等向性（Anisotropic)乾蝕刻法於 半導體基底中蝕刻出陡峭的溝渠。接著，再將溝渠塡滿絕 緣層，作爲元件隔離結構。 第1A圖與第1B圖是習知淺溝渠表面的絕緣層之形 成放大示意圖。 請參照第1A圖。通常絕緣層是以化學氣相沈積法形 成於溝渠內，而在溝渠表面110有獨立鍵（Dangling bonds) 116，是用來與化學氣源結合以形成氧化層；而化學氣源 中除了包括單體（monomeO 118外，還有大分子的聚合 ·' 物（polymer) 120 〇 請參照第1B圖。進行化學氣相沉積法時，因爲溝渠 表面110的獨立鍵116數量少且分散排列，所以化學氣源 中的單體118與大分子的聚合物120都會跟獨立鍵116相 結合以形成絕緣層。 因爲溝渠表面的獨立鍵會與大分子的聚合物相結合， 此舉不但會造成溝渠的溝塡能力（Gap Fill)降低，更會 因爲這些存在於溝渠表面的大分子聚合體造成塡入之絕緣 3 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂----------% 經濟部智慧財產局員工消費合作社印製 479318 A7 6769twf.doc/008 五、發明說明（1) 層與溝渠之間產生空隙，致使後續製程產生之殘留物造成 漏電的現象。 (請先閱讀背面之注意事項再填寫本頁) 因此，本發明提供一種淺溝渠隔離結構的製造方法， 避免大分子聚合物與溝渠表面相結合以增進溝渠的溝塡能 力。 本發明提供一種淺溝渠隔離結構的製造方法。此方法 係在基底上形成一墊氧化層，並在墊氧化層上形成~硬罩 幕層。接著，在硬罩幕層上形成並定義〜光阻層，用以定 義溝渠。藉由光阻層之圖案蝕刻硬罩幕靥與墊氧化層，並 往下蝕刻至基底中，以形成一溝渠。然後，去除此光阻層， 並在溝渠的表面形成一襯氧化層。然後，於基底上形成一* 層可形成多且緻密之獨立鍵的薄膜層，隨後形成一層絕緣 層覆蓋於基底上並塡滿該溝渠，然後經過一道熱製程使糸色 緣層密實化。之後，去除硬罩幕層上之絕緣層。最後，再 去除硬罩幕層與墊氧化層。 經濟部智慧財產局員工消費合作社印製 依照本發明實施例所述上述之可形成多且緻密之獨立 鍵的薄膜層，包括利用化學氣相沉積法所形成之富含砂之 氧化層（Silicon-Rich Oxide, SRO)，其沉積溫度在 5〇〇〇C 〜65(TC左右；以及上述之絕緣層可以是用常壓化學氣相沈 積法（Atmospheric Pressure Chemical Vapor Deposition， APCVD)所形成之氧化矽層，其是以矽酸四乙酉旨/臭氧 (Tetraethylorthosilicate/Ozone，TE0S/03)爲氣源，所以 本發明可利用於溝渠內之襯氧化層上的SRO層，比習知 方法的獨立鍵多且排列密集，所以只有小分子的TEOS單 4 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ' 479318 6769twf.doc/008 A7 B7 五、發明說明（ 經濟部智慧財產局員工消費合作社印製 體能夠與富含矽氧化層表面的獨立鍵相結合；而大分子的 TEOS聚合物則無法結合於其上’因此溝渠的溝塡能力 (gapfill capacity)就會增加。而且，SRO的沉積溫度在 500 °C〜650 °C左右的高溫，所以可增加分子的移動性 (mobility)，使形成後的富含矽氧化層表面之獨立鍵均勻 性（uniformity)更佳。此外’ SRO層的形成也可以使元 件在操作時，避免像習知方法所造成之雜質多的情形〜樣 受到電性的問題所損害。再者，本發明也可避免習知方法 中溝渠表面的大分子聚合體造成塡入之絕緣層與溝渠之間 產生空隙，致使後續製程產生之殘留物造成漏電的現象。 爲讓本發明之上述和其他目的、特徵和優點能更明顯 易懂，下文特舉較佳實施例，並配合所附圖式，作詳細言兌 明如下： 圖式之簡單說明： 第1A圖與第1B圖是習知之淺溝渠表面的氧化餍$ 形成放大示意圖； 第2A圖至第2E圖是依照本發明一較佳實施例〜種 淺溝渠隔離結構之製造方法流程剖面圖；以及 第3A圖與第3B圖是依照第2E圖中一部分的溝渠表 面300所繪示的氧化層之形成放大示意圖。 標記之簡單說明： 110，210 :襯氧化層 116，3 16 :獨立鍵 118，318 :單體 (請先閱讀背面之注意事項再填寫本頁，ί479318 6769twf.doc / 008 A7 B7 V. INTRODUCTION TO THE INVENTION The invention relates to a method for manufacturing a component isolation structure, and in particular to a method for manufacturing a shallow trench isolation structure. The element isolation region is used to prevent carriers from moving between adjacent elements through the substrate. Traditionally, the element isolation region is formed in dense semiconductor circuits such as adjacent field-effect transistors in dynamic random access memory. In order to reduce the charge leakage generated by the field effect transistor (Charge Leakage) ° The conventional method of manufacturing shallow trench isolation structures is a common method of element isolation. Anisotropic dry etching is usually used to etch steep trenches in semiconductor substrates. Then, the trench is filled with an insulating layer as a component isolation structure. Figures 1A and 1B are enlarged schematic views showing the formation of an insulating layer on the surface of a conventional shallow trench. Please refer to Figure 1A. Generally, the insulating layer is formed in the trench by chemical vapor deposition, and there are independent bonds 116 (dangling bonds) 116 on the surface of the trench 110, which are used to combine with the chemical gas source to form an oxide layer. (MonomeO 118, macromolecular polymer · polymer 120) Please refer to Figure 1B. In the chemical vapor deposition method, because the number of independent bonds 116 on the trench surface 110 is small and scattered, the chemical The monomer 118 in the air source and the macromolecule polymer 120 will be combined with the independent bond 116 to form an insulating layer. Because the independent bond on the surface of the trench will be combined with the polymer of the macromolecule, this will not only cause the trench of the trench The Gap Fill is reduced, and the insulative insulation caused by these macromolecular aggregates existing on the surface of the ditch. 3 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read first Note on the back, please fill in this page again.) -------- Order ----------% Printed by the Intellectual Property Bureau of the Ministry of Economy Staff Consumer Cooperative 479318 A7 6769twf.doc / 008 V. Invention Explanation (1) Floor and trench There is a gap between them, resulting in leakage caused by the residues produced in subsequent processes. (Please read the precautions on the back before filling this page) Therefore, the present invention provides a method for manufacturing a shallow trench isolation structure to avoid macromolecular polymers and trenches. The surface is combined to improve the trench trenching ability. The present invention provides a method for manufacturing a shallow trench isolation structure. This method forms a pad oxide layer on the substrate, and forms a hard mask layer on the pad oxide layer. Then, A photoresist layer is formed and defined on the hard mask layer to define trenches. The hard mask curtain and pad oxide layer are etched by the pattern of the photoresist layer and etched down into the substrate to form a trench. , Remove the photoresist layer, and form a lining oxide layer on the surface of the trench. Then, form a * layer on the substrate to form a thin film layer with multiple and dense independent bonds, and then form an insulating layer to cover the substrate and 塡Fill the trench, and then densify the ochre edge layer through a thermal process. After that, remove the insulating layer on the hard mask layer. Finally, remove the hard mask layer and pad oxidation. The Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the above-mentioned thin film layer that can form multiple and dense independent bonds according to the embodiment of the present invention, including a sand-rich oxide layer (Silicon formed by chemical vapor deposition) -Rich Oxide (SRO), whose deposition temperature is about 5000C to 65 (TC; and the above-mentioned insulating layer may be an oxide formed by Atmospheric Pressure Chemical Vapor Deposition (APCVD)) Silicon layer, which uses Tetraethylorthosilicate / Ozone (TE0S / 03) as the gas source, so the present invention can be used for the SRO layer on the oxide layer lining the trench, which is more independent than the conventional method. There are many and densely arranged, so there are only small molecules of TEOS. 4 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) '479318 6769twf.doc / 008 A7 B7 V. Description of the invention (the intellectual property of the Ministry of Economic Affairs Bureau ’s consumer cooperative printed body can be combined with independent bonds on the surface of the silicon-rich oxide layer; while the macromolecular TEOS polymer cannot be bonded to it, so the gully energy of the trench (Gapfill capacity) will increase. In addition, the deposition temperature of SRO is about 500 ° C ~ 650 ° C, so the mobility of the molecules can be increased, and the uniformity of the independent bonds on the surface of the silicon-rich oxide layer formed is better. In addition, the formation of the 'SRO layer' can also prevent the device from being damaged by electrical problems during operation, as in the case of a large amount of impurities caused by conventional methods. In addition, the present invention can also avoid the phenomenon that the macromolecular aggregates on the surface of the trench in the conventional method cause a gap between the insulative insulating layer and the trench, resulting in the leakage of the residue generated in subsequent processes. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the preferred embodiments are described below in conjunction with the accompanying drawings, which are explained in detail as follows: Brief description of the drawings: FIG. 1A And FIG. 1B are enlarged schematic diagrams showing the formation of samarium oxide on the surface of a conventional shallow trench; FIGS. 2A to 2E are cross-sectional views of a manufacturing method of a shallow trench isolation structure according to a preferred embodiment of the present invention; and FIG. 3A FIG. 3B is an enlarged schematic diagram of forming an oxide layer according to a portion of the trench surface 300 shown in FIG. 2E. Brief description of the marks: 110, 210: oxide layer 116, 3 16: independent bond 118, 318: monomer (please read the precautions on the back before filling this page, ί
m «ϋ ·ϋ ϋ 1_1 mmm— ai I I I n in in ϋ I ϋ I 經濟部智慧財產局員工消費合作社印製 479318 6769twf.doc/008 A7 _____B7 _ 五、發明說明（9) 120，320 :聚合物 200 :基底 202 :墊氧化層 204 :硬罩幕層 2 0 6 :光阻層 208 :溝渠 210 :溝渠表面 211 :可形成多且緻密之獨立鍵的薄膜層 212 :絕緣層 214 :氧化插塞 300: —部分的溝渠表面 實施例 第2A圖至第2E圖是依照本發明一較佳實施例一種 淺溝渠隔離結構之製造方法流程剖面圖。 請參照第2A圖。首先，在基底200上形成一墊氧化 層202，此墊氧化層202是用來保護基底200免於遭受後 續製程的破壞的。此墊氧化層202的形成方式例如利用熱 氧化法。接著，例如以化學氣祖沉積法在墊氧化層202上 沈積一硬罩幕層2〇4。此硬罩幕層204的材質例如是氮化 矽。其後，在硬罩幕層204上形成並定義一光阻層206， 用以定義溝渠。 然後，請參照第2B圖。藉由光阻層206之圖案蝕亥[j 硬罩幕層204、墊氧化層202，並往下蝕刻至基底2〇〇中， 以形成一溝渠2〇8。蝕刻的方法例如使用非等向性蝕刻製 6 (請先閱讀背面之注意事項再填寫本頁)m «ϋ · ϋ ϋ 1_1 mmm — ai III n in in ϋ I ϋ I Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 479318 6769twf.doc / 008 A7 _____B7 _ V. Description of the Invention (9) 120, 320: Polymer 200: substrate 202: pad oxide layer 204: hard cover curtain layer 2 06: photoresist layer 208: trench 210: trench surface 211: thin film layer capable of forming multiple and dense independent bonds 212: insulating layer 214: oxidized plug 300:-Figures 2A to 2E of a partial trench surface embodiment are cross-sectional views of a method for manufacturing a shallow trench isolation structure according to a preferred embodiment of the present invention. Please refer to Figure 2A. First, a pad oxide layer 202 is formed on the substrate 200. The pad oxide layer 202 is used to protect the substrate 200 from being damaged by subsequent processes. The formation method of the pad oxide layer 202 is, for example, a thermal oxidation method. Next, for example, a hard mask layer 204 is deposited on the pad oxide layer 202 by a chemical air deposition method. The material of the hard mask layer 204 is, for example, silicon nitride. Thereafter, a photoresist layer 206 is formed and defined on the hard mask layer 204 to define a trench. Then, refer to Figure 2B. The hard mask layer 204 and the pad oxide layer 202 are etched by the pattern of the photoresist layer 206 and etched down to the substrate 200 to form a trench 208. Etching methods such as using anisotropic etching 6 (Please read the precautions on the back before filling this page)
本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 479318 A7 B7 6769twf.doc/008 五、發明說明（幺） 程。然後，去除此光阻層2〇6。 (請先閱讀背面之注意事項再填寫本頁) 接著，請參照第2C圖。在溝渠208表面形成一襯氧 化層210，其形成方法例如使用熱氧化法。然後，於基底 200上形成一層可形成多且緻密之獨立鍵的薄膜層211， 此薄膜層211的材質例如是富含矽之氧化層’其形成方法 例如是以化學氣相沉積法沉積，且其沉積溫度在500°C〜650 °C左右。 然後，請參照第2D圖。形成一層絕緣層212覆蓋於 基底200上並塡滿該溝渠208，此絕緣層212的材質例如 是氧化矽，其形成方法例如是以矽酸四乙酯/臭氧 (teos/o3)爲氣源，使用常壓化學氣相沈積法沈積。因 爲絕緣層212之材料較爲鬆散，所以較佳的方式會再經過 一道熱製程以使其密實化。 最後，請參照第2E圖。以硬罩幕層204爲硏磨終點， 利用化學機械硏磨法去除硬罩幕層204上之絕緣層212與 薄膜層211。然後，再去除硬罩幕層204。當硬罩幕層2〇4 的材質例如是氮化矽時，移除硬罩幕層204的方法包括使 '用熱磷酸溶液。最後，移除墊氧化層202，以形成氧化插 塞214，其去除方法例如以氫氟酸（HF)浸蝕。 經濟部智慧財產局員工消費合作社印製 爲詳細說明本發明所形成之絕緣氧化層在溝渠表面的 鍵結情形，請參照第3A圖與第3B圖。第3A圖與第3B 圖是依照第2E圖中一部分的溝渠表面300所繪示的氧化 層之形成放大示意圖。 請參照第3A圖。本發明在溝渠表面210所覆蓋之薄 7 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 479318 6769twf.doc/008 A7 B7 五、發明說明（匕） 膜層211 ’其具有多而緻密之獨立鍵316用來與TEOS/〇3 氣源結合以形成氧化層；而TE0S/03氣源中除了包括TEOS 單體318外，還有大分子的TEOS聚合物320。 另外’薄膜層211的沉積溫度在500°C〜65(TC左右， 可增加分子的移動性，因此形成後的富含矽氧化層211表 面之獨立鍵316將會排列更均勻。 請參照第3B圖。進行常壓化學氣相沉積法時，TE0S/03 氣源中的TEOS單體318會跟薄膜層211表面的獨立鍵316 相結合以形成氧化層。 因爲溝渠表面210上的可形成多且緻密之獨立鍵的薄 膜層211表面較習知方法的獨立鍵316多且排列密集，所 以只有小分子的TEOS單體能夠與薄膜層311表面的獨立 鍵316相結合；而大分子的TEOS聚合物320則難以結合 於其上。 上述實施例所述之基底200亦可以爲晶圓上之任何一 層晶圓層，溝渠208可以爲晶圓層中之一開口。値得一提 的是，本發明並不限定於淺溝渠隔離結構的製程之中，凡 是於厂晶圓層的開口中塡入材料層之製程，均可以在沉積 該材料層之前，透過一層具有多且緻密之獨立鍵之薄膜層 的形成，來增進其溝塡能力。 綜上所述，本發明的特徵及優點如下： L本發明可形成多且緻松、之獨立鍵的薄膜層表面較習 知方法的表面有較多且排列密集之獨立鍵，所以只有小分 子的TEOS單體能夠與富含矽氧化層表面的獨立鍵相結 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝 i_—丨_ 訂·--------. 經濟部智慧財產局員工消費合作社印製 479318 6769twf.doc/008 合於其 上 A7 B7 五、發明說明（/ ) 合；而大分子的TEOS聚合物則難以結 增加溝渠的溝塡能力。 2·當基底上形成一層可形成多且緻密、$ 層時，薄膜層的沉積溫度在5〇(TC〜65〇t：>猶立_的薄膜 溫度高可增加分子的移動性，因此形成後’由於沉積 獨立鍵將有更佳的一致性。 膜層表面;^ 3·本發明利用於溝渠內之襯氧化層i 密之獨立鍵的薄膜層，以避免習知方法中丨霉S形成多且緻 子聚合體造成塡入之絕緣層與溝渠之間產的大分 土二隙，致使後 續製程產生之殘留物造成漏電的現象。 @ 4·本發明在溝渠表面所形成之SRO膜也可以使元件 在操作時，避免像習知方法所造成之雜質多的情形一樣受 到電性的問題所損害。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作些許之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 ----rll··ί#,...... .訂--------- ^¾¾^背面之注意亊項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 9 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 479318 A7 B7 6769twf.doc / 008 5. Description of the invention (ii) Process. Then, the photoresist layer 206 is removed. (Please read the notes on the back before filling out this page) Then, please refer to Figure 2C. An oxide liner 210 is formed on the surface of the trench 208, and the formation method is, for example, a thermal oxidation method. Then, a thin film layer 211 capable of forming multiple and dense independent bonds is formed on the substrate 200. The material of the thin film layer 211 is, for example, a silicon-rich oxide layer. Its formation method is, for example, chemical vapor deposition, and Its deposition temperature is around 500 ° C ~ 650 ° C. Then, refer to Figure 2D. An insulating layer 212 is formed to cover the substrate 200 and fill the trench 208. The material of the insulating layer 212 is, for example, silicon oxide, and the formation method is, for example, using tetraethyl silicate / ozone (teos / o3) as a gas source. Deposition using atmospheric pressure chemical vapor deposition. Because the material of the insulating layer 212 is relatively loose, a better way is to go through a thermal process to make it denser. Finally, please refer to Figure 2E. Taking the hard cover curtain layer 204 as the honing end point, the insulating layer 212 and the thin film layer 211 on the hard cover curtain layer 204 are removed by a chemical mechanical honing method. Then, the hard mask layer 204 is removed. When the material of the hard mask layer 204 is, for example, silicon nitride, a method of removing the hard mask layer 204 includes using a hot phosphoric acid solution. Finally, the pad oxide layer 202 is removed to form an oxide plug 214, and the removal method is, for example, etching with hydrofluoric acid (HF). Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. For details of the bonding of the insulating oxide layer formed on the surface of the trench by the present invention, please refer to FIGS. 3A and 3B. 3A and 3B are enlarged schematic diagrams showing the formation of an oxide layer according to a portion of the trench surface 300 shown in FIG. 2E. Please refer to Figure 3A. The thickness of the paper covered by the present invention on the surface of the ditch 210 7 The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 479318 6769twf.doc / 008 A7 B7 V. Description of the invention (dagger) Film layer 211 'its The multiple and dense independent bonds 316 are used to combine with the TEOS / 〇3 gas source to form an oxide layer. In addition to the TEOS / 03 gas source, the TEOS polymer 320 is included in addition to the TEOS monomer 318. In addition, the deposition temperature of the thin film layer 211 is about 500 ° C to 65 ° C, which can increase the mobility of molecules, so the independent bonds 316 on the surface of the silicon-rich oxide layer 211 after formation will be arranged more uniformly. Please refer to Section 3B Figure. When the atmospheric pressure chemical vapor deposition method is performed, the TEOS monomer 318 in the TE0S / 03 gas source will be combined with the independent bond 316 on the surface of the thin film layer 211 to form an oxide layer. The surface of the densely-bonded thin film layer 211 is denser and more dense than the independent bonds 316 of the conventional method, so only small molecules of TEOS monomers can be combined with the independent bonds 316 on the surface of the thin-film layer 311; and large-scale TEOS polymers 320 is difficult to combine with it. The substrate 200 described in the above embodiment may also be any wafer layer on the wafer, and the trench 208 may be one of the wafer layers openings. It is to be mentioned that the present invention It is not limited to the manufacturing process of the shallow trench isolation structure. Any process that inserts a material layer into the opening of the factory wafer layer can pass through a thin film layer with multiple and dense independent bonds before depositing the material layer. Shape In summary, the features and advantages of the present invention are as follows: L The present invention can form a multi-layered, loose-bonded, thin film layer surface with more independent bonds than the surface of the conventional method and is densely arranged. Independent bonds, so only small molecules of TEOS monomers can bond with independent bonds on the surface rich in silicon oxide layer 8 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the back first Please note this page before filling in this page.) I_— 丨 _ Order · --------. Printed by the Consumers' Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 479318 6769twf.doc / 008 A7 B7 V. Description of the invention (/) Combination; while macromolecular TEOS polymers are difficult to increase the trenching ability of the trenches. 2. When a layer can be formed on the substrate that can form multiple, dense and dense layers, the deposition temperature of the thin film layer is 50 ° C ~ 65〇t: > The high temperature of the thin film can increase the mobility of the molecules, so after forming 'there will be better consistency due to the deposition of independent bonds. Film surface; ^ 3. The present invention is used in the trench Oxide layer i is a thin film layer with a dense and independent bond to avoid habituation In the method, the formation of mold S and the formation of proton aggregates caused a large gap between the insulative layer and the trench, resulting in the leakage of residues generated in subsequent processes. @ 4 · 本 发明 在 沟沟 所 所The formed SRO film can also prevent the device from being damaged by the electrical problems as in the case of a lot of impurities caused by the conventional method during operation. Although the present invention has been disclosed above in a preferred embodiment, it is not intended to be used. In order to limit the present invention, anyone skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope of the attached patent application. . ---- rll · · ί #, ...... .Order --------- ^ ¾¾ ^ Note on the back of the item and then fill out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 9 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)