TW447040B - Method for preventing high-density plasma damage during a shallow trench isolation process - Google Patents

Abstract

The present invention discloses a method for forming a shallow trench isolation, by which the high-density plasma damage to the trench can be prevented. The method at least comprises a substrate provided and a pad oxide layer formed thereon. Thereafter, a silicon nitride layer is formed on the pad oxide layer. Next, a trench is formed through the silicon nitride layer, the pad oxide layer and the substrate, and a linear oxide layer is formed on the surface exposed in the trench. Furthermore, a polysilicon layer is deposited on the silicon nitride layer and the linear oxide layer. By using high density CVD, an oxide layer is deposited on the polysilicon layer to fill the trench. Thereafter, the oxide layer filled into the trench is densitified by thermal oxidation, wherein the polysilicon layer is oxidized at the same time. Next, the planarization of the oxide layer is performed to expose the silicon nitride layer by using CMP process. Eventually, the silicon nitride layer and the pad oxide layer are removed in sequence.

Description

1470 4 0 V. Description of the invention (1) 5-1 Field of the invention: The present invention relates to the manufacture of a shallow trench isolation in a semiconductor device, and in particular to a method that can block high density when forming a shallow trench isolation. Method of plasma damage. 5-2 Background of the Invention: Due to the development of ultra-large integrated circuit (ULS I) manufacturing technology, the semiconductor process can be upgraded to the technical level of manufacturing relatively high-density integrated circuits. In order to prevent the semiconductor elements on the integrated circuit from being interfered with each other *, an effective isolation zone must be established between the semiconductor elements to avoid short circuits. However, as semiconductor elements have gradually shrunk and the density of integrated circuits has increased, it has become increasingly difficult to establish effective and reliable isolation regions that have been isolated to create active regions of each semiconductor element. Therefore, trench isolation methods, such as shallow trench isolation, are increasingly used to form trench isolation areas that are coplanar with each active area. The shallow trench isolation method etches a trench on the substrate, and then deposits a chemical vapor deposition oxide to fill the trench. Generally, compared with other methods, such as low-pressure chemical vapor deposition, high-density plasma chemical vapor deposition has better trench filling capabilities, especially trenches with very small widths. However, when high-density plasma chemical vapor deposition is used to deposit oxides into trenches ’

447040 V. Description of the invention (2) _ The side wall and other underlying dielectric layers are easily damaged by Argon sputtering in the high-density plasma chemical vapor deposition process. Therefore, the use of high-density plasma chemical vapor deposition can easily damage gate oxide integrity and cause junction leakage. 5-3 Objects and Summary of the Invention: One object of the present invention is to protect the integrity of trench walls when filling trenches with high-density plasma chemical vapor deposition to form shallow trench isolation. Another object of the present invention is to provide a buffer polycrystalline silicon layer for blocking the damage of high-density plasma. According to the above-mentioned purpose, the present invention provides a method for forming a shallow trench isolation, which can effectively prevent damage to the trench by high-density plasma. The method includes at least providing a substrate and forming a pad oxide layer on the substrate. Next, a nitride layer is deposited on the pad oxide layer. Then, a trench is formed that penetrates the nitride layer and the pad oxide layer into the substrate and forms a liner oxide layer on a surface exposed by the trench. Next, a polycrystalline silicon layer is deposited on the nitride layer and the liner oxide layer. After that, an oxide layer is deposited by high-density chemical vapor deposition to fill the trenches on the polycrystalline silicon layer. Then, the oxide layer filled in the trench is cured by a thermal oxidation method, in which the polycrystalline silicon layer is simultaneously oxidized into a silicon oxide layer.

Page 5 14704 〇 5. Description of the invention (3) Polycrystalline silicon oxide "Next, the oxide layer is planarized by chemical mechanical polishing and the nitride layer is exposed. Finally, the nitride layer and the pad oxide layer are sequentially removed. 5 -4 Detailed description of the invention: The semiconductor design of the present invention can be widely applied to many semiconductor designs, and can be made using many different semiconductor materials. When the present invention is described by a preferred embodiment, the method is known Those skilled in the art should recognize that many steps can be changed, and materials and impurities can be replaced. These general replacements undoubtedly do not depart from the spirit and scope of the present invention. Second, the present invention is described in detail with a schematic diagram as follows, In detailing the embodiments of the present invention, the cross-sectional view showing the semiconductor structure will not be partially enlarged according to the general scale in the semiconductor manufacturing process to facilitate the explanation. However, it should not be used as a limited recognition. In addition, in actual production, Three-dimensional space dimensions including length, width, and depth. Some embodiments of the present invention will be described in detail below. However, in addition to the detailed description The present invention can be widely implemented in other embodiments, and the scope of the invention is not limited, which is patentable scope of the subject after. Referring first to FIG, first, a substrate 10 is formed on the substrate 10, and

Page 6 44704 〇 5. Description of the invention (4) A layer of oxygen is also provided. The thickness of the pad oxide layer 20 ranges from about 500 to 200 angstroms, and the material of the hafnium oxide layer 20 is oxidized stone formed by a thermal oxidation method. Then, a nitride layer 30 is deposited on the pad oxide layer 20 with a thickness ranging from about 15O to 30 Angstroms. The nitride layer 30 serves as a mask layer. The material of this nitride layer 30 is nitride stone. It can be formed by chemical vapor deposition method, such as low pressure chemical vapor deposition method, electrical destruction chemical vapor deposition method, or high-density electrochemical deposition chemical vapor deposition method. SiH4, ΝΗ3, ΝΛΝ2〇 or SiH2Cl2, ΝΗ3, Ν2, and Ν20 are used as reaction gases. The pad oxide layer 20 serves as a buffer layer 'before the substrate and the nitride layer 30 to reduce the stress between the two layers. Next, a trench is formed to penetrate the nitride layer 30 and the hafnium oxide layer 20 into the substrate 10. The formation of this channel is made by using a photoresist layer (not shown in the figure) to transfer the pattern to the nitride layer 30 and the pad oxide layer 2 η wonderful, ηΛ / with a π increase 20 ′ and then the bottom of the photoresist layer opening is carved The material 10 forms a ditch, and then finally moves down. In addition to the first resistance layer, the ditch contains a bottom and lateral soil. After W, at the bottom and side walls of the ditch — ^ ^ ^ ^ ^ ^. The material of the lining oxide layer 22 is Wenger ^ lining rolling layer ^ dry oxidation method or wet oxidation method. ”It is formed by thermal oxidation method. If an important step is performed subsequently, the material of the oxide layer 22, the nitride layer 30, and the hafnium oxide protection layer 40 is made of a chemical silicon gas layer 40. Good conductive material. The subsequent high-density electric II layer 40 can effectively block the high-density electricity. A protective layer 40 is formed on the lining layer 20 on the bottom and side walls of the trench. Polycrystalline silicon formed by this deposition method. This is more-when the thickness ranges from about 100 to 300 CVD, the polycrystalline silicon slurry is damaged. Next step to high density

Page 7 4470 4 0 V. Description of the invention (5) A chemical vapor deposition method is used to deposit an oxide layer 2 4 on the polycrystalline silicon layer 40 and fill the trenches. This halide layer 2 4 is used as an isolation material. Referring to the first figure, after the oxide layer 24 is deposited, a curing process is performed to cure the oxide layer 24 in the trench. This curing process is usually performed using a thermal oxidation method of thorium-containing gas at a temperature range of about 900 to 110 ° C. While curing, the polycrystalline silicon layer 40 used as a protective layer will be completely oxidized to form a polycrystalline silicon oxide layer 26, which is a dielectric. Referring to the third figure ', the oxide layer 24 is planarized by a chemical mechanical polishing method. This polishing procedure also removes the crystalline silicon oxide layer 26 on the nitride layer 30 and stops on the nitride layer 30. Finally, the nitride layer 30 and the pad oxide layer 20 are sequentially removed to complete shallow trench isolation. To sum up, the ancient and ancient soil h ^ ^ ^ φ ¥ a of the present invention provides a buffer polycrystalline silicon layer for the ytterbium to resist the damage of the high-density plasma in the i 2 L integration process. This polycrystalline silicon layer is damaged by a conductor and a sensitive trench. And the important thing is that, at the same time, the polycrystalline silicon layer that can effectively block the electricity from being collected is also completely oxygen =: while the material is being cured ', this polycrystalline silicon layer is used as a barrier; the polycrystalline silicon layer is oxidized Floor. In this way, the protective layer having any effect on the resistance to the damage of the electropolymerization will not be described above. It is only a preferred embodiment of the scope of the patent application of the present invention that is determined by the date of issue. Disclosed by the present invention

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Page 9 4470 4 0 Simple description of the formula The first figure is a schematic cross-sectional view of forming a shallow trench isolation on a substrate according to the method disclosed in the present invention. The second figure is a schematic cross-sectional view of the structure of the first figure for curing the oxide filled in the trench.

The third figure is a schematic cross-sectional view of planarizing and removing the nitride layer and the hafnium oxide layer on the structure of the second figure. Symbols of the main parts ‘10 Substrate 2 0 Pad oxide layer 2 2 Liner oxide layer 24 Oxide layer 26 Polycrystalline silicon oxide layer 3 0 Gasification layer 40 Polycrystalline silicon layer

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Claims (1)

44 70 4 〇 6. Application scope 1. A method for forming a shallow trench isolation, the method at least includes: providing a substrate; forming a hafnium oxide layer on the substrate; depositing a nitride layer on the substrate On the pad oxide layer; forming a trench penetrating the nitride layer and the pad oxide layer into the substrate > forming a lining oxide layer on a surface exposed by the trench; depositing a polycrystalline silicon layer on the On the nitride layer and the oxide layer of the lining; depositing an oxide layer on the polycrystalline silicon layer using a high-density chemical vapor deposition method to fill the trench; and curing the oxide layer filled in the trench by using a thermal oxidation method, wherein The polycrystalline silicon layer is simultaneously oxidized into a polycrystalline silicon oxide layer; the oxide layer is planarized by a chemical mechanical polishing method to expose the nitride layer; and the nitride layer and the pad oxide layer are sequentially removed. 2. The method according to item 1 of the patent application range, wherein the pad oxidation layer is formed by a thermal oxidation method. 3. The method according to item 1 of the scope of patent application, wherein the material of the above-mentioned pad oxide layer is silicon oxide. 4. The method of claim 1 in which the above-mentioned nitrided layer is formed by a chemical vapor deposition method. 4470 4 0 6. Application for Patent Scope 5. The method of the first scope of patent application also includes a lithography process step to form the trench. 6. The method according to item 1 of the patent application range, wherein the above-mentioned lining oxide layer is formed by a thermal oxidation method. 7. The method according to item 1 of the scope of patent application, wherein the material of the above-mentioned lining oxide layer is silicon oxide. 8. The method of claim 1 in which the above-mentioned polycrystalline silicon layer is formed by a chemical vapor deposition method. 9. The method according to item 1 of the patent application range, wherein a thickness of the above polycrystalline silicon layer ranges from about 1000 to 300 angstroms. 1 0. A method for forming a shallow trench isolation capable of blocking high-density plasma damage, the method at least comprises: providing a substrate; forming a pad of silicon oxide layer on the substrate; using a chemical vapor deposition method Depositing a nitride layer on the pad silicon oxide layer; forming a trench penetrating the nitride layer and the pad silicon oxide layer into the substrate; forming a lining oxide layer exposed on the trench On the surface Page 12 44704 〇 6. The scope of patent application 'deposit a polycrystalline silicon layer on the vaporized layer and the lining silicon oxide layer by chemical vapor deposition method; deposit an oxide layer on the polycrystalline silicon layer by high density chemical vapor deposition method The trench is filled; the oxide layer filled in the trench is cured by thermal oxidation, wherein the polycrystalline silicon layer is simultaneously oxidized to form a polycrystalline silicon oxide layer; the oxide layer is planarized by chemical mechanical polishing and Exposing the gasification layer; and sequentially removing the nitride layer and the pad silicon oxide layer. 11. The method of claim 10 in the scope of patent application, wherein the above-mentioned pad silicon oxide layer is formed by a thermal oxidation method. The 2nd step of the French method 〇 -Ι-i 〇 Fangou Liqu should be applied in the form of the application, such as The description of the chemical oxygen lining on the lm) its method of g τ—Η ο form a fan-shaped Fanfali specialization of oxygen, please apply for hotline such as layer 3 silicon 1 4. as the method of the scope of patent application No. 10 A thickness range of the polycrystalline silicon layer is about 100 to 300 angstroms. 1 5. —A method for blocking high-density plasma damage when a shallow trench is isolated, the method at least includes: Page 13 447040 Six 'patent application scope provides a substrate; a silicon oxide layer is formed on the substrate by a thermal oxidation method; a nitride layer is deposited on the silicon oxide layer by a chemical vapor deposition method; A trench penetrates the nitride layer and the pad silicon oxide layer into the substrate; a liner silicon oxide layer is formed on a surface exposed by the trench by a thermal oxidation method; and is deposited by a chemical vapor deposition method A polycrystalline silicon layer is on the nitrided layer and the lined oxide layer. A thickness of the polycrystalline layer is about 100 to 300 angstroms; a high-density chemical vapor deposition method is used to deposit an oxide layer. Fill the trench on the polycrystalline silicon layer; solidify the oxide layer filled in the trench by thermal oxidation, wherein the polycrystalline silicon layer is simultaneously oxidized to form a polycrystalline silicon oxide layer; the oxide layer is subjected to chemical mechanical polishing Planarizing and exposing the nitride layer; and sequentially removing the nitride layer and the pad silicon oxide layer. 16. The method according to item 15 of the scope of patent application, further comprising a lithography process step to form the trench. Page 14