JP3611226B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a highly reliable trench isolation structure and a method for manufacturing the same.
[0002]
[Prior art]
There is a LOCOS (Local Oxidation of Silicon) structure as a structure for electrically insulating and separating adjacent elements on a semiconductor substrate. This structure is formed by selectively oxidizing the substrate surface to form a thick thermal oxide film, and is used in many semiconductor devices. However, this LOCOS structure has low processing accuracy, and is not suitable for an insulating isolation structure of a highly integrated semiconductor device that requires processing dimensional accuracy of a thermal oxide film like a deep submicron device. As an insulating isolation structure of a semiconductor device that requires high integration, a shallow groove is formed on the substrate surface as disclosed in, for example, Japanese Patent Laid-Open No. 63-143835 instead of the LOCOS structure, and the groove portion is selectively oxidized. Thus, a so-called selective oxidation method trench isolation structure for forming a thermal oxide film has begun to be adopted.
[0003]
This groove isolation structure has an advantage that an element isolation oxide film having a smaller planar dimension can be formed as compared with the LOCOS structure, and is therefore suitable for manufacturing deep submicron devices that require a processing dimension accuracy of 0.5 μm or less.
[0004]
[Problems to be solved by the invention]
For example, when a silicon thermal oxide film is formed by oxidizing the surface of a silicon substrate that is a semiconductor substrate, a large mechanical stress is generated at the interface between the formed thermal oxide film and the silicon substrate. This is because when the silicon substrate (Si) is partially oxidized and changed into a thermal oxide film (SiO 2), the volume expansion is about twice. When this mechanical stress increases, crystal defects such as dislocations and stacking faults are likely to occur in the silicon substrate, thereby degrading the reliability of the semiconductor device. Further, it has been clarified that the oxidation reaction itself (diffusion behavior of oxidized species, reaction rate at the oxidation interface, etc.) changes the shape of the oxide film grown under the influence of stress. Since the generated stress is concentrated in the vicinity of the end point (corner point) of the two-dimensional or three-dimensional shape, special attention must be paid to crystal defects and shape changes in this stress concentration field.
[0005]
FIG. 1 is a schematic view of a manufacturing process of a groove separation structure in a conventional selective oxidation method. As shown in FIG. 1, in the conventional method, after an anti-oxidation film 3 is deposited on the surface of the silicon substrate 1 via a pad oxide film (silicon thermal oxide film) 2, oxidation of a region where an element isolation oxide film is to be formed is oxidized. The prevention film 3, the pad oxide film 2 and the silicon substrate 1 are partially removed to form a groove (FIG. 1B), and the groove portion is oxidized to form a silicon thermal oxide film 5. In this groove separation structure, an end point (corner point) always exists in the vicinity of the upper end or lower end of the groove of the substrate, so that a stress concentration field is formed in the vicinity of the end point (corner point). Due to the formation of this stress concentration field, the substrate shape particularly near the upper end of the groove may be oxidized to a shape 4 with a sharp angle as shown in FIG. After forming the oxide film for element isolation, as shown in FIG. 1D, electronic circuits such as transistors and capacitors are formed in the element formation region covered with the oxidation protection film 3. Such an acute angle portion 4 is formed on the substrate. If it remains on the surface, for example, A. As disclosed by Bryant et al. In “Technical Digest of IEDM '94, pp. 671-674”, electric field concentration occurs in this part during circuit operation, and the breakdown voltage characteristics of transistors and capacitors constituting the circuit are deteriorated. There is a case.
[0006]
An object of the present invention is to provide a semiconductor device having a trench isolation structure and a highly reliable semiconductor device that does not deteriorate the breakdown voltage characteristics of transistors and capacitors constituting a circuit and a method for manufacturing the same.
[0007]
[Means for Solving the Problems]
The object is achieved by preventing the substrate shape from being sharpened near the upper end of the element isolation groove on the surface of the semiconductor substrate. ◆
In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes the following steps. ◆
(1) A step of forming an antioxidant film on the circuit formation surface of the semiconductor substrate. ◆
A silicon substrate etc. can be considered as a semiconductor substrate. ◆
The film thickness of the anti-oxidation film needs to be a film thickness that does not oxidize all the anti-oxidation films in the oxidation process in the subsequent steps (4), (7) and the like. ◆
As the antioxidant film, a polycrystalline silicon thin film, a silicon nitride film or the like can be considered. A material that is easily oxidized, such as a polycrystalline silicon thin film, has a low restraining force against volume expansion accompanying the oxidation of the silicon substrate, and stress concentration at the upper end of the groove is reduced. In addition, a material that is not easily oxidized, such as a silicon nitride film, can be thinned because the amount of oxidation in the oxidation process is small.
[0008]
It is also effective to form a pad oxide film on the silicon substrate before forming the antioxidant film. When the pad oxide film is present, the lower end of the anti-oxidation film in contact with the pad oxide film and the vicinity of the upper end of the semiconductor substrate are sequentially oxidized from the groove end, so that a so-called bird's beak is formed, resulting in a curvature near the upper end of the semiconductor substrate. Is promoted.
[0009]
(2) A step of forming a groove having a predetermined depth such that a groove is formed in the semiconductor substrate at a desired position on the circuit formation surface of the semiconductor substrate. ◆
This groove can be formed by, for example, a normal exposure method using a photoresist and etching.
[0010]
(3) A step of removing corner portions formed on the circuit formation surface of the semiconductor substrate by the grooves. ◆
This step is not always necessary, but if the corners are removed by this step, the oxidation in the subsequent step (7) is often unnecessary.
[0011]
(4) A step of oxidizing the groove portion formed in the semiconductor substrate. ◆
By this oxidation, the groove portion is oxidized with a thickness of several nm to several tens of nm. By this oxidation, bird's beaks grow in the groove and a curvature is formed at the upper end of the groove.
[0012]
(5) A step of filling a buried insulating film inside the oxidized groove. ◆
It is desirable that the material used for the buried insulating film is basically an insulating material and has a low dielectric constant. This is because when a material having a high dielectric constant is used, a coupling capacitance formed when a wiring material is deposited on the upper portion in a later process is increased. From this point of view, a silicon oxide film or the like is preferable as the filling material, and polycrystalline silicon or the like is not preferable.
[0013]
(6) A step of removing the buried insulating film formed on the antioxidant film. ◆
The buried insulating film is etched back using a chemical mechanical polishing (CMP) method or a dry etching method. In this case, the antioxidant film serves as an etching stopper, and also has a function of preventing etching of the semiconductor substrate under the antioxidant film.
[0014]
(7) A step of oxidizing the semiconductor substrate from which the buried insulating film formed on the antioxidant film has been removed. ◆
By this step, the curvature of the upper end portion of the groove of the semiconductor substrate grows and the curvature is sufficient to prevent an increase in leakage current. This oxidation also has the effect of densifying the buried insulating film. ◆
If the curvature of the upper end of the groove of the semiconductor substrate is sufficient to prevent an increase in leakage current due to the oxidation in the previous step (4), this step is unnecessary. ◆
This step may be performed before the previous step (6) or after the next step (8). In the case where the process is performed after the next step (8), the surface of the semiconductor substrate is also oxidized at the same time. However, the oxide film formed on the surface of the semiconductor substrate is removed after the completion of the additional oxidation, thereby isolating elements. The film formation process is completed.
[0015]
(8) A step of removing the antioxidant film formed on the circuit formation surface of the semiconductor substrate. ◆
Since this step completes the step of forming the element isolation oxide film, a circuit such as a transistor is formed on the semiconductor substrate on which the element isolation oxide film is formed, thereby forming a semiconductor device.
[0016]
In order to achieve the above object, a semiconductor device according to the present invention is a semiconductor device in which an element isolation oxide film structure formed on a circuit formation surface of a semiconductor substrate is a groove isolation structure, and the circuit formation surface of the semiconductor substrate and The angle θ formed with the side surface of the semiconductor substrate in the depth direction of the grooves constituting the groove separation structure is configured to be in the range of 90 ° <θ <180 °. In addition, this configuration can prevent electric field concentration at the upper end of the groove, thereby preventing an increase in leak current due to deterioration in breakdown voltage characteristics of circuits such as transistors and capacitors formed on the semiconductor substrate.
[0017]
Further, by embedding the inside of the groove with an insulating material having a low dielectric constant such as silicon oxide, it is possible to reduce the coupling capacity of wirings formed on the semiconductor substrate, and to further improve the reliability of the semiconductor device. it can.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to examples shown in the drawings.
[0019]
【Example】
A manufacturing process of the MOS transistor according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 2 is a schematic diagram of the manufacturing process of the MOS transistor of the first embodiment, and FIG. 3 is a flowchart of the manufacturing process of the MOS transistor of the first embodiment.
[0020]
The manufacturing process of the MOS transistor of the first embodiment is as follows. ◆
(1) The surface of the silicon substrate 1 is thermally oxidized to form a pad oxide film 2 having a thickness of 10 to several tens of nm [FIGS. 3 (101) to (102)].
[0021]
(2) A polycrystalline silicon thin film 18 is deposited to a thickness of about 10 to 200 nm on the pad oxide film 2 (FIG. 3 (103)). This polycrystalline silicon thin film 18 is used as an antioxidant film when the element isolation thermal oxide film 5 is formed. Note that the formation of the pad oxide film 2 may be omitted, and the polycrystalline silicon film 18 may be deposited directly on the silicon substrate 1. ◆
The following description is based on the assumption that the pad oxide film 2 is formed. Therefore, when the formation of the pad oxide film 2 is omitted, the process relating to the pad oxide film 2 is not necessary.
[0022]
(3) A photoresist 19 is formed on the polycrystalline silicon film 18 (FIGS. 2B and 3104).
[0023]
(4) After removing the photoresist 19 in the region where the element isolation film is to be formed using a normal exposure method, the polycrystalline silicon thin film 18, the pad oxide film 2, and a part of the silicon substrate 1 are removed by etching. Shallow grooves having sidewalls having a predetermined angle (substantially about 60 to 90 degrees) are formed on the surface of the substrate 1 (FIGS. 2 (c) to (d) and FIGS. 3 (105) to (107)).
[0024]
(5) After removing the photoresist 19, thermal oxidation is performed to oxidize the groove formed on the surface of the silicon substrate 1 with a thickness of several nanometers to several tens of nanometers [FIGS. 2 (e) to (f) and FIG. 108) to (109)]. Note that the thickness of the polycrystalline silicon thin film 18 deposited as an antioxidant film is such that the polycrystalline silicon thin film 18 is entirely oxidized during the thermal oxidation and the entire silicon substrate 1 under the polycrystalline silicon thin film 18 is not oxidized. A film thickness sufficient to function as an antioxidant film must be ensured. At this time, the surface of the polycrystalline silicon thin film 18 is also oxidized. When the pad oxide film 2 is present, the lower end of the polycrystalline silicon thin film 18 in contact with the pad oxide film 2 and the silicon in the vicinity of the upper end of the silicon substrate 1 are oxidized in order from the groove end, so that a so-called bird's beak is formed. The curvature in the vicinity of the upper end of the substrate 1 is promoted. From this point of view, the pad oxide film 2 is preferably formed.
[0025]
(6) In this groove oxidation, the inside of the groove is not completely filled with the thermal oxide film. Therefore, in order to completely fill the inside of the groove with the thermal oxide film, the silicon oxide film is formed by, for example, chemical vapor deposition or sputtering. The insulating film 9 or the like is deposited to fill the trench interior (hereinafter, the insulating film 9 filling the trench interior is referred to as a buried insulating film 9) [FIG. 2 (g), FIG. 3 (110)]. It is desirable that the material used for the buried insulating film 9 is basically an insulating material and has a low dielectric constant. This is because when a material having a high dielectric constant is used, a coupling capacitance formed when a wiring material is deposited on the upper portion in a later process is increased. From this point of view, it is not preferable to use polycrystalline silicon as a filling material.
[0026]
(7) The buried insulating film 9 is etched back using a chemical mechanical polishing (CMP) method, a dry etching method, or the like [FIGS. 2 (g) and 3 (111)]. In this case, the polycrystalline silicon thin film 18 used as the antioxidant film serves as an etching stopper, and also has a function of preventing the silicon substrate 1 under the polycrystalline silicon thin film 18 from being etched.
[0027]
(8) When the curvature of the groove upper end portion 12 due to the bird's beak grown by oxidation of the groove portion of the silicon substrate 1 is sufficient to prevent increase in leakage current, the polycrystalline silicon thin film 18 and the pad oxide film 2 are removed. The formation process of the element isolation oxide film is completed [FIGS. 2 (h) (i), FIG. 3 (113)].
[0028]
In the case where the curvature of the groove upper end portion 12 due to bird's beak grown by oxidation of the groove portion of the silicon substrate 1 is not sufficient to prevent an increase in leakage current, the buried insulating film 9 is etched back and then thermally oxidized again (hereinafter referred to as additional oxidation). ) Is carried out [FIG. 2 (l), FIG. 3 (112)].
[0029]
In this case, since the buried insulating film 9 has already been formed inside the groove of the silicon substrate 1, the oxidation proceeds from the vicinity of the upper end portion 12 of the groove for the following reason, and the inside of the groove is hardly oxidized. That is, the inside of the trench is thermally oxidized through the buried insulating film 9, but in this case, compared with the case where the silicon substrate is directly oxidized, the oxidized species diffuses the buried insulating film 9 and reaches the silicon substrate 1. Therefore, the oxidation hardly proceeds in a short time such as several minutes. On the other hand, since there is a weak boundary layer at the junction of the buried oxide film 9 deposited on the groove sidewall and the upper surface of the groove by chemical vapor deposition or sputtering, the groove upper end portion 12 is oxidized along this weak boundary layer. The seeds can diffuse at a relatively high speed. As a result, the oxidized species are supplied to the groove upper end portion 12 in a short time (at an oxidation temperature of 850 ° C. for 10 minutes or more). Only the vicinity is oxidized, and the formation of the curvature of the groove upper end portion 12 is promoted.
[0030]
Further, this additional oxidation has an effect that the buried insulating film 9 is densified. Then, after the additional oxidation is completed, the polycrystalline silicon thin film 18 and the pad oxide film 2 are removed to complete the element isolation oxide film forming step [FIGS. 2 (m) and 3 (113)].
[0031]
This additional oxidation may be performed after removing the polycrystalline silicon thin film 18. In this case, the surface of the silicon substrate 1 is also oxidized at the same time, but the element isolation oxide film forming step is completed by removing the oxide film formed on the surface of the silicon substrate 1 after completion of the additional oxidation.
[0032]
(9) A transistor structure or the like is formed on the silicon substrate 1 [FIGS. 2 (j), (h), FIG. 3 (114) to (122)]. ◆
The manufacturing process of the transistor structure and the like is not particularly limited as long as it is a conventional manufacturing technique, but a typical manufacturing process of the MOS transistor structure will be described below.
[0033]
(A) As the gate oxide film 6, a silicon oxide film, a silicon nitride film, an oxynitride film, a ferroelectric thin film, or the like, or a laminate thereof is formed on the silicon substrate 1. ◆
These thin films can be formed by, for example, CVD. Further, the silicon oxide film may be formed by thermal oxidation of the silicon substrate 1.
[0034]
(B) After forming any one of a polycrystalline silicon thin film, a metal thin film such as tungsten, a silicide thin film, or a laminated body thereof, unnecessary portions are removed by etching or the like to form the gate electrode 7.
[0035]
(C) Impurity introduction, first-layer wiring 10 formation, interlayer insulating film 11 and the like are formed. Further, the second and subsequent wirings and insulating films are formed as necessary. ◆
The above MOS transistor can be used in a memory circuit such as a DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory) or an arithmetic circuit.
[0036]
According to the first embodiment, when forming a trench isolation structure as the element isolation oxide film structure in the manufacturing process of the MOS transistor, it is possible to prevent an acute angle portion from remaining in the vicinity of the trench upper end portion of the silicon substrate. By forming a curvature or obtuse angle near the top edge of the trench, it is possible to prevent an increase in leakage current or a decrease in breakdown voltage characteristics due to electric field concentration near the edge of the gate electrode film, thereby reducing the electrical reliability of the transistor. There is an effect that it can be improved.
[0037]
In the first embodiment, since the groove upper end portion of the silicon substrate before thermal oxidation is substantially perpendicular, the curvature near the groove upper end portion of the silicon substrate may not be sufficient. Since some polycrystalline silicon is easily oxidized, the restraint force on the volume expansion of the silicon substrate is lower than that of a material in which the antioxidant film is difficult to oxidize, and additional oxidation may not be required. Further, the grooves can be easily processed, and the productivity is excellent.
[0038]
Next, a manufacturing process of the MOS transistor according to the second embodiment of the present invention is shown in FIGS. FIG. 4 is a schematic diagram of the manufacturing process of the MOS transistor of the second embodiment, and FIG. 5 is a flowchart of the manufacturing process of the MOS transistor of the second embodiment.
[0039]
The manufacturing process of the MOS transistor of the second embodiment is obtained by changing (4) of the manufacturing process of the first embodiment as follows. Since the manufacturing process is the same as in the first embodiment except for (4), detailed description thereof is omitted.
[0040]
(4) After removing the photoresist 19 in the region where the element isolation film is to be formed using a normal exposure method, the polycrystalline silicon thin film 18, the pad oxide film 2, and a part of the silicon substrate 1 are removed by etching. A shallow groove is formed on the surface of the substrate 1. In this groove formation on the silicon substrate surface, isotropic etching is performed in the vicinity of the groove upper end, a curvature is formed in the vicinity of the groove upper end, and then anisotropic etching is performed to form an inclined portion such as the isotropic etching portion 13. A groove shape is formed. In addition, the angle of the groove side wall in the vicinity of the groove lower end is not necessarily 90 degrees, and a predetermined inclination (substantially in the range of 60 to 90 degrees) may be formed [FIG. (E), FIG. 5 (205)-(207)].
[0041]
In the second embodiment, the etching process at the time of forming the shallow groove is more complicated than the first embodiment, but the isotropic etching portion 13 is provided at the upper end of the groove of the silicon substrate 1 at the time of forming the shallow groove as described above. As a result, the oxidation of the upper end of the groove of the silicon substrate 1 in the first thermal oxidation is promoted, and the necessity for additional oxidation is further reduced.
[0042]
Next, a manufacturing process of the MOS transistor according to the third embodiment of the present invention will be described with reference to FIGS. FIG. 6 is a schematic diagram of the manufacturing process of the MOS transistor of the third embodiment, and FIG. 7 is a flowchart of the manufacturing process of the MOS transistor of the third embodiment.
[0043]
The manufacturing process of the MOS transistor of the third embodiment is as follows. ◆
(1) The surface of the silicon substrate 1 is thermally oxidized to form a pad oxide film 2 having a thickness of 10 to several tens of nm [FIGS. 7 (301) to (302)].
[0044]
(2) A silicon nitride film 17 having a high oxidation resistance is deposited on the pad oxide film 2 to a thickness of about 10 to 200 nm [FIG. 7 (103)]. This silicon nitride film 17 is used as an antioxidant film when the element isolation thermal oxide film 5 is formed. Alternatively, the formation of the pad oxide film 2 may be omitted, and the silicon nitride film 17 having high oxidation resistance may be deposited directly on the silicon substrate 1. Alternatively, the silicon nitride film 17 is deposited through the pad oxide film 2 and the polycrystalline silicon thin film or only through the polycrystalline silicon thin film. In either case, the silicon nitride film 17 is formed on the outermost surface.
[0045]
The following description is based on the assumption that the polycrystalline silicon thin film and the pad oxide film 2 are formed. Therefore, when the formation of the polycrystalline silicon thin film and the pad oxide film 2 is omitted, the steps relating to the polycrystalline silicon thin film and the pad oxide film 2 are not necessary.
[0046]
(3) A photoresist 19 is formed on the silicon nitride film 17 (FIGS. 6B and 7304).
[0047]
(4) Using a normal exposure method, after removing the photoresist 19 in the region where the element isolation film is to be formed, the silicon nitride film 17, the pad oxide film 2 and the polycrystalline silicon thin film are removed by etching. Next, the photoresist is removed, and a shallow groove is formed on the surface of the silicon substrate 1 using a dry etching method. In this groove formation on the silicon substrate surface, isotropic etching is performed in the vicinity of the groove upper end, a curvature is formed in the vicinity of the groove upper end, and then anisotropic etching is performed to form an inclined portion such as the isotropic etching portion 13. A groove shape is formed. In addition, the angle of the groove side wall in the vicinity of the groove lower end is not necessarily 90 degrees, and a predetermined inclination (substantially in the range of 60 to 90 degrees) may be formed [FIG. (E), FIG. 7 (305)-(308)].
[0048]
(5) After removing the photoresist 19, thermal oxidation is performed to oxidize the groove formed on the surface of the silicon substrate 1 to a thickness of several nanometers to several tens of nanometers [FIGS. 6 (e) to (f) and FIG. 309)]. The film thickness of the silicon nitride film 17 as an antioxidant film functions as an antioxidant film so that the silicon nitride film 17 is entirely oxidized during the thermal oxidation and the entire silicon substrate 1 under the silicon nitride film 17 is not oxidized. A sufficient film thickness must be ensured. Since the silicon nitride film 17 has high oxidation resistance, it can be made thinner than the polycrystalline silicon thin film 18 of the first and second embodiments. When the pad oxide film 2 is present, the silicon near the upper end portion of the silicon substrate 1 in contact with the pad oxide film 2 and the lower end of the polycrystalline silicon thin film are oxidized in order from the groove end to form a so-called bird's beak, resulting in the silicon substrate. Curvature in the vicinity of the upper end of 1 is promoted. From this point of view, the pad oxide film 2 is preferably formed.
[0049]
(6) In this groove oxidation, the inside of the groove is not completely filled with the thermal oxide film. Therefore, in order to completely fill the inside of the groove with the thermal oxide film, the silicon oxide film is formed by, for example, chemical vapor deposition or sputtering. The insulating film 9 is deposited to fill the inside of the groove (hereinafter, the insulating film 9 filling the inside of the groove is referred to as a buried insulating film 9) [FIG. 6 (g), FIG. 7 (310)]. It is desirable that the material used for the buried insulating film 9 is basically an insulating material and has a low dielectric constant. This is because when a material having a high dielectric constant is used, a coupling capacitance formed when a wiring material is deposited on the upper portion in a later process is increased. From this point of view, it is not preferable to use polycrystalline silicon as a filling material.
[0050]
(7) If the curvature of the groove upper end portion 12 by the bird's beak grown by oxidation of the groove portion of the silicon substrate 1 is sufficient to prevent increase in leakage current, the remaining silicon nitride film is etched back after the embedded insulating film 9 is etched back 17. The step of forming the element isolation oxide film is completed by removing the polycrystalline silicon and the pad oxide film 2 (FIGS. 6H, 7I, and 313).
[0051]
If the curvature of the groove upper end portion 12 due to bird's beak grown by oxidation of the groove portion of the silicon substrate 1 is not sufficient to prevent increase in leakage current, thermal oxidation (hereinafter referred to as additional oxidation hereinafter) is performed again before the buried insulating film 9 is etched back. (Fig. 6 (l), Fig. 7 (312)).
[0052]
In this case, since the buried insulating film 9 has already been formed inside the groove of the silicon substrate 1, the oxidation proceeds from the vicinity of the upper end portion 12 of the groove for the following reason, and the inside of the groove is hardly oxidized.
[0053]
That is, the inside of the trench is thermally oxidized through the buried insulating film 9, but in this case, compared with the case where the silicon substrate is directly oxidized, the oxidized species diffuses the buried insulating film 9 and reaches the silicon substrate 1. Therefore, the oxidation hardly proceeds in a short time such as several minutes. On the other hand, since there is a weak boundary layer at the junction of the buried oxide film 9 deposited on the groove side wall and the upper surface of the groove by chemical vapor deposition or sputtering, the groove upper end portion 12 is oxidized along this weak boundary layer. The seeds can diffuse at a relatively high speed. As a result, the oxidized species are supplied to the groove upper end portion 12 in a short time (at an oxidation temperature of 850 ° C. for 10 minutes or more). Only the vicinity is oxidized, and the formation of the curvature of the groove upper end portion 12 is promoted.
[0054]
In the case where the curvature of the groove upper end portion 12 due to the bird's beak grown by this additional oxidation is sufficient to prevent an increase in leakage current, the buried insulating film 9 is etched back, and then the remaining silicon nitride film 17, polycrystalline silicon, and pad oxidation By removing the film 2, the process for forming the element isolation oxide film is completed [FIG. 6 (m), FIG. 7 (313)]. ◆
This additional oxidation is not necessarily performed before the buried insulating film 9 is etched back, and may be performed after the buried insulating film 9 is etched back as in the first embodiment.
[0055]
(8) A transistor structure or the like is formed on the silicon substrate 1 (FIGS. 6 (j) and (n), FIGS. 7 (314) to (322)). ◆
The manufacturing process of the transistor structure and the like is not particularly limited as long as it is a conventional manufacturing technique, but a typical manufacturing process of the MOS transistor structure will be described below.
[0056]
(A) As the gate oxide film 6, a silicon oxide film, a silicon nitride film, an oxynitride film, a ferroelectric thin film, or the like, or a laminate thereof is formed on the silicon substrate 1. ◆
These thin films can be formed by, for example, CVD. Further, the silicon oxide film may be formed by thermal oxidation of the silicon substrate 1.
[0057]
(B) After forming any one of a polycrystalline silicon thin film, a metal thin film such as tungsten, a silicide thin film, or a laminated body thereof, unnecessary portions are removed by etching or the like to form the gate electrode 7.
[0058]
(C) Impurity introduction, first-layer wiring 10 formation, interlayer insulating film 11 and the like are formed. Further, the second and subsequent layers of wiring and insulating films are formed as necessary.
[0059]
The above MOS transistor can be used for a memory circuit such as a DRAM (Dynamic Random Access Memory) and an SRAM (Static Random Access Memory) or an arithmetic circuit.
[0060]
In the third embodiment, when forming the trench isolation structure as the element isolation oxide film structure in the manufacturing process of the MOS transistor, it is possible to prevent an acute angle portion from remaining in the vicinity of the upper end of the trench of the silicon substrate. By forming a curvature or obtuse angle near the top of the trench, it is possible to prevent an increase in leakage current or a decrease in breakdown voltage characteristics due to electric field concentration near the end of the gate electrode film, thereby improving the electrical reliability of the transistor. There is an effect that can be done.
[0061]
According to the third embodiment, since the silicon nitride film 17 having high oxidation resistance is used as the antioxidant film, the thickness of the antioxidant film can be reduced, and the antioxidant film can be easily removed in the final process. become.
[0062]
In addition, as in the second embodiment, the third embodiment complicates the etching process when forming the shallow groove. However, as described above, the isotropic etching portion 13 is formed at the upper end of the silicon substrate 1 when forming the shallow groove. By providing, the oxidation of the upper end of the groove of the silicon substrate 1 in the first thermal oxidation is promoted, and the necessity for additional oxidation is further reduced.
[0063]
Next, a manufacturing process of the MOS transistor according to the fourth embodiment of the present invention will be described with reference to FIGS. FIG. 8 is a schematic diagram of the manufacturing process of the MOS transistor of the fourth embodiment, and FIG. 9 is a flowchart of the manufacturing process of the MOS transistor of the third embodiment.
[0064]
(4) Using a normal exposure method, after removing the photoresist 19 in the region where the element isolation film is to be formed, the silicon nitride film 17, the pad oxide film 2 and the polycrystalline silicon thin film are removed by etching. Next, the photoresist is removed, and a shallow groove is formed on the surface of the silicon substrate 1 using a dry etching method. Note that the angle of the groove side wall in the vicinity of the groove lower end is not necessarily 90 degrees, and a predetermined inclination (substantially in the range of 60 to 90 degrees) may be formed [FIG. (E), FIG. 9 (405)-(408)].
[0065]
According to the fourth embodiment, since the silicon nitride film 17 having high oxidation resistance is used as the antioxidant film as in the third embodiment, the thickness of the antioxidant film can be reduced, and oxidation in the final process is performed. Removal of the prevention film is facilitated. ◆
Further, the fourth embodiment is easy to process the groove and is excellent in productivity.
[0066]
【The invention's effect】
According to the present invention, in a semiconductor device having a trench isolation structure, it is possible to provide a semiconductor device that does not deteriorate the breakdown voltage characteristics of transistors and capacitors constituting a circuit, and a method for manufacturing the same.
[Brief description of the drawings]
FIG. 1 is a schematic view of a manufacturing process of a groove separation structure in a conventional selective oxidation method.
FIG. 2 is a schematic view of a manufacturing process of the MOS transistor of the first embodiment according to the present application.
FIG. 3 is a flowchart of a manufacturing process of the MOS transistor according to the first embodiment of the present application.
FIG. 4 is a schematic diagram of a manufacturing process of a MOS transistor according to a second embodiment of the present application.
FIG. 5 is a flowchart of manufacturing steps of a MOS transistor according to a second embodiment of the present application.
FIG. 6 is a schematic diagram of a manufacturing process of a MOS transistor according to a third embodiment of the present application.
FIG. 7 is a flowchart of manufacturing steps of a MOS transistor according to a third embodiment of the present application.
FIG. 8 is a schematic view of a manufacturing process of the MOS transistor of the fourth embodiment according to the present application.
FIG. 9 is a flowchart of manufacturing steps of a MOS transistor according to a fourth embodiment of the present application.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... Pad oxide film, 6 ... Gate oxide film, 9 ... Embedded insulating film, 12 ... Groove upper end part, 13 ... Isotropic etch part, 17 ... Silicon nitride film, 18 ... Polycrystalline silicon film, 19: Photoresist.

Claims (7)

A method of manufacturing a semiconductor device including the following steps.
(1) A step of forming an antioxidant film on the circuit formation surface of the semiconductor substrate on which the pad oxide film is formed.
(2) A step of removing the antioxidant film and the pad oxide film at desired positions on the circuit formation surface of the semiconductor substrate.
(3) A groove is formed in the region from which the pad oxide film has been removed, the formed groove is oxidized, and the surface is formed by oxidation on the surface of the groove upper portion and the inner wall of the semiconductor substrate where the curvature is formed. Forming a groove having the oxidized film.
(4) A step of depositing an insulating film on the circuit forming surface of the semiconductor substrate and embedding the insulating film in the trench having the oxide film.
(5) A step of removing the insulating film formed over the antioxidant film and over the trench in which the insulating film is embedded until reaching the antioxidant film.
(6) A step of heat-treating and oxidizing the semiconductor substrate having the surface of the insulating film and the antioxidant film formed by the removal to form the upper part of the groove having a curvature gentler than the curvature.
(7) A step of removing the antioxidant film and the pad oxide film.
(8) A step of forming a transistor on the semiconductor substrate from which the pad oxide film has been removed. A method of manufacturing a semiconductor device including the following steps.
(1) A step of forming an antioxidant film on the circuit formation surface of the semiconductor substrate on which the pad oxide film is formed.
(2) A step of removing the anti-oxidation film and the pad oxide film on a circuit formation surface of the semiconductor substrate and in a region where an element isolation region between element formation regions is formed.
(3) A groove having a predetermined depth is formed on the semiconductor substrate in a region where the pad oxide film has been removed by using isotropic etching and anisotropic etching, and the formed groove is oxidized to obtain a curvature. Forming a groove having the oxidized oxide film on the surface of the groove upper portion and the inner wall of the formed semiconductor substrate ;
(4) A step of depositing an insulating film on the circuit forming surface of the semiconductor substrate and embedding the insulating film in the trench having the oxide film.
(5) A step of removing the insulating film formed on the antioxidant film and on the trench in which the insulating film is buried until the antioxidant film is reached.
(6) A step of oxidizing the semiconductor substrate having the surface of the insulating film and the antioxidant film formed by the removal by heat treatment.
(7) A step of removing the antioxidant film and the pad oxide film.
(8) A step of forming a gate insulating film on the semiconductor substrate from which the pad oxide film has been removed and a gate electrode on the gate insulating film. A method of manufacturing a semiconductor device including the following steps.
(1) A step of forming an antioxidant film on the circuit formation surface of the semiconductor substrate on which the pad oxide film is formed.
(2) The anti-oxidation film and the pad oxide film at a desired position on the circuit formation surface of the semiconductor substrate are removed, and the corner of the upper end is removed from the semiconductor substrate in the region where the pad oxide film is removed. Forming a groove having the oxide film formed by oxidation on the surface of the groove upper portion and the inner wall of the semiconductor substrate on which the curvature is formed.
(4) A step of depositing an insulating film on the circuit forming surface of the semiconductor substrate and embedding the insulating film in the trench having the oxide film.
(5) The semiconductor substrate having the insulating film formed over the antioxidant film and the groove in which the insulating film is embedded is oxidized to form the upper part of the groove having a curvature increased from the curvature. Process.
(6) A step of removing the insulating film formed on the antioxidant film and on the trench in which the insulating film is embedded.
(7) A step of removing the antioxidant film and the pad oxide film.
(8) A step of forming a gate insulating film on the semiconductor substrate from which the pad oxide film has been removed and a gate electrode on the gate insulating film. The method of manufacturing a semiconductor device according to any one of claims 1 to 3,
A method of manufacturing a semiconductor device, comprising a step of forming a polycrystalline silicon layer between the antioxidant film and the pad oxide film. The method of manufacturing a semiconductor device according to any one of claims 1 to 4,
The method of manufacturing a semiconductor device, wherein the antioxidant film is polycrystalline silicon. The method of manufacturing a semiconductor device according to any one of claims 1 to 5,
The method of manufacturing a semiconductor device, wherein the gate electrode is a stacked body. In the manufacturing method of the semiconductor device according to any one of claims 1 to 6,
A method of manufacturing a semiconductor device, characterized in that an angle θ formed by a circuit formation surface of the semiconductor substrate and a side surface of the semiconductor substrate in the depth direction of the groove is in a range of 90 ° <θ <180 °.

Images