TW453144B - A method and an arrangement for the electrical contact of components - Google Patents
A method and an arrangement for the electrical contact of components Download PDFInfo
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- TW453144B TW453144B TW088111376A TW88111376A TW453144B TW 453144 B TW453144 B TW 453144B TW 088111376 A TW088111376 A TW 088111376A TW 88111376 A TW88111376 A TW 88111376A TW 453144 B TW453144 B TW 453144B
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- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
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- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10439—Position of a single component
- H05K2201/10477—Inverted
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
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- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Computer Hardware Design (AREA)
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- Materials Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
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Description
453 1 4 4 五、發明說明(l) ------ 發明領域 本發明係關於一種方法,該方法係用於將一個元件,廷 如一個晶片或類似元件,以一種緊密設計的方式連 : 個載體之一個導電載體表面,譬如在一個印刷電路板上: 一個接地平面或類似載體。本發明亦關於以一種緊密設計 方式連接一個元件之配置,以便使該元件與一個载體(兹 如在一個晶片與一個印刷電路板)之間得以且有 s 背景技藝之說明 已知如何將基質1以及晶片2連接至印刷電路板3上。 緊密設計中,分離元件/晶片以多層陶瓷載體基質而安 至介於該基質與印刷電路板之間的基質之下層,其中元 所散發之熱量可被單獨傳導至基質,並自該處傳導至電路 板以及各種連接(譬如位於基質與電路板之間的連接)在高 溫時熔化之焊錫的接觸針腳或錫珠4。連接可為電氣連接 與機械隔間方法,元件可藉由提供電路板一個接地平面5 (緊臨在元件之下)而被遮蔽,接地平面5(以及各自元件的 接地平面)用於遮蔽該元件並使該分離元件不與接地平面 相接觸。基質安裝元件在運作中容易產生熱量,因此一件 重要的事為:元件/晶片以及印刷電路板與其寬銅表面之 間所連成的熱接觸應為儘可能有效。由於分離元件並未與 電路板直接接觸,該元件所產生之大部份熱量必須經由基 質與電路板連接而傳送至電路板。在陶瓷基質之情況下, 由瓷係一種相對> 較差的熱導體,最大溫度變化率發生 在k洽元件之基質的縱;向。由於陶瓷基質相對較差的熱 4 53144 五、發明說明(2) 傳導係數之故,使得元件中之電晶體在極高 造成損壞。 门/皿度下極容易 發明總結 ^求保護-個安裝在連接至一個載體(例如一塊印刷電 之陶究基質的元件(例如一塊晶片),避免元件由 於陶瓷,限的熱導係數而損壞,晶片已經以—塊提供至電 路板之最短路徑的薄層而直接連接到印刷電曰
Ob t 曰曰 /7 電路板的直接連接可由焊接晶片而達成,以便其高度 (臨界曰的)實質上將等於連接之高度,而達成,並;經:直 片之後部以一薄層接著劑或焊錫直接連接至電路板 達成L —個可接受的基質地面可以藉由將晶片之後部金 化並使晶片後部與印刷電路板上的接地平面之間的連接 可以電氣傳導取得。 現將參考較佳之具體實施例以及附圖加說明本 圖示簡述 圖1表示依據已知之技術而製作之連接至一個載體安裝 基質之晶片。 圖2表示一個連接至一個基質之晶片,其中之基質依據 發明而安裝於並連接至一個載體。 圖3表示一個連接至一個基質之晶片,其中之基質依據 發明而安裝於並連接至一個載體安裝冷卻元件。 較佳具體實施例之說明 為求因應一個緊密>設計(例如—種特別設計用於電話或 其他相似應用之具體實i例)之需求,本發明創造一種新
第5頁 α 53 1 4 4 Ο 6 / 案號 881U 376
:ί S 修正 五、發明說明(3) : 一— .二d 式模組,其中分離元件/晶片6已經安裝在一個載體基質7 (由數種陶究層所組合而成,陶曼層位於該基質與一個印 刷電路板8之間)之下層,以與該板相接觸。在此情況下, 基質與印刷電路板之間的連接亦由在高溫下熔化的焊錫之 錫珠9所組成。錫珠係作為一種電氣連接並作為一種機械 隔間方法(實際上稍大於所有其他位於基質下表面之分離 元件)。印刷電路板可包含直接位於基質安裝晶片下方之 接地平面1 0 (與晶片之接地平面一起對晶片之敏感部份提 供電氣遮蔽作用)。為求改進晶片之熱特性以及電特性, 晶片經由一個薄導電層11之協助而直接連接至電路板,由 於陶瓷基質有限之熱導係數8此舉將提供一條通至電路板 之絕對最短熱路徑。晶片之直接連接可由調適晶片高度 (可能為臨界的)而達成,以便焊接晶片之高度可幾乎與錫 珠,或錫球之高度相等,並將晶片之後表面以一個接著劑 或焊錫之薄導電層直接固定至電路板。當晶片之後表面被 金屬化,且晶片之後表面與電路板之地球表®二者之間的 連接可傳導電能,則在此同時可使晶片基質有效接地。當 晶片6之後表面被金屬化且與電路板8之間具有導電連接 1 1 ,則位於電路板之上或之内的特定晶片冷卻元件1 2便可 直接連接至晶片。 晶片與電路板之間的接觸或許主要可以兩種方式而影響 :黏著或焊接。若與焊接模組之方式相結合,晶片可以借 由引入許多額外製作步驟而被穩固地黏著在定位(在此之 前必需先對電路板提供錫膏(例如以加壓方式),並在將黏
O:\59\59307.ptc 第6頁 2001.07. 05. 006
453144 _案號 88111376 五、發明說明(4) 著 劑 塗 佈 在 用 於 放 置 晶 片 的 電 路 板 之 後 〇 所 使 用 之 黏著 劑 或 膠 質 可 便 利 地 為 ' 種 可 與 再 熔 化 過 程 — 併 改 正 之 形式 〇 晶 片 之 背 面 並 不 需 要 電 氣 傳 導 接 觸 以 便 於 晶 片 與 電 路板 之 間 取 得 單 獨 孰 接 觸 0 秋 而 當 需 要 晶 片 之 有 效 基 質 接地 時 ) 一 個 後 背 接 觸 在 與 — 個 電 氣 傳 導 黏 著 劑 之 接 觸 上 是必 須 的 〇 晶 片 可 被 早 獨 地 焊 接 至 電 路 板 上 而 不 需 任 何 額 外 處理 程 序 〇 坱 而 J 晶 片 卻 必 需 具 有 — 個 可 焊 接 之 後 背 接 觸 ,且 晶 片 必 須 以 一 個 底 部 填 充 方 式 固 定 至 陶 瓷 基 質 » 以 使 晶片 並 移 動 出 其 位 置 (當低熔點焊錫之錫珠或錫球: |所謂的 f 1 1P c h 1P b um ps 再 熔 化 之 時 所 發 生 之 移 位)之危F k 。既声 % 一 個 地 球 表 面 以 經 出 現 在 晶 片 之 下 7 因 此 焊 接 過 程 本質 上 相 當 簡 單 的 〇 所 有 可 能 必 須 之 事 項 僅 為 在 晶 片 底 部之 保 護 層 上 製 作 一 個 開 口 1 並 於 此 區 域 應 加 入 一 個 錫 膏 0 應 瞭 解 的 是 本 發 明 並 不 限於 前 述 以 及 說 明 之 具 體 實施 例 ί 且 於 所 附 之 中 請 專 利 範 圍 中 仍 可 有 許 多 變 化 0 圖 式 主 要 元 件 符 號 說 明 1 基 質 2 晶 片 3 印 刷 電 路 板 4 錫 珠 5 接 地 平 面 6 晶 片 7 基 質 8 印 刷 電 路 板 9 錫 珠 1 0 接 地 平 面 11 導 電 層 1 2 冷 卻 元 件
O:\59\59307.ptc 第 7 頁 2001.07. 05. 007
Claims (1)
- 六、申請專利範圍 1 · 一種用於改良 個或多伽, 一個印刷電路板)上之基質的_連接至安裝於一載體(例如 片)之熱特性與/或電氣特性 '之疋件(例如一個晶片或多個晶 晶片連接至位於載體上之導方法’其特徵為將該元件/ 上的一個導電表面。 表面,例如一個印刷電路板 2 ·如申請專利範圍第1項之 晶片連接至一個位於栽體上 方法’其特徵為將該元件/ 電路板上的接地平面,其係 電導表面,例如連接至印刷 3.如申請專利範圍第j項=用焊錫或電導黏膠。 晶片連接至一個位於截钟L 方法’其特徵為將該元件/ J、秋體上之Iβ 印刷電路板上的熱傳導表面 *、'、得導表面,例如連接至一 4*如申請專利範圍第1項之方φ甘& 晶片黏接至該载體上之傳導表面^ 、特徵為將該凡件/ 5 ‘如申請專利範圍第夕士、+ ^ 電導性。 弟項之方法,其特徵為該黏膠具有 6.、 一種用於改良一個或多個元件(例如連接至安裝於一 個載體(例如一塊印刷電路板)上的基質之晶片)之熱特性 與/或電特性之配置’其特徵為提供一個導電層(1丨)於該 元件/晶片(6)與該載體(例如一塊印刷電路板(8 ))之間, 用以作為該元件或晶片與該載體/印刷電路板之間的導電 表面接觸。 Ί.如申請專利範圍第6項之配置’其特徵為該導電層 (U)為一個電氣傳導層。 8 如申請專利範圍第έ項之配置,其特徵為該導電層453 14 4 六、申請專利範圍 --- (11)為一個熱傳導層。 9. 如申請專利範圍第7項之配置’其特微為該導電層 (1 1 )被設計與該晶片(6 )之間以一個位於印刷電路板之上 或之内的一個接地平面(10)相連接。 10. 如申請專利範圍第8項之配置,其特徵為該導電層 (11 )被設計與該晶片(6)之間以一個位於印刷電路板之^ 或之内的一個冷卻元素(12)相連接。第9頁
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9900962A SE516139C2 (sv) | 1999-03-17 | 1999-03-17 | Förfarande och anordning för att förbättra termiska och elektriska egenskaper hos komponenter förbunda med ett substrat monterat på en bärare |
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TW453144B true TW453144B (en) | 2001-09-01 |
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Application Number | Title | Priority Date | Filing Date |
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TW088111376A TW453144B (en) | 1999-03-17 | 1999-07-05 | A method and an arrangement for the electrical contact of components |
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US (1) | US6285554B1 (zh) |
EP (1) | EP1192842A1 (zh) |
JP (1) | JP2002539631A (zh) |
KR (1) | KR100733684B1 (zh) |
CN (1) | CN1343440A (zh) |
AU (1) | AU3852000A (zh) |
CA (1) | CA2368057A1 (zh) |
HK (1) | HK1045624A1 (zh) |
SE (1) | SE516139C2 (zh) |
TW (1) | TW453144B (zh) |
WO (1) | WO2000056130A1 (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6472743B2 (en) * | 2001-02-22 | 2002-10-29 | Siliconware Precision Industries, Co., Ltd. | Semiconductor package with heat dissipating structure |
US20050057907A1 (en) * | 2003-09-12 | 2005-03-17 | Hewlett-Packard Development Company, L.P. | Circuit board assembly |
US7345891B2 (en) | 2003-10-07 | 2008-03-18 | Hewlett-Packard Development Company, L.P. | Circuit board assembly |
US7061126B2 (en) * | 2003-10-07 | 2006-06-13 | Hewlett-Packard Development Company, L.P. | Circuit board assembly |
US7056144B2 (en) | 2004-02-19 | 2006-06-06 | Hewlett-Packard Development Company, L.P. | Offset compensation system |
DE102006018709B3 (de) * | 2006-04-20 | 2007-10-11 | Nft Nanofiltertechnik Gmbh | Wärmetauscher |
US7742310B2 (en) * | 2006-09-29 | 2010-06-22 | Hewlett-Packard Development Company, L.P. | Sequencer |
US7397666B2 (en) * | 2006-10-25 | 2008-07-08 | Hewlett-Packard Development Company, L.P. | Wedge lock |
JP6569375B2 (ja) | 2015-08-11 | 2019-09-04 | 株式会社ソシオネクスト | 半導体装置、半導体装置の製造方法及び電子装置 |
Family Cites Families (16)
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US4855867A (en) | 1987-02-02 | 1989-08-08 | International Business Machines Corporation | Full panel electronic packaging structure |
US5170931A (en) * | 1987-03-11 | 1992-12-15 | International Business Machines Corporation | Method and apparatus for mounting a flexible film semiconductor chip carrier on a circuitized substrate |
US4868349A (en) * | 1988-05-09 | 1989-09-19 | National Semiconductor Corporation | Plastic molded pin-grid-array power package |
JPH02271558A (ja) | 1989-04-12 | 1990-11-06 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US5045921A (en) | 1989-12-26 | 1991-09-03 | Motorola, Inc. | Pad array carrier IC device using flexible tape |
JPH0548000A (ja) * | 1991-08-13 | 1993-02-26 | Fujitsu Ltd | 半導体装置 |
US5757620A (en) * | 1994-12-05 | 1998-05-26 | International Business Machines Corporation | Apparatus for cooling of chips using blind holes with customized depth |
US5517753A (en) * | 1995-04-06 | 1996-05-21 | International Business Machines Corporation | Adjustable spacer for flat plate cooling applications |
US5572405A (en) * | 1995-06-07 | 1996-11-05 | International Business Machines Corporation (Ibm) | Thermally enhanced ball grid array package |
US5633533A (en) * | 1995-07-26 | 1997-05-27 | International Business Machines Corporation | Electronic package with thermally conductive support member having a thin circuitized substrate and semiconductor device bonded thereto |
US5724230A (en) * | 1996-06-21 | 1998-03-03 | International Business Machines Corporation | Flexible laminate module including spacers embedded in an adhesive |
US5825087A (en) * | 1996-12-03 | 1998-10-20 | International Business Machines Corporation | Integral mesh flat plate cooling module |
US5786635A (en) * | 1996-12-16 | 1998-07-28 | International Business Machines Corporation | Electronic package with compressible heatsink structure |
US5834839A (en) * | 1997-05-22 | 1998-11-10 | Lsi Logic Corporation | Preserving clearance between encapsulant and PCB for cavity-down single-tier package assembly |
US5854507A (en) * | 1998-07-21 | 1998-12-29 | Hewlett-Packard Company | Multiple chip assembly |
US6122171A (en) * | 1999-07-30 | 2000-09-19 | Micron Technology, Inc. | Heat sink chip package and method of making |
-
1999
- 1999-03-17 SE SE9900962A patent/SE516139C2/sv not_active IP Right Cessation
- 1999-07-05 TW TW088111376A patent/TW453144B/zh not_active IP Right Cessation
-
2000
- 2000-03-13 KR KR1020017011648A patent/KR100733684B1/ko not_active IP Right Cessation
- 2000-03-13 EP EP00917564A patent/EP1192842A1/en not_active Withdrawn
- 2000-03-13 CN CN00805087A patent/CN1343440A/zh active Pending
- 2000-03-13 JP JP2000605451A patent/JP2002539631A/ja not_active Abandoned
- 2000-03-13 CA CA002368057A patent/CA2368057A1/en not_active Abandoned
- 2000-03-13 WO PCT/SE2000/000493 patent/WO2000056130A1/en active Application Filing
- 2000-03-13 AU AU38520/00A patent/AU3852000A/en not_active Abandoned
- 2000-03-16 US US09/527,572 patent/US6285554B1/en not_active Expired - Lifetime
-
2002
- 2002-09-27 HK HK02107164.3A patent/HK1045624A1/zh unknown
Also Published As
Publication number | Publication date |
---|---|
KR100733684B1 (ko) | 2007-06-28 |
SE9900962D0 (sv) | 1999-03-17 |
CA2368057A1 (en) | 2000-09-21 |
CN1343440A (zh) | 2002-04-03 |
SE516139C2 (sv) | 2001-11-26 |
US6285554B1 (en) | 2001-09-04 |
JP2002539631A (ja) | 2002-11-19 |
AU3852000A (en) | 2000-10-04 |
EP1192842A1 (en) | 2002-04-03 |
WO2000056130A1 (en) | 2000-09-21 |
HK1045624A1 (zh) | 2002-11-29 |
KR20010112322A (ko) | 2001-12-20 |
SE9900962L (sv) | 2000-09-18 |
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