TW432658B - Leadless semiconductor chip package structure - Google Patents

Abstract

A leadless semiconductor chip packaging structure comprises a lead frame for supporting a semiconductor chip. The lead frame comprises a chip bearing seat and a plurality of wires. The surface of the lead frame is installed with a cupric oxide cover layer, in which the lower surface of the lead frame and the inner end of the plurality of wires are exposed to the cupric oxide cover layer. The semiconductor chip is electrically connected to the inner end of the plurality of wires through a plurality of connection wires. The lead frame, the semiconductor chip and the plurality of connection wires are wrapped by an encapsulation so that the lower surface of the lead frame is exposed to the encapsulation. The cupric oxide cover layer is used to increase the bonding adhesion between the lead frame and the encapsulation.

Description

^ 432658 V. Description of the invention (1) Field of the invention: The present invention relates to a semiconductor chip package structure, and more particularly to a leadless semiconductor chip package. The lead frame and the sealing compound have Better binding adhesion. Prior art: The first diagram is a conventional semiconductor chip package structure, which includes a lead frame for carrying a chip 100. The lead frame includes a plurality of leads having outer leads portion 106 and inner legs 107. The chip 1 0 0 is fixed and fixed to a chip holder 1 by silver glue 11 4 _ It is connected to the lead frame with several branch ribs (not shown in the middle) 1 0 6 is used to be electrically connected to an external circuit. The wafer 100 has a plurality of wafer pads 1 1 7 electrically connected to the inner leg portion 107 of the lead frame by a plurality of bonding wires 115. The crystal moon 100, the wafer holder 1 1 1, the inner leg portion 107 of the lead frame, and the plurality of connecting wires 1 1 5 are covered with a piece of gel 1 16. The sealing compound 11 6 is made of an insulating material such as an epoxy resin. Since the sealing compound 1 1 6 completely surrounds the wafer 100, the heat generated by the normal operation of the wafer 100 must completely pass through the wafer 100. The sealing compound 116 comes out, and due to the insulating properties of the sealing compound 116, the heat dissipation of the chip 1000 will be hindered, so 'under certain conditions, it will generate high temperature in the conventional semiconductor chip package structure. The wafer 100 may be damaged or damaged. In addition, the lead frame is generally made of a metal with good conductivity, such as copper, but the sealing compound is made of an insulating material.

Page 4 ΓΙΤ4326 5 8_ V. Description of the invention (2) The bonding adhesion is not good, so when there is a temperature change, stress will be generated on the interface between the lead frame and the sealing compound due to the difference in thermal expansion coefficient, which will cause delamination. When the interface between the lead frame and the sealing compound is peeled off, the surrounding moisture will permeate and accumulate to the peeled area through the sealing compound, and once the moisture accumulates in the sealing compound, when the temperature increases rapidly, the accumulated Moisture will instantly evaporate into water vapor and be generated in the peeled area. An internal pressure will break the nearby sealant, which will cause a crack in the conventional packaging structure. The aforementioned process is common in infrared rays; Radiation reflow (IR reflow) process. Summary of the invention: The main purpose of the present invention is to provide a semiconductor chip package structure without outer pins, which includes a lead frame for carrying a chip, and the lead frame and the chip are covered with a gel, wherein the lead frame is under the lead frame. The surface is exposed on the encapsulant to increase heat dissipation efficiency, and the top surface of the lead frame is provided with a cupric oxide X ide covering layer to increase the adhesion between the lead frame and the encapsulant. The outer-lead-free semiconductor chip package structure according to the present invention mainly includes a lead frame, a semiconductor chip, and a colloid. The lead frame includes a chip holder and a plurality of leads. A surface of the lead frame is provided with a cupric oxide covering layer, wherein the lower surface of the lead frame and the inner ends of the plurality of wires are exposed to the copper oxide covering layer. The front side of the semiconductor wafer is provided with a plurality of wafer bonding pads for connecting its internal circuits, and the back side of the semiconductor wafer is a wafer holder fixed to the lead frame with a conductive adhesive. The plurality of wafer pads of the semiconductor wafer are connected by a plurality of connecting wires.

4 326 5 8 V. Description of the invention (3) and the plurality of conductive semiconductor wafers are exposed by the sealing gel according to the operation of the lower surface of the wire frame of the present invention to enhance the surface of the hair. The adhesion of the interface can increase the probability and prevent the line (bond line. In addition, the adhesion prevents the illustration: In order to make this feature obvious, the following is a detailed description such as the connection of the inner end of the line. The sealing system The lead frame and a plurality of connecting wires are covered, so that the outer surface of the lead frame is barely exposed, and the semiconductor chip package structure is exposed. Since the lead system is exposed to the sealing compound, the normal heat of the semiconductor chip can be directly passed through. The chip holder of the lead frame is transmitted due to the heat dissipation efficiency of the package structure. In addition, the cupric oxide covering layer of the lead frame is rough because the copper oxide system is rough, so In addition to chemical bonding, the mechanism also has a mechanical interlocking mechanism. The adhesion between the lead frame and the sealing gel is used to reduce the moisture around the peeling directly through the lead frame and The colloidal access) built up to a non-permeable outer lead of the semiconductor chip package configuration α oxide layer can also enhance covering the copper lead frame and the conductive stopper wins peeling. In the meantime, the above and other objects, features, and advantages can be changed. Fig. 1 Fig. 2 Fig. 3 Fig. 3 Basically, the preferred embodiment of the present invention is given in conjunction with the accompanying drawings. A cross-sectional view of a semiconductor chip package structure; a cross-sectional view of a first preferred embodiment of the invention; a top view of a lead frame according to one of the first preferred embodiments of the invention; a bottom view of the first preferred embodiment of the invention; and

Page 6 酽 4 32 6 5 8 V. Description of the invention (4) Figure 5: A sectional view of the second preferred embodiment of the present invention. Description of drawing number: 100 chip 1 06 outer leg 1 0 7 inner leg 111 chip holder 1 1 4 silver glue 1 1 5 connecting wire 116 sealing compound 117 chip pad 2 0 0 semiconductor chip package structure without outer lead 210 Wafer 212 Silver glue 2 20 Lead frame 220a Cover layer 222 Wafer holder 222a Area 2 24 Wire 2 2 4a Inner end 2 2 5 Support ribs 2 30 Gold wire 2 3 2 Gold wire 2 4 0 Sealing body 3 0 0 No external lead Foot semiconductor chip package structure 3 2 0 Lead frame 326 notch Description of the invention: First, please refer to the second to fourth figures, which disclose the outer pin semiconductor chip package structure 2 0 according to the first preferred embodiment of the present invention. It includes-the chip 210 is disposed on a lead frame 220. The lead frame 220 (see FIG. 3) includes a wafer support 222 and a plurality of wires 224. The wafer support 222 is connected to the lead frame 2 2 0 through a plurality of supporting bars 225. A surface of the lead frame 220 is provided with a cupric oxide covering layer 220a, wherein the lower surface of the lead frame 220 and the inner ends 224a of the plurality of wires 2 24 are exposed on the copper oxide covering layer 220a. The front side of the semiconductor wafer 210 is provided with a plurality of wafer bonding pads (not shown in the figure) for connecting its internal circuits. The back side of the semiconductor hip chip 210 is fixed on the back with a conductive adhesive such as silver glue 2 1 2 Chip holder of the lead frame 2 2 0

Γ, 432658 V. Description of the invention (5) 2 2 2 The plurality of wafer pads of the semiconductor wafer 21 are electrically connected to the inner end 224a of the plurality of wires 2 24 through a plurality of connection wires such as gold wires 2 30. The inner end 224a of the plurality of wires 224 is preferably plated with a metal (not shown in the figure) having a good bonding force with a conventional bonding wire material. The seal gel 240 covers the lead frame 220, the semiconductor wafer 21, and a plurality of gold wires 2 3 0 'so that the lower surface of the lead frame 2 2 0 (that is, the wafer holder 2 2 2' plural The wires 2 2 4 and the lower surfaces of the plurality of supporting ribs 2 2 5) are exposed to the sealing compound 2 4 0 (refer to the fourth figure). Please refer to the second figure again. The wafer holder 2 2 2 preferably has a partial area 222a exposed on the copper oxide cover layer 22a. The area 2 2 2 a of the wafer socket 222 is connected to the semiconductor wafer 2 1 0 by a connection wire such as a gold wire 2 3 2 to provide a ground function. Preferably, a part of the region 222a of the wafer holder 2 2 2 may be plated with a metal (not shown in the second frame) having a good binding force with a conventional connecting wire material. The fifth figure is an outer-lead-free semiconductor chip packaging structure 300 according to the second preferred embodiment of the present invention. The package structure is provided with a plurality of notches 3 2 6 on the lower surface of the lead frame 320. 300 is the same as the package structure 200 of the second figure. The notch 326 on the lower surface of the lead frame 320 is preferably formed by etching on the periphery of the wafer holder 2 2 2 or the inner end 224 a of the plurality of leads 2 2 4. When the encapsulation structure 300 is subjected to an encapsulation process, a gap 326 on the lower surface of the lead frame 32 can be filled by a plastic compound, thereby providing a mechanical interlocking function when the plastic is cured. The bonding force between the lead frame 3 2 0 and the sealing compound 240 is further strengthened. In addition, the surface of the notch 326 may also have a copper oxide cover layer to increase its contact with the sealant.

32 6 5 〇 5. Description of the invention (6) Adhesion between bodies. The lead frame according to the embodiment of the present invention is preferably made of copper or an alloy thereof. Alternatively, the lead frame may be made of iron, nickel, or an alloy thereof, and then plated with copper. According to a preferred embodiment of the present invention, the copper oxide coating of the lead frame is preferably anodized (anodic oxidation) method: (A) first degrease the surface of the lead frame, degrease, and polish (polish); (B) The area where the surface of the lead frame is not covered with copper oxide (such as the lower surface of the lead frame and the inner ends of the plurality of wires) is protected by adhesive tape; (C) The lead frame that has been pasted with protective tape As the anode, it is electrolyzed in an alkaline solution (such as sodium hydroxide electrolyte), thereby forming a copper oxide covering layer on the surface of the lead frame which is not protected by tape. The main crystal structure of the copper oxide coating is a high density cluster of black needle-like crystals. Therefore, the surface of the copper oxide cover layer is black and rough. According to the lead frame of the present invention, the inner end of the plurality of wires and a part of the chip holder used for grounding can be bonded to a layer of a metal with a good bonding force with a conventional bonding wire (eg Gold or silver), apply protective tape, and then go through step (C). It can be understood that the lead frame according to the preferred embodiment of the present invention can also be subjected to steps (A) and (C), and then the formed copper oxide covering layer can be subjected to conventional mechanical abrasion or { The chemical etch is removed from areas of the lead frame that do not have a copper oxide coating (such as the lower surface of the lead frame and the inner ends of the plurality of wires). The copper oxide covering layer of the lead frame according to the preferred embodiment of the present invention may also be coated by chemical oxidation method: steps (A) and (B)

Page 9 Γ Adhesive 43? F: R ft_ V. Description of the invention (7) Same as above; (C ') Immerse the lead frame with protective tape immersed in a chemical oxidation solution (for example, 3% sodium chloride + 1% Sodium hydroxide + 1% sodium phosphate), heated to 8 5 hours to make this coating glue to avoid covering its positive, dense plastic by copper seal to avoid copper peeling on the sheet out of the copper high seal, chemical conversion The structure can be chemically sealed by crystal transmission. It is loaded with oxygen, mounted on the oxygen, and the body is filled with oxygen. In the _line seal, the anti-construction guide sends a layer of material plus a U-guide, and the structure The half piece of the plastic structure with the cover is added by the external force to install the crystal into the cover and the & through the welding and sealing the increase of the copper seal is possible ^ this time. The attached sheet is used to surface the work of the system until the crystal of the problem, the wire is guided by the b-diversity radiation of the oxygen gap, and it should be guided by the glue that locks the U water I line. The external 0+ translucent split glue in the all-sealed half-sealed by the scattered line, and the mechanism h is guided by the electric tortoise of the red turtle. If the body guide 4 is connected to the crystal, this layer is used to prevent the shell and the outer shell from being exposed, the cover crystal junction MJPf prevents the 11 frame, and the frame can be naked. And the thermal speed of the wire of d. This e) needle can be combined with the temperature to increase the fastness of the guiding surface = 1 rate after the color of the needle; ^ Highly promotes the heat generation rate. OX color blackening machine wire is produced under rapid increase. The effect of C black and solid solids can be quickly promoted according to what can be promoted. It is expected that "the distance from the connection is also based on the plastic layer that can be scattered when the set is up. Incap

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Claims (1)

Year " i. Month ^ §112494 The above columns are filled by this Office) Lacquer ΛΛΙ Case No .: 1 Bu, hk > / Announcement of this invention patent specification 432658 Chinese non-lead semiconductor chip package construction invention name English name (Chinese) 1. Li Shiwen 2. Lin Junhong 3. Zhao Xinghua 4. Tao Shu inventor name (English) 1. LI Sai Man 2. LIN Chun Hung 3. CHAO Shin Hua 4. TAO Su Nationality 1. Republic of China 2. Republic of China 3. Republic of China 4. Residence and Domicile 1. 3rd Floor, No. 97, Chongxin Street, East District, Tainan City 2. Gushan, Kaohsiung City 9th Floor, No. 72, Huafeng Street, District 3. No. 6, Lane 63, Lane 56, Heguang Street, Zuoying District, Kaohsiung City 4. No. 72 ~ 2, Chongshi New Village, Zuoying District, Kaohsiung City Name (Name) (Chinese) 1. Sun Moon Semiconductor Manufacturing Co., Ltd. Name 1. Advanced Semiconductor Engineering, Inc. (Name) (English) National borrowing 1. Republic of China applicant residence, residence (office) 1, Kaohsiung Nanzi Processing Export Zone No. 26 Jingsan Road 26 Representative Name (Chinese) 1. Name of Zhang Qiansheng's Representative (English) 1. 苐 丨 Page