TW430813B - A circuit and method for retaining data in dram in a portable electronic device - Google Patents

A circuit and method for retaining data in dram in a portable electronic device

Info

Publication number
TW430813B
TW430813B TW087117720A TW87117720A TW430813B TW 430813 B TW430813 B TW 430813B TW 087117720 A TW087117720 A TW 087117720A TW 87117720 A TW87117720 A TW 87117720A TW 430813 B TW430813 B TW 430813B
Authority
TW
Taiwan
Prior art keywords
dram
reset
reset signal
circuit
cpu
Prior art date
Application number
TW087117720A
Other languages
English (en)
Inventor
Ralph Snowden
Wendy Reed
Glen James Zoerner
Wai-Kin Steven Kwan
On-Ki Andrew Chu
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW430813B publication Critical patent/TW430813B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Memory System (AREA)
TW087117720A 1997-10-27 1998-10-27 A circuit and method for retaining data in dram in a portable electronic device TW430813B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/958,645 US5825706A (en) 1997-10-27 1997-10-27 Circuit and method for retaining data in DRAM in a portable electronic device

Publications (1)

Publication Number Publication Date
TW430813B true TW430813B (en) 2001-04-21

Family

ID=25501144

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087117720A TW430813B (en) 1997-10-27 1998-10-27 A circuit and method for retaining data in dram in a portable electronic device

Country Status (4)

Country Link
US (1) US5825706A (zh)
JP (1) JPH11265311A (zh)
CN (1) CN1109302C (zh)
TW (1) TW430813B (zh)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3493111B2 (ja) * 1997-02-25 2004-02-03 株式会社東芝 半導体集積回路装置
US6553481B1 (en) * 2000-04-18 2003-04-22 Swapcard.Com Inc. System and method for smart card with memory
US6829677B1 (en) * 2000-05-18 2004-12-07 International Business Machines Corporation Method and apparatus for preserving the contents of synchronous DRAM through system reset
US6611158B2 (en) * 2001-07-24 2003-08-26 Koninklijke Philips Electronics N.V. Method and system using a common reset and a slower reset clock
KR100434492B1 (ko) * 2001-09-27 2004-06-05 삼성전자주식회사 메모리를 제어하는 클럭 발생 장치를 구비하는 반도체메모리 장치 및 클럭 발생 방법
JP2005141845A (ja) * 2003-11-07 2005-06-02 Fujitsu Ltd 半導体装置
CN100501634C (zh) * 2003-12-31 2009-06-17 深圳市朗科科技股份有限公司 数据处理装置
JP2006350889A (ja) * 2005-06-20 2006-12-28 Fujitsu Ltd 半導体集積回路
US8270228B2 (en) * 2009-02-18 2012-09-18 Elpida Memory, Inc. Semiconductor device having nonvolatile memory element and data processing system including the same
JP2010192042A (ja) * 2009-02-18 2010-09-02 Elpida Memory Inc 半導体装置及びこれを備えるデータ処理システム
KR20150008441A (ko) * 2012-05-07 2015-01-22 마이크로칩 테크놀로지 인코포레이티드 리셋 조건 트레이스 기능들을 갖춘 프로세서 디바이스
CN104866051B (zh) * 2014-02-24 2018-09-07 华为技术有限公司 一种预测狗复位发生的方法、微控制器及嵌入式系统
CN105280215B (zh) * 2014-06-09 2018-01-23 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
CN104317728B (zh) * 2014-10-13 2018-03-23 大唐移动通信设备有限公司 一种安全复位存储设备的方法和装置
CN105608023A (zh) * 2014-10-29 2016-05-25 梅特勒-托利多(常州)测量技术有限公司 嵌入式系统软件的dram存储数据保护方法及系统
CN109656854A (zh) * 2017-10-12 2019-04-19 光宝科技股份有限公司 固态储存装置的重置电路及其重置方法
CN109918223A (zh) * 2019-05-06 2019-06-21 深圳市钮为通信技术有限公司 Cpu复位监控装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5321661A (en) * 1991-11-20 1994-06-14 Oki Electric Industry Co., Ltd. Self-refreshing memory with on-chip timer test circuit
JP2824712B2 (ja) * 1992-03-25 1998-11-18 三菱電機株式会社 半導体メモリ装置
US5402384A (en) * 1992-04-24 1995-03-28 Citizen Watch Co., Ltd. Dynamic ram
US5537564A (en) * 1993-03-08 1996-07-16 Zilog, Inc. Technique for accessing and refreshing memory locations within electronic storage devices which need to be refreshed with minimum power consumption
JPH06282985A (ja) * 1993-03-30 1994-10-07 Hitachi Ltd ダイナミック型ｒａｍ

Also Published As

Publication number Publication date
US5825706A (en) 1998-10-20
JPH11265311A (ja) 1999-09-28
CN1215865A (zh) 1999-05-05
CN1109302C (zh) 2003-05-21

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Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees