TW423139B - Method for forming barrier layer on copper surface - Google Patents

Abstract

The present invention provides a method for forming barrier layer on copper surface, which comprises: first, forming a copper member having an exposed surface on the surface of the semiconductor substrate; then, comprehensively forming a diffusion barrier layer such as tantalum nitride; next, removing the diffusion barrier layer on an area beyond the surface of the above mentioned copper interconnects. With the method of the present invention, the performance of the device can be promoted.

Description

423139

February is about a manufacturing process of a semiconductor integrated circuit f, in particular, a manufacturing process of forming a diffusion barrier iayer in copper metal interconnects. In the case of non-wired, semi-wired, multi-layered internal contact, or due to the characteristics of the copper material, the metal conducting elements used to transmit telecommunications are also indispensable. Each element must perform its desired function by an appropriate internal device. In addition to making various layers of wire patterns today, i a) must also be used as a communication channel between the component contact area and the wires. In terms of the material of the interconnector, the advantages such as flexibility and high ductility have attracted much attention because the copper interconnects on the surface of the copper interconnects which easily diffuse into the insulating layer such as an oxide layer form a diffusion barrier layer. Regarding what kind of electronic conductive body circuit is used for electrical connection, in the connection process, 孑 L (contact v is one of the high conductivity of the metal of the multi-layer wire. However, 'must be exposed below, that is, using Figures 1A ~ 1E, To explain the manufacturing process of a copper metal interconnect with a copper diffusion barrier layer (silicon nitride layer) according to the conventional technology. First, please refer to FIG. 1A, which shows that a copper metal with an exposed upper surface is formed on the semiconductor substrate 10. Interconnect 12 ^ Then, 'Please refer to FIG. 1B, a silicon nitride layer (S i 3 N 4) 1 4 is formed on the surface of the semiconductor substrate 10 as a diffusion barrier layer for copper. Then' Please Referring to FIG. 1C, an insulating layer 16 made of an oxide material is formed over the diffusion barrier layer composed of the silicon nitride layer 14 described above. Then, referring to FIG. 1D, a selective etching step is performed to form a dielectric layer. The double damascene contact hole of the hole 17 and the trench 18 is then filled with copper metal in the double damascene contact hole as shown in FIG. 1E to form a copper metal interconnect.

Page 4 V. Description of the invention (2) With the insulation (k) up to 6 ~ 9 made of the above silicon material as a piece of performance (per the method based on the upper barrier layer in which the barrier layer belongs to the interconnections has The above-mentioned copper member containing the diffusion barrier layer and the above-mentioned copper member system is a copper-gold barrier layer, which is a thick metal layer. Furthermore, the selective etching process is specifically described below: The simple process of FIG. 1A illustrates the process, Although it can effectively prevent copper metal from diffusing into the oxidized material layer, the dielectric constant of the silicon nitride material is much larger than the oxide layer with a dielectric constant of about 4, and the nitrided diffusion barrier layer is used to increase the RC of the wire. Delay, which affects the element's performance) ° Therefore, the object of the present invention is to provide a method on the surface of copper metal, which can improve the device performance by changing the material of the diffusion barrier layer and the copper-gold manufacturing steps. For the stated purpose, the present invention provides a copper metal surface forming resistor, including the following steps: (a) forming a copper metal member on the surface of a semiconductor substrate; (b) forming a button with a comprehensive structure; and (c) removing the copper Diffusion barrier layer outside the surface of the metal member. A method for forming a diffusion barrier layer on a metal surface, in which a copper metal plug or a copper metal interconnect is used. The button-containing nitride layer or giant gold with an expansion between 30 angstroms and 1,000 angstroms. The method of step (c) for removing the diffusion barrier layer containing tantalum includes engraving and chemical mechanical polishing. The above-mentioned features, advantages, and advantages of the present invention can be more clearly described as a preferred embodiment, and will be described in detail in conjunction with the accompanying drawings: ~ Figure 1E is a conventional technology having a steel diffusion barrier layer (nitride) Xi

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V. Description of the invention (3) Layer) The schematic diagram of the copper metal interconnect process. Figures 2A to 2E are schematic cross-sectional views of a copper metal interconnect process with a steel diffusion barrier layer (nitriding group layer) according to an embodiment of the present invention. Explanation of the month symbol 100 ~ semiconductor substrate. 102 ~ copper metal components (copper metal interconnects). 104 ~ A diffusion barrier layer (nitride button layer) containing a button. 104a ~ Diffusion barrier with buttons. 10 6 ~ oxidized insulating layer. 1 0 7 ~ via hole. 108 ~ groove. 110 ~ Double inlaid copper interconnects. Examples The following uses Figures 2A to 2E to illustrate the manufacturing process of a steel metal interconnect with a copper diffusion barrier layer (tantalum nitride layer) according to an embodiment of the present invention. First, please refer to FIG. 2A, which is the initial step of the present invention, which shows a semiconductor substrate 100 formed with a number of integrated circuit elements (MOS transistors, etc.). The copper metal member 102 is, for example, a steel metal plug < is a copper metal interconnect, and the slightly concave surface is caused by chemical mechanical polishing (CMP) treatment. In addition, a thin layer such as titanium nitride (ΠN) may be formed on the bottom and side walls of the copper metal member 102. Next, please refer to FIG. 2B.

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V. Description of the invention (4) Planar formation of a group-containing diffusion barrier layer 104 having a thickness of 30 to 1000 angstroms, such as a giant nitride layer formed by chemical vapor deposition (CVD) (TaN), or a tantalum metal layer (T a) formed by a physical sputtering method. Among them, the nitride button layer has a better diffusion barrier ability, which can effectively block the oxidized insulating layer described later on the bare copper. (Ox i de insulated) Diffusion. Then, referring to FIG. 2C, a photoresist pattern (not shown) is formed by using a lithography process (coating, exposure, development, and baking of negative photoresi st), and then an etching step is used to etch the unlit photoresist. The button-containing diffusion barrier layer 104 covered by the resist pattern removes the tantalum-containing diffusion barrier layer 104 in areas other than the above-mentioned copper metal member 102, and leaves a barrier 104 covering the copper metal member 102 . Of course, chemical mechanical polishing (CMP) can be used instead of the lithography process and the etching step to remove the excess diffusion barrier layer 104. The purpose of removing the diffusion barrier layer formed by the redundant tantalum nitride layer and the like is that since materials such as tantalum nitride have conductivity, it must be removed in order to avoid short circuits between the interconnects. Secondly, please refer to FIG. 2D, use a gas such as tetraethoxysilane (TE0S) as a reaction gas, and comprehensively form the semiconductor substrate 100 and the barrier 104a by chemical vapor deposition.的 oxidative insulating layer 106. Finally, referring to FIG. 2E, a conventional method is used to selectively etch the oxide insulating layer in two stages to form a mosaic contact hole DC that exposes the above-mentioned barrier 104a, and the mosaic contact hole includes a via hole 1 07 and groove 1 08. Then use physical vapor deposition (pvD) or electroplating

5. Description of the invention (5) (electroplating) Filling the above-mentioned contact hole DC with a material such as copper metal to form a double-inlaid copper interconnecting line 110. Features and Effects of the Invention After the formation of steel metal interconnects and other components, the present invention uses materials such as low-k dielectric nitride buttons as diffusion barriers, and cooperates with diffusion barriers other than copper metal interconnects. The step of removing the barrier layer can not only effectively prevent the copper metal from expanding to the oxide insulating layer, but also reduce the RC time delay and improve the device performance. Ding ", although the present invention has limited the invention, any person skilled in the art," but he does not use God and the scope "should be able to make changes and embellishments;: from the scope of the patent application attached to the present invention ^ Protection scope of the present invention

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Claims (1)

^ 23139 6. Scope of patent application 1. A method for forming a barrier layer on a copper metal surface, including the following steps: (1) forming a copper metal with a bare surface on the surface of a semiconductor substrate; c) comprehensively forming a diffusion containing tantalum A barrier layer; and (c) removing the button-containing diffusion barrier layer in a region other than the surface of the copper-gold layer member. 2. The method for forming a barrier layer on a copper metal surface as described in item 1 of the scope of patent application, wherein the copper metal member is a copper metal plug. 3. The surface shape of the copper metal as described in item 1 of the scope of patent application P and a barrier layer method, in which the above-mentioned copper metal member is a copper metal interconnect 4. The method of forming a barrier layer on a copper metal surface as described in item 1 of the scope of the patent application, wherein the diffusion barrier layer containing tantalum is tantalum Gold 5. The method for forming a barrier layer on the surface of a copper metal as described in item 4 of the scope of the patent application, wherein the thickness of the tantalum metal layer is between 30 Angstroms and 1,000 Angstroms. 6. The method for forming a friction barrier layer on the surface of a copper metal as described in item 1 of the scope of patent application, wherein the diffusion barrier layer containing tantalum is nitrided 7. The surface of the copper metal as described in item 6 of the scope of patent application Method of forming a barrier layer 'wherein the thickness of the above nitrided giant layer is between 30 angstroms and 1000 angstroms. 8. A method for forming a barrier layer on the surface of a copper metal as described in item 1 of the scope of the patent application, wherein the method for removing the diffusion barrier layer containing tantalum in step (C) is a selective etching method. Page 9 6. The method of applying the diffusion barrier layer formed on the surface of steel and metal in the scope of patent application is 9. The method of the layer described in item 1 of the scope of patent application, wherein step (c) removes the chemical mechanical polishing method. Layer 10: The method as described in the first item of the patent application scope, wherein step (c) further includes the following steps: forming a barrier on the surface (i) comprehensively forming an oxide insulating layer; group (ii) selectively etching the oxide insulating layer Mosaic contact hole of the diffusion barrier layer. S to form the exposed layer including the following for use as steel 11. A step of forming a barrier layer on a copper metal surface: 'a copper metal with an exposed surface (a) forms an interconnect on the surface of a semiconductor substrate; (b) Forming a button metal layer or a nitride button layer diffusion barrier comprehensively; and (c) removing the above-mentioned group metal layer or nitride group layer in a region other than the surface of the copper metal interconnect line. 12. The method for forming a barrier layer on the surface of a steel metal as described in item 11 of the scope of the patent application, wherein the method for removing the group metal or the short nitrided layer in step (c) is a selective etching method; > 13. As a patent application The method for forming a k-barrier layer on the surface of a copper metal as described in item 11, wherein the method of removing the tantalum metal or tantalum nitride layer in step (c) is a chemical mechanical polishing method. 14. The method for forming a barrier layer on the surface of a steel metal as described in item 11 of the scope of the patent application, wherein the thickness of the tantalum metal or nitride group layer is between 30 angstroms Page 10 423139 VI. The scope of patent application is between 100 Angstroms. 15. The method for forming a barrier layer on the surface of a copper metal according to item 11 of the scope of patent application, wherein step (c) further includes the following steps: (i) forming a comprehensive oxide insulating layer; (ii) selectively etching the above The insulating layer is oxidized to form a mosaic contact hole exposing the button metal layer or the tantalum nitride layer. Page 11