TW420905B - Clock monitor circuit and syncuronous semiconductor memory device using this circuit - Google Patents

Clock monitor circuit and syncuronous semiconductor memory device using this circuit Download PDF

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Publication number
TW420905B
TW420905B TW087119178A TW87119178A TW420905B TW 420905 B TW420905 B TW 420905B TW 087119178 A TW087119178 A TW 087119178A TW 87119178 A TW87119178 A TW 87119178A TW 420905 B TW420905 B TW 420905B
Authority
TW
Taiwan
Prior art keywords
clock signal
aforementioned
delay
level
clock
Prior art date
Application number
TW087119178A
Other languages
English (en)
Chinese (zh)
Inventor
Eun-Cheol Kim
Kook-Hwan Kown
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW420905B publication Critical patent/TW420905B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/225—Clock input buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/19—Monitoring patterns of pulse trains
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2227—Standby or low power modes

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Manipulation Of Pulses (AREA)
TW087119178A 1998-05-29 1998-11-19 Clock monitor circuit and syncuronous semiconductor memory device using this circuit TW420905B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980019831A KR100286099B1 (ko) 1998-05-29 1998-05-29 클럭모니터회로및이를이용한동기식반도체메모리장치

Publications (1)

Publication Number Publication Date
TW420905B true TW420905B (en) 2001-02-01

Family

ID=19537913

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087119178A TW420905B (en) 1998-05-29 1998-11-19 Clock monitor circuit and syncuronous semiconductor memory device using this circuit

Country Status (4)

Country Link
US (1) US6307412B1 (enExample)
JP (1) JP2000013206A (enExample)
KR (1) KR100286099B1 (enExample)
TW (1) TW420905B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112466357A (zh) * 2020-12-07 2021-03-09 普冉半导体(上海)股份有限公司 存储器数据读取系统

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6552578B1 (en) 2002-06-10 2003-04-22 Pericom Semiconductor Corp. Power down circuit detecting duty cycle of input signal
EP1538752A1 (en) * 2003-11-28 2005-06-08 Freescale Semiconductor, Inc. Clock pulse generator apparatus with reduced jitter clock phase
US7417482B2 (en) * 2005-10-31 2008-08-26 Qualcomm Incorporated Adaptive voltage scaling for an electronics device
KR100917619B1 (ko) 2007-11-09 2009-09-17 주식회사 하이닉스반도체 반도체 소자와 그의 구동 방법
WO2010082954A1 (en) * 2009-01-15 2010-07-22 Linear Technology Corporation Pulse-width modulation (pwm) with independently adjustable duty cycle and frequency using two adjustable delays
US10453414B2 (en) * 2017-08-16 2019-10-22 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd GOA circuit and LCD device
US10587253B1 (en) 2018-11-29 2020-03-10 Qualcomm Incorporated Ring oscillator-based programmable delay line
KR102833955B1 (ko) 2020-01-10 2025-07-15 삼성전자주식회사 호스트 장치로부터의 레퍼런스 클럭에 기반하여 전력 상태를 변경하도록 구성되는 스토리지 장치 및 그 동작 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62173692A (ja) * 1986-01-28 1987-07-30 Fujitsu Ltd 半導体集積回路
US4988901A (en) * 1988-04-15 1991-01-29 Sharp Kabushiki Kaisha Pulse detecting device for detecting and outputting a pulse signal related to the slower frequency input pulse
KR920005672Y1 (ko) * 1990-04-17 1992-08-18 삼성전자 주식회사 숄더노이즈 제거회로
US5184032A (en) * 1991-04-25 1993-02-02 Texas Instruments Incorporated Glitch reduction in integrated circuits, systems and methods
US5146110A (en) * 1991-05-22 1992-09-08 Samsung Electronics Co., Ltd. Semiconductor memory with substrate voltage generating circuit for removing unwanted substrate current during precharge cycle memory mode of operation
KR950004855B1 (ko) * 1992-10-30 1995-05-15 현대전자산업 주식회사 반도체 메모리 소자의 어드레스 전이 검출 회로
US6078193A (en) * 1998-04-06 2000-06-20 Graychip, Inc. Apparatus and method for providing a static mode for dynamic logic circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112466357A (zh) * 2020-12-07 2021-03-09 普冉半导体(上海)股份有限公司 存储器数据读取系统

Also Published As

Publication number Publication date
KR19990086718A (ko) 1999-12-15
JP2000013206A (ja) 2000-01-14
US6307412B1 (en) 2001-10-23
KR100286099B1 (ko) 2001-04-16

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MK4A Expiration of patent term of an invention patent