TW364179B - A method for producing trench isolation - Google Patents

A method for producing trench isolation

Info

Publication number
TW364179B
TW364179B TW086118433A TW86118433A TW364179B TW 364179 B TW364179 B TW 364179B TW 086118433 A TW086118433 A TW 086118433A TW 86118433 A TW86118433 A TW 86118433A TW 364179 B TW364179 B TW 364179B
Authority
TW
Taiwan
Prior art keywords
insulating layer
trench isolation
carried out
trench
dish
Prior art date
Application number
TW086118433A
Other languages
Chinese (zh)
Inventor
Jin-Lai Chen
Jiun-Yuan Wu
Water Lur
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW086118433A priority Critical patent/TW364179B/en
Priority to JP10136698A priority patent/JP3182124B2/en
Application granted granted Critical
Publication of TW364179B publication Critical patent/TW364179B/en

Links

Landscapes

  • Element Separation (AREA)

Abstract

A method for producing trench isolation is disclosed. First, a semiconductor substrate is provided, and a first insulating layer and trench are formed thereon. Then, a second insulating layer is covered, and a dish is formed on the trench. A third insulating layer is covered. Subsequently, a first polishing step is carried out to polish the third insulating layer until the second insulating layer is exposed, while saving the part of third insulating layer at the said dish. Then etching is carried out using the remaining third insulating layer as mask until the first insulating layer is exposed, while saving the third insulating layer and the second insulating layer thereunder which protrudes from the surface of the first insulating layer. Finally, the second polishing step is carried out to remove the part protruded from the surface of the first insulating layer to form the trench isolation structure provided in this invention. This structure completely eliminates the dishing problem known in prior arts, thereby improving the stability of the component.
TW086118433A 1997-12-08 1997-12-08 A method for producing trench isolation TW364179B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW086118433A TW364179B (en) 1997-12-08 1997-12-08 A method for producing trench isolation
JP10136698A JP3182124B2 (en) 1997-12-08 1998-04-13 Trench forming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW086118433A TW364179B (en) 1997-12-08 1997-12-08 A method for producing trench isolation

Publications (1)

Publication Number Publication Date
TW364179B true TW364179B (en) 1999-07-11

Family

ID=21627375

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086118433A TW364179B (en) 1997-12-08 1997-12-08 A method for producing trench isolation

Country Status (2)

Country Link
JP (1) JP3182124B2 (en)
TW (1) TW364179B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4171268B2 (en) * 2001-09-25 2008-10-22 三洋電機株式会社 Semiconductor device and manufacturing method thereof
JP4660667B2 (en) * 2004-03-09 2011-03-30 出光興産株式会社 TFT substrate, sputtering target, liquid crystal display device, pixel electrode, transparent electrode, and manufacturing method of TFT substrate

Also Published As

Publication number Publication date
JPH11176923A (en) 1999-07-02
JP3182124B2 (en) 2001-07-03

Similar Documents

Publication Publication Date Title
CA1043473A (en) Method for forming recessed dielectric isolation with a minimized "bird's beak" problem
KR970067826A (en) Trench isolation
TW327700B (en) The method for using rough oxide mask to form isolating field oxide
US6599813B2 (en) Method of forming shallow trench isolation for thin silicon-on-insulator substrates
TW377501B (en) Method of dual damascene
TW377489B (en) Manufacturing process of shallow trench isolation area
TW368727B (en) Manufacturing method for shallow trench isolation structure
TW429513B (en) Method of forming shallow trench isolation of semiconductor device
TW430946B (en) Dual damascene process
TW364179B (en) A method for producing trench isolation
KR100895825B1 (en) Method for forming isolation layer in semiconductor device
TW368721B (en) Local oxidation method employing polycide/silicon nitride clearance wall by controlling the width of pad oxide and silicon nitride to optimize the forming of isolation area
EP0878836A3 (en) Planarising a semiconductor substrate
TW347576B (en) Method to produce an integrated circuit arrangement
KR100226728B1 (en) Method of forming a device isolation film of semiconductor device
KR19990006000A (en) Device Separation Method of Semiconductor Device
KR100781871B1 (en) Method of forming field oxide of semiconductor device
JP3418386B2 (en) Method for manufacturing semiconductor device
TW377486B (en) Method of manufacturing shallow trench isolation structure
TW429509B (en) Manufacturing method for protection layer
KR980006094A (en) Device isolation method of semiconductor device
KR100900244B1 (en) Method for forming isolation layer of semiconductor device
TW377487B (en) Process of isolating active area
TW291580B (en) Manufacturing process of shallow isolation trench
TW353794B (en) Method of shallow trench isolation using selective liquid phase deposition of silicon oxide